Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | ** System Bus Adapter (SBA) I/O MMU manager |
| 3 | ** |
| 4 | ** (c) Copyright 2000-2004 Grant Grundler <grundler @ parisc-linux x org> |
| 5 | ** (c) Copyright 2004 Naresh Kumar Inna <knaresh at india x hp x com> |
| 6 | ** (c) Copyright 2000-2004 Hewlett-Packard Company |
| 7 | ** |
| 8 | ** Portions (c) 1999 Dave S. Miller (from sparc64 I/O MMU code) |
| 9 | ** |
| 10 | ** This program is free software; you can redistribute it and/or modify |
| 11 | ** it under the terms of the GNU General Public License as published by |
| 12 | ** the Free Software Foundation; either version 2 of the License, or |
| 13 | ** (at your option) any later version. |
| 14 | ** |
| 15 | ** |
| 16 | ** This module initializes the IOC (I/O Controller) found on B1000/C3000/ |
| 17 | ** J5000/J7000/N-class/L-class machines and their successors. |
| 18 | ** |
| 19 | ** FIXME: add DMA hint support programming in both sba and lba modules. |
| 20 | */ |
| 21 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/types.h> |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/spinlock.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/init.h> |
| 27 | |
| 28 | #include <linux/mm.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/pci.h> |
FUJITA Tomonori | b61e8f4 | 2007-10-23 09:30:28 +0200 | [diff] [blame] | 31 | #include <linux/scatterlist.h> |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 32 | #include <linux/iommu-helper.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
| 34 | #include <asm/byteorder.h> |
| 35 | #include <asm/io.h> |
| 36 | #include <asm/dma.h> /* for DMA_CHUNK_SIZE */ |
| 37 | |
| 38 | #include <asm/hardware.h> /* for register_parisc_driver() stuff */ |
| 39 | |
| 40 | #include <linux/proc_fs.h> |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 41 | #include <linux/seq_file.h> |
Paul Gortmaker | 6caddf0 | 2011-08-11 13:24:07 -0400 | [diff] [blame] | 42 | #include <linux/module.h> |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 43 | |
Kyle McMartin | 1790cf9 | 2006-08-24 21:32:49 -0400 | [diff] [blame] | 44 | #include <asm/ropes.h> |
Kyle McMartin | 6f03495 | 2006-08-13 22:18:57 -0400 | [diff] [blame] | 45 | #include <asm/mckinley.h> /* for proc_mckinley_root */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <asm/runway.h> /* for proc_runway_root */ |
Rolf Eike Beer | 4a8a078 | 2012-05-10 23:08:17 +0200 | [diff] [blame] | 47 | #include <asm/page.h> /* for PAGE0 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/pdc.h> /* for PDC_MODEL_* */ |
| 49 | #include <asm/pdcpat.h> /* for is_pdc_pat() */ |
| 50 | #include <asm/parisc-device.h> |
| 51 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | #define MODULE_NAME "SBA" |
| 53 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | /* |
| 55 | ** The number of debug flags is a clue - this code is fragile. |
| 56 | ** Don't even think about messing with it unless you have |
| 57 | ** plenty of 710's to sacrifice to the computer gods. :^) |
| 58 | */ |
| 59 | #undef DEBUG_SBA_INIT |
| 60 | #undef DEBUG_SBA_RUN |
| 61 | #undef DEBUG_SBA_RUN_SG |
| 62 | #undef DEBUG_SBA_RESOURCE |
| 63 | #undef ASSERT_PDIR_SANITY |
| 64 | #undef DEBUG_LARGE_SG_ENTRIES |
| 65 | #undef DEBUG_DMB_TRAP |
| 66 | |
| 67 | #ifdef DEBUG_SBA_INIT |
| 68 | #define DBG_INIT(x...) printk(x) |
| 69 | #else |
| 70 | #define DBG_INIT(x...) |
| 71 | #endif |
| 72 | |
| 73 | #ifdef DEBUG_SBA_RUN |
| 74 | #define DBG_RUN(x...) printk(x) |
| 75 | #else |
| 76 | #define DBG_RUN(x...) |
| 77 | #endif |
| 78 | |
| 79 | #ifdef DEBUG_SBA_RUN_SG |
| 80 | #define DBG_RUN_SG(x...) printk(x) |
| 81 | #else |
| 82 | #define DBG_RUN_SG(x...) |
| 83 | #endif |
| 84 | |
| 85 | |
| 86 | #ifdef DEBUG_SBA_RESOURCE |
| 87 | #define DBG_RES(x...) printk(x) |
| 88 | #else |
| 89 | #define DBG_RES(x...) |
| 90 | #endif |
| 91 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | #define SBA_INLINE __inline__ |
| 93 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | #define DEFAULT_DMA_HINT_REG 0 |
| 95 | |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 96 | struct sba_device *sba_list; |
| 97 | EXPORT_SYMBOL_GPL(sba_list); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
| 99 | static unsigned long ioc_needs_fdc = 0; |
| 100 | |
| 101 | /* global count of IOMMUs in the system */ |
| 102 | static unsigned int global_ioc_cnt = 0; |
| 103 | |
| 104 | /* PA8700 (Piranha 2.2) bug workaround */ |
| 105 | static unsigned long piranha_bad_128k = 0; |
| 106 | |
| 107 | /* Looks nice and keeps the compiler happy */ |
| 108 | #define SBA_DEV(d) ((struct sba_device *) (d)) |
| 109 | |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 110 | #ifdef CONFIG_AGP_PARISC |
| 111 | #define SBA_AGP_SUPPORT |
| 112 | #endif /*CONFIG_AGP_PARISC*/ |
| 113 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 114 | #ifdef SBA_AGP_SUPPORT |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 115 | static int sba_reserve_agpgart = 1; |
Randy Dunlap | 29a1e1d | 2007-02-05 16:33:59 -0800 | [diff] [blame] | 116 | module_param(sba_reserve_agpgart, int, 0444); |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 117 | MODULE_PARM_DESC(sba_reserve_agpgart, "Reserve half of IO pdir as AGPGART"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | #endif |
| 119 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | |
| 121 | /************************************ |
| 122 | ** SBA register read and write support |
| 123 | ** |
| 124 | ** BE WARNED: register writes are posted. |
| 125 | ** (ie follow writes which must reach HW with a read) |
| 126 | ** |
| 127 | ** Superdome (in particular, REO) allows only 64-bit CSR accesses. |
| 128 | */ |
Grant Grundler | 40d78de | 2006-05-11 00:31:31 -0600 | [diff] [blame] | 129 | #define READ_REG32(addr) readl(addr) |
| 130 | #define READ_REG64(addr) readq(addr) |
| 131 | #define WRITE_REG32(val, addr) writel((val), (addr)) |
| 132 | #define WRITE_REG64(val, addr) writeq((val), (addr)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 134 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | #define READ_REG(addr) READ_REG64(addr) |
| 136 | #define WRITE_REG(value, addr) WRITE_REG64(value, addr) |
| 137 | #else |
| 138 | #define READ_REG(addr) READ_REG32(addr) |
| 139 | #define WRITE_REG(value, addr) WRITE_REG32(value, addr) |
| 140 | #endif |
| 141 | |
| 142 | #ifdef DEBUG_SBA_INIT |
| 143 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 144 | /* NOTE: When CONFIG_64BIT isn't defined, READ_REG64() is two 32-bit reads */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | |
| 146 | /** |
| 147 | * sba_dump_ranges - debugging only - print ranges assigned to this IOA |
| 148 | * @hpa: base address of the sba |
| 149 | * |
| 150 | * Print the MMIO and IO Port address ranges forwarded by an Astro/Ike/RIO |
| 151 | * IO Adapter (aka Bus Converter). |
| 152 | */ |
| 153 | static void |
| 154 | sba_dump_ranges(void __iomem *hpa) |
| 155 | { |
| 156 | DBG_INIT("SBA at 0x%p\n", hpa); |
| 157 | DBG_INIT("IOS_DIST_BASE : %Lx\n", READ_REG64(hpa+IOS_DIST_BASE)); |
| 158 | DBG_INIT("IOS_DIST_MASK : %Lx\n", READ_REG64(hpa+IOS_DIST_MASK)); |
| 159 | DBG_INIT("IOS_DIST_ROUTE : %Lx\n", READ_REG64(hpa+IOS_DIST_ROUTE)); |
| 160 | DBG_INIT("\n"); |
| 161 | DBG_INIT("IOS_DIRECT_BASE : %Lx\n", READ_REG64(hpa+IOS_DIRECT_BASE)); |
| 162 | DBG_INIT("IOS_DIRECT_MASK : %Lx\n", READ_REG64(hpa+IOS_DIRECT_MASK)); |
| 163 | DBG_INIT("IOS_DIRECT_ROUTE: %Lx\n", READ_REG64(hpa+IOS_DIRECT_ROUTE)); |
| 164 | } |
| 165 | |
| 166 | /** |
| 167 | * sba_dump_tlb - debugging only - print IOMMU operating parameters |
| 168 | * @hpa: base address of the IOMMU |
| 169 | * |
| 170 | * Print the size/location of the IO MMU PDIR. |
| 171 | */ |
| 172 | static void sba_dump_tlb(void __iomem *hpa) |
| 173 | { |
| 174 | DBG_INIT("IO TLB at 0x%p\n", hpa); |
| 175 | DBG_INIT("IOC_IBASE : 0x%Lx\n", READ_REG64(hpa+IOC_IBASE)); |
| 176 | DBG_INIT("IOC_IMASK : 0x%Lx\n", READ_REG64(hpa+IOC_IMASK)); |
| 177 | DBG_INIT("IOC_TCNFG : 0x%Lx\n", READ_REG64(hpa+IOC_TCNFG)); |
| 178 | DBG_INIT("IOC_PDIR_BASE: 0x%Lx\n", READ_REG64(hpa+IOC_PDIR_BASE)); |
| 179 | DBG_INIT("\n"); |
| 180 | } |
| 181 | #else |
| 182 | #define sba_dump_ranges(x) |
| 183 | #define sba_dump_tlb(x) |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 184 | #endif /* DEBUG_SBA_INIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
| 186 | |
| 187 | #ifdef ASSERT_PDIR_SANITY |
| 188 | |
| 189 | /** |
| 190 | * sba_dump_pdir_entry - debugging only - print one IOMMU PDIR entry |
| 191 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 192 | * @msg: text to print ont the output line. |
| 193 | * @pide: pdir index. |
| 194 | * |
| 195 | * Print one entry of the IO MMU PDIR in human readable form. |
| 196 | */ |
| 197 | static void |
| 198 | sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide) |
| 199 | { |
| 200 | /* start printing from lowest pde in rval */ |
| 201 | u64 *ptr = &(ioc->pdir_base[pide & (~0U * BITS_PER_LONG)]); |
| 202 | unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]); |
| 203 | uint rcnt; |
| 204 | |
| 205 | printk(KERN_DEBUG "SBA: %s rp %p bit %d rval 0x%lx\n", |
| 206 | msg, |
| 207 | rptr, pide & (BITS_PER_LONG - 1), *rptr); |
| 208 | |
| 209 | rcnt = 0; |
| 210 | while (rcnt < BITS_PER_LONG) { |
| 211 | printk(KERN_DEBUG "%s %2d %p %016Lx\n", |
| 212 | (rcnt == (pide & (BITS_PER_LONG - 1))) |
| 213 | ? " -->" : " ", |
| 214 | rcnt, ptr, *ptr ); |
| 215 | rcnt++; |
| 216 | ptr++; |
| 217 | } |
| 218 | printk(KERN_DEBUG "%s", msg); |
| 219 | } |
| 220 | |
| 221 | |
| 222 | /** |
| 223 | * sba_check_pdir - debugging only - consistency checker |
| 224 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 225 | * @msg: text to print ont the output line. |
| 226 | * |
| 227 | * Verify the resource map and pdir state is consistent |
| 228 | */ |
| 229 | static int |
| 230 | sba_check_pdir(struct ioc *ioc, char *msg) |
| 231 | { |
| 232 | u32 *rptr_end = (u32 *) &(ioc->res_map[ioc->res_size]); |
| 233 | u32 *rptr = (u32 *) ioc->res_map; /* resource map ptr */ |
| 234 | u64 *pptr = ioc->pdir_base; /* pdir ptr */ |
| 235 | uint pide = 0; |
| 236 | |
| 237 | while (rptr < rptr_end) { |
| 238 | u32 rval = *rptr; |
| 239 | int rcnt = 32; /* number of bits we might check */ |
| 240 | |
| 241 | while (rcnt) { |
| 242 | /* Get last byte and highest bit from that */ |
| 243 | u32 pde = ((u32) (((char *)pptr)[7])) << 24; |
| 244 | if ((rval ^ pde) & 0x80000000) |
| 245 | { |
| 246 | /* |
| 247 | ** BUMMER! -- res_map != pdir -- |
| 248 | ** Dump rval and matching pdir entries |
| 249 | */ |
| 250 | sba_dump_pdir_entry(ioc, msg, pide); |
| 251 | return(1); |
| 252 | } |
| 253 | rcnt--; |
| 254 | rval <<= 1; /* try the next bit */ |
| 255 | pptr++; |
| 256 | pide++; |
| 257 | } |
| 258 | rptr++; /* look at next word of res_map */ |
| 259 | } |
| 260 | /* It'd be nice if we always got here :^) */ |
| 261 | return 0; |
| 262 | } |
| 263 | |
| 264 | |
| 265 | /** |
| 266 | * sba_dump_sg - debugging only - print Scatter-Gather list |
| 267 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 268 | * @startsg: head of the SG list |
| 269 | * @nents: number of entries in SG list |
| 270 | * |
| 271 | * print the SG list so we can verify it's correct by hand. |
| 272 | */ |
| 273 | static void |
| 274 | sba_dump_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) |
| 275 | { |
| 276 | while (nents-- > 0) { |
| 277 | printk(KERN_DEBUG " %d : %08lx/%05x %p/%05x\n", |
| 278 | nents, |
| 279 | (unsigned long) sg_dma_address(startsg), |
| 280 | sg_dma_len(startsg), |
Matthew Wilcox | 8bf8a1d | 2015-03-20 13:37:59 -0400 | [diff] [blame] | 281 | sg_virt(startsg), startsg->length); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | startsg++; |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | #endif /* ASSERT_PDIR_SANITY */ |
| 287 | |
| 288 | |
| 289 | |
| 290 | |
| 291 | /************************************************************** |
| 292 | * |
| 293 | * I/O Pdir Resource Management |
| 294 | * |
| 295 | * Bits set in the resource map are in use. |
| 296 | * Each bit can represent a number of pages. |
| 297 | * LSbs represent lower addresses (IOVA's). |
| 298 | * |
| 299 | ***************************************************************/ |
| 300 | #define PAGES_PER_RANGE 1 /* could increase this to 4 or 8 if needed */ |
| 301 | |
| 302 | /* Convert from IOVP to IOVA and vice versa. */ |
| 303 | |
| 304 | #ifdef ZX1_SUPPORT |
| 305 | /* Pluto (aka ZX1) boxes need to set or clear the ibase bits appropriately */ |
| 306 | #define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset)) |
| 307 | #define SBA_IOVP(ioc,iova) ((iova) & (ioc)->iovp_mask) |
| 308 | #else |
| 309 | /* only support Astro and ancestors. Saves a few cycles in key places */ |
| 310 | #define SBA_IOVA(ioc,iovp,offset,hint_reg) ((iovp) | (offset)) |
| 311 | #define SBA_IOVP(ioc,iova) (iova) |
| 312 | #endif |
| 313 | |
| 314 | #define PDIR_INDEX(iovp) ((iovp)>>IOVP_SHIFT) |
| 315 | |
| 316 | #define RESMAP_MASK(n) (~0UL << (BITS_PER_LONG - (n))) |
| 317 | #define RESMAP_IDX_MASK (sizeof(unsigned long) - 1) |
| 318 | |
FUJITA Tomonori | 56ee0cf | 2008-03-10 20:43:24 +0900 | [diff] [blame] | 319 | static unsigned long ptr_to_pide(struct ioc *ioc, unsigned long *res_ptr, |
| 320 | unsigned int bitshiftcnt) |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 321 | { |
| 322 | return (((unsigned long)res_ptr - (unsigned long)ioc->res_map) << 3) |
| 323 | + bitshiftcnt; |
| 324 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | |
| 326 | /** |
| 327 | * sba_search_bitmap - find free space in IO PDIR resource bitmap |
| 328 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 329 | * @bits_wanted: number of entries we need. |
| 330 | * |
| 331 | * Find consecutive free bits in resource bitmap. |
| 332 | * Each bit represents one entry in the IO Pdir. |
| 333 | * Cool perf optimization: search for log2(size) bits at a time. |
| 334 | */ |
| 335 | static SBA_INLINE unsigned long |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 336 | sba_search_bitmap(struct ioc *ioc, struct device *dev, |
| 337 | unsigned long bits_wanted) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | { |
| 339 | unsigned long *res_ptr = ioc->res_hint; |
| 340 | unsigned long *res_end = (unsigned long *) &(ioc->res_map[ioc->res_size]); |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 341 | unsigned long pide = ~0UL, tpide; |
| 342 | unsigned long boundary_size; |
| 343 | unsigned long shift; |
| 344 | int ret; |
| 345 | |
FUJITA Tomonori | 4a0d3f3 | 2008-03-05 17:09:30 +0900 | [diff] [blame] | 346 | boundary_size = ALIGN((unsigned long long)dma_get_seg_boundary(dev) + 1, |
| 347 | 1ULL << IOVP_SHIFT) >> IOVP_SHIFT; |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 348 | |
| 349 | #if defined(ZX1_SUPPORT) |
| 350 | BUG_ON(ioc->ibase & ~IOVP_MASK); |
| 351 | shift = ioc->ibase >> IOVP_SHIFT; |
| 352 | #else |
| 353 | shift = 0; |
| 354 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | |
| 356 | if (bits_wanted > (BITS_PER_LONG/2)) { |
| 357 | /* Search word at a time - no mask needed */ |
| 358 | for(; res_ptr < res_end; ++res_ptr) { |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 359 | tpide = ptr_to_pide(ioc, res_ptr, 0); |
| 360 | ret = iommu_is_span_boundary(tpide, bits_wanted, |
| 361 | shift, |
| 362 | boundary_size); |
| 363 | if ((*res_ptr == 0) && !ret) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | *res_ptr = RESMAP_MASK(bits_wanted); |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 365 | pide = tpide; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | break; |
| 367 | } |
| 368 | } |
| 369 | /* point to the next word on next pass */ |
| 370 | res_ptr++; |
| 371 | ioc->res_bitshift = 0; |
| 372 | } else { |
| 373 | /* |
| 374 | ** Search the resource bit map on well-aligned values. |
| 375 | ** "o" is the alignment. |
| 376 | ** We need the alignment to invalidate I/O TLB using |
| 377 | ** SBA HW features in the unmap path. |
| 378 | */ |
| 379 | unsigned long o = 1 << get_order(bits_wanted << PAGE_SHIFT); |
Milind Arun Choudhary | 3cb1d95 | 2007-03-06 02:44:13 -0800 | [diff] [blame] | 380 | uint bitshiftcnt = ALIGN(ioc->res_bitshift, o); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | unsigned long mask; |
| 382 | |
| 383 | if (bitshiftcnt >= BITS_PER_LONG) { |
| 384 | bitshiftcnt = 0; |
| 385 | res_ptr++; |
| 386 | } |
| 387 | mask = RESMAP_MASK(bits_wanted) >> bitshiftcnt; |
| 388 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 389 | DBG_RES("%s() o %ld %p", __func__, o, res_ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | while(res_ptr < res_end) |
| 391 | { |
| 392 | DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr); |
| 393 | WARN_ON(mask == 0); |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 394 | tpide = ptr_to_pide(ioc, res_ptr, bitshiftcnt); |
| 395 | ret = iommu_is_span_boundary(tpide, bits_wanted, |
| 396 | shift, |
| 397 | boundary_size); |
| 398 | if ((((*res_ptr) & mask) == 0) && !ret) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 399 | *res_ptr |= mask; /* mark resources busy! */ |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 400 | pide = tpide; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | break; |
| 402 | } |
| 403 | mask >>= o; |
| 404 | bitshiftcnt += o; |
| 405 | if (mask == 0) { |
| 406 | mask = RESMAP_MASK(bits_wanted); |
| 407 | bitshiftcnt=0; |
| 408 | res_ptr++; |
| 409 | } |
| 410 | } |
| 411 | /* look in the same word on the next pass */ |
| 412 | ioc->res_bitshift = bitshiftcnt + bits_wanted; |
| 413 | } |
| 414 | |
| 415 | /* wrapped ? */ |
| 416 | if (res_end <= res_ptr) { |
| 417 | ioc->res_hint = (unsigned long *) ioc->res_map; |
| 418 | ioc->res_bitshift = 0; |
| 419 | } else { |
| 420 | ioc->res_hint = res_ptr; |
| 421 | } |
| 422 | return (pide); |
| 423 | } |
| 424 | |
| 425 | |
| 426 | /** |
| 427 | * sba_alloc_range - find free bits and mark them in IO PDIR resource bitmap |
| 428 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 429 | * @size: number of bytes to create a mapping for |
| 430 | * |
| 431 | * Given a size, find consecutive unmarked and then mark those bits in the |
| 432 | * resource bit map. |
| 433 | */ |
| 434 | static int |
FUJITA Tomonori | 7c8cda6 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 435 | sba_alloc_range(struct ioc *ioc, struct device *dev, size_t size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | { |
| 437 | unsigned int pages_needed = size >> IOVP_SHIFT; |
| 438 | #ifdef SBA_COLLECT_STATS |
| 439 | unsigned long cr_start = mfctl(16); |
| 440 | #endif |
| 441 | unsigned long pide; |
| 442 | |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 443 | pide = sba_search_bitmap(ioc, dev, pages_needed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | if (pide >= (ioc->res_size << 3)) { |
FUJITA Tomonori | 4666344 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 445 | pide = sba_search_bitmap(ioc, dev, pages_needed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | if (pide >= (ioc->res_size << 3)) |
| 447 | panic("%s: I/O MMU @ %p is out of mapping resources\n", |
| 448 | __FILE__, ioc->ioc_hpa); |
| 449 | } |
| 450 | |
| 451 | #ifdef ASSERT_PDIR_SANITY |
| 452 | /* verify the first enable bit is clear */ |
| 453 | if(0x00 != ((u8 *) ioc->pdir_base)[pide*sizeof(u64) + 7]) { |
| 454 | sba_dump_pdir_entry(ioc, "sba_search_bitmap() botched it?", pide); |
| 455 | } |
| 456 | #endif |
| 457 | |
| 458 | DBG_RES("%s(%x) %d -> %lx hint %x/%x\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 459 | __func__, size, pages_needed, pide, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | (uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map), |
| 461 | ioc->res_bitshift ); |
| 462 | |
| 463 | #ifdef SBA_COLLECT_STATS |
| 464 | { |
| 465 | unsigned long cr_end = mfctl(16); |
| 466 | unsigned long tmp = cr_end - cr_start; |
| 467 | /* check for roll over */ |
| 468 | cr_start = (cr_end < cr_start) ? -(tmp) : (tmp); |
| 469 | } |
| 470 | ioc->avg_search[ioc->avg_idx++] = cr_start; |
| 471 | ioc->avg_idx &= SBA_SEARCH_SAMPLE - 1; |
| 472 | |
| 473 | ioc->used_pages += pages_needed; |
| 474 | #endif |
| 475 | |
| 476 | return (pide); |
| 477 | } |
| 478 | |
| 479 | |
| 480 | /** |
| 481 | * sba_free_range - unmark bits in IO PDIR resource bitmap |
| 482 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 483 | * @iova: IO virtual address which was previously allocated. |
| 484 | * @size: number of bytes to create a mapping for |
| 485 | * |
| 486 | * clear bits in the ioc's resource map |
| 487 | */ |
| 488 | static SBA_INLINE void |
| 489 | sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size) |
| 490 | { |
| 491 | unsigned long iovp = SBA_IOVP(ioc, iova); |
| 492 | unsigned int pide = PDIR_INDEX(iovp); |
| 493 | unsigned int ridx = pide >> 3; /* convert bit to byte address */ |
| 494 | unsigned long *res_ptr = (unsigned long *) &((ioc)->res_map[ridx & ~RESMAP_IDX_MASK]); |
| 495 | |
| 496 | int bits_not_wanted = size >> IOVP_SHIFT; |
| 497 | |
| 498 | /* 3-bits "bit" address plus 2 (or 3) bits for "byte" == bit in word */ |
| 499 | unsigned long m = RESMAP_MASK(bits_not_wanted) >> (pide & (BITS_PER_LONG - 1)); |
| 500 | |
| 501 | DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 502 | __func__, (uint) iova, size, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | bits_not_wanted, m, pide, res_ptr, *res_ptr); |
| 504 | |
| 505 | #ifdef SBA_COLLECT_STATS |
| 506 | ioc->used_pages -= bits_not_wanted; |
| 507 | #endif |
| 508 | |
| 509 | *res_ptr &= ~m; |
| 510 | } |
| 511 | |
| 512 | |
| 513 | /************************************************************** |
| 514 | * |
| 515 | * "Dynamic DMA Mapping" support (aka "Coherent I/O") |
| 516 | * |
| 517 | ***************************************************************/ |
| 518 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 519 | #ifdef SBA_HINT_SUPPORT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | #define SBA_DMA_HINT(ioc, val) ((val) << (ioc)->hint_shift_pdir) |
| 521 | #endif |
| 522 | |
| 523 | typedef unsigned long space_t; |
| 524 | #define KERNEL_SPACE 0 |
| 525 | |
| 526 | /** |
| 527 | * sba_io_pdir_entry - fill in one IO PDIR entry |
| 528 | * @pdir_ptr: pointer to IO PDIR entry |
| 529 | * @sid: process Space ID - currently only support KERNEL_SPACE |
| 530 | * @vba: Virtual CPU address of buffer to map |
| 531 | * @hint: DMA hint set to use for this mapping |
| 532 | * |
| 533 | * SBA Mapping Routine |
| 534 | * |
| 535 | * Given a virtual address (vba, arg2) and space id, (sid, arg1) |
| 536 | * sba_io_pdir_entry() loads the I/O PDIR entry pointed to by |
| 537 | * pdir_ptr (arg0). |
| 538 | * Using the bass-ackwards HP bit numbering, Each IO Pdir entry |
| 539 | * for Astro/Ike looks like: |
| 540 | * |
| 541 | * |
| 542 | * 0 19 51 55 63 |
| 543 | * +-+---------------------+----------------------------------+----+--------+ |
| 544 | * |V| U | PPN[43:12] | U | VI | |
| 545 | * +-+---------------------+----------------------------------+----+--------+ |
| 546 | * |
| 547 | * Pluto is basically identical, supports fewer physical address bits: |
| 548 | * |
| 549 | * 0 23 51 55 63 |
| 550 | * +-+------------------------+-------------------------------+----+--------+ |
| 551 | * |V| U | PPN[39:12] | U | VI | |
| 552 | * +-+------------------------+-------------------------------+----+--------+ |
| 553 | * |
| 554 | * V == Valid Bit (Most Significant Bit is bit 0) |
| 555 | * U == Unused |
| 556 | * PPN == Physical Page Number |
| 557 | * VI == Virtual Index (aka Coherent Index) |
| 558 | * |
| 559 | * LPA instruction output is put into PPN field. |
| 560 | * LCI (Load Coherence Index) instruction provides the "VI" bits. |
| 561 | * |
| 562 | * We pre-swap the bytes since PCX-W is Big Endian and the |
| 563 | * IOMMU uses little endian for the pdir. |
| 564 | */ |
| 565 | |
Adrian Bunk | df8e5bc | 2008-12-02 03:28:16 +0000 | [diff] [blame] | 566 | static void SBA_INLINE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, |
| 568 | unsigned long hint) |
| 569 | { |
| 570 | u64 pa; /* physical address */ |
| 571 | register unsigned ci; /* coherent index */ |
| 572 | |
| 573 | pa = virt_to_phys(vba); |
| 574 | pa &= IOVP_MASK; |
| 575 | |
| 576 | mtsp(sid,1); |
| 577 | asm("lci 0(%%sr1, %1), %0" : "=r" (ci) : "r" (vba)); |
Helge Deller | 6a45716 | 2013-05-02 20:41:45 +0000 | [diff] [blame] | 578 | pa |= (ci >> PAGE_SHIFT) & 0xff; /* move CI (8 bits) into lowest byte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | |
Kyle McMartin | 983daee | 2006-08-25 12:28:24 -0400 | [diff] [blame] | 580 | pa |= SBA_PDIR_VALID_BIT; /* set "valid" bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | *pdir_ptr = cpu_to_le64(pa); /* swap and store into I/O Pdir */ |
| 582 | |
| 583 | /* |
| 584 | * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit set |
| 585 | * (bit #61, big endian), we have to flush and sync every time |
| 586 | * IO-PDIR is changed in Ike/Astro. |
| 587 | */ |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 588 | if (ioc_needs_fdc) |
| 589 | asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | } |
| 591 | |
| 592 | |
| 593 | /** |
| 594 | * sba_mark_invalid - invalidate one or more IO PDIR entries |
| 595 | * @ioc: IO MMU structure which owns the pdir we are interested in. |
| 596 | * @iova: IO Virtual Address mapped earlier |
| 597 | * @byte_cnt: number of bytes this mapping covers. |
| 598 | * |
| 599 | * Marking the IO PDIR entry(ies) as Invalid and invalidate |
| 600 | * corresponding IO TLB entry. The Ike PCOM (Purge Command Register) |
| 601 | * is to purge stale entries in the IO TLB when unmapping entries. |
| 602 | * |
| 603 | * The PCOM register supports purging of multiple pages, with a minium |
| 604 | * of 1 page and a maximum of 2GB. Hardware requires the address be |
| 605 | * aligned to the size of the range being purged. The size of the range |
| 606 | * must be a power of 2. The "Cool perf optimization" in the |
| 607 | * allocation routine helps keep that true. |
| 608 | */ |
| 609 | static SBA_INLINE void |
| 610 | sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt) |
| 611 | { |
| 612 | u32 iovp = (u32) SBA_IOVP(ioc,iova); |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 613 | u64 *pdir_ptr = &ioc->pdir_base[PDIR_INDEX(iovp)]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | |
| 615 | #ifdef ASSERT_PDIR_SANITY |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 616 | /* Assert first pdir entry is set. |
| 617 | ** |
| 618 | ** Even though this is a big-endian machine, the entries |
| 619 | ** in the iopdir are little endian. That's why we look at |
| 620 | ** the byte at +7 instead of at +0. |
| 621 | */ |
| 622 | if (0x80 != (((u8 *) pdir_ptr)[7])) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | sba_dump_pdir_entry(ioc,"sba_mark_invalid()", PDIR_INDEX(iovp)); |
| 624 | } |
| 625 | #endif |
| 626 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 627 | if (byte_cnt > IOVP_SIZE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | { |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 629 | #if 0 |
| 630 | unsigned long entries_per_cacheline = ioc_needs_fdc ? |
| 631 | L1_CACHE_ALIGN(((unsigned long) pdir_ptr)) |
| 632 | - (unsigned long) pdir_ptr; |
| 633 | : 262144; |
| 634 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 636 | /* set "size" field for PCOM */ |
| 637 | iovp |= get_order(byte_cnt) + PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | do { |
| 640 | /* clear I/O Pdir entry "valid" bit first */ |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 641 | ((u8 *) pdir_ptr)[7] = 0; |
| 642 | if (ioc_needs_fdc) { |
| 643 | asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr)); |
| 644 | #if 0 |
| 645 | entries_per_cacheline = L1_CACHE_SHIFT - 3; |
| 646 | #endif |
| 647 | } |
| 648 | pdir_ptr++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | byte_cnt -= IOVP_SIZE; |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 650 | } while (byte_cnt > IOVP_SIZE); |
| 651 | } else |
| 652 | iovp |= IOVP_SHIFT; /* set "size" field for PCOM */ |
| 653 | |
| 654 | /* |
| 655 | ** clear I/O PDIR entry "valid" bit. |
| 656 | ** We have to R/M/W the cacheline regardless how much of the |
| 657 | ** pdir entry that we clobber. |
| 658 | ** The rest of the entry would be useful for debugging if we |
| 659 | ** could dump core on HPMC. |
| 660 | */ |
| 661 | ((u8 *) pdir_ptr)[7] = 0; |
| 662 | if (ioc_needs_fdc) |
| 663 | asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | |
| 665 | WRITE_REG( SBA_IOVA(ioc, iovp, 0, 0), ioc->ioc_hpa+IOC_PCOM); |
| 666 | } |
| 667 | |
| 668 | /** |
| 669 | * sba_dma_supported - PCI driver can query DMA support |
| 670 | * @dev: instance of PCI owned by the driver that's asking |
| 671 | * @mask: number of address bits this PCI device can handle |
| 672 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 673 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 674 | */ |
| 675 | static int sba_dma_supported( struct device *dev, u64 mask) |
| 676 | { |
| 677 | struct ioc *ioc; |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 678 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | if (dev == NULL) { |
| 680 | printk(KERN_ERR MODULE_NAME ": EISA/ISA/et al not supported\n"); |
| 681 | BUG(); |
| 682 | return(0); |
| 683 | } |
| 684 | |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 685 | /* Documentation/DMA-API-HOWTO.txt tells drivers to try 64-bit |
Randy Dunlap | 5872fb9 | 2009-01-29 16:28:02 -0800 | [diff] [blame] | 686 | * first, then fall back to 32-bit if that fails. |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 687 | * We are just "encouraging" 32-bit DMA masks here since we can |
| 688 | * never allow IOMMU bypass unless we add special support for ZX1. |
| 689 | */ |
| 690 | if (mask > ~0U) |
| 691 | return 0; |
| 692 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | ioc = GET_IOC(dev); |
| 694 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 695 | /* |
| 696 | * check if mask is >= than the current max IO Virt Address |
| 697 | * The max IO Virt address will *always* < 30 bits. |
| 698 | */ |
| 699 | return((int)(mask >= (ioc->ibase - 1 + |
| 700 | (ioc->pdir_size / sizeof(u64) * IOVP_SIZE) ))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | } |
| 702 | |
| 703 | |
| 704 | /** |
| 705 | * sba_map_single - map one buffer and return IOVA for DMA |
| 706 | * @dev: instance of PCI owned by the driver that's asking. |
| 707 | * @addr: driver buffer to map. |
| 708 | * @size: number of bytes to map in driver buffer. |
| 709 | * @direction: R/W or both. |
| 710 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 711 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | */ |
| 713 | static dma_addr_t |
| 714 | sba_map_single(struct device *dev, void *addr, size_t size, |
| 715 | enum dma_data_direction direction) |
| 716 | { |
| 717 | struct ioc *ioc; |
| 718 | unsigned long flags; |
| 719 | dma_addr_t iovp; |
| 720 | dma_addr_t offset; |
| 721 | u64 *pdir_start; |
| 722 | int pide; |
| 723 | |
| 724 | ioc = GET_IOC(dev); |
| 725 | |
| 726 | /* save offset bits */ |
| 727 | offset = ((dma_addr_t) (long) addr) & ~IOVP_MASK; |
| 728 | |
| 729 | /* round up to nearest IOVP_SIZE */ |
| 730 | size = (size + offset + ~IOVP_MASK) & IOVP_MASK; |
| 731 | |
| 732 | spin_lock_irqsave(&ioc->res_lock, flags); |
| 733 | #ifdef ASSERT_PDIR_SANITY |
| 734 | sba_check_pdir(ioc,"Check before sba_map_single()"); |
| 735 | #endif |
| 736 | |
| 737 | #ifdef SBA_COLLECT_STATS |
| 738 | ioc->msingle_calls++; |
| 739 | ioc->msingle_pages += size >> IOVP_SHIFT; |
| 740 | #endif |
FUJITA Tomonori | 7c8cda6 | 2008-03-04 14:29:28 -0800 | [diff] [blame] | 741 | pide = sba_alloc_range(ioc, dev, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | iovp = (dma_addr_t) pide << IOVP_SHIFT; |
| 743 | |
| 744 | DBG_RUN("%s() 0x%p -> 0x%lx\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 745 | __func__, addr, (long) iovp | offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | |
| 747 | pdir_start = &(ioc->pdir_base[pide]); |
| 748 | |
| 749 | while (size > 0) { |
| 750 | sba_io_pdir_entry(pdir_start, KERNEL_SPACE, (unsigned long) addr, 0); |
| 751 | |
| 752 | DBG_RUN(" pdir 0x%p %02x%02x%02x%02x%02x%02x%02x%02x\n", |
| 753 | pdir_start, |
| 754 | (u8) (((u8 *) pdir_start)[7]), |
| 755 | (u8) (((u8 *) pdir_start)[6]), |
| 756 | (u8) (((u8 *) pdir_start)[5]), |
| 757 | (u8) (((u8 *) pdir_start)[4]), |
| 758 | (u8) (((u8 *) pdir_start)[3]), |
| 759 | (u8) (((u8 *) pdir_start)[2]), |
| 760 | (u8) (((u8 *) pdir_start)[1]), |
| 761 | (u8) (((u8 *) pdir_start)[0]) |
| 762 | ); |
| 763 | |
| 764 | addr += IOVP_SIZE; |
| 765 | size -= IOVP_SIZE; |
| 766 | pdir_start++; |
| 767 | } |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 768 | |
| 769 | /* force FDC ops in io_pdir_entry() to be visible to IOMMU */ |
| 770 | if (ioc_needs_fdc) |
| 771 | asm volatile("sync" : : ); |
| 772 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | #ifdef ASSERT_PDIR_SANITY |
| 774 | sba_check_pdir(ioc,"Check after sba_map_single()"); |
| 775 | #endif |
| 776 | spin_unlock_irqrestore(&ioc->res_lock, flags); |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 777 | |
| 778 | /* form complete address */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | return SBA_IOVA(ioc, iovp, offset, DEFAULT_DMA_HINT_REG); |
| 780 | } |
| 781 | |
| 782 | |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 783 | static dma_addr_t |
| 784 | sba_map_page(struct device *dev, struct page *page, unsigned long offset, |
| 785 | size_t size, enum dma_data_direction direction, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 786 | unsigned long attrs) |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 787 | { |
| 788 | return sba_map_single(dev, page_address(page) + offset, size, |
| 789 | direction); |
| 790 | } |
| 791 | |
| 792 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | /** |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 794 | * sba_unmap_page - unmap one IOVA and free resources |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 795 | * @dev: instance of PCI owned by the driver that's asking. |
| 796 | * @iova: IOVA of driver buffer previously mapped. |
| 797 | * @size: number of bytes mapped in driver buffer. |
| 798 | * @direction: R/W or both. |
| 799 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 800 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | */ |
| 802 | static void |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 803 | sba_unmap_page(struct device *dev, dma_addr_t iova, size_t size, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 804 | enum dma_data_direction direction, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | { |
| 806 | struct ioc *ioc; |
| 807 | #if DELAYED_RESOURCE_CNT > 0 |
| 808 | struct sba_dma_pair *d; |
| 809 | #endif |
| 810 | unsigned long flags; |
| 811 | dma_addr_t offset; |
| 812 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 813 | DBG_RUN("%s() iovp 0x%lx/%x\n", __func__, (long) iova, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | |
| 815 | ioc = GET_IOC(dev); |
| 816 | offset = iova & ~IOVP_MASK; |
| 817 | iova ^= offset; /* clear offset bits */ |
| 818 | size += offset; |
Milind Arun Choudhary | 3cb1d95 | 2007-03-06 02:44:13 -0800 | [diff] [blame] | 819 | size = ALIGN(size, IOVP_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | |
| 821 | spin_lock_irqsave(&ioc->res_lock, flags); |
| 822 | |
| 823 | #ifdef SBA_COLLECT_STATS |
| 824 | ioc->usingle_calls++; |
| 825 | ioc->usingle_pages += size >> IOVP_SHIFT; |
| 826 | #endif |
| 827 | |
| 828 | sba_mark_invalid(ioc, iova, size); |
| 829 | |
| 830 | #if DELAYED_RESOURCE_CNT > 0 |
| 831 | /* Delaying when we re-use a IO Pdir entry reduces the number |
| 832 | * of MMIO reads needed to flush writes to the PCOM register. |
| 833 | */ |
| 834 | d = &(ioc->saved[ioc->saved_cnt]); |
| 835 | d->iova = iova; |
| 836 | d->size = size; |
| 837 | if (++(ioc->saved_cnt) >= DELAYED_RESOURCE_CNT) { |
| 838 | int cnt = ioc->saved_cnt; |
| 839 | while (cnt--) { |
| 840 | sba_free_range(ioc, d->iova, d->size); |
| 841 | d--; |
| 842 | } |
| 843 | ioc->saved_cnt = 0; |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 844 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ |
| 846 | } |
| 847 | #else /* DELAYED_RESOURCE_CNT == 0 */ |
| 848 | sba_free_range(ioc, iova, size); |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 849 | |
| 850 | /* If fdc's were issued, force fdc's to be visible now */ |
| 851 | if (ioc_needs_fdc) |
| 852 | asm volatile("sync" : : ); |
| 853 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ |
| 855 | #endif /* DELAYED_RESOURCE_CNT == 0 */ |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | spin_unlock_irqrestore(&ioc->res_lock, flags); |
| 858 | |
| 859 | /* XXX REVISIT for 2.5 Linux - need syncdma for zero-copy support. |
| 860 | ** For Astro based systems this isn't a big deal WRT performance. |
| 861 | ** As long as 2.4 kernels copyin/copyout data from/to userspace, |
| 862 | ** we don't need the syncdma. The issue here is I/O MMU cachelines |
| 863 | ** are *not* coherent in all cases. May be hwrev dependent. |
| 864 | ** Need to investigate more. |
| 865 | asm volatile("syncdma"); |
| 866 | */ |
| 867 | } |
| 868 | |
| 869 | |
| 870 | /** |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 871 | * sba_alloc - allocate/map shared mem for DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | * @hwdev: instance of PCI owned by the driver that's asking. |
| 873 | * @size: number of bytes mapped in driver buffer. |
| 874 | * @dma_handle: IOVA of new buffer. |
| 875 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 876 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | */ |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 878 | static void *sba_alloc(struct device *hwdev, size_t size, dma_addr_t *dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 879 | gfp_t gfp, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | { |
| 881 | void *ret; |
| 882 | |
| 883 | if (!hwdev) { |
| 884 | /* only support PCI */ |
| 885 | *dma_handle = 0; |
Matthew Wilcox | c2c4798 | 2006-10-26 10:06:07 -0600 | [diff] [blame] | 886 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | } |
| 888 | |
| 889 | ret = (void *) __get_free_pages(gfp, get_order(size)); |
| 890 | |
| 891 | if (ret) { |
| 892 | memset(ret, 0, size); |
| 893 | *dma_handle = sba_map_single(hwdev, ret, size, 0); |
| 894 | } |
| 895 | |
| 896 | return ret; |
| 897 | } |
| 898 | |
| 899 | |
| 900 | /** |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 901 | * sba_free - free/unmap shared mem for DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 902 | * @hwdev: instance of PCI owned by the driver that's asking. |
| 903 | * @size: number of bytes mapped in driver buffer. |
| 904 | * @vaddr: virtual address IOVA of "consistent" buffer. |
| 905 | * @dma_handler: IO virtual address of "consistent" buffer. |
| 906 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 907 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | */ |
| 909 | static void |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 910 | sba_free(struct device *hwdev, size_t size, void *vaddr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 911 | dma_addr_t dma_handle, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 913 | sba_unmap_page(hwdev, dma_handle, size, 0, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | free_pages((unsigned long) vaddr, get_order(size)); |
| 915 | } |
| 916 | |
| 917 | |
| 918 | /* |
| 919 | ** Since 0 is a valid pdir_base index value, can't use that |
| 920 | ** to determine if a value is valid or not. Use a flag to indicate |
| 921 | ** the SG list entry contains a valid pdir index. |
| 922 | */ |
| 923 | #define PIDE_FLAG 0x80000000UL |
| 924 | |
| 925 | #ifdef SBA_COLLECT_STATS |
| 926 | #define IOMMU_MAP_STATS |
| 927 | #endif |
| 928 | #include "iommu-helpers.h" |
| 929 | |
| 930 | #ifdef DEBUG_LARGE_SG_ENTRIES |
| 931 | int dump_run_sg = 0; |
| 932 | #endif |
| 933 | |
| 934 | |
| 935 | /** |
| 936 | * sba_map_sg - map Scatter/Gather list |
| 937 | * @dev: instance of PCI owned by the driver that's asking. |
| 938 | * @sglist: array of buffer/length pairs |
| 939 | * @nents: number of entries in list |
| 940 | * @direction: R/W or both. |
| 941 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 942 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 943 | */ |
| 944 | static int |
| 945 | sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 946 | enum dma_data_direction direction, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 947 | { |
| 948 | struct ioc *ioc; |
| 949 | int coalesced, filled = 0; |
| 950 | unsigned long flags; |
| 951 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 952 | DBG_RUN_SG("%s() START %d entries\n", __func__, nents); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 953 | |
| 954 | ioc = GET_IOC(dev); |
| 955 | |
| 956 | /* Fast path single entry scatterlists. */ |
| 957 | if (nents == 1) { |
Matthew Wilcox | 8bf8a1d | 2015-03-20 13:37:59 -0400 | [diff] [blame] | 958 | sg_dma_address(sglist) = sba_map_single(dev, sg_virt(sglist), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 959 | sglist->length, direction); |
| 960 | sg_dma_len(sglist) = sglist->length; |
| 961 | return 1; |
| 962 | } |
| 963 | |
| 964 | spin_lock_irqsave(&ioc->res_lock, flags); |
| 965 | |
| 966 | #ifdef ASSERT_PDIR_SANITY |
| 967 | if (sba_check_pdir(ioc,"Check before sba_map_sg()")) |
| 968 | { |
| 969 | sba_dump_sg(ioc, sglist, nents); |
| 970 | panic("Check before sba_map_sg()"); |
| 971 | } |
| 972 | #endif |
| 973 | |
| 974 | #ifdef SBA_COLLECT_STATS |
| 975 | ioc->msg_calls++; |
| 976 | #endif |
| 977 | |
| 978 | /* |
| 979 | ** First coalesce the chunks and allocate I/O pdir space |
| 980 | ** |
| 981 | ** If this is one DMA stream, we can properly map using the |
| 982 | ** correct virtual address associated with each DMA page. |
| 983 | ** w/o this association, we wouldn't have coherent DMA! |
| 984 | ** Access to the virtual address is what forces a two pass algorithm. |
| 985 | */ |
FUJITA Tomonori | d1b5163 | 2008-02-04 22:28:03 -0800 | [diff] [blame] | 986 | coalesced = iommu_coalesce_chunks(ioc, dev, sglist, nents, sba_alloc_range); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 987 | |
| 988 | /* |
| 989 | ** Program the I/O Pdir |
| 990 | ** |
| 991 | ** map the virtual addresses to the I/O Pdir |
| 992 | ** o dma_address will contain the pdir index |
| 993 | ** o dma_len will contain the number of bytes to map |
| 994 | ** o address contains the virtual address. |
| 995 | */ |
| 996 | filled = iommu_fill_pdir(ioc, sglist, nents, 0, sba_io_pdir_entry); |
| 997 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 998 | /* force FDC ops in io_pdir_entry() to be visible to IOMMU */ |
| 999 | if (ioc_needs_fdc) |
| 1000 | asm volatile("sync" : : ); |
| 1001 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | #ifdef ASSERT_PDIR_SANITY |
| 1003 | if (sba_check_pdir(ioc,"Check after sba_map_sg()")) |
| 1004 | { |
| 1005 | sba_dump_sg(ioc, sglist, nents); |
| 1006 | panic("Check after sba_map_sg()\n"); |
| 1007 | } |
| 1008 | #endif |
| 1009 | |
| 1010 | spin_unlock_irqrestore(&ioc->res_lock, flags); |
| 1011 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1012 | DBG_RUN_SG("%s() DONE %d mappings\n", __func__, filled); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1013 | |
| 1014 | return filled; |
| 1015 | } |
| 1016 | |
| 1017 | |
| 1018 | /** |
| 1019 | * sba_unmap_sg - unmap Scatter/Gather list |
| 1020 | * @dev: instance of PCI owned by the driver that's asking. |
| 1021 | * @sglist: array of buffer/length pairs |
| 1022 | * @nents: number of entries in list |
| 1023 | * @direction: R/W or both. |
| 1024 | * |
Paul Bolle | 395cf96 | 2011-08-15 02:02:26 +0200 | [diff] [blame] | 1025 | * See Documentation/DMA-API-HOWTO.txt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | */ |
| 1027 | static void |
| 1028 | sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 1029 | enum dma_data_direction direction, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | { |
| 1031 | struct ioc *ioc; |
| 1032 | #ifdef ASSERT_PDIR_SANITY |
| 1033 | unsigned long flags; |
| 1034 | #endif |
| 1035 | |
| 1036 | DBG_RUN_SG("%s() START %d entries, %p,%x\n", |
Matthew Wilcox | 8bf8a1d | 2015-03-20 13:37:59 -0400 | [diff] [blame] | 1037 | __func__, nents, sg_virt(sglist), sglist->length); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | |
| 1039 | ioc = GET_IOC(dev); |
| 1040 | |
| 1041 | #ifdef SBA_COLLECT_STATS |
| 1042 | ioc->usg_calls++; |
| 1043 | #endif |
| 1044 | |
| 1045 | #ifdef ASSERT_PDIR_SANITY |
| 1046 | spin_lock_irqsave(&ioc->res_lock, flags); |
| 1047 | sba_check_pdir(ioc,"Check before sba_unmap_sg()"); |
| 1048 | spin_unlock_irqrestore(&ioc->res_lock, flags); |
| 1049 | #endif |
| 1050 | |
| 1051 | while (sg_dma_len(sglist) && nents--) { |
| 1052 | |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 1053 | sba_unmap_page(dev, sg_dma_address(sglist), sg_dma_len(sglist), |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 1054 | direction, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1055 | #ifdef SBA_COLLECT_STATS |
| 1056 | ioc->usg_pages += ((sg_dma_address(sglist) & ~IOVP_MASK) + sg_dma_len(sglist) + IOVP_SIZE - 1) >> PAGE_SHIFT; |
| 1057 | ioc->usingle_calls--; /* kluge since call is unmap_sg() */ |
| 1058 | #endif |
| 1059 | ++sglist; |
| 1060 | } |
| 1061 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1062 | DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1063 | |
| 1064 | #ifdef ASSERT_PDIR_SANITY |
| 1065 | spin_lock_irqsave(&ioc->res_lock, flags); |
| 1066 | sba_check_pdir(ioc,"Check after sba_unmap_sg()"); |
| 1067 | spin_unlock_irqrestore(&ioc->res_lock, flags); |
| 1068 | #endif |
| 1069 | |
| 1070 | } |
| 1071 | |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 1072 | static struct dma_map_ops sba_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1073 | .dma_supported = sba_dma_supported, |
Christoph Hellwig | 7938717 | 2016-01-20 15:01:47 -0800 | [diff] [blame] | 1074 | .alloc = sba_alloc, |
| 1075 | .free = sba_free, |
| 1076 | .map_page = sba_map_page, |
| 1077 | .unmap_page = sba_unmap_page, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1078 | .map_sg = sba_map_sg, |
| 1079 | .unmap_sg = sba_unmap_sg, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1080 | }; |
| 1081 | |
| 1082 | |
| 1083 | /************************************************************************** |
| 1084 | ** |
| 1085 | ** SBA PAT PDC support |
| 1086 | ** |
| 1087 | ** o call pdc_pat_cell_module() |
| 1088 | ** o store ranges in PCI "resource" structures |
| 1089 | ** |
| 1090 | **************************************************************************/ |
| 1091 | |
| 1092 | static void |
| 1093 | sba_get_pat_resources(struct sba_device *sba_dev) |
| 1094 | { |
| 1095 | #if 0 |
| 1096 | /* |
| 1097 | ** TODO/REVISIT/FIXME: support for directed ranges requires calls to |
| 1098 | ** PAT PDC to program the SBA/LBA directed range registers...this |
| 1099 | ** burden may fall on the LBA code since it directly supports the |
| 1100 | ** PCI subsystem. It's not clear yet. - ggg |
| 1101 | */ |
| 1102 | PAT_MOD(mod)->mod_info.mod_pages = PAT_GET_MOD_PAGES(temp); |
| 1103 | FIXME : ??? |
| 1104 | PAT_MOD(mod)->mod_info.dvi = PAT_GET_DVI(temp); |
| 1105 | Tells where the dvi bits are located in the address. |
| 1106 | PAT_MOD(mod)->mod_info.ioc = PAT_GET_IOC(temp); |
| 1107 | FIXME : ??? |
| 1108 | #endif |
| 1109 | } |
| 1110 | |
| 1111 | |
| 1112 | /************************************************************** |
| 1113 | * |
| 1114 | * Initialization and claim |
| 1115 | * |
| 1116 | ***************************************************************/ |
| 1117 | #define PIRANHA_ADDR_MASK 0x00160000UL /* bit 17,18,20 */ |
| 1118 | #define PIRANHA_ADDR_VAL 0x00060000UL /* bit 17,18 on */ |
| 1119 | static void * |
| 1120 | sba_alloc_pdir(unsigned int pdir_size) |
| 1121 | { |
| 1122 | unsigned long pdir_base; |
| 1123 | unsigned long pdir_order = get_order(pdir_size); |
| 1124 | |
| 1125 | pdir_base = __get_free_pages(GFP_KERNEL, pdir_order); |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1126 | if (NULL == (void *) pdir_base) { |
| 1127 | panic("%s() could not allocate I/O Page Table\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1128 | __func__); |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1129 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | |
| 1131 | /* If this is not PA8700 (PCX-W2) |
| 1132 | ** OR newer than ver 2.2 |
| 1133 | ** OR in a system that doesn't need VINDEX bits from SBA, |
| 1134 | ** |
| 1135 | ** then we aren't exposed to the HW bug. |
| 1136 | */ |
| 1137 | if ( ((boot_cpu_data.pdc.cpuid >> 5) & 0x7f) != 0x13 |
| 1138 | || (boot_cpu_data.pdc.versions > 0x202) |
| 1139 | || (boot_cpu_data.pdc.capabilities & 0x08L) ) |
| 1140 | return (void *) pdir_base; |
| 1141 | |
| 1142 | /* |
| 1143 | * PA8700 (PCX-W2, aka piranha) silent data corruption fix |
| 1144 | * |
| 1145 | * An interaction between PA8700 CPU (Ver 2.2 or older) and |
| 1146 | * Ike/Astro can cause silent data corruption. This is only |
| 1147 | * a problem if the I/O PDIR is located in memory such that |
| 1148 | * (little-endian) bits 17 and 18 are on and bit 20 is off. |
| 1149 | * |
| 1150 | * Since the max IO Pdir size is 2MB, by cleverly allocating the |
| 1151 | * right physical address, we can either avoid (IOPDIR <= 1MB) |
| 1152 | * or minimize (2MB IO Pdir) the problem if we restrict the |
| 1153 | * IO Pdir to a maximum size of 2MB-128K (1902K). |
| 1154 | * |
| 1155 | * Because we always allocate 2^N sized IO pdirs, either of the |
| 1156 | * "bad" regions will be the last 128K if at all. That's easy |
| 1157 | * to test for. |
| 1158 | * |
| 1159 | */ |
| 1160 | if (pdir_order <= (19-12)) { |
| 1161 | if (((virt_to_phys(pdir_base)+pdir_size-1) & PIRANHA_ADDR_MASK) == PIRANHA_ADDR_VAL) { |
| 1162 | /* allocate a new one on 512k alignment */ |
| 1163 | unsigned long new_pdir = __get_free_pages(GFP_KERNEL, (19-12)); |
| 1164 | /* release original */ |
| 1165 | free_pages(pdir_base, pdir_order); |
| 1166 | |
| 1167 | pdir_base = new_pdir; |
| 1168 | |
| 1169 | /* release excess */ |
| 1170 | while (pdir_order < (19-12)) { |
| 1171 | new_pdir += pdir_size; |
| 1172 | free_pages(new_pdir, pdir_order); |
| 1173 | pdir_order +=1; |
| 1174 | pdir_size <<=1; |
| 1175 | } |
| 1176 | } |
| 1177 | } else { |
| 1178 | /* |
| 1179 | ** 1MB or 2MB Pdir |
| 1180 | ** Needs to be aligned on an "odd" 1MB boundary. |
| 1181 | */ |
| 1182 | unsigned long new_pdir = __get_free_pages(GFP_KERNEL, pdir_order+1); /* 2 or 4MB */ |
| 1183 | |
| 1184 | /* release original */ |
| 1185 | free_pages( pdir_base, pdir_order); |
| 1186 | |
| 1187 | /* release first 1MB */ |
| 1188 | free_pages(new_pdir, 20-12); |
| 1189 | |
| 1190 | pdir_base = new_pdir + 1024*1024; |
| 1191 | |
| 1192 | if (pdir_order > (20-12)) { |
| 1193 | /* |
| 1194 | ** 2MB Pdir. |
| 1195 | ** |
| 1196 | ** Flag tells init_bitmap() to mark bad 128k as used |
| 1197 | ** and to reduce the size by 128k. |
| 1198 | */ |
| 1199 | piranha_bad_128k = 1; |
| 1200 | |
| 1201 | new_pdir += 3*1024*1024; |
| 1202 | /* release last 1MB */ |
| 1203 | free_pages(new_pdir, 20-12); |
| 1204 | |
| 1205 | /* release unusable 128KB */ |
| 1206 | free_pages(new_pdir - 128*1024 , 17-12); |
| 1207 | |
| 1208 | pdir_size -= 128*1024; |
| 1209 | } |
| 1210 | } |
| 1211 | |
| 1212 | memset((void *) pdir_base, 0, pdir_size); |
| 1213 | return (void *) pdir_base; |
| 1214 | } |
| 1215 | |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1216 | struct ibase_data_struct { |
| 1217 | struct ioc *ioc; |
| 1218 | int ioc_num; |
| 1219 | }; |
| 1220 | |
| 1221 | static int setup_ibase_imask_callback(struct device *dev, void *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1222 | { |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1223 | /* lba_set_iregs() is in drivers/parisc/lba_pci.c */ |
| 1224 | extern void lba_set_iregs(struct parisc_device *, u32, u32); |
| 1225 | struct parisc_device *lba = to_parisc_device(dev); |
| 1226 | struct ibase_data_struct *ibd = data; |
| 1227 | int rope_num = (lba->hpa.start >> 13) & 0xf; |
| 1228 | if (rope_num >> 3 == ibd->ioc_num) |
| 1229 | lba_set_iregs(lba, ibd->ioc->ibase, ibd->ioc->imask); |
| 1230 | return 0; |
Matthew Wilcox | 5658374 | 2005-10-21 22:33:38 -0400 | [diff] [blame] | 1231 | } |
| 1232 | |
| 1233 | /* setup Mercury or Elroy IBASE/IMASK registers. */ |
| 1234 | static void |
| 1235 | setup_ibase_imask(struct parisc_device *sba, struct ioc *ioc, int ioc_num) |
| 1236 | { |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1237 | struct ibase_data_struct ibase_data = { |
| 1238 | .ioc = ioc, |
| 1239 | .ioc_num = ioc_num, |
| 1240 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1241 | |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1242 | device_for_each_child(&sba->dev, &ibase_data, |
| 1243 | setup_ibase_imask_callback); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1244 | } |
| 1245 | |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1246 | #ifdef SBA_AGP_SUPPORT |
| 1247 | static int |
| 1248 | sba_ioc_find_quicksilver(struct device *dev, void *data) |
| 1249 | { |
| 1250 | int *agp_found = data; |
| 1251 | struct parisc_device *lba = to_parisc_device(dev); |
| 1252 | |
| 1253 | if (IS_QUICKSILVER(lba)) |
| 1254 | *agp_found = 1; |
| 1255 | return 0; |
| 1256 | } |
| 1257 | #endif |
| 1258 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1259 | static void |
| 1260 | sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num) |
| 1261 | { |
| 1262 | u32 iova_space_mask; |
| 1263 | u32 iova_space_size; |
| 1264 | int iov_order, tcnfg; |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1265 | #ifdef SBA_AGP_SUPPORT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1266 | int agp_found = 0; |
| 1267 | #endif |
| 1268 | /* |
| 1269 | ** Firmware programs the base and size of a "safe IOVA space" |
| 1270 | ** (one that doesn't overlap memory or LMMIO space) in the |
| 1271 | ** IBASE and IMASK registers. |
| 1272 | */ |
| 1273 | ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE); |
| 1274 | iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; |
| 1275 | |
| 1276 | if ((ioc->ibase < 0xfed00000UL) && ((ioc->ibase + iova_space_size) > 0xfee00000UL)) { |
| 1277 | printk("WARNING: IOV space overlaps local config and interrupt message, truncating\n"); |
| 1278 | iova_space_size /= 2; |
| 1279 | } |
| 1280 | |
| 1281 | /* |
| 1282 | ** iov_order is always based on a 1GB IOVA space since we want to |
| 1283 | ** turn on the other half for AGP GART. |
| 1284 | */ |
| 1285 | iov_order = get_order(iova_space_size >> (IOVP_SHIFT - PAGE_SHIFT)); |
| 1286 | ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64); |
| 1287 | |
Grant Grundler | 40d78de | 2006-05-11 00:31:31 -0600 | [diff] [blame] | 1288 | DBG_INIT("%s() hpa 0x%p IOV %dMB (%d bits)\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1289 | __func__, ioc->ioc_hpa, iova_space_size >> 20, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1290 | iov_order + PAGE_SHIFT); |
| 1291 | |
| 1292 | ioc->pdir_base = (void *) __get_free_pages(GFP_KERNEL, |
| 1293 | get_order(ioc->pdir_size)); |
| 1294 | if (!ioc->pdir_base) |
| 1295 | panic("Couldn't allocate I/O Page Table\n"); |
| 1296 | |
| 1297 | memset(ioc->pdir_base, 0, ioc->pdir_size); |
| 1298 | |
| 1299 | DBG_INIT("%s() pdir %p size %x\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1300 | __func__, ioc->pdir_base, ioc->pdir_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1301 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1302 | #ifdef SBA_HINT_SUPPORT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1303 | ioc->hint_shift_pdir = iov_order + PAGE_SHIFT; |
| 1304 | ioc->hint_mask_pdir = ~(0x3 << (iov_order + PAGE_SHIFT)); |
| 1305 | |
| 1306 | DBG_INIT(" hint_shift_pdir %x hint_mask_pdir %lx\n", |
| 1307 | ioc->hint_shift_pdir, ioc->hint_mask_pdir); |
| 1308 | #endif |
| 1309 | |
| 1310 | WARN_ON((((unsigned long) ioc->pdir_base) & PAGE_MASK) != (unsigned long) ioc->pdir_base); |
| 1311 | WRITE_REG(virt_to_phys(ioc->pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); |
| 1312 | |
| 1313 | /* build IMASK for IOC and Elroy */ |
| 1314 | iova_space_mask = 0xffffffff; |
| 1315 | iova_space_mask <<= (iov_order + PAGE_SHIFT); |
| 1316 | ioc->imask = iova_space_mask; |
| 1317 | #ifdef ZX1_SUPPORT |
| 1318 | ioc->iovp_mask = ~(iova_space_mask + PAGE_SIZE - 1); |
| 1319 | #endif |
| 1320 | sba_dump_tlb(ioc->ioc_hpa); |
| 1321 | |
| 1322 | setup_ibase_imask(sba, ioc, ioc_num); |
| 1323 | |
| 1324 | WRITE_REG(ioc->imask, ioc->ioc_hpa + IOC_IMASK); |
| 1325 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1326 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1327 | /* |
| 1328 | ** Setting the upper bits makes checking for bypass addresses |
| 1329 | ** a little faster later on. |
| 1330 | */ |
| 1331 | ioc->imask |= 0xFFFFFFFF00000000UL; |
| 1332 | #endif |
| 1333 | |
| 1334 | /* Set I/O PDIR Page size to system page size */ |
| 1335 | switch (PAGE_SHIFT) { |
| 1336 | case 12: tcnfg = 0; break; /* 4K */ |
| 1337 | case 13: tcnfg = 1; break; /* 8K */ |
| 1338 | case 14: tcnfg = 2; break; /* 16K */ |
| 1339 | case 16: tcnfg = 3; break; /* 64K */ |
| 1340 | default: |
| 1341 | panic(__FILE__ "Unsupported system page size %d", |
| 1342 | 1 << PAGE_SHIFT); |
| 1343 | break; |
| 1344 | } |
| 1345 | WRITE_REG(tcnfg, ioc->ioc_hpa + IOC_TCNFG); |
| 1346 | |
| 1347 | /* |
| 1348 | ** Program the IOC's ibase and enable IOVA translation |
| 1349 | ** Bit zero == enable bit. |
| 1350 | */ |
| 1351 | WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa + IOC_IBASE); |
| 1352 | |
| 1353 | /* |
| 1354 | ** Clear I/O TLB of any possible entries. |
| 1355 | ** (Yes. This is a bit paranoid...but so what) |
| 1356 | */ |
| 1357 | WRITE_REG(ioc->ibase | 31, ioc->ioc_hpa + IOC_PCOM); |
| 1358 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1359 | #ifdef SBA_AGP_SUPPORT |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 1360 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1361 | /* |
| 1362 | ** If an AGP device is present, only use half of the IOV space |
| 1363 | ** for PCI DMA. Unfortunately we can't know ahead of time |
| 1364 | ** whether GART support will actually be used, for now we |
| 1365 | ** can just key on any AGP device found in the system. |
| 1366 | ** We program the next pdir index after we stop w/ a key for |
| 1367 | ** the GART code to handshake on. |
| 1368 | */ |
James Bottomley | bfe4f4f | 2009-01-09 18:57:06 -0600 | [diff] [blame] | 1369 | device_for_each_child(&sba->dev, &agp_found, sba_ioc_find_quicksilver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1370 | |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 1371 | if (agp_found && sba_reserve_agpgart) { |
| 1372 | printk(KERN_INFO "%s: reserving %dMb of IOVA space for agpgart\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1373 | __func__, (iova_space_size/2) >> 20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1374 | ioc->pdir_size /= 2; |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 1375 | ioc->pdir_base[PDIR_INDEX(iova_space_size/2)] = SBA_AGPGART_COOKIE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1376 | } |
Kyle McMartin | 08a6436 | 2006-08-24 21:33:40 -0400 | [diff] [blame] | 1377 | #endif /*SBA_AGP_SUPPORT*/ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1378 | } |
| 1379 | |
| 1380 | static void |
| 1381 | sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num) |
| 1382 | { |
| 1383 | u32 iova_space_size, iova_space_mask; |
Helge Deller | 6a45716 | 2013-05-02 20:41:45 +0000 | [diff] [blame] | 1384 | unsigned int pdir_size, iov_order, tcnfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1385 | |
| 1386 | /* |
| 1387 | ** Determine IOVA Space size from memory size. |
| 1388 | ** |
| 1389 | ** Ideally, PCI drivers would register the maximum number |
| 1390 | ** of DMA they can have outstanding for each device they |
| 1391 | ** own. Next best thing would be to guess how much DMA |
| 1392 | ** can be outstanding based on PCI Class/sub-class. Both |
| 1393 | ** methods still require some "extra" to support PCI |
| 1394 | ** Hot-Plug/Removal of PCI cards. (aka PCI OLARD). |
| 1395 | ** |
| 1396 | ** While we have 32-bits "IOVA" space, top two 2 bits are used |
| 1397 | ** for DMA hints - ergo only 30 bits max. |
| 1398 | */ |
| 1399 | |
Jan Beulich | 4481374 | 2009-09-21 17:03:05 -0700 | [diff] [blame] | 1400 | iova_space_size = (u32) (totalram_pages/global_ioc_cnt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1401 | |
| 1402 | /* limit IOVA space size to 1MB-1GB */ |
| 1403 | if (iova_space_size < (1 << (20 - PAGE_SHIFT))) { |
| 1404 | iova_space_size = 1 << (20 - PAGE_SHIFT); |
| 1405 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1406 | else if (iova_space_size > (1 << (30 - PAGE_SHIFT))) { |
| 1407 | iova_space_size = 1 << (30 - PAGE_SHIFT); |
| 1408 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1409 | |
| 1410 | /* |
| 1411 | ** iova space must be log2() in size. |
| 1412 | ** thus, pdir/res_map will also be log2(). |
| 1413 | ** PIRANHA BUG: Exception is when IO Pdir is 2MB (gets reduced) |
| 1414 | */ |
| 1415 | iov_order = get_order(iova_space_size << PAGE_SHIFT); |
| 1416 | |
| 1417 | /* iova_space_size is now bytes, not pages */ |
| 1418 | iova_space_size = 1 << (iov_order + PAGE_SHIFT); |
| 1419 | |
| 1420 | ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64); |
| 1421 | |
| 1422 | DBG_INIT("%s() hpa 0x%lx mem %ldMB IOV %dMB (%d bits)\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1423 | __func__, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1424 | ioc->ioc_hpa, |
Jan Beulich | 4481374 | 2009-09-21 17:03:05 -0700 | [diff] [blame] | 1425 | (unsigned long) totalram_pages >> (20 - PAGE_SHIFT), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1426 | iova_space_size>>20, |
| 1427 | iov_order + PAGE_SHIFT); |
| 1428 | |
| 1429 | ioc->pdir_base = sba_alloc_pdir(pdir_size); |
| 1430 | |
| 1431 | DBG_INIT("%s() pdir %p size %x\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1432 | __func__, ioc->pdir_base, pdir_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1433 | |
Grant Grundler | 64908ad | 2005-10-21 22:37:20 -0400 | [diff] [blame] | 1434 | #ifdef SBA_HINT_SUPPORT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1435 | /* FIXME : DMA HINTs not used */ |
| 1436 | ioc->hint_shift_pdir = iov_order + PAGE_SHIFT; |
| 1437 | ioc->hint_mask_pdir = ~(0x3 << (iov_order + PAGE_SHIFT)); |
| 1438 | |
| 1439 | DBG_INIT(" hint_shift_pdir %x hint_mask_pdir %lx\n", |
| 1440 | ioc->hint_shift_pdir, ioc->hint_mask_pdir); |
| 1441 | #endif |
| 1442 | |
| 1443 | WRITE_REG64(virt_to_phys(ioc->pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); |
| 1444 | |
| 1445 | /* build IMASK for IOC and Elroy */ |
| 1446 | iova_space_mask = 0xffffffff; |
| 1447 | iova_space_mask <<= (iov_order + PAGE_SHIFT); |
| 1448 | |
| 1449 | /* |
| 1450 | ** On C3000 w/512MB mem, HP-UX 10.20 reports: |
| 1451 | ** ibase=0, imask=0xFE000000, size=0x2000000. |
| 1452 | */ |
| 1453 | ioc->ibase = 0; |
| 1454 | ioc->imask = iova_space_mask; /* save it */ |
| 1455 | #ifdef ZX1_SUPPORT |
| 1456 | ioc->iovp_mask = ~(iova_space_mask + PAGE_SIZE - 1); |
| 1457 | #endif |
| 1458 | |
| 1459 | DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1460 | __func__, ioc->ibase, ioc->imask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1461 | |
| 1462 | /* |
| 1463 | ** FIXME: Hint registers are programmed with default hint |
| 1464 | ** values during boot, so hints should be sane even if we |
| 1465 | ** can't reprogram them the way drivers want. |
| 1466 | */ |
| 1467 | |
| 1468 | setup_ibase_imask(sba, ioc, ioc_num); |
| 1469 | |
| 1470 | /* |
| 1471 | ** Program the IOC's ibase and enable IOVA translation |
| 1472 | */ |
| 1473 | WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE); |
| 1474 | WRITE_REG(ioc->imask, ioc->ioc_hpa+IOC_IMASK); |
| 1475 | |
Helge Deller | 6a45716 | 2013-05-02 20:41:45 +0000 | [diff] [blame] | 1476 | /* Set I/O PDIR Page size to system page size */ |
| 1477 | switch (PAGE_SHIFT) { |
| 1478 | case 12: tcnfg = 0; break; /* 4K */ |
| 1479 | case 13: tcnfg = 1; break; /* 8K */ |
| 1480 | case 14: tcnfg = 2; break; /* 16K */ |
| 1481 | case 16: tcnfg = 3; break; /* 64K */ |
| 1482 | default: |
| 1483 | panic(__FILE__ "Unsupported system page size %d", |
| 1484 | 1 << PAGE_SHIFT); |
| 1485 | break; |
| 1486 | } |
| 1487 | /* Set I/O PDIR Page size to PAGE_SIZE (4k/16k/...) */ |
| 1488 | WRITE_REG(tcnfg, ioc->ioc_hpa+IOC_TCNFG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1489 | |
| 1490 | /* |
| 1491 | ** Clear I/O TLB of any possible entries. |
| 1492 | ** (Yes. This is a bit paranoid...but so what) |
| 1493 | */ |
| 1494 | WRITE_REG(0 | 31, ioc->ioc_hpa+IOC_PCOM); |
| 1495 | |
| 1496 | ioc->ibase = 0; /* used by SBA_IOVA and related macros */ |
| 1497 | |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1498 | DBG_INIT("%s() DONE\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1499 | } |
| 1500 | |
| 1501 | |
| 1502 | |
| 1503 | /************************************************************************** |
| 1504 | ** |
| 1505 | ** SBA initialization code (HW and SW) |
| 1506 | ** |
| 1507 | ** o identify SBA chip itself |
| 1508 | ** o initialize SBA chip modes (HardFail) |
| 1509 | ** o initialize SBA chip modes (HardFail) |
| 1510 | ** o FIXME: initialize DMA hints for reasonable defaults |
| 1511 | ** |
| 1512 | **************************************************************************/ |
| 1513 | |
Helge Deller | 5076c15 | 2006-03-27 12:52:15 -0700 | [diff] [blame] | 1514 | static void __iomem *ioc_remap(struct sba_device *sba_dev, unsigned int offset) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1515 | { |
Helge Deller | 5076c15 | 2006-03-27 12:52:15 -0700 | [diff] [blame] | 1516 | return ioremap_nocache(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1517 | } |
| 1518 | |
| 1519 | static void sba_hw_init(struct sba_device *sba_dev) |
| 1520 | { |
| 1521 | int i; |
| 1522 | int num_ioc; |
| 1523 | u64 ioc_ctl; |
| 1524 | |
| 1525 | if (!is_pdc_pat()) { |
| 1526 | /* Shutdown the USB controller on Astro-based workstations. |
| 1527 | ** Once we reprogram the IOMMU, the next DMA performed by |
| 1528 | ** USB will HPMC the box. USB is only enabled if a |
| 1529 | ** keyboard is present and found. |
| 1530 | ** |
| 1531 | ** With serial console, j6k v5.0 firmware says: |
| 1532 | ** mem_kbd hpa 0xfee003f8 sba 0x0 pad 0x0 cl_class 0x7 |
| 1533 | ** |
| 1534 | ** FIXME: Using GFX+USB console at power up but direct |
| 1535 | ** linux to serial console is still broken. |
| 1536 | ** USB could generate DMA so we must reset USB. |
| 1537 | ** The proper sequence would be: |
| 1538 | ** o block console output |
| 1539 | ** o reset USB device |
| 1540 | ** o reprogram serial port |
| 1541 | ** o unblock console output |
| 1542 | */ |
| 1543 | if (PAGE0->mem_kbd.cl_class == CL_KEYBD) { |
| 1544 | pdc_io_reset_devices(); |
| 1545 | } |
| 1546 | |
| 1547 | } |
| 1548 | |
| 1549 | |
| 1550 | #if 0 |
| 1551 | printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa, |
| 1552 | PAGE0->mem_boot.spa, PAGE0->mem_boot.pad, PAGE0->mem_boot.cl_class); |
| 1553 | |
| 1554 | /* |
| 1555 | ** Need to deal with DMA from LAN. |
| 1556 | ** Maybe use page zero boot device as a handle to talk |
| 1557 | ** to PDC about which device to shutdown. |
| 1558 | ** |
| 1559 | ** Netbooting, j6k v5.0 firmware says: |
| 1560 | ** mem_boot hpa 0xf4008000 sba 0x0 pad 0x0 cl_class 0x1002 |
| 1561 | ** ARGH! invalid class. |
| 1562 | */ |
| 1563 | if ((PAGE0->mem_boot.cl_class != CL_RANDOM) |
| 1564 | && (PAGE0->mem_boot.cl_class != CL_SEQU)) { |
| 1565 | pdc_io_reset(); |
| 1566 | } |
| 1567 | #endif |
| 1568 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1569 | if (!IS_PLUTO(sba_dev->dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL); |
| 1571 | DBG_INIT("%s() hpa 0x%lx ioc_ctl 0x%Lx ->", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1572 | __func__, sba_dev->sba_hpa, ioc_ctl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1573 | ioc_ctl &= ~(IOC_CTRL_RM | IOC_CTRL_NC | IOC_CTRL_CE); |
| 1574 | ioc_ctl |= IOC_CTRL_DD | IOC_CTRL_D4 | IOC_CTRL_TC; |
| 1575 | /* j6700 v1.6 firmware sets 0x294f */ |
| 1576 | /* A500 firmware sets 0x4d */ |
| 1577 | |
| 1578 | WRITE_REG(ioc_ctl, sba_dev->sba_hpa+IOC_CTRL); |
| 1579 | |
| 1580 | #ifdef DEBUG_SBA_INIT |
| 1581 | ioc_ctl = READ_REG64(sba_dev->sba_hpa+IOC_CTRL); |
| 1582 | DBG_INIT(" 0x%Lx\n", ioc_ctl); |
| 1583 | #endif |
| 1584 | } /* if !PLUTO */ |
| 1585 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1586 | if (IS_ASTRO(sba_dev->dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1587 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1588 | sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, ASTRO_IOC_OFFSET); |
| 1589 | num_ioc = 1; |
| 1590 | |
| 1591 | sba_dev->chip_resv.name = "Astro Intr Ack"; |
| 1592 | sba_dev->chip_resv.start = PCI_F_EXTEND | 0xfef00000UL; |
| 1593 | sba_dev->chip_resv.end = PCI_F_EXTEND | (0xff000000UL - 1) ; |
| 1594 | err = request_resource(&iomem_resource, &(sba_dev->chip_resv)); |
Eric Sesterhenn | b749455 | 2006-03-24 18:52:10 +0100 | [diff] [blame] | 1595 | BUG_ON(err < 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1596 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1597 | } else if (IS_PLUTO(sba_dev->dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1598 | int err; |
| 1599 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1600 | sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, PLUTO_IOC_OFFSET); |
| 1601 | num_ioc = 1; |
| 1602 | |
| 1603 | sba_dev->chip_resv.name = "Pluto Intr/PIOP/VGA"; |
| 1604 | sba_dev->chip_resv.start = PCI_F_EXTEND | 0xfee00000UL; |
| 1605 | sba_dev->chip_resv.end = PCI_F_EXTEND | (0xff200000UL - 1); |
| 1606 | err = request_resource(&iomem_resource, &(sba_dev->chip_resv)); |
| 1607 | WARN_ON(err < 0); |
| 1608 | |
| 1609 | sba_dev->iommu_resv.name = "IOVA Space"; |
| 1610 | sba_dev->iommu_resv.start = 0x40000000UL; |
| 1611 | sba_dev->iommu_resv.end = 0x50000000UL - 1; |
| 1612 | err = request_resource(&iomem_resource, &(sba_dev->iommu_resv)); |
| 1613 | WARN_ON(err < 0); |
| 1614 | } else { |
Matthew Wilcox | 7886089 | 2006-09-12 05:19:15 -0600 | [diff] [blame] | 1615 | /* IKE, REO */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, IKE_IOC_OFFSET(0)); |
| 1617 | sba_dev->ioc[1].ioc_hpa = ioc_remap(sba_dev, IKE_IOC_OFFSET(1)); |
| 1618 | num_ioc = 2; |
| 1619 | |
| 1620 | /* TODO - LOOKUP Ike/Stretch chipset mem map */ |
| 1621 | } |
Matthew Wilcox | 7886089 | 2006-09-12 05:19:15 -0600 | [diff] [blame] | 1622 | /* XXX: What about Reo Grande? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1623 | |
| 1624 | sba_dev->num_ioc = num_ioc; |
| 1625 | for (i = 0; i < num_ioc; i++) { |
Grant Grundler | 40d78de | 2006-05-11 00:31:31 -0600 | [diff] [blame] | 1626 | void __iomem *ioc_hpa = sba_dev->ioc[i].ioc_hpa; |
Grant Grundler | b312c33 | 2006-03-30 07:13:21 +0000 | [diff] [blame] | 1627 | unsigned int j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1628 | |
Grant Grundler | b312c33 | 2006-03-30 07:13:21 +0000 | [diff] [blame] | 1629 | for (j=0; j < sizeof(u64) * ROPES_PER_IOC; j+=sizeof(u64)) { |
| 1630 | |
| 1631 | /* |
| 1632 | * Clear ROPE(N)_CONFIG AO bit. |
| 1633 | * Disables "NT Ordering" (~= !"Relaxed Ordering") |
| 1634 | * Overrides bit 1 in DMA Hint Sets. |
| 1635 | * Improves netperf UDP_STREAM by ~10% for bcm5701. |
| 1636 | */ |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1637 | if (IS_PLUTO(sba_dev->dev)) { |
Grant Grundler | 40d78de | 2006-05-11 00:31:31 -0600 | [diff] [blame] | 1638 | void __iomem *rope_cfg; |
| 1639 | unsigned long cfg_val; |
Grant Grundler | b312c33 | 2006-03-30 07:13:21 +0000 | [diff] [blame] | 1640 | |
| 1641 | rope_cfg = ioc_hpa + IOC_ROPE0_CFG + j; |
| 1642 | cfg_val = READ_REG(rope_cfg); |
| 1643 | cfg_val &= ~IOC_ROPE_AO; |
| 1644 | WRITE_REG(cfg_val, rope_cfg); |
| 1645 | } |
| 1646 | |
| 1647 | /* |
| 1648 | ** Make sure the box crashes on rope errors. |
| 1649 | */ |
| 1650 | WRITE_REG(HF_ENABLE, ioc_hpa + ROPE0_CTL + j); |
| 1651 | } |
| 1652 | |
| 1653 | /* flush out the last writes */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1654 | READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL); |
| 1655 | |
| 1656 | DBG_INIT(" ioc[%d] ROPE_CFG 0x%Lx ROPE_DBG 0x%Lx\n", |
| 1657 | i, |
| 1658 | READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40), |
| 1659 | READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50) |
| 1660 | ); |
| 1661 | DBG_INIT(" STATUS_CONTROL 0x%Lx FLUSH_CTRL 0x%Lx\n", |
| 1662 | READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108), |
| 1663 | READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400) |
| 1664 | ); |
| 1665 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1666 | if (IS_PLUTO(sba_dev->dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1667 | sba_ioc_init_pluto(sba_dev->dev, &(sba_dev->ioc[i]), i); |
| 1668 | } else { |
| 1669 | sba_ioc_init(sba_dev->dev, &(sba_dev->ioc[i]), i); |
| 1670 | } |
| 1671 | } |
| 1672 | } |
| 1673 | |
| 1674 | static void |
| 1675 | sba_common_init(struct sba_device *sba_dev) |
| 1676 | { |
| 1677 | int i; |
| 1678 | |
| 1679 | /* add this one to the head of the list (order doesn't matter) |
| 1680 | ** This will be useful for debugging - especially if we get coredumps |
| 1681 | */ |
| 1682 | sba_dev->next = sba_list; |
| 1683 | sba_list = sba_dev; |
| 1684 | |
| 1685 | for(i=0; i< sba_dev->num_ioc; i++) { |
| 1686 | int res_size; |
| 1687 | #ifdef DEBUG_DMB_TRAP |
| 1688 | extern void iterate_pages(unsigned long , unsigned long , |
| 1689 | void (*)(pte_t * , unsigned long), |
| 1690 | unsigned long ); |
| 1691 | void set_data_memory_break(pte_t * , unsigned long); |
| 1692 | #endif |
| 1693 | /* resource map size dictated by pdir_size */ |
| 1694 | res_size = sba_dev->ioc[i].pdir_size/sizeof(u64); /* entries */ |
| 1695 | |
| 1696 | /* Second part of PIRANHA BUG */ |
| 1697 | if (piranha_bad_128k) { |
| 1698 | res_size -= (128*1024)/sizeof(u64); |
| 1699 | } |
| 1700 | |
| 1701 | res_size >>= 3; /* convert bit count to byte count */ |
| 1702 | DBG_INIT("%s() res_size 0x%x\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1703 | __func__, res_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | |
| 1705 | sba_dev->ioc[i].res_size = res_size; |
| 1706 | sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size)); |
| 1707 | |
| 1708 | #ifdef DEBUG_DMB_TRAP |
| 1709 | iterate_pages( sba_dev->ioc[i].res_map, res_size, |
| 1710 | set_data_memory_break, 0); |
| 1711 | #endif |
| 1712 | |
| 1713 | if (NULL == sba_dev->ioc[i].res_map) |
| 1714 | { |
| 1715 | panic("%s:%s() could not allocate resource map\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1716 | __FILE__, __func__ ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1717 | } |
| 1718 | |
| 1719 | memset(sba_dev->ioc[i].res_map, 0, res_size); |
| 1720 | /* next available IOVP - circular search */ |
| 1721 | sba_dev->ioc[i].res_hint = (unsigned long *) |
| 1722 | &(sba_dev->ioc[i].res_map[L1_CACHE_BYTES]); |
| 1723 | |
| 1724 | #ifdef ASSERT_PDIR_SANITY |
| 1725 | /* Mark first bit busy - ie no IOVA 0 */ |
| 1726 | sba_dev->ioc[i].res_map[0] = 0x80; |
| 1727 | sba_dev->ioc[i].pdir_base[0] = 0xeeffc0addbba0080ULL; |
| 1728 | #endif |
| 1729 | |
| 1730 | /* Third (and last) part of PIRANHA BUG */ |
| 1731 | if (piranha_bad_128k) { |
| 1732 | /* region from +1408K to +1536 is un-usable. */ |
| 1733 | |
| 1734 | int idx_start = (1408*1024/sizeof(u64)) >> 3; |
| 1735 | int idx_end = (1536*1024/sizeof(u64)) >> 3; |
| 1736 | long *p_start = (long *) &(sba_dev->ioc[i].res_map[idx_start]); |
| 1737 | long *p_end = (long *) &(sba_dev->ioc[i].res_map[idx_end]); |
| 1738 | |
| 1739 | /* mark that part of the io pdir busy */ |
| 1740 | while (p_start < p_end) |
| 1741 | *p_start++ = -1; |
| 1742 | |
| 1743 | } |
| 1744 | |
| 1745 | #ifdef DEBUG_DMB_TRAP |
| 1746 | iterate_pages( sba_dev->ioc[i].res_map, res_size, |
| 1747 | set_data_memory_break, 0); |
| 1748 | iterate_pages( sba_dev->ioc[i].pdir_base, sba_dev->ioc[i].pdir_size, |
| 1749 | set_data_memory_break, 0); |
| 1750 | #endif |
| 1751 | |
| 1752 | DBG_INIT("%s() %d res_map %x %p\n", |
Harvey Harrison | a8043ec | 2008-05-14 16:21:56 -0700 | [diff] [blame] | 1753 | __func__, i, res_size, sba_dev->ioc[i].res_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1754 | } |
| 1755 | |
| 1756 | spin_lock_init(&sba_dev->sba_lock); |
| 1757 | ioc_needs_fdc = boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC; |
| 1758 | |
| 1759 | #ifdef DEBUG_SBA_INIT |
| 1760 | /* |
| 1761 | * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit set |
| 1762 | * (bit #61, big endian), we have to flush and sync every time |
| 1763 | * IO-PDIR is changed in Ike/Astro. |
| 1764 | */ |
Kyle McMartin | 692086e | 2006-05-30 17:50:29 +0000 | [diff] [blame] | 1765 | if (ioc_needs_fdc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1766 | printk(KERN_INFO MODULE_NAME " FDC/SYNC required.\n"); |
| 1767 | } else { |
| 1768 | printk(KERN_INFO MODULE_NAME " IOC has cache coherent PDIR.\n"); |
| 1769 | } |
| 1770 | #endif |
| 1771 | } |
| 1772 | |
| 1773 | #ifdef CONFIG_PROC_FS |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1774 | static int sba_proc_info(struct seq_file *m, void *p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1775 | { |
| 1776 | struct sba_device *sba_dev = sba_list; |
| 1777 | struct ioc *ioc = &sba_dev->ioc[0]; /* FIXME: Multi-IOC support! */ |
| 1778 | int total_pages = (int) (ioc->res_size << 3); /* 8 bits per byte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | #ifdef SBA_COLLECT_STATS |
| 1780 | unsigned long avg = 0, min, max; |
| 1781 | #endif |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1782 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1784 | seq_printf(m, "%s rev %d.%d\n", |
| 1785 | sba_dev->name, |
| 1786 | (sba_dev->hw_rev & 0x7) + 1, |
| 1787 | (sba_dev->hw_rev & 0x18) >> 3); |
| 1788 | seq_printf(m, "IO PDIR size : %d bytes (%d entries)\n", |
| 1789 | (int)((ioc->res_size << 3) * sizeof(u64)), /* 8 bits/byte */ |
| 1790 | total_pages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1791 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1792 | seq_printf(m, "Resource bitmap : %d bytes (%d pages)\n", |
| 1793 | ioc->res_size, ioc->res_size << 3); /* 8 bits per byte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1794 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1795 | seq_printf(m, "LMMIO_BASE/MASK/ROUTE %08x %08x %08x\n", |
| 1796 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_BASE), |
| 1797 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_MASK), |
| 1798 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_ROUTE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1799 | |
| 1800 | for (i=0; i<4; i++) |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1801 | seq_printf(m, "DIR%d_BASE/MASK/ROUTE %08x %08x %08x\n", |
| 1802 | i, |
| 1803 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_BASE + i*0x18), |
| 1804 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_MASK + i*0x18), |
| 1805 | READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_ROUTE + i*0x18)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1806 | |
| 1807 | #ifdef SBA_COLLECT_STATS |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1808 | seq_printf(m, "IO PDIR entries : %ld free %ld used (%d%%)\n", |
| 1809 | total_pages - ioc->used_pages, ioc->used_pages, |
| 1810 | (int)(ioc->used_pages * 100 / total_pages)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1811 | |
| 1812 | min = max = ioc->avg_search[0]; |
| 1813 | for (i = 0; i < SBA_SEARCH_SAMPLE; i++) { |
| 1814 | avg += ioc->avg_search[i]; |
| 1815 | if (ioc->avg_search[i] > max) max = ioc->avg_search[i]; |
| 1816 | if (ioc->avg_search[i] < min) min = ioc->avg_search[i]; |
| 1817 | } |
| 1818 | avg /= SBA_SEARCH_SAMPLE; |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1819 | seq_printf(m, " Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", |
| 1820 | min, avg, max); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1821 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1822 | seq_printf(m, "pci_map_single(): %12ld calls %12ld pages (avg %d/1000)\n", |
| 1823 | ioc->msingle_calls, ioc->msingle_pages, |
| 1824 | (int)((ioc->msingle_pages * 1000)/ioc->msingle_calls)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1825 | |
| 1826 | /* KLUGE - unmap_sg calls unmap_single for each mapped page */ |
| 1827 | min = ioc->usingle_calls; |
| 1828 | max = ioc->usingle_pages - ioc->usg_pages; |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1829 | seq_printf(m, "pci_unmap_single: %12ld calls %12ld pages (avg %d/1000)\n", |
| 1830 | min, max, (int)((max * 1000)/min)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1831 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1832 | seq_printf(m, "pci_map_sg() : %12ld calls %12ld pages (avg %d/1000)\n", |
| 1833 | ioc->msg_calls, ioc->msg_pages, |
| 1834 | (int)((ioc->msg_pages * 1000)/ioc->msg_calls)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1836 | seq_printf(m, "pci_unmap_sg() : %12ld calls %12ld pages (avg %d/1000)\n", |
| 1837 | ioc->usg_calls, ioc->usg_pages, |
| 1838 | (int)((ioc->usg_pages * 1000)/ioc->usg_calls)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1839 | #endif |
| 1840 | |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1841 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1842 | } |
| 1843 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | static int |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1845 | sba_proc_open(struct inode *i, struct file *f) |
| 1846 | { |
| 1847 | return single_open(f, &sba_proc_info, NULL); |
| 1848 | } |
| 1849 | |
Arjan van de Ven | d54b1fd | 2007-02-12 00:55:34 -0800 | [diff] [blame] | 1850 | static const struct file_operations sba_proc_fops = { |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1851 | .owner = THIS_MODULE, |
| 1852 | .open = sba_proc_open, |
| 1853 | .read = seq_read, |
| 1854 | .llseek = seq_lseek, |
| 1855 | .release = single_release, |
| 1856 | }; |
| 1857 | |
| 1858 | static int |
| 1859 | sba_proc_bitmap_info(struct seq_file *m, void *p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1860 | { |
| 1861 | struct sba_device *sba_dev = sba_list; |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1862 | struct ioc *ioc = &sba_dev->ioc[0]; /* FIXME: Multi-IOC support! */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1863 | |
Andy Shevchenko | b342a65 | 2015-09-09 15:38:39 -0700 | [diff] [blame] | 1864 | seq_hex_dump(m, " ", DUMP_PREFIX_NONE, 32, 4, ioc->res_map, |
| 1865 | ioc->res_size, false); |
Joe Perches | e693d73 | 2015-04-15 16:18:28 -0700 | [diff] [blame] | 1866 | seq_putc(m, '\n'); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1867 | |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1868 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1869 | } |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1870 | |
| 1871 | static int |
| 1872 | sba_proc_bitmap_open(struct inode *i, struct file *f) |
| 1873 | { |
| 1874 | return single_open(f, &sba_proc_bitmap_info, NULL); |
| 1875 | } |
| 1876 | |
Arjan van de Ven | d54b1fd | 2007-02-12 00:55:34 -0800 | [diff] [blame] | 1877 | static const struct file_operations sba_proc_bitmap_fops = { |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1878 | .owner = THIS_MODULE, |
| 1879 | .open = sba_proc_bitmap_open, |
| 1880 | .read = seq_read, |
| 1881 | .llseek = seq_lseek, |
| 1882 | .release = single_release, |
| 1883 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1884 | #endif /* CONFIG_PROC_FS */ |
| 1885 | |
| 1886 | static struct parisc_device_id sba_tbl[] = { |
| 1887 | { HPHW_IOA, HVERSION_REV_ANY_ID, ASTRO_RUNWAY_PORT, 0xb }, |
| 1888 | { HPHW_BCPORT, HVERSION_REV_ANY_ID, IKE_MERCED_PORT, 0xc }, |
| 1889 | { HPHW_BCPORT, HVERSION_REV_ANY_ID, REO_MERCED_PORT, 0xc }, |
| 1890 | { HPHW_BCPORT, HVERSION_REV_ANY_ID, REOG_MERCED_PORT, 0xc }, |
| 1891 | { HPHW_IOA, HVERSION_REV_ANY_ID, PLUTO_MCKINLEY_PORT, 0xc }, |
| 1892 | { 0, } |
| 1893 | }; |
| 1894 | |
Adrian Bunk | df8e5bc | 2008-12-02 03:28:16 +0000 | [diff] [blame] | 1895 | static int sba_driver_callback(struct parisc_device *); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1896 | |
| 1897 | static struct parisc_driver sba_driver = { |
| 1898 | .name = MODULE_NAME, |
| 1899 | .id_table = sba_tbl, |
| 1900 | .probe = sba_driver_callback, |
| 1901 | }; |
| 1902 | |
| 1903 | /* |
| 1904 | ** Determine if sba should claim this chip (return 0) or not (return 1). |
| 1905 | ** If so, initialize the chip and tell other partners in crime they |
| 1906 | ** have work to do. |
| 1907 | */ |
Adrian Bunk | df8e5bc | 2008-12-02 03:28:16 +0000 | [diff] [blame] | 1908 | static int sba_driver_callback(struct parisc_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1909 | { |
| 1910 | struct sba_device *sba_dev; |
| 1911 | u32 func_class; |
| 1912 | int i; |
| 1913 | char *version; |
Helge Deller | 5076c15 | 2006-03-27 12:52:15 -0700 | [diff] [blame] | 1914 | void __iomem *sba_addr = ioremap_nocache(dev->hpa.start, SBA_FUNC_SIZE); |
Denis V. Lunev | 0fd6894 | 2008-04-29 01:02:32 -0700 | [diff] [blame] | 1915 | #ifdef CONFIG_PROC_FS |
| 1916 | struct proc_dir_entry *root; |
| 1917 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1918 | |
| 1919 | sba_dump_ranges(sba_addr); |
| 1920 | |
| 1921 | /* Read HW Rev First */ |
| 1922 | func_class = READ_REG(sba_addr + SBA_FCLASS); |
| 1923 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1924 | if (IS_ASTRO(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1925 | unsigned long fclass; |
| 1926 | static char astro_rev[]="Astro ?.?"; |
| 1927 | |
| 1928 | /* Astro is broken...Read HW Rev First */ |
| 1929 | fclass = READ_REG(sba_addr); |
| 1930 | |
| 1931 | astro_rev[6] = '1' + (char) (fclass & 0x7); |
| 1932 | astro_rev[8] = '0' + (char) ((fclass & 0x18) >> 3); |
| 1933 | version = astro_rev; |
| 1934 | |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1935 | } else if (IS_IKE(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1936 | static char ike_rev[] = "Ike rev ?"; |
| 1937 | ike_rev[8] = '0' + (char) (func_class & 0xff); |
| 1938 | version = ike_rev; |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1939 | } else if (IS_PLUTO(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1940 | static char pluto_rev[]="Pluto ?.?"; |
| 1941 | pluto_rev[6] = '0' + (char) ((func_class & 0xf0) >> 4); |
| 1942 | pluto_rev[8] = '0' + (char) (func_class & 0x0f); |
| 1943 | version = pluto_rev; |
| 1944 | } else { |
| 1945 | static char reo_rev[] = "REO rev ?"; |
| 1946 | reo_rev[8] = '0' + (char) (func_class & 0xff); |
| 1947 | version = reo_rev; |
| 1948 | } |
| 1949 | |
| 1950 | if (!global_ioc_cnt) { |
| 1951 | global_ioc_cnt = count_parisc_driver(&sba_driver); |
| 1952 | |
| 1953 | /* Astro and Pluto have one IOC per SBA */ |
Kyle McMartin | 1b240f4 | 2006-08-24 21:30:19 -0400 | [diff] [blame] | 1954 | if ((!IS_ASTRO(dev)) || (!IS_PLUTO(dev))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | global_ioc_cnt *= 2; |
| 1956 | } |
| 1957 | |
Kyle McMartin | e9a0399 | 2007-10-18 00:04:00 -0700 | [diff] [blame] | 1958 | printk(KERN_INFO "%s found %s at 0x%llx\n", |
| 1959 | MODULE_NAME, version, (unsigned long long)dev->hpa.start); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1960 | |
Helge Deller | cb6fc18 | 2006-01-17 12:40:40 -0700 | [diff] [blame] | 1961 | sba_dev = kzalloc(sizeof(struct sba_device), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | if (!sba_dev) { |
| 1963 | printk(KERN_ERR MODULE_NAME " - couldn't alloc sba_device\n"); |
| 1964 | return -ENOMEM; |
| 1965 | } |
| 1966 | |
| 1967 | parisc_set_drvdata(dev, sba_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1968 | |
| 1969 | for(i=0; i<MAX_IOC; i++) |
| 1970 | spin_lock_init(&(sba_dev->ioc[i].res_lock)); |
| 1971 | |
| 1972 | sba_dev->dev = dev; |
| 1973 | sba_dev->hw_rev = func_class; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1974 | sba_dev->name = dev->name; |
| 1975 | sba_dev->sba_hpa = sba_addr; |
| 1976 | |
| 1977 | sba_get_pat_resources(sba_dev); |
| 1978 | sba_hw_init(sba_dev); |
| 1979 | sba_common_init(sba_dev); |
| 1980 | |
| 1981 | hppa_dma_ops = &sba_ops; |
| 1982 | |
| 1983 | #ifdef CONFIG_PROC_FS |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1984 | switch (dev->id.hversion) { |
| 1985 | case PLUTO_MCKINLEY_PORT: |
| 1986 | root = proc_mckinley_root; |
| 1987 | break; |
| 1988 | case ASTRO_RUNWAY_PORT: |
| 1989 | case IKE_MERCED_PORT: |
| 1990 | default: |
| 1991 | root = proc_runway_root; |
| 1992 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1993 | } |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1994 | |
Denis V. Lunev | 0fd6894 | 2008-04-29 01:02:32 -0700 | [diff] [blame] | 1995 | proc_create("sba_iommu", 0, root, &sba_proc_fops); |
| 1996 | proc_create("sba_iommu-bitmap", 0, root, &sba_proc_bitmap_fops); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1997 | #endif |
Kyle McMartin | 7ec14e4 | 2006-02-06 10:10:15 -0700 | [diff] [blame] | 1998 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1999 | parisc_has_iommu(); |
| 2000 | return 0; |
| 2001 | } |
| 2002 | |
| 2003 | /* |
| 2004 | ** One time initialization to let the world know the SBA was found. |
| 2005 | ** This is the only routine which is NOT static. |
| 2006 | ** Must be called exactly once before pci_init(). |
| 2007 | */ |
| 2008 | void __init sba_init(void) |
| 2009 | { |
| 2010 | register_parisc_driver(&sba_driver); |
| 2011 | } |
| 2012 | |
| 2013 | |
| 2014 | /** |
| 2015 | * sba_get_iommu - Assign the iommu pointer for the pci bus controller. |
| 2016 | * @dev: The parisc device. |
| 2017 | * |
| 2018 | * Returns the appropriate IOMMU data for the given parisc PCI controller. |
| 2019 | * This is cached and used later for PCI DMA Mapping. |
| 2020 | */ |
| 2021 | void * sba_get_iommu(struct parisc_device *pci_hba) |
| 2022 | { |
| 2023 | struct parisc_device *sba_dev = parisc_parent(pci_hba); |
Greg Kroah-Hartman | d18dbfa | 2009-05-04 12:40:54 -0700 | [diff] [blame] | 2024 | struct sba_device *sba = dev_get_drvdata(&sba_dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2025 | char t = sba_dev->id.hw_type; |
| 2026 | int iocnum = (pci_hba->hw_path >> 3); /* rope # */ |
| 2027 | |
| 2028 | WARN_ON((t != HPHW_IOA) && (t != HPHW_BCPORT)); |
| 2029 | |
| 2030 | return &(sba->ioc[iocnum]); |
| 2031 | } |
| 2032 | |
| 2033 | |
| 2034 | /** |
| 2035 | * sba_directed_lmmio - return first directed LMMIO range routed to rope |
| 2036 | * @pa_dev: The parisc device. |
| 2037 | * @r: resource PCI host controller wants start/end fields assigned. |
| 2038 | * |
| 2039 | * For the given parisc PCI controller, determine if any direct ranges |
| 2040 | * are routed down the corresponding rope. |
| 2041 | */ |
| 2042 | void sba_directed_lmmio(struct parisc_device *pci_hba, struct resource *r) |
| 2043 | { |
| 2044 | struct parisc_device *sba_dev = parisc_parent(pci_hba); |
Greg Kroah-Hartman | d18dbfa | 2009-05-04 12:40:54 -0700 | [diff] [blame] | 2045 | struct sba_device *sba = dev_get_drvdata(&sba_dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2046 | char t = sba_dev->id.hw_type; |
| 2047 | int i; |
| 2048 | int rope = (pci_hba->hw_path & (ROPES_PER_IOC-1)); /* rope # */ |
| 2049 | |
Eric Sesterhenn | b749455 | 2006-03-24 18:52:10 +0100 | [diff] [blame] | 2050 | BUG_ON((t!=HPHW_IOA) && (t!=HPHW_BCPORT)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2051 | |
| 2052 | r->start = r->end = 0; |
| 2053 | |
| 2054 | /* Astro has 4 directed ranges. Not sure about Ike/Pluto/et al */ |
| 2055 | for (i=0; i<4; i++) { |
| 2056 | int base, size; |
| 2057 | void __iomem *reg = sba->sba_hpa + i*0x18; |
| 2058 | |
| 2059 | base = READ_REG32(reg + LMMIO_DIRECT0_BASE); |
| 2060 | if ((base & 1) == 0) |
| 2061 | continue; /* not enabled */ |
| 2062 | |
| 2063 | size = READ_REG32(reg + LMMIO_DIRECT0_ROUTE); |
| 2064 | |
| 2065 | if ((size & (ROPES_PER_IOC-1)) != rope) |
| 2066 | continue; /* directed down different rope */ |
| 2067 | |
| 2068 | r->start = (base & ~1UL) | PCI_F_EXTEND; |
| 2069 | size = ~ READ_REG32(reg + LMMIO_DIRECT0_MASK); |
| 2070 | r->end = r->start + size; |
Matthew Wilcox | ca0844e | 2009-06-26 17:44:18 +0000 | [diff] [blame] | 2071 | r->flags = IORESOURCE_MEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2072 | } |
| 2073 | } |
| 2074 | |
| 2075 | |
| 2076 | /** |
| 2077 | * sba_distributed_lmmio - return portion of distributed LMMIO range |
| 2078 | * @pa_dev: The parisc device. |
| 2079 | * @r: resource PCI host controller wants start/end fields assigned. |
| 2080 | * |
| 2081 | * For the given parisc PCI controller, return portion of distributed LMMIO |
| 2082 | * range. The distributed LMMIO is always present and it's just a question |
| 2083 | * of the base address and size of the range. |
| 2084 | */ |
| 2085 | void sba_distributed_lmmio(struct parisc_device *pci_hba, struct resource *r ) |
| 2086 | { |
| 2087 | struct parisc_device *sba_dev = parisc_parent(pci_hba); |
Greg Kroah-Hartman | d18dbfa | 2009-05-04 12:40:54 -0700 | [diff] [blame] | 2088 | struct sba_device *sba = dev_get_drvdata(&sba_dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2089 | char t = sba_dev->id.hw_type; |
| 2090 | int base, size; |
| 2091 | int rope = (pci_hba->hw_path & (ROPES_PER_IOC-1)); /* rope # */ |
| 2092 | |
Eric Sesterhenn | b749455 | 2006-03-24 18:52:10 +0100 | [diff] [blame] | 2093 | BUG_ON((t!=HPHW_IOA) && (t!=HPHW_BCPORT)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2094 | |
| 2095 | r->start = r->end = 0; |
| 2096 | |
| 2097 | base = READ_REG32(sba->sba_hpa + LMMIO_DIST_BASE); |
| 2098 | if ((base & 1) == 0) { |
| 2099 | BUG(); /* Gah! Distr Range wasn't enabled! */ |
| 2100 | return; |
| 2101 | } |
| 2102 | |
| 2103 | r->start = (base & ~1UL) | PCI_F_EXTEND; |
| 2104 | |
| 2105 | size = (~READ_REG32(sba->sba_hpa + LMMIO_DIST_MASK)) / ROPES_PER_IOC; |
| 2106 | r->start += rope * (size + 1); /* adjust base for this rope */ |
| 2107 | r->end = r->start + size; |
Matthew Wilcox | ca0844e | 2009-06-26 17:44:18 +0000 | [diff] [blame] | 2108 | r->flags = IORESOURCE_MEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2109 | } |