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Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05301/*
2 * DTS file for SPEAr300 Evaluation Baord
3 *
Viresh Kumar10d89352012-06-20 12:53:02 -07004 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05305 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear300.dtsi"
16
17/ {
18 model = "ST SPEAr300 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
Viresh Kumare0373602012-03-29 08:30:19 +053028 pinmux@99000000 {
29 st,pinmux-mode = <2>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
32
33 state_default: pinmux {
34 i2c0 {
35 st,pins = "i2c0_grp";
36 st,function = "i2c0";
37 };
38 ssp0 {
39 st,pins = "ssp0_grp";
40 st,function = "ssp0";
41 };
42 mii0 {
43 st,pins = "mii0_grp";
44 st,function = "mii0";
45 };
46 uart0 {
47 st,pins = "uart0_grp";
48 st,function = "uart0";
49 };
50 clcd {
51 st,pins = "clcd_pfmode_grp";
52 st,function = "clcd";
53 };
54 sdhci {
55 st,pins = "sdhci_4bit_grp";
56 st,function = "sdhci";
57 };
58 gpio1 {
59 st,pins = "gpio1_4_to_7_grp",
60 "gpio1_0_to_3_grp";
61 st,function = "gpio1";
62 };
63 };
64 };
65
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053066 clcd@60000000 {
67 status = "okay";
68 };
69
Viresh Kumar0b7ee712012-03-26 10:29:23 +053070 dma@fc400000 {
71 status = "okay";
72 };
73
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053074 fsmc: flash@94000000 {
75 status = "okay";
76 };
77
78 gmac: eth@e0800000 {
79 status = "okay";
80 };
81
82 sdhci@70000000 {
Viresh Kumar067bf742012-09-28 15:58:22 +053083 cd-gpios = <&gpio1 0 0>;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053084 status = "okay";
85 };
86
87 smi: flash@fc000000 {
88 status = "okay";
Viresh Kumar30a0d032012-05-01 18:09:22 +053089 clock-rate=<50000000>;
90
91 flash@f8000000 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 reg = <0xf8000000 0x800000>;
95 st,smi-fast-mode;
96
97 partition@0 {
98 label = "xloader";
99 reg = <0x0 0x10000>;
100 };
101 partition@10000 {
102 label = "u-boot";
Vipin Kumar482a8f32012-07-05 11:51:47 +0800103 reg = <0x10000 0x50000>;
Viresh Kumar30a0d032012-05-01 18:09:22 +0530104 };
Vipin Kumar482a8f32012-07-05 11:51:47 +0800105 partition@60000 {
106 label = "environment";
107 reg = <0x60000 0x10000>;
108 };
109 partition@70000 {
110 label = "dtb";
111 reg = <0x70000 0x10000>;
112 };
113 partition@80000 {
Viresh Kumar30a0d032012-05-01 18:09:22 +0530114 label = "linux";
Vipin Kumar482a8f32012-07-05 11:51:47 +0800115 reg = <0x80000 0x310000>;
Viresh Kumar30a0d032012-05-01 18:09:22 +0530116 };
Vipin Kumar482a8f32012-07-05 11:51:47 +0800117 partition@390000 {
Viresh Kumar30a0d032012-05-01 18:09:22 +0530118 label = "rootfs";
Vipin Kumar482a8f32012-07-05 11:51:47 +0800119 reg = <0x390000 0x0>;
Viresh Kumar30a0d032012-05-01 18:09:22 +0530120 };
121 };
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530122 };
123
124 spi0: spi@d0100000 {
125 status = "okay";
126 };
127
128 ehci@e1800000 {
129 status = "okay";
130 };
131
132 ohci@e1900000 {
133 status = "okay";
134 };
135
136 ohci@e2100000 {
137 status = "okay";
138 };
139
140 apb {
141 gpio0: gpio@fc980000 {
142 status = "okay";
143 };
144
145 gpio1: gpio@a9000000 {
146 status = "okay";
147 };
148
149 i2c0: i2c@d0180000 {
150 status = "okay";
151 };
152
153 kbd@a0000000 {
Viresh Kumarfa599c32012-04-24 11:15:39 +0530154 linux,keymap = < 0x00000001
155 0x00010002
156 0x00020003
157 0x00030004
158 0x00040005
159 0x00050006
160 0x00060007
161 0x00070008
162 0x00080009
163 0x0100000a
164 0x0101000c
165 0x0102000d
166 0x0103000e
167 0x0104000f
168 0x01050010
169 0x01060011
170 0x01070012
171 0x01080013
172 0x02000014
173 0x02010015
174 0x02020016
175 0x02030017
176 0x02040018
177 0x02050019
178 0x0206001a
179 0x0207001b
180 0x0208001c
181 0x0300001d
182 0x0301001e
183 0x0302001f
184 0x03030020
185 0x03040021
186 0x03050022
187 0x03060023
188 0x03070024
189 0x03080025
190 0x04000026
191 0x04010027
192 0x04020028
193 0x04030029
194 0x0404002a
195 0x0405002b
196 0x0406002c
197 0x0407002d
198 0x0408002e
199 0x0500002f
200 0x05010030
201 0x05020031
202 0x05030032
203 0x05040033
204 0x05050034
205 0x05060035
206 0x05070036
207 0x05080037
208 0x06000038
209 0x06010039
210 0x0602003a
211 0x0603003b
212 0x0604003c
213 0x0605003d
214 0x0606003e
215 0x0607003f
216 0x06080040
217 0x07000041
218 0x07010042
219 0x07020043
220 0x07030044
221 0x07040045
222 0x07050046
223 0x07060047
224 0x07070048
225 0x07080049
226 0x0800004a
227 0x0801004b
228 0x0802004c
229 0x0803004d
230 0x0804004e
231 0x0805004f
232 0x08060050
233 0x08070051
234 0x08080052 >;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530235 autorepeat;
236 st,mode = <0>;
237 status = "okay";
238 };
239
240 rtc@fc900000 {
241 status = "okay";
242 };
243
244 serial@d0000000 {
245 status = "okay";
Vipul Kumar Samar7bceba82012-08-30 09:32:24 +0530246 pinctrl-names = "default";
247 pinctrl-0 = <>;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530248 };
249
250 wdt@fc880000 {
251 status = "okay";
252 };
253 };
254 };
255};