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Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001/*
2 * drivers/mmc/host/omap_hsmmc.c
3 *
4 * Driver for OMAP2430/3430 MMC controller.
5 *
6 * Copyright (C) 2007 Texas Instruments.
7 *
8 * Authors:
9 * Syed Mohammed Khasim <x0khasim@ti.com>
10 * Madhusudhan <madhu.cr@ti.com>
11 * Mohit Jalori <mjalori@ti.com>
12 *
13 * This file is licensed under the terms of the GNU General Public License
14 * version 2. This program is licensed "as is" without any warranty of any
15 * kind, whether express or implied.
16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
Andy Shevchenkoac330f442011-05-10 15:51:54 +030020#include <linux/kernel.h>
Denis Karpovd900f712009-09-22 16:44:38 -070021#include <linux/debugfs.h>
Russell Kingc5c98922012-04-13 12:14:39 +010022#include <linux/dmaengine.h>
Denis Karpovd900f712009-09-22 16:44:38 -070023#include <linux/seq_file.h>
Felipe Balbi031cd032013-07-11 16:09:05 +030024#include <linux/sizes.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010025#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/dma-mapping.h>
28#include <linux/platform_device.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010029#include <linux/timer.h>
30#include <linux/clk.h>
Rajendra Nayak46856a62012-03-12 20:32:37 +053031#include <linux/of.h>
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +020032#include <linux/of_irq.h>
Rajendra Nayak46856a62012-03-12 20:32:37 +053033#include <linux/of_gpio.h>
34#include <linux/of_device.h>
Balaji T Kee526d52014-05-09 22:16:53 +053035#include <linux/omap-dmaengine.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010036#include <linux/mmc/host.h>
Jarkko Lavinen13189e72009-09-22 16:44:53 -070037#include <linux/mmc/core.h>
Adrian Hunter93caf8e692010-08-11 14:17:48 -070038#include <linux/mmc/mmc.h>
NeilBrown41afa3142015-01-13 08:23:18 +130039#include <linux/mmc/slot-gpio.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010040#include <linux/io.h>
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +020041#include <linux/irq.h>
Adrian Hunterdb0fefc2010-02-15 10:03:34 -080042#include <linux/gpio.h>
43#include <linux/regulator/consumer.h>
Daniel Mack46b76032012-10-15 21:35:05 +053044#include <linux/pinctrl/consumer.h>
Balaji T Kfa4aa2d2011-07-01 22:09:35 +053045#include <linux/pm_runtime.h>
Tony Lindgren5b83b222015-05-21 15:51:52 -070046#include <linux/pm_wakeirq.h>
Andreas Fenkart55143432014-11-08 15:33:09 +010047#include <linux/platform_data/hsmmc-omap.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010048
49/* OMAP HSMMC Host Controller Registers */
Denis Karpov11dd62a2009-09-22 16:44:43 -070050#define OMAP_HSMMC_SYSSTATUS 0x0014
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010051#define OMAP_HSMMC_CON 0x002C
Balaji T Ka2e77152014-01-21 19:54:42 +053052#define OMAP_HSMMC_SDMASA 0x0100
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010053#define OMAP_HSMMC_BLK 0x0104
54#define OMAP_HSMMC_ARG 0x0108
55#define OMAP_HSMMC_CMD 0x010C
56#define OMAP_HSMMC_RSP10 0x0110
57#define OMAP_HSMMC_RSP32 0x0114
58#define OMAP_HSMMC_RSP54 0x0118
59#define OMAP_HSMMC_RSP76 0x011C
60#define OMAP_HSMMC_DATA 0x0120
Andreas Fenkartbb0635f2014-05-29 10:28:01 +020061#define OMAP_HSMMC_PSTATE 0x0124
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010062#define OMAP_HSMMC_HCTL 0x0128
63#define OMAP_HSMMC_SYSCTL 0x012C
64#define OMAP_HSMMC_STAT 0x0130
65#define OMAP_HSMMC_IE 0x0134
66#define OMAP_HSMMC_ISE 0x0138
Balaji T Ka2e77152014-01-21 19:54:42 +053067#define OMAP_HSMMC_AC12 0x013C
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010068#define OMAP_HSMMC_CAPA 0x0140
69
70#define VS18 (1 << 26)
71#define VS30 (1 << 25)
Hebbar, Gururajacd587092012-11-19 21:59:58 +053072#define HSS (1 << 21)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010073#define SDVS18 (0x5 << 9)
74#define SDVS30 (0x6 << 9)
David Brownelleb250822009-02-17 14:49:01 -080075#define SDVS33 (0x7 << 9)
Kim Kyuwon1b331e62009-02-20 13:10:08 +010076#define SDVS_MASK 0x00000E00
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010077#define SDVSCLR 0xFFFFF1FF
78#define SDVSDET 0x00000400
79#define AUTOIDLE 0x1
80#define SDBP (1 << 8)
81#define DTO 0xe
82#define ICE 0x1
83#define ICS 0x2
84#define CEN (1 << 2)
Balaji T Ked164182013-10-21 00:25:21 +053085#define CLKD_MAX 0x3FF /* max clock divisor: 1023 */
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010086#define CLKD_MASK 0x0000FFC0
87#define CLKD_SHIFT 6
88#define DTO_MASK 0x000F0000
89#define DTO_SHIFT 16
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010090#define INIT_STREAM (1 << 1)
Balaji T Ka2e77152014-01-21 19:54:42 +053091#define ACEN_ACMD23 (2 << 2)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010092#define DP_SELECT (1 << 21)
93#define DDIR (1 << 4)
Venkatraman Sa7e96872012-11-19 22:00:01 +053094#define DMAE 0x1
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010095#define MSBS (1 << 5)
96#define BCE (1 << 1)
97#define FOUR_BIT (1 << 1)
Hebbar, Gururajacd587092012-11-19 21:59:58 +053098#define HSPE (1 << 2)
Balaji T K5a52b082014-05-29 10:28:02 +020099#define IWE (1 << 24)
Balaji T K03b5d922012-04-09 12:08:33 +0530100#define DDR (1 << 19)
Balaji T K5a52b082014-05-29 10:28:02 +0200101#define CLKEXTFREE (1 << 16)
102#define CTPL (1 << 11)
Jarkko Lavinen73153012008-11-21 16:49:54 +0200103#define DW8 (1 << 5)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100104#define OD 0x1
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100105#define STAT_CLEAR 0xFFFFFFFF
106#define INIT_STREAM_CMD 0x00000000
107#define DUAL_VOLT_OCR_BIT 7
108#define SRC (1 << 25)
109#define SRD (1 << 26)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700110#define SOFTRESET (1 << 1)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100111
Andreas Fenkartf9459012014-05-29 10:28:03 +0200112/* PSTATE */
113#define DLEV_DAT(x) (1 << (20 + (x)))
114
Venkatraman Sa7e96872012-11-19 22:00:01 +0530115/* Interrupt masks for IE and ISE register */
116#define CC_EN (1 << 0)
117#define TC_EN (1 << 1)
118#define BWR_EN (1 << 4)
119#define BRR_EN (1 << 5)
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200120#define CIRQ_EN (1 << 8)
Venkatraman Sa7e96872012-11-19 22:00:01 +0530121#define ERR_EN (1 << 15)
122#define CTO_EN (1 << 16)
123#define CCRC_EN (1 << 17)
124#define CEB_EN (1 << 18)
125#define CIE_EN (1 << 19)
126#define DTO_EN (1 << 20)
127#define DCRC_EN (1 << 21)
128#define DEB_EN (1 << 22)
Balaji T Ka2e77152014-01-21 19:54:42 +0530129#define ACE_EN (1 << 24)
Venkatraman Sa7e96872012-11-19 22:00:01 +0530130#define CERR_EN (1 << 28)
131#define BADA_EN (1 << 29)
132
Balaji T Ka2e77152014-01-21 19:54:42 +0530133#define INT_EN_MASK (BADA_EN | CERR_EN | ACE_EN | DEB_EN | DCRC_EN |\
Venkatraman Sa7e96872012-11-19 22:00:01 +0530134 DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \
135 BRR_EN | BWR_EN | TC_EN | CC_EN)
136
Balaji T Ka2e77152014-01-21 19:54:42 +0530137#define CNI (1 << 7)
138#define ACIE (1 << 4)
139#define ACEB (1 << 3)
140#define ACCE (1 << 2)
141#define ACTO (1 << 1)
142#define ACNE (1 << 0)
143
Balaji T Kfa4aa2d2011-07-01 22:09:35 +0530144#define MMC_AUTOSUSPEND_DELAY 100
Jianpeng Ma1e881782013-10-21 00:25:20 +0530145#define MMC_TIMEOUT_MS 20 /* 20 mSec */
146#define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */
Andy Shevchenko6b206ef2011-07-13 11:16:29 -0400147#define OMAP_MMC_MIN_CLOCK 400000
148#define OMAP_MMC_MAX_CLOCK 52000000
Kishore Kadiyala0005ae72011-02-28 20:48:05 +0530149#define DRIVER_NAME "omap_hsmmc"
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100150
Balaji T Ke99448f2014-02-19 20:26:40 +0530151#define VDD_1V8 1800000 /* 180000 uV */
152#define VDD_3V0 3000000 /* 300000 uV */
153#define VDD_165_195 (ffs(MMC_VDD_165_195) - 1)
154
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100155/*
156 * One controller can have multiple slots, like on some omap boards using
157 * omap.c controller driver. Luckily this is not currently done on any known
158 * omap_hsmmc.c device.
159 */
Andreas Fenkart326119c2014-11-08 15:33:14 +0100160#define mmc_pdata(host) host->pdata
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100161
162/*
163 * MMC Host controller read/write API's
164 */
165#define OMAP_HSMMC_READ(base, reg) \
166 __raw_readl((base) + OMAP_HSMMC_##reg)
167
168#define OMAP_HSMMC_WRITE(base, reg, val) \
169 __raw_writel((val), (base) + OMAP_HSMMC_##reg)
170
Per Forlin9782aff2011-07-01 18:55:23 +0200171struct omap_hsmmc_next {
172 unsigned int dma_len;
173 s32 cookie;
174};
175
Denis Karpov70a33412009-09-22 16:44:59 -0700176struct omap_hsmmc_host {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100177 struct device *dev;
178 struct mmc_host *mmc;
179 struct mmc_request *mrq;
180 struct mmc_command *cmd;
181 struct mmc_data *data;
182 struct clk *fclk;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100183 struct clk *dbclk;
Balaji T Ke99448f2014-02-19 20:26:40 +0530184 struct regulator *pbias;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100185 void __iomem *base;
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530186 int vqmmc_enabled;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100187 resource_size_t mapbase;
Adrian Hunter4dffd7a2009-09-22 16:44:58 -0700188 spinlock_t irq_lock; /* Prevent races with irq handler */
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100189 unsigned int dma_len;
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200190 unsigned int dma_sg_idx;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100191 unsigned char bus_mode;
Adrian Huntera3621462009-09-22 16:44:42 -0700192 unsigned char power_mode;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100193 int suspended;
Tony Lindgren0a82e062013-10-21 00:25:19 +0530194 u32 con;
195 u32 hctl;
196 u32 sysctl;
197 u32 capa;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100198 int irq;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200199 int wake_irq;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100200 int use_dma, dma_ch;
Russell Kingc5c98922012-04-13 12:14:39 +0100201 struct dma_chan *tx_chan;
202 struct dma_chan *rx_chan;
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200203 int response_busy;
Denis Karpov11dd62a2009-09-22 16:44:43 -0700204 int context_loss;
Adrian Hunterb62f6222009-09-22 16:45:01 -0700205 int protect_card;
206 int reqs_blocked;
Adrian Hunterb4175772010-05-26 14:42:06 -0700207 int req_in_progress;
Balaji T K6e3076c2014-01-21 19:54:42 +0530208 unsigned long clk_rate;
Balaji T Ka2e77152014-01-21 19:54:42 +0530209 unsigned int flags;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200210#define AUTO_CMD23 (1 << 0) /* Auto CMD23 support */
211#define HSMMC_SDIO_IRQ_ENABLED (1 << 1) /* SDIO irq enabled */
Per Forlin9782aff2011-07-01 18:55:23 +0200212 struct omap_hsmmc_next next_data;
Andreas Fenkart55143432014-11-08 15:33:09 +0100213 struct omap_hsmmc_platform_data *pdata;
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +0100214
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +0100215 /* return MMC cover switch state, can be NULL if not supported.
216 *
217 * possible return values:
218 * 0 - closed
219 * 1 - open
220 */
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100221 int (*get_cover_state)(struct device *dev);
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +0100222
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100223 int (*card_detect)(struct device *dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100224};
225
Nishanth Menon59445b12014-02-13 23:45:48 -0600226struct omap_mmc_of_data {
227 u32 reg_offset;
228 u8 controller_flags;
229};
230
Balaji T Kbf129e12014-01-21 19:54:42 +0530231static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host);
232
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100233static int omap_hsmmc_card_detect(struct device *dev)
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800234{
Balaji T K9ea28ec2012-10-15 21:35:08 +0530235 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800236
NeilBrown41afa3142015-01-13 08:23:18 +1300237 return mmc_gpio_get_cd(host->mmc);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800238}
239
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100240static int omap_hsmmc_get_cover_state(struct device *dev)
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800241{
Balaji T K9ea28ec2012-10-15 21:35:08 +0530242 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800243
NeilBrown41afa3142015-01-13 08:23:18 +1300244 return mmc_gpio_get_cd(host->mmc);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800245}
246
Kishon Vijay Abraham I1d17f302015-08-27 14:44:06 +0530247static int omap_hsmmc_enable_supply(struct mmc_host *mmc)
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530248{
249 int ret;
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530250 struct omap_hsmmc_host *host = mmc_priv(mmc);
Kishon Vijay Abraham I1d17f302015-08-27 14:44:06 +0530251 struct mmc_ios *ios = &mmc->ios;
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530252
253 if (mmc->supply.vmmc) {
Kishon Vijay Abraham I1d17f302015-08-27 14:44:06 +0530254 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530255 if (ret)
256 return ret;
257 }
258
259 /* Enable interface voltage rail, if needed */
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530260 if (mmc->supply.vqmmc && !host->vqmmc_enabled) {
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530261 ret = regulator_enable(mmc->supply.vqmmc);
262 if (ret) {
263 dev_err(mmc_dev(mmc), "vmmc_aux reg enable failed\n");
264 goto err_vqmmc;
265 }
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530266 host->vqmmc_enabled = 1;
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530267 }
268
269 return 0;
270
271err_vqmmc:
272 if (mmc->supply.vmmc)
273 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
274
275 return ret;
276}
277
278static int omap_hsmmc_disable_supply(struct mmc_host *mmc)
279{
280 int ret;
281 int status;
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530282 struct omap_hsmmc_host *host = mmc_priv(mmc);
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530283
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530284 if (mmc->supply.vqmmc && host->vqmmc_enabled) {
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530285 ret = regulator_disable(mmc->supply.vqmmc);
286 if (ret) {
287 dev_err(mmc_dev(mmc), "vmmc_aux reg disable failed\n");
288 return ret;
289 }
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +0530290 host->vqmmc_enabled = 0;
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530291 }
292
293 if (mmc->supply.vmmc) {
294 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
295 if (ret)
296 goto err_set_ocr;
297 }
298
299 return 0;
300
301err_set_ocr:
302 if (mmc->supply.vqmmc) {
303 status = regulator_enable(mmc->supply.vqmmc);
304 if (status)
305 dev_err(mmc_dev(mmc), "vmmc_aux re-enable failed\n");
306 }
307
308 return ret;
309}
310
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530311static int omap_hsmmc_set_pbias(struct omap_hsmmc_host *host, bool power_on,
312 int vdd)
313{
314 int ret;
315
316 if (!host->pbias)
317 return 0;
318
319 if (power_on) {
320 if (vdd <= VDD_165_195)
321 ret = regulator_set_voltage(host->pbias, VDD_1V8,
322 VDD_1V8);
323 else
324 ret = regulator_set_voltage(host->pbias, VDD_3V0,
325 VDD_3V0);
326 if (ret < 0) {
327 dev_err(host->dev, "pbias set voltage fail\n");
328 return ret;
329 }
330
Kishon Vijay Abraham Ic55d7a02015-08-27 14:44:05 +0530331 if (!regulator_is_enabled(host->pbias)) {
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530332 ret = regulator_enable(host->pbias);
333 if (ret) {
334 dev_err(host->dev, "pbias reg enable fail\n");
335 return ret;
336 }
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530337 }
338 } else {
Kishon Vijay Abraham Ic55d7a02015-08-27 14:44:05 +0530339 if (regulator_is_enabled(host->pbias)) {
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530340 ret = regulator_disable(host->pbias);
341 if (ret) {
342 dev_err(host->dev, "pbias reg disable fail\n");
343 return ret;
344 }
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530345 }
346 }
347
348 return 0;
349}
350
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100351static int omap_hsmmc_set_power(struct device *dev, int power_on, int vdd)
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800352{
353 struct omap_hsmmc_host *host =
354 platform_get_drvdata(to_platform_device(dev));
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530355 struct mmc_host *mmc = host->mmc;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800356 int ret = 0;
357
Andreas Fenkartf7f0f032015-07-07 20:38:43 +0200358 if (mmc_pdata(host)->set_power)
359 return mmc_pdata(host)->set_power(dev, power_on, vdd);
360
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800361 /*
362 * If we don't see a Vcc regulator, assume it's a fixed
363 * voltage always-on regulator.
364 */
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530365 if (!mmc->supply.vmmc)
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800366 return 0;
367
Andreas Fenkart326119c2014-11-08 15:33:14 +0100368 if (mmc_pdata(host)->before_set_reg)
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100369 mmc_pdata(host)->before_set_reg(dev, power_on, vdd);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800370
Kishon Vijay Abraham Iec85c952015-08-27 14:44:01 +0530371 ret = omap_hsmmc_set_pbias(host, false, 0);
372 if (ret)
373 return ret;
Balaji T Ke99448f2014-02-19 20:26:40 +0530374
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800375 /*
376 * Assume Vcc regulator is used only to power the card ... OMAP
377 * VDDS is used to power the pins, optionally with a transceiver to
378 * support cards using voltages other than VDDS (1.8V nominal). When a
379 * transceiver is used, DAT3..7 are muxed as transceiver control pins.
380 *
381 * In some cases this regulator won't support enable/disable;
382 * e.g. it's a fixed rail for a WLAN chip.
383 *
384 * In other cases vcc_aux switches interface power. Example, for
385 * eMMC cards it represents VccQ. Sometimes transceivers or SDIO
386 * chips/cards need an interface voltage rail too.
387 */
388 if (power_on) {
Kishon Vijay Abraham I1d17f302015-08-27 14:44:06 +0530389 ret = omap_hsmmc_enable_supply(mmc);
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530390 if (ret)
391 return ret;
Kishon Vijay Abraham I97fe7e52015-08-27 14:44:02 +0530392
393 ret = omap_hsmmc_set_pbias(host, true, vdd);
394 if (ret)
395 goto err_set_voltage;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800396 } else {
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530397 ret = omap_hsmmc_disable_supply(mmc);
398 if (ret)
399 return ret;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800400 }
401
Andreas Fenkart326119c2014-11-08 15:33:14 +0100402 if (mmc_pdata(host)->after_set_reg)
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100403 mmc_pdata(host)->after_set_reg(dev, power_on, vdd);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800404
Kishon Vijay Abraham I229f3292015-08-27 14:43:59 +0530405 return 0;
406
407err_set_voltage:
Kishon Vijay Abraham I2a17f842015-08-27 14:44:00 +0530408 omap_hsmmc_disable_supply(mmc);
Kishon Vijay Abraham I229f3292015-08-27 14:43:59 +0530409
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800410 return ret;
411}
412
Kishon Vijay Abraham Ic8518ef2015-08-27 14:44:03 +0530413static int omap_hsmmc_disable_boot_regulator(struct regulator *reg)
414{
415 int ret;
416
417 if (!reg)
418 return 0;
419
420 if (regulator_is_enabled(reg)) {
421 ret = regulator_enable(reg);
422 if (ret)
423 return ret;
424
425 ret = regulator_disable(reg);
426 if (ret)
427 return ret;
428 }
429
430 return 0;
431}
432
433static int omap_hsmmc_disable_boot_regulators(struct omap_hsmmc_host *host)
434{
435 struct mmc_host *mmc = host->mmc;
436 int ret;
437
438 /*
439 * disable regulators enabled during boot and get the usecount
440 * right so that regulators can be enabled/disabled by checking
441 * the return value of regulator_is_enabled
442 */
443 ret = omap_hsmmc_disable_boot_regulator(mmc->supply.vmmc);
444 if (ret) {
445 dev_err(host->dev, "fail to disable boot enabled vmmc reg\n");
446 return ret;
447 }
448
449 ret = omap_hsmmc_disable_boot_regulator(mmc->supply.vqmmc);
450 if (ret) {
451 dev_err(host->dev,
452 "fail to disable boot enabled vmmc_aux reg\n");
453 return ret;
454 }
455
456 ret = omap_hsmmc_disable_boot_regulator(host->pbias);
457 if (ret) {
458 dev_err(host->dev,
459 "failed to disable boot enabled pbias reg\n");
460 return ret;
461 }
462
463 return 0;
464}
465
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800466static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
467{
kishore kadiyala64be9782010-10-01 16:35:28 -0700468 int ocr_value = 0;
Kishon Vijay Abraham I7d607f92015-08-27 14:43:53 +0530469 int ret;
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530470 struct mmc_host *mmc = host->mmc;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800471
Andreas Fenkartf7f0f032015-07-07 20:38:43 +0200472 if (mmc_pdata(host)->set_power)
473 return 0;
474
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530475 mmc->supply.vmmc = devm_regulator_get_optional(host->dev, "vmmc");
476 if (IS_ERR(mmc->supply.vmmc)) {
477 ret = PTR_ERR(mmc->supply.vmmc);
Kishon Vijay Abraham I7d607f92015-08-27 14:43:53 +0530478 if (ret != -ENODEV)
479 return ret;
Kishon Vijay Abraham I7d607f92015-08-27 14:43:53 +0530480 dev_dbg(host->dev, "unable to get vmmc regulator %ld\n",
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530481 PTR_ERR(mmc->supply.vmmc));
482 mmc->supply.vmmc = NULL;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800483 } else {
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530484 ocr_value = mmc_regulator_get_ocrmask(mmc->supply.vmmc);
Kishon Vijay Abraham Ib49069f2015-08-27 14:43:56 +0530485 if (ocr_value > 0)
Andreas Fenkart326119c2014-11-08 15:33:14 +0100486 mmc_pdata(host)->ocr_mask = ocr_value;
Balaji T K987fd492014-02-19 20:26:40 +0530487 }
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800488
Balaji T K987fd492014-02-19 20:26:40 +0530489 /* Allow an aux regulator */
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530490 mmc->supply.vqmmc = devm_regulator_get_optional(host->dev, "vmmc_aux");
491 if (IS_ERR(mmc->supply.vqmmc)) {
492 ret = PTR_ERR(mmc->supply.vqmmc);
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530493 if (ret != -ENODEV)
494 return ret;
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530495 dev_dbg(host->dev, "unable to get vmmc_aux regulator %ld\n",
Kishon Vijay Abraham Iaa9a6802015-08-27 14:43:57 +0530496 PTR_ERR(mmc->supply.vqmmc));
497 mmc->supply.vqmmc = NULL;
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530498 }
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800499
Kishon Vijay Abraham Ic299dc32015-08-27 14:43:55 +0530500 host->pbias = devm_regulator_get_optional(host->dev, "pbias");
501 if (IS_ERR(host->pbias)) {
502 ret = PTR_ERR(host->pbias);
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530503 if (ret != -ENODEV)
504 return ret;
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530505 dev_dbg(host->dev, "unable to get pbias regulator %ld\n",
Kishon Vijay Abraham Ic299dc32015-08-27 14:43:55 +0530506 PTR_ERR(host->pbias));
507 host->pbias = NULL;
Kishon Vijay Abraham I6a9b2ff2015-08-27 14:43:54 +0530508 }
Balaji T Ke99448f2014-02-19 20:26:40 +0530509
Balaji T K987fd492014-02-19 20:26:40 +0530510 /* For eMMC do not power off when not in sleep state */
Andreas Fenkart326119c2014-11-08 15:33:14 +0100511 if (mmc_pdata(host)->no_regulator_off_init)
Balaji T K987fd492014-02-19 20:26:40 +0530512 return 0;
Adrian Huntere840ce12011-05-06 12:14:10 +0300513
Kishon Vijay Abraham Ic8518ef2015-08-27 14:44:03 +0530514 ret = omap_hsmmc_disable_boot_regulators(host);
515 if (ret)
516 return ret;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800517
518 return 0;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800519}
520
Andreas Fenkartcde592c2015-03-03 13:28:15 +0100521static irqreturn_t omap_hsmmc_cover_irq(int irq, void *dev_id);
NeilBrown41afa3142015-01-13 08:23:18 +1300522
523static int omap_hsmmc_gpio_init(struct mmc_host *mmc,
524 struct omap_hsmmc_host *host,
Andreas Fenkart1e363e32014-11-08 15:33:15 +0100525 struct omap_hsmmc_platform_data *pdata)
Adrian Hunterb702b102010-02-15 10:03:35 -0800526{
527 int ret;
528
Andreas Fenkartb7a56462015-03-20 15:53:54 +0100529 if (gpio_is_valid(pdata->gpio_cod)) {
530 ret = mmc_gpio_request_cd(mmc, pdata->gpio_cod, 0);
Adrian Hunterb702b102010-02-15 10:03:35 -0800531 if (ret)
532 return ret;
Andreas Fenkartcde592c2015-03-03 13:28:15 +0100533
534 host->get_cover_state = omap_hsmmc_get_cover_state;
535 mmc_gpio_set_cd_isr(mmc, omap_hsmmc_cover_irq);
Andreas Fenkartb7a56462015-03-20 15:53:54 +0100536 } else if (gpio_is_valid(pdata->gpio_cd)) {
537 ret = mmc_gpio_request_cd(mmc, pdata->gpio_cd, 0);
Andreas Fenkartcde592c2015-03-03 13:28:15 +0100538 if (ret)
539 return ret;
540
541 host->card_detect = omap_hsmmc_card_detect;
Andreas Fenkart326119c2014-11-08 15:33:14 +0100542 }
Adrian Hunterb702b102010-02-15 10:03:35 -0800543
Andreas Fenkart326119c2014-11-08 15:33:14 +0100544 if (gpio_is_valid(pdata->gpio_wp)) {
NeilBrown41afa3142015-01-13 08:23:18 +1300545 ret = mmc_gpio_request_ro(mmc, pdata->gpio_wp);
Adrian Hunterb702b102010-02-15 10:03:35 -0800546 if (ret)
NeilBrown41afa3142015-01-13 08:23:18 +1300547 return ret;
Andreas Fenkart326119c2014-11-08 15:33:14 +0100548 }
Adrian Hunterb702b102010-02-15 10:03:35 -0800549
550 return 0;
Adrian Hunterb702b102010-02-15 10:03:35 -0800551}
552
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100553/*
Andy Shevchenkoe0c7f992011-05-06 12:14:05 +0300554 * Start clock to the card
555 */
556static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host)
557{
558 OMAP_HSMMC_WRITE(host->base, SYSCTL,
559 OMAP_HSMMC_READ(host->base, SYSCTL) | CEN);
560}
561
562/*
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100563 * Stop clock to the card
564 */
Denis Karpov70a33412009-09-22 16:44:59 -0700565static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100566{
567 OMAP_HSMMC_WRITE(host->base, SYSCTL,
568 OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN);
569 if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0)
Masanari Iida7122bbb2012-08-05 23:25:40 +0900570 dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stopped\n");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100571}
572
Adrian Hunter93caf8e692010-08-11 14:17:48 -0700573static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
574 struct mmc_command *cmd)
Adrian Hunterb4175772010-05-26 14:42:06 -0700575{
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200576 u32 irq_mask = INT_EN_MASK;
577 unsigned long flags;
Adrian Hunterb4175772010-05-26 14:42:06 -0700578
579 if (host->use_dma)
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200580 irq_mask &= ~(BRR_EN | BWR_EN);
Adrian Hunterb4175772010-05-26 14:42:06 -0700581
Adrian Hunter93caf8e692010-08-11 14:17:48 -0700582 /* Disable timeout for erases */
583 if (cmd->opcode == MMC_ERASE)
Venkatraman Sa7e96872012-11-19 22:00:01 +0530584 irq_mask &= ~DTO_EN;
Adrian Hunter93caf8e692010-08-11 14:17:48 -0700585
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200586 spin_lock_irqsave(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -0700587 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
588 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200589
590 /* latch pending CIRQ, but don't signal MMC core */
591 if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
592 irq_mask |= CIRQ_EN;
Adrian Hunterb4175772010-05-26 14:42:06 -0700593 OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200594 spin_unlock_irqrestore(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -0700595}
596
597static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
598{
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200599 u32 irq_mask = 0;
600 unsigned long flags;
601
602 spin_lock_irqsave(&host->irq_lock, flags);
603 /* no transfer running but need to keep cirq if enabled */
604 if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
605 irq_mask |= CIRQ_EN;
606 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
607 OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
Adrian Hunterb4175772010-05-26 14:42:06 -0700608 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200609 spin_unlock_irqrestore(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -0700610}
611
Andy Shevchenkoac330f442011-05-10 15:51:54 +0300612/* Calculate divisor for the given clock frequency */
Balaji TKd83b6e02011-12-20 15:12:00 +0530613static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios)
Andy Shevchenkoac330f442011-05-10 15:51:54 +0300614{
615 u16 dsor = 0;
616
617 if (ios->clock) {
Balaji TKd83b6e02011-12-20 15:12:00 +0530618 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock);
Balaji T Ked164182013-10-21 00:25:21 +0530619 if (dsor > CLKD_MAX)
620 dsor = CLKD_MAX;
Andy Shevchenkoac330f442011-05-10 15:51:54 +0300621 }
622
623 return dsor;
624}
625
Andy Shevchenko5934df22011-05-06 12:14:06 +0300626static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
627{
628 struct mmc_ios *ios = &host->mmc->ios;
629 unsigned long regval;
630 unsigned long timeout;
Hebbar, Gururajacd587092012-11-19 21:59:58 +0530631 unsigned long clkdiv;
Andy Shevchenko5934df22011-05-06 12:14:06 +0300632
Venkatraman S8986d312012-08-07 19:10:38 +0530633 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock);
Andy Shevchenko5934df22011-05-06 12:14:06 +0300634
635 omap_hsmmc_stop_clock(host);
636
637 regval = OMAP_HSMMC_READ(host->base, SYSCTL);
638 regval = regval & ~(CLKD_MASK | DTO_MASK);
Hebbar, Gururajacd587092012-11-19 21:59:58 +0530639 clkdiv = calc_divisor(host, ios);
640 regval = regval | (clkdiv << 6) | (DTO << 16);
Andy Shevchenko5934df22011-05-06 12:14:06 +0300641 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval);
642 OMAP_HSMMC_WRITE(host->base, SYSCTL,
643 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
644
645 /* Wait till the ICS bit is set */
646 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
647 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS
648 && time_before(jiffies, timeout))
649 cpu_relax();
650
Hebbar, Gururajacd587092012-11-19 21:59:58 +0530651 /*
652 * Enable High-Speed Support
653 * Pre-Requisites
654 * - Controller should support High-Speed-Enable Bit
655 * - Controller should not be using DDR Mode
656 * - Controller should advertise that it supports High Speed
657 * in capabilities register
658 * - MMC/SD clock coming out of controller > 25MHz
659 */
Andreas Fenkart326119c2014-11-08 15:33:14 +0100660 if ((mmc_pdata(host)->features & HSMMC_HAS_HSPE_SUPPORT) &&
Seungwon Jeon5438ad92014-03-14 21:12:27 +0900661 (ios->timing != MMC_TIMING_MMC_DDR52) &&
Ulf Hansson903101a2014-11-25 13:05:13 +0100662 (ios->timing != MMC_TIMING_UHS_DDR50) &&
Hebbar, Gururajacd587092012-11-19 21:59:58 +0530663 ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
664 regval = OMAP_HSMMC_READ(host->base, HCTL);
665 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
666 regval |= HSPE;
667 else
668 regval &= ~HSPE;
669
670 OMAP_HSMMC_WRITE(host->base, HCTL, regval);
671 }
672
Andy Shevchenko5934df22011-05-06 12:14:06 +0300673 omap_hsmmc_start_clock(host);
674}
675
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -0400676static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
677{
678 struct mmc_ios *ios = &host->mmc->ios;
679 u32 con;
680
681 con = OMAP_HSMMC_READ(host->base, CON);
Ulf Hansson903101a2014-11-25 13:05:13 +0100682 if (ios->timing == MMC_TIMING_MMC_DDR52 ||
683 ios->timing == MMC_TIMING_UHS_DDR50)
Balaji T K03b5d922012-04-09 12:08:33 +0530684 con |= DDR; /* configure in DDR mode */
685 else
686 con &= ~DDR;
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -0400687 switch (ios->bus_width) {
688 case MMC_BUS_WIDTH_8:
689 OMAP_HSMMC_WRITE(host->base, CON, con | DW8);
690 break;
691 case MMC_BUS_WIDTH_4:
692 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
693 OMAP_HSMMC_WRITE(host->base, HCTL,
694 OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT);
695 break;
696 case MMC_BUS_WIDTH_1:
697 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
698 OMAP_HSMMC_WRITE(host->base, HCTL,
699 OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT);
700 break;
701 }
702}
703
704static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host)
705{
706 struct mmc_ios *ios = &host->mmc->ios;
707 u32 con;
708
709 con = OMAP_HSMMC_READ(host->base, CON);
710 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
711 OMAP_HSMMC_WRITE(host->base, CON, con | OD);
712 else
713 OMAP_HSMMC_WRITE(host->base, CON, con & ~OD);
714}
715
Denis Karpov11dd62a2009-09-22 16:44:43 -0700716#ifdef CONFIG_PM
717
718/*
719 * Restore the MMC host context, if it was lost as result of a
720 * power state change.
721 */
Denis Karpov70a33412009-09-22 16:44:59 -0700722static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700723{
724 struct mmc_ios *ios = &host->mmc->ios;
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -0400725 u32 hctl, capa;
Denis Karpov11dd62a2009-09-22 16:44:43 -0700726 unsigned long timeout;
727
Tony Lindgren0a82e062013-10-21 00:25:19 +0530728 if (host->con == OMAP_HSMMC_READ(host->base, CON) &&
729 host->hctl == OMAP_HSMMC_READ(host->base, HCTL) &&
730 host->sysctl == OMAP_HSMMC_READ(host->base, SYSCTL) &&
731 host->capa == OMAP_HSMMC_READ(host->base, CAPA))
732 return 0;
733
734 host->context_loss++;
735
Balaji T Kc2200ef2012-03-07 09:55:30 -0500736 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
Denis Karpov11dd62a2009-09-22 16:44:43 -0700737 if (host->power_mode != MMC_POWER_OFF &&
738 (1 << ios->vdd) <= MMC_VDD_23_24)
739 hctl = SDVS18;
740 else
741 hctl = SDVS30;
742 capa = VS30 | VS18;
743 } else {
744 hctl = SDVS18;
745 capa = VS18;
746 }
747
Balaji T K5a52b082014-05-29 10:28:02 +0200748 if (host->mmc->caps & MMC_CAP_SDIO_IRQ)
749 hctl |= IWE;
750
Denis Karpov11dd62a2009-09-22 16:44:43 -0700751 OMAP_HSMMC_WRITE(host->base, HCTL,
752 OMAP_HSMMC_READ(host->base, HCTL) | hctl);
753
754 OMAP_HSMMC_WRITE(host->base, CAPA,
755 OMAP_HSMMC_READ(host->base, CAPA) | capa);
756
757 OMAP_HSMMC_WRITE(host->base, HCTL,
758 OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
759
760 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
761 while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP
762 && time_before(jiffies, timeout))
763 ;
764
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +0200765 OMAP_HSMMC_WRITE(host->base, ISE, 0);
766 OMAP_HSMMC_WRITE(host->base, IE, 0);
767 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
Denis Karpov11dd62a2009-09-22 16:44:43 -0700768
769 /* Do not initialize card-specific things if the power is off */
770 if (host->power_mode == MMC_POWER_OFF)
771 goto out;
772
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -0400773 omap_hsmmc_set_bus_width(host);
Denis Karpov11dd62a2009-09-22 16:44:43 -0700774
Andy Shevchenko5934df22011-05-06 12:14:06 +0300775 omap_hsmmc_set_clock(host);
Denis Karpov11dd62a2009-09-22 16:44:43 -0700776
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -0400777 omap_hsmmc_set_bus_mode(host);
778
Denis Karpov11dd62a2009-09-22 16:44:43 -0700779out:
Tony Lindgren0a82e062013-10-21 00:25:19 +0530780 dev_dbg(mmc_dev(host->mmc), "context is restored: restore count %d\n",
781 host->context_loss);
Denis Karpov11dd62a2009-09-22 16:44:43 -0700782 return 0;
783}
784
785/*
786 * Save the MMC host context (store the number of power state changes so far).
787 */
Denis Karpov70a33412009-09-22 16:44:59 -0700788static void omap_hsmmc_context_save(struct omap_hsmmc_host *host)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700789{
Tony Lindgren0a82e062013-10-21 00:25:19 +0530790 host->con = OMAP_HSMMC_READ(host->base, CON);
791 host->hctl = OMAP_HSMMC_READ(host->base, HCTL);
792 host->sysctl = OMAP_HSMMC_READ(host->base, SYSCTL);
793 host->capa = OMAP_HSMMC_READ(host->base, CAPA);
Denis Karpov11dd62a2009-09-22 16:44:43 -0700794}
795
796#else
797
Denis Karpov70a33412009-09-22 16:44:59 -0700798static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700799{
800 return 0;
801}
802
Denis Karpov70a33412009-09-22 16:44:59 -0700803static void omap_hsmmc_context_save(struct omap_hsmmc_host *host)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700804{
805}
806
807#endif
808
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100809/*
810 * Send init stream sequence to card
811 * before sending IDLE command
812 */
Denis Karpov70a33412009-09-22 16:44:59 -0700813static void send_init_stream(struct omap_hsmmc_host *host)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100814{
815 int reg = 0;
816 unsigned long timeout;
817
Adrian Hunterb62f6222009-09-22 16:45:01 -0700818 if (host->protect_card)
819 return;
820
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100821 disable_irq(host->irq);
Adrian Hunterb4175772010-05-26 14:42:06 -0700822
823 OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100824 OMAP_HSMMC_WRITE(host->base, CON,
825 OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM);
826 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
827
828 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
Venkatraman Sa7e96872012-11-19 22:00:01 +0530829 while ((reg != CC_EN) && time_before(jiffies, timeout))
830 reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100831
832 OMAP_HSMMC_WRITE(host->base, CON,
833 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM);
Adrian Hunterc653a6d2009-09-22 16:44:56 -0700834
835 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
836 OMAP_HSMMC_READ(host->base, STAT);
837
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100838 enable_irq(host->irq);
839}
840
841static inline
Denis Karpov70a33412009-09-22 16:44:59 -0700842int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100843{
844 int r = 1;
845
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +0100846 if (host->get_cover_state)
Andreas Fenkart80412ca2014-11-08 15:33:17 +0100847 r = host->get_cover_state(host->dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100848 return r;
849}
850
851static ssize_t
Denis Karpov70a33412009-09-22 16:44:59 -0700852omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100853 char *buf)
854{
855 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
Denis Karpov70a33412009-09-22 16:44:59 -0700856 struct omap_hsmmc_host *host = mmc_priv(mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100857
Denis Karpov70a33412009-09-22 16:44:59 -0700858 return sprintf(buf, "%s\n",
859 omap_hsmmc_cover_is_closed(host) ? "closed" : "open");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100860}
861
Denis Karpov70a33412009-09-22 16:44:59 -0700862static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100863
864static ssize_t
Denis Karpov70a33412009-09-22 16:44:59 -0700865omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100866 char *buf)
867{
868 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
Denis Karpov70a33412009-09-22 16:44:59 -0700869 struct omap_hsmmc_host *host = mmc_priv(mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100870
Andreas Fenkart326119c2014-11-08 15:33:14 +0100871 return sprintf(buf, "%s\n", mmc_pdata(host)->name);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100872}
873
Denis Karpov70a33412009-09-22 16:44:59 -0700874static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100875
876/*
877 * Configure the response type and send the cmd.
878 */
879static void
Denis Karpov70a33412009-09-22 16:44:59 -0700880omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100881 struct mmc_data *data)
882{
883 int cmdreg = 0, resptype = 0, cmdtype = 0;
884
Venkatraman S8986d312012-08-07 19:10:38 +0530885 dev_vdbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n",
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100886 mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
887 host->cmd = cmd;
888
Adrian Hunter93caf8e692010-08-11 14:17:48 -0700889 omap_hsmmc_enable_irq(host, cmd);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100890
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200891 host->response_busy = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100892 if (cmd->flags & MMC_RSP_PRESENT) {
893 if (cmd->flags & MMC_RSP_136)
894 resptype = 1;
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200895 else if (cmd->flags & MMC_RSP_BUSY) {
896 resptype = 3;
897 host->response_busy = 1;
898 } else
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100899 resptype = 2;
900 }
901
902 /*
903 * Unlike OMAP1 controller, the cmdtype does not seem to be based on
904 * ac, bc, adtc, bcr. Only commands ending an open ended transfer need
905 * a val of 0x3, rest 0x0.
906 */
907 if (cmd == host->mrq->stop)
908 cmdtype = 0x3;
909
910 cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22);
911
Balaji T Ka2e77152014-01-21 19:54:42 +0530912 if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) &&
913 host->mrq->sbc) {
914 cmdreg |= ACEN_ACMD23;
915 OMAP_HSMMC_WRITE(host->base, SDMASA, host->mrq->sbc->arg);
916 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100917 if (data) {
918 cmdreg |= DP_SELECT | MSBS | BCE;
919 if (data->flags & MMC_DATA_READ)
920 cmdreg |= DDIR;
921 else
922 cmdreg &= ~(DDIR);
923 }
924
925 if (host->use_dma)
Venkatraman Sa7e96872012-11-19 22:00:01 +0530926 cmdreg |= DMAE;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100927
Adrian Hunterb4175772010-05-26 14:42:06 -0700928 host->req_in_progress = 1;
Adrian Hunter4dffd7a2009-09-22 16:44:58 -0700929
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100930 OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg);
931 OMAP_HSMMC_WRITE(host->base, CMD, cmdreg);
932}
933
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200934static int
Denis Karpov70a33412009-09-22 16:44:59 -0700935omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data)
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200936{
937 if (data->flags & MMC_DATA_WRITE)
938 return DMA_TO_DEVICE;
939 else
940 return DMA_FROM_DEVICE;
941}
942
Russell Kingc5c98922012-04-13 12:14:39 +0100943static struct dma_chan *omap_hsmmc_get_dma_chan(struct omap_hsmmc_host *host,
944 struct mmc_data *data)
945{
946 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan;
947}
948
Adrian Hunterb4175772010-05-26 14:42:06 -0700949static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq)
950{
951 int dma_ch;
Venkatraman S31463b12012-04-09 12:08:34 +0530952 unsigned long flags;
Adrian Hunterb4175772010-05-26 14:42:06 -0700953
Venkatraman S31463b12012-04-09 12:08:34 +0530954 spin_lock_irqsave(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -0700955 host->req_in_progress = 0;
956 dma_ch = host->dma_ch;
Venkatraman S31463b12012-04-09 12:08:34 +0530957 spin_unlock_irqrestore(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -0700958
959 omap_hsmmc_disable_irq(host);
960 /* Do not complete the request if DMA is still in progress */
961 if (mrq->data && host->use_dma && dma_ch != -1)
962 return;
963 host->mrq = NULL;
964 mmc_request_done(host->mmc, mrq);
NeilBrownf57ba4c2015-03-26 12:18:23 +1100965 pm_runtime_mark_last_busy(host->dev);
966 pm_runtime_put_autosuspend(host->dev);
Adrian Hunterb4175772010-05-26 14:42:06 -0700967}
968
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100969/*
970 * Notify the transfer complete to MMC core
971 */
972static void
Denis Karpov70a33412009-09-22 16:44:59 -0700973omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100974{
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200975 if (!data) {
976 struct mmc_request *mrq = host->mrq;
977
Adrian Hunter23050102009-09-22 16:44:57 -0700978 /* TC before CC from CMD6 - don't know why, but it happens */
979 if (host->cmd && host->cmd->opcode == 6 &&
980 host->response_busy) {
981 host->response_busy = 0;
982 return;
983 }
984
Adrian Hunterb4175772010-05-26 14:42:06 -0700985 omap_hsmmc_request_done(host, mrq);
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200986 return;
987 }
988
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100989 host->data = NULL;
990
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100991 if (!data->error)
992 data->bytes_xfered += data->blocks * (data->blksz);
993 else
994 data->bytes_xfered = 0;
995
Balaji T Kbf129e12014-01-21 19:54:42 +0530996 if (data->stop && (data->error || !host->mrq->sbc))
997 omap_hsmmc_start_command(host, data->stop, NULL);
998 else
Adrian Hunterb4175772010-05-26 14:42:06 -0700999 omap_hsmmc_request_done(host, data->mrq);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001000}
1001
1002/*
1003 * Notify the core about command completion
1004 */
1005static void
Denis Karpov70a33412009-09-22 16:44:59 -07001006omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001007{
Balaji T Kbf129e12014-01-21 19:54:42 +05301008 if (host->mrq->sbc && (host->cmd == host->mrq->sbc) &&
Balaji T Ka2e77152014-01-21 19:54:42 +05301009 !host->mrq->sbc->error && !(host->flags & AUTO_CMD23)) {
Balaji T K2177fa92014-05-09 22:16:52 +05301010 host->cmd = NULL;
Balaji T Kbf129e12014-01-21 19:54:42 +05301011 omap_hsmmc_start_dma_transfer(host);
1012 omap_hsmmc_start_command(host, host->mrq->cmd,
1013 host->mrq->data);
1014 return;
1015 }
1016
Balaji T K2177fa92014-05-09 22:16:52 +05301017 host->cmd = NULL;
1018
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001019 if (cmd->flags & MMC_RSP_PRESENT) {
1020 if (cmd->flags & MMC_RSP_136) {
1021 /* response type 2 */
1022 cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10);
1023 cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32);
1024 cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54);
1025 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76);
1026 } else {
1027 /* response types 1, 1b, 3, 4, 5, 6 */
1028 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10);
1029 }
1030 }
Adrian Hunterb4175772010-05-26 14:42:06 -07001031 if ((host->data == NULL && !host->response_busy) || cmd->error)
Balaji T Kd4b2c372014-01-21 19:54:42 +05301032 omap_hsmmc_request_done(host, host->mrq);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001033}
1034
1035/*
1036 * DMA clean up for command errors
1037 */
Denis Karpov70a33412009-09-22 16:44:59 -07001038static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001039{
Adrian Hunterb4175772010-05-26 14:42:06 -07001040 int dma_ch;
Venkatraman S31463b12012-04-09 12:08:34 +05301041 unsigned long flags;
Adrian Hunterb4175772010-05-26 14:42:06 -07001042
Jarkko Lavinen82788ff2008-12-05 12:31:46 +02001043 host->data->error = errno;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001044
Venkatraman S31463b12012-04-09 12:08:34 +05301045 spin_lock_irqsave(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -07001046 dma_ch = host->dma_ch;
1047 host->dma_ch = -1;
Venkatraman S31463b12012-04-09 12:08:34 +05301048 spin_unlock_irqrestore(&host->irq_lock, flags);
Adrian Hunterb4175772010-05-26 14:42:06 -07001049
1050 if (host->use_dma && dma_ch != -1) {
Russell Kingc5c98922012-04-13 12:14:39 +01001051 struct dma_chan *chan = omap_hsmmc_get_dma_chan(host, host->data);
1052
1053 dmaengine_terminate_all(chan);
1054 dma_unmap_sg(chan->device->dev,
1055 host->data->sg, host->data->sg_len,
Denis Karpov70a33412009-09-22 16:44:59 -07001056 omap_hsmmc_get_dma_dir(host, host->data));
Russell Kingc5c98922012-04-13 12:14:39 +01001057
Per Forlin053bf342011-11-07 21:55:11 +05301058 host->data->host_cookie = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001059 }
1060 host->data = NULL;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001061}
1062
1063/*
1064 * Readable error output
1065 */
1066#ifdef CONFIG_MMC_DEBUG
Adrian Hunter699b9582011-05-06 12:14:01 +03001067static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001068{
1069 /* --- means reserved bit without definition at documentation */
Denis Karpov70a33412009-09-22 16:44:59 -07001070 static const char *omap_hsmmc_status_bits[] = {
Adrian Hunter699b9582011-05-06 12:14:01 +03001071 "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" ,
1072 "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI",
1073 "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" ,
1074 "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---"
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001075 };
1076 char res[256];
1077 char *buf = res;
1078 int len, i;
1079
1080 len = sprintf(buf, "MMC IRQ 0x%x :", status);
1081 buf += len;
1082
Denis Karpov70a33412009-09-22 16:44:59 -07001083 for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001084 if (status & (1 << i)) {
Denis Karpov70a33412009-09-22 16:44:59 -07001085 len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001086 buf += len;
1087 }
1088
Venkatraman S8986d312012-08-07 19:10:38 +05301089 dev_vdbg(mmc_dev(host->mmc), "%s\n", res);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001090}
Adrian Hunter699b9582011-05-06 12:14:01 +03001091#else
1092static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host,
1093 u32 status)
1094{
1095}
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001096#endif /* CONFIG_MMC_DEBUG */
1097
Jean Pihet3ebf74b2009-02-06 16:42:51 +01001098/*
1099 * MMC controller internal state machines reset
1100 *
1101 * Used to reset command or data internal state machines, using respectively
1102 * SRC or SRD bit of SYSCTL register
1103 * Can be called from interrupt context
1104 */
Denis Karpov70a33412009-09-22 16:44:59 -07001105static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
1106 unsigned long bit)
Jean Pihet3ebf74b2009-02-06 16:42:51 +01001107{
1108 unsigned long i = 0;
Jianpeng Ma1e881782013-10-21 00:25:20 +05301109 unsigned long limit = MMC_TIMEOUT_US;
Jean Pihet3ebf74b2009-02-06 16:42:51 +01001110
1111 OMAP_HSMMC_WRITE(host->base, SYSCTL,
1112 OMAP_HSMMC_READ(host->base, SYSCTL) | bit);
1113
Madhusudhan Chikkature07ad64b2010-10-01 16:35:25 -07001114 /*
1115 * OMAP4 ES2 and greater has an updated reset logic.
1116 * Monitor a 0->1 transition first
1117 */
Andreas Fenkart326119c2014-11-08 15:33:14 +01001118 if (mmc_pdata(host)->features & HSMMC_HAS_UPDATED_RESET) {
kishore kadiyalab432b4b2010-11-17 22:35:32 -05001119 while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit))
Madhusudhan Chikkature07ad64b2010-10-01 16:35:25 -07001120 && (i++ < limit))
Jianpeng Ma1e881782013-10-21 00:25:20 +05301121 udelay(1);
Madhusudhan Chikkature07ad64b2010-10-01 16:35:25 -07001122 }
1123 i = 0;
1124
Jean Pihet3ebf74b2009-02-06 16:42:51 +01001125 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) &&
1126 (i++ < limit))
Jianpeng Ma1e881782013-10-21 00:25:20 +05301127 udelay(1);
Jean Pihet3ebf74b2009-02-06 16:42:51 +01001128
1129 if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit)
1130 dev_err(mmc_dev(host->mmc),
1131 "Timeout waiting on controller reset in %s\n",
1132 __func__);
1133}
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001134
Balaji T K25e18972012-11-19 21:59:55 +05301135static void hsmmc_command_incomplete(struct omap_hsmmc_host *host,
1136 int err, int end_cmd)
Venkatraman Sae4bf782012-08-09 20:36:07 +05301137{
Balaji T K25e18972012-11-19 21:59:55 +05301138 if (end_cmd) {
Balaji T K94d4f272012-11-19 21:59:56 +05301139 omap_hsmmc_reset_controller_fsm(host, SRC);
Balaji T K25e18972012-11-19 21:59:55 +05301140 if (host->cmd)
1141 host->cmd->error = err;
1142 }
Venkatraman Sae4bf782012-08-09 20:36:07 +05301143
1144 if (host->data) {
1145 omap_hsmmc_reset_controller_fsm(host, SRD);
1146 omap_hsmmc_dma_cleanup(host, err);
Balaji T Kdc7745b2012-11-19 21:59:57 +05301147 } else if (host->mrq && host->mrq->cmd)
1148 host->mrq->cmd->error = err;
Venkatraman Sae4bf782012-08-09 20:36:07 +05301149}
1150
Adrian Hunterb4175772010-05-26 14:42:06 -07001151static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001152{
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001153 struct mmc_data *data;
Adrian Hunterb4175772010-05-26 14:42:06 -07001154 int end_cmd = 0, end_trans = 0;
Balaji T Ka2e77152014-01-21 19:54:42 +05301155 int error = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001156
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001157 data = host->data;
Venkatraman S8986d312012-08-07 19:10:38 +05301158 dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001159
Venkatraman Sa7e96872012-11-19 22:00:01 +05301160 if (status & ERR_EN) {
Adrian Hunter699b9582011-05-06 12:14:01 +03001161 omap_hsmmc_dbg_report_irq(host, status);
Adrian Hunter4a694dc2009-01-12 16:13:08 +02001162
Venkatraman Sa7e96872012-11-19 22:00:01 +05301163 if (status & (CTO_EN | CCRC_EN))
Balaji T K25e18972012-11-19 21:59:55 +05301164 end_cmd = 1;
Kishon Vijay Abraham I408806f2015-06-16 16:07:17 +05301165 if (host->data || host->response_busy) {
1166 end_trans = !end_cmd;
1167 host->response_busy = 0;
1168 }
Venkatraman Sa7e96872012-11-19 22:00:01 +05301169 if (status & (CTO_EN | DTO_EN))
Balaji T K25e18972012-11-19 21:59:55 +05301170 hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd);
Vignesh R5027cd12015-06-16 16:07:18 +05301171 else if (status & (CCRC_EN | DCRC_EN | DEB_EN | CEB_EN |
1172 BADA_EN))
Balaji T K25e18972012-11-19 21:59:55 +05301173 hsmmc_command_incomplete(host, -EILSEQ, end_cmd);
1174
Balaji T Ka2e77152014-01-21 19:54:42 +05301175 if (status & ACE_EN) {
1176 u32 ac12;
1177 ac12 = OMAP_HSMMC_READ(host->base, AC12);
1178 if (!(ac12 & ACNE) && host->mrq->sbc) {
1179 end_cmd = 1;
1180 if (ac12 & ACTO)
1181 error = -ETIMEDOUT;
1182 else if (ac12 & (ACCE | ACEB | ACIE))
1183 error = -EILSEQ;
1184 host->mrq->sbc->error = error;
1185 hsmmc_command_incomplete(host, error, end_cmd);
1186 }
1187 dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12);
1188 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001189 }
1190
Francesco Lavra7472bab2013-06-29 08:25:12 +02001191 OMAP_HSMMC_WRITE(host->base, STAT, status);
Venkatraman Sa7e96872012-11-19 22:00:01 +05301192 if (end_cmd || ((status & CC_EN) && host->cmd))
Denis Karpov70a33412009-09-22 16:44:59 -07001193 omap_hsmmc_cmd_done(host, host->cmd);
Venkatraman Sa7e96872012-11-19 22:00:01 +05301194 if ((end_trans || (status & TC_EN)) && host->mrq)
Denis Karpov70a33412009-09-22 16:44:59 -07001195 omap_hsmmc_xfer_done(host, data);
Adrian Hunterb4175772010-05-26 14:42:06 -07001196}
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001197
Adrian Hunterb4175772010-05-26 14:42:06 -07001198/*
1199 * MMC controller IRQ handler
1200 */
1201static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
1202{
1203 struct omap_hsmmc_host *host = dev_id;
1204 int status;
1205
1206 status = OMAP_HSMMC_READ(host->base, STAT);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001207 while (status & (INT_EN_MASK | CIRQ_EN)) {
1208 if (host->req_in_progress)
1209 omap_hsmmc_do_irq(host, status);
1210
1211 if (status & CIRQ_EN)
1212 mmc_signal_sdio_irq(host->mmc);
Venkatraman S1f6b9fa2012-08-08 15:44:29 +05301213
Adrian Hunterb4175772010-05-26 14:42:06 -07001214 /* Flush posted write */
1215 status = OMAP_HSMMC_READ(host->base, STAT);
Venkatraman S1f6b9fa2012-08-08 15:44:29 +05301216 }
Adrian Hunter4dffd7a2009-09-22 16:44:58 -07001217
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001218 return IRQ_HANDLED;
1219}
1220
Denis Karpov70a33412009-09-22 16:44:59 -07001221static void set_sd_bus_power(struct omap_hsmmc_host *host)
Adrian Huntere13bb302009-03-12 17:08:26 +02001222{
1223 unsigned long i;
1224
1225 OMAP_HSMMC_WRITE(host->base, HCTL,
1226 OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
1227 for (i = 0; i < loops_per_jiffy; i++) {
1228 if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP)
1229 break;
1230 cpu_relax();
1231 }
1232}
1233
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001234/*
David Brownelleb250822009-02-17 14:49:01 -08001235 * Switch MMC interface voltage ... only relevant for MMC1.
1236 *
1237 * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver.
1238 * The MMC2 transceiver controls are used instead of DAT4..DAT7.
1239 * Some chips, like eMMC ones, use internal transceivers.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001240 */
Denis Karpov70a33412009-09-22 16:44:59 -07001241static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001242{
1243 u32 reg_val = 0;
1244 int ret;
1245
1246 /* Disable the clocks */
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301247 pm_runtime_put_sync(host->dev);
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05301248 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05301249 clk_disable_unprepare(host->dbclk);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001250
1251 /* Turn the power off */
Andreas Fenkartf7f0f032015-07-07 20:38:43 +02001252 ret = omap_hsmmc_set_power(host->dev, 0, 0);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001253
1254 /* Turn the power ON with given VDD 1.8 or 3.0v */
Adrian Hunter2bec0892009-09-22 16:45:02 -07001255 if (!ret)
Andreas Fenkartf7f0f032015-07-07 20:38:43 +02001256 ret = omap_hsmmc_set_power(host->dev, 1, vdd);
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301257 pm_runtime_get_sync(host->dev);
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05301258 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05301259 clk_prepare_enable(host->dbclk);
Adrian Hunter2bec0892009-09-22 16:45:02 -07001260
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001261 if (ret != 0)
1262 goto err;
1263
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001264 OMAP_HSMMC_WRITE(host->base, HCTL,
1265 OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR);
1266 reg_val = OMAP_HSMMC_READ(host->base, HCTL);
David Brownelleb250822009-02-17 14:49:01 -08001267
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001268 /*
1269 * If a MMC dual voltage card is detected, the set_ios fn calls
1270 * this fn with VDD bit set for 1.8V. Upon card removal from the
Denis Karpov70a33412009-09-22 16:44:59 -07001271 * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001272 *
David Brownelleb250822009-02-17 14:49:01 -08001273 * Cope with a bit of slop in the range ... per data sheets:
1274 * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max,
1275 * but recommended values are 1.71V to 1.89V
1276 * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max,
1277 * but recommended values are 2.7V to 3.3V
1278 *
1279 * Board setup code shouldn't permit anything very out-of-range.
1280 * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the
1281 * middle range) but VSIM can't power DAT4..DAT7 at more than 3V.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001282 */
David Brownelleb250822009-02-17 14:49:01 -08001283 if ((1 << vdd) <= MMC_VDD_23_24)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001284 reg_val |= SDVS18;
David Brownelleb250822009-02-17 14:49:01 -08001285 else
1286 reg_val |= SDVS30;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001287
1288 OMAP_HSMMC_WRITE(host->base, HCTL, reg_val);
Adrian Huntere13bb302009-03-12 17:08:26 +02001289 set_sd_bus_power(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001290
1291 return 0;
1292err:
Venkatraman Sb1e056a2012-11-19 22:00:00 +05301293 dev_err(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001294 return ret;
1295}
1296
Adrian Hunterb62f6222009-09-22 16:45:01 -07001297/* Protect the card while the cover is open */
1298static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host)
1299{
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +01001300 if (!host->get_cover_state)
Adrian Hunterb62f6222009-09-22 16:45:01 -07001301 return;
1302
1303 host->reqs_blocked = 0;
Andreas Fenkart80412ca2014-11-08 15:33:17 +01001304 if (host->get_cover_state(host->dev)) {
Adrian Hunterb62f6222009-09-22 16:45:01 -07001305 if (host->protect_card) {
Rajendra Nayak2cecdf02012-02-23 17:02:20 +05301306 dev_info(host->dev, "%s: cover is closed, "
Adrian Hunterb62f6222009-09-22 16:45:01 -07001307 "card is now accessible\n",
1308 mmc_hostname(host->mmc));
1309 host->protect_card = 0;
1310 }
1311 } else {
1312 if (!host->protect_card) {
Rajendra Nayak2cecdf02012-02-23 17:02:20 +05301313 dev_info(host->dev, "%s: cover is open, "
Adrian Hunterb62f6222009-09-22 16:45:01 -07001314 "card is now inaccessible\n",
1315 mmc_hostname(host->mmc));
1316 host->protect_card = 1;
1317 }
1318 }
1319}
1320
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001321/*
Andreas Fenkartcde592c2015-03-03 13:28:15 +01001322 * irq handler when (cell-phone) cover is mounted/removed
1323 */
1324static irqreturn_t omap_hsmmc_cover_irq(int irq, void *dev_id)
1325{
1326 struct omap_hsmmc_host *host = dev_id;
Andreas Fenkartcde592c2015-03-03 13:28:15 +01001327
1328 sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch");
1329
Andreas Fenkart11227d12015-03-03 13:28:17 +01001330 omap_hsmmc_protect_card(host);
1331 mmc_detect_change(host->mmc, (HZ * 200) / 1000);
Andreas Fenkartcde592c2015-03-03 13:28:15 +01001332 return IRQ_HANDLED;
1333}
1334
Russell Kingc5c98922012-04-13 12:14:39 +01001335static void omap_hsmmc_dma_callback(void *param)
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02001336{
Russell Kingc5c98922012-04-13 12:14:39 +01001337 struct omap_hsmmc_host *host = param;
1338 struct dma_chan *chan;
Adrian Hunter770d7432011-05-06 12:14:11 +03001339 struct mmc_data *data;
Russell Kingc5c98922012-04-13 12:14:39 +01001340 int req_in_progress;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001341
Russell Kingc5c98922012-04-13 12:14:39 +01001342 spin_lock_irq(&host->irq_lock);
Adrian Hunterb4175772010-05-26 14:42:06 -07001343 if (host->dma_ch < 0) {
Russell Kingc5c98922012-04-13 12:14:39 +01001344 spin_unlock_irq(&host->irq_lock);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001345 return;
Adrian Hunterb4175772010-05-26 14:42:06 -07001346 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001347
Adrian Hunter770d7432011-05-06 12:14:11 +03001348 data = host->mrq->data;
Russell Kingc5c98922012-04-13 12:14:39 +01001349 chan = omap_hsmmc_get_dma_chan(host, data);
Per Forlin9782aff2011-07-01 18:55:23 +02001350 if (!data->host_cookie)
Russell Kingc5c98922012-04-13 12:14:39 +01001351 dma_unmap_sg(chan->device->dev,
1352 data->sg, data->sg_len,
Per Forlin9782aff2011-07-01 18:55:23 +02001353 omap_hsmmc_get_dma_dir(host, data));
Adrian Hunterb4175772010-05-26 14:42:06 -07001354
1355 req_in_progress = host->req_in_progress;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001356 host->dma_ch = -1;
Russell Kingc5c98922012-04-13 12:14:39 +01001357 spin_unlock_irq(&host->irq_lock);
Adrian Hunterb4175772010-05-26 14:42:06 -07001358
1359 /* If DMA has finished after TC, complete the request */
1360 if (!req_in_progress) {
1361 struct mmc_request *mrq = host->mrq;
1362
1363 host->mrq = NULL;
1364 mmc_request_done(host->mmc, mrq);
NeilBrownf57ba4c2015-03-26 12:18:23 +11001365 pm_runtime_mark_last_busy(host->dev);
1366 pm_runtime_put_autosuspend(host->dev);
Adrian Hunterb4175772010-05-26 14:42:06 -07001367 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001368}
1369
Per Forlin9782aff2011-07-01 18:55:23 +02001370static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host,
1371 struct mmc_data *data,
Russell Kingc5c98922012-04-13 12:14:39 +01001372 struct omap_hsmmc_next *next,
Russell King26b88522012-04-13 12:27:37 +01001373 struct dma_chan *chan)
Per Forlin9782aff2011-07-01 18:55:23 +02001374{
1375 int dma_len;
1376
1377 if (!next && data->host_cookie &&
1378 data->host_cookie != host->next_data.cookie) {
Rajendra Nayak2cecdf02012-02-23 17:02:20 +05301379 dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d"
Per Forlin9782aff2011-07-01 18:55:23 +02001380 " host->next_data.cookie %d\n",
1381 __func__, data->host_cookie, host->next_data.cookie);
1382 data->host_cookie = 0;
1383 }
1384
1385 /* Check if next job is already prepared */
Dan Carpenterb38313d2014-01-30 15:15:18 +03001386 if (next || data->host_cookie != host->next_data.cookie) {
Russell King26b88522012-04-13 12:27:37 +01001387 dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
Per Forlin9782aff2011-07-01 18:55:23 +02001388 omap_hsmmc_get_dma_dir(host, data));
1389
1390 } else {
1391 dma_len = host->next_data.dma_len;
1392 host->next_data.dma_len = 0;
1393 }
1394
1395
1396 if (dma_len == 0)
1397 return -EINVAL;
1398
1399 if (next) {
1400 next->dma_len = dma_len;
1401 data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie;
1402 } else
1403 host->dma_len = dma_len;
1404
1405 return 0;
1406}
1407
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001408/*
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001409 * Routine to configure and start DMA for the MMC card
1410 */
Balaji T K9d025332014-01-21 19:54:42 +05301411static int omap_hsmmc_setup_dma_transfer(struct omap_hsmmc_host *host,
Denis Karpov70a33412009-09-22 16:44:59 -07001412 struct mmc_request *req)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001413{
Russell King26b88522012-04-13 12:27:37 +01001414 struct dma_slave_config cfg;
1415 struct dma_async_tx_descriptor *tx;
1416 int ret = 0, i;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001417 struct mmc_data *data = req->data;
Russell Kingc5c98922012-04-13 12:14:39 +01001418 struct dma_chan *chan;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001419
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02001420 /* Sanity check: all the SG entries must be aligned by block size. */
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001421 for (i = 0; i < data->sg_len; i++) {
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02001422 struct scatterlist *sgl;
1423
1424 sgl = data->sg + i;
1425 if (sgl->length % data->blksz)
1426 return -EINVAL;
1427 }
1428 if ((data->blksz % 4) != 0)
1429 /* REVISIT: The MMC buffer increments only when MSB is written.
1430 * Return error for blksz which is non multiple of four.
1431 */
1432 return -EINVAL;
1433
Adrian Hunterb4175772010-05-26 14:42:06 -07001434 BUG_ON(host->dma_ch != -1);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001435
Russell Kingc5c98922012-04-13 12:14:39 +01001436 chan = omap_hsmmc_get_dma_chan(host, data);
Russell Kingc5c98922012-04-13 12:14:39 +01001437
Russell King26b88522012-04-13 12:27:37 +01001438 cfg.src_addr = host->mapbase + OMAP_HSMMC_DATA;
1439 cfg.dst_addr = host->mapbase + OMAP_HSMMC_DATA;
1440 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1441 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1442 cfg.src_maxburst = data->blksz / 4;
1443 cfg.dst_maxburst = data->blksz / 4;
Russell Kingc5c98922012-04-13 12:14:39 +01001444
Russell King26b88522012-04-13 12:27:37 +01001445 ret = dmaengine_slave_config(chan, &cfg);
Per Forlin9782aff2011-07-01 18:55:23 +02001446 if (ret)
1447 return ret;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001448
Russell King26b88522012-04-13 12:27:37 +01001449 ret = omap_hsmmc_pre_dma_transfer(host, data, NULL, chan);
1450 if (ret)
1451 return ret;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001452
Russell King26b88522012-04-13 12:27:37 +01001453 tx = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len,
1454 data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
1455 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1456 if (!tx) {
1457 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
1458 /* FIXME: cleanup */
1459 return -1;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001460 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001461
Russell King26b88522012-04-13 12:27:37 +01001462 tx->callback = omap_hsmmc_dma_callback;
1463 tx->callback_param = host;
1464
1465 /* Does not fail */
1466 dmaengine_submit(tx);
1467
1468 host->dma_ch = 1;
1469
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001470 return 0;
1471}
1472
Denis Karpov70a33412009-09-22 16:44:59 -07001473static void set_data_timeout(struct omap_hsmmc_host *host,
Adrian Huntere2bf08d2009-09-22 16:45:03 -07001474 unsigned int timeout_ns,
1475 unsigned int timeout_clks)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001476{
1477 unsigned int timeout, cycle_ns;
1478 uint32_t reg, clkd, dto = 0;
1479
1480 reg = OMAP_HSMMC_READ(host->base, SYSCTL);
1481 clkd = (reg & CLKD_MASK) >> CLKD_SHIFT;
1482 if (clkd == 0)
1483 clkd = 1;
1484
Balaji T K6e3076c2014-01-21 19:54:42 +05301485 cycle_ns = 1000000000 / (host->clk_rate / clkd);
Adrian Huntere2bf08d2009-09-22 16:45:03 -07001486 timeout = timeout_ns / cycle_ns;
1487 timeout += timeout_clks;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001488 if (timeout) {
1489 while ((timeout & 0x80000000) == 0) {
1490 dto += 1;
1491 timeout <<= 1;
1492 }
1493 dto = 31 - dto;
1494 timeout <<= 1;
1495 if (timeout && dto)
1496 dto += 1;
1497 if (dto >= 13)
1498 dto -= 13;
1499 else
1500 dto = 0;
1501 if (dto > 14)
1502 dto = 14;
1503 }
1504
1505 reg &= ~DTO_MASK;
1506 reg |= dto << DTO_SHIFT;
1507 OMAP_HSMMC_WRITE(host->base, SYSCTL, reg);
1508}
1509
Balaji T K9d025332014-01-21 19:54:42 +05301510static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host)
1511{
1512 struct mmc_request *req = host->mrq;
1513 struct dma_chan *chan;
1514
1515 if (!req->data)
1516 return;
1517 OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz)
1518 | (req->data->blocks << 16));
1519 set_data_timeout(host, req->data->timeout_ns,
1520 req->data->timeout_clks);
1521 chan = omap_hsmmc_get_dma_chan(host, req->data);
1522 dma_async_issue_pending(chan);
1523}
1524
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001525/*
1526 * Configure block length for MMC/SD cards and initiate the transfer.
1527 */
1528static int
Denis Karpov70a33412009-09-22 16:44:59 -07001529omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001530{
1531 int ret;
1532 host->data = req->data;
1533
1534 if (req->data == NULL) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001535 OMAP_HSMMC_WRITE(host->base, BLK, 0);
Adrian Huntere2bf08d2009-09-22 16:45:03 -07001536 /*
1537 * Set an arbitrary 100ms data timeout for commands with
1538 * busy signal.
1539 */
1540 if (req->cmd->flags & MMC_RSP_BUSY)
1541 set_data_timeout(host, 100000000U, 0);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001542 return 0;
1543 }
1544
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001545 if (host->use_dma) {
Balaji T K9d025332014-01-21 19:54:42 +05301546 ret = omap_hsmmc_setup_dma_transfer(host, req);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001547 if (ret != 0) {
Venkatraman Sb1e056a2012-11-19 22:00:00 +05301548 dev_err(mmc_dev(host->mmc), "MMC start dma failure\n");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001549 return ret;
1550 }
1551 }
1552 return 0;
1553}
1554
Per Forlin9782aff2011-07-01 18:55:23 +02001555static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq,
1556 int err)
1557{
1558 struct omap_hsmmc_host *host = mmc_priv(mmc);
1559 struct mmc_data *data = mrq->data;
1560
Russell King26b88522012-04-13 12:27:37 +01001561 if (host->use_dma && data->host_cookie) {
Russell Kingc5c98922012-04-13 12:14:39 +01001562 struct dma_chan *c = omap_hsmmc_get_dma_chan(host, data);
Russell Kingc5c98922012-04-13 12:14:39 +01001563
Russell King26b88522012-04-13 12:27:37 +01001564 dma_unmap_sg(c->device->dev, data->sg, data->sg_len,
1565 omap_hsmmc_get_dma_dir(host, data));
Per Forlin9782aff2011-07-01 18:55:23 +02001566 data->host_cookie = 0;
1567 }
1568}
1569
1570static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq,
1571 bool is_first_req)
1572{
1573 struct omap_hsmmc_host *host = mmc_priv(mmc);
1574
1575 if (mrq->data->host_cookie) {
1576 mrq->data->host_cookie = 0;
1577 return ;
1578 }
1579
Russell Kingc5c98922012-04-13 12:14:39 +01001580 if (host->use_dma) {
1581 struct dma_chan *c = omap_hsmmc_get_dma_chan(host, mrq->data);
Russell Kingc5c98922012-04-13 12:14:39 +01001582
Per Forlin9782aff2011-07-01 18:55:23 +02001583 if (omap_hsmmc_pre_dma_transfer(host, mrq->data,
Russell King26b88522012-04-13 12:27:37 +01001584 &host->next_data, c))
Per Forlin9782aff2011-07-01 18:55:23 +02001585 mrq->data->host_cookie = 0;
Russell Kingc5c98922012-04-13 12:14:39 +01001586 }
Per Forlin9782aff2011-07-01 18:55:23 +02001587}
1588
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001589/*
1590 * Request function. for read/write operation
1591 */
Denis Karpov70a33412009-09-22 16:44:59 -07001592static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001593{
Denis Karpov70a33412009-09-22 16:44:59 -07001594 struct omap_hsmmc_host *host = mmc_priv(mmc);
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001595 int err;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001596
Adrian Hunterb4175772010-05-26 14:42:06 -07001597 BUG_ON(host->req_in_progress);
1598 BUG_ON(host->dma_ch != -1);
NeilBrownf57ba4c2015-03-26 12:18:23 +11001599 pm_runtime_get_sync(host->dev);
Adrian Hunterb4175772010-05-26 14:42:06 -07001600 if (host->protect_card) {
1601 if (host->reqs_blocked < 3) {
1602 /*
1603 * Ensure the controller is left in a consistent
1604 * state by resetting the command and data state
1605 * machines.
1606 */
1607 omap_hsmmc_reset_controller_fsm(host, SRD);
1608 omap_hsmmc_reset_controller_fsm(host, SRC);
1609 host->reqs_blocked += 1;
1610 }
1611 req->cmd->error = -EBADF;
1612 if (req->data)
1613 req->data->error = -EBADF;
1614 req->cmd->retries = 0;
1615 mmc_request_done(mmc, req);
NeilBrownf57ba4c2015-03-26 12:18:23 +11001616 pm_runtime_mark_last_busy(host->dev);
1617 pm_runtime_put_autosuspend(host->dev);
Adrian Hunterb4175772010-05-26 14:42:06 -07001618 return;
1619 } else if (host->reqs_blocked)
1620 host->reqs_blocked = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001621 WARN_ON(host->mrq != NULL);
1622 host->mrq = req;
Balaji T K6e3076c2014-01-21 19:54:42 +05301623 host->clk_rate = clk_get_rate(host->fclk);
Denis Karpov70a33412009-09-22 16:44:59 -07001624 err = omap_hsmmc_prepare_data(host, req);
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001625 if (err) {
1626 req->cmd->error = err;
1627 if (req->data)
1628 req->data->error = err;
1629 host->mrq = NULL;
1630 mmc_request_done(mmc, req);
NeilBrownf57ba4c2015-03-26 12:18:23 +11001631 pm_runtime_mark_last_busy(host->dev);
1632 pm_runtime_put_autosuspend(host->dev);
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001633 return;
1634 }
Balaji T Ka2e77152014-01-21 19:54:42 +05301635 if (req->sbc && !(host->flags & AUTO_CMD23)) {
Balaji T Kbf129e12014-01-21 19:54:42 +05301636 omap_hsmmc_start_command(host, req->sbc, NULL);
1637 return;
1638 }
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001639
Balaji T K9d025332014-01-21 19:54:42 +05301640 omap_hsmmc_start_dma_transfer(host);
Denis Karpov70a33412009-09-22 16:44:59 -07001641 omap_hsmmc_start_command(host, req->cmd, req->data);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001642}
1643
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001644/* Routine to configure clock values. Exposed API to core */
Denis Karpov70a33412009-09-22 16:44:59 -07001645static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001646{
Denis Karpov70a33412009-09-22 16:44:59 -07001647 struct omap_hsmmc_host *host = mmc_priv(mmc);
Adrian Huntera3621462009-09-22 16:44:42 -07001648 int do_send_init_stream = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001649
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301650 pm_runtime_get_sync(host->dev);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001651
Adrian Huntera3621462009-09-22 16:44:42 -07001652 if (ios->power_mode != host->power_mode) {
1653 switch (ios->power_mode) {
1654 case MMC_POWER_OFF:
Andreas Fenkartf7f0f032015-07-07 20:38:43 +02001655 omap_hsmmc_set_power(host->dev, 0, 0);
Adrian Huntera3621462009-09-22 16:44:42 -07001656 break;
1657 case MMC_POWER_UP:
Andreas Fenkartf7f0f032015-07-07 20:38:43 +02001658 omap_hsmmc_set_power(host->dev, 1, ios->vdd);
Adrian Huntera3621462009-09-22 16:44:42 -07001659 break;
1660 case MMC_POWER_ON:
1661 do_send_init_stream = 1;
1662 break;
1663 }
1664 host->power_mode = ios->power_mode;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001665 }
1666
Denis Karpovdd498ef2009-09-22 16:44:49 -07001667 /* FIXME: set registers based only on changes to ios */
1668
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -04001669 omap_hsmmc_set_bus_width(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001670
Kishore Kadiyala4621d5f2011-02-28 20:48:04 +05301671 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
David Brownelleb250822009-02-17 14:49:01 -08001672 /* Only MMC1 can interface at 3V without some flavor
1673 * of external transceiver; but they all handle 1.8V.
1674 */
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001675 if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) &&
Balaji T K2cf171c2014-02-19 20:26:40 +05301676 (ios->vdd == DUAL_VOLT_OCR_BIT)) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001677 /*
1678 * The mmc_select_voltage fn of the core does
1679 * not seem to set the power_mode to
1680 * MMC_POWER_UP upon recalculating the voltage.
1681 * vdd 1.8v.
1682 */
Denis Karpov70a33412009-09-22 16:44:59 -07001683 if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0)
1684 dev_dbg(mmc_dev(host->mmc),
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001685 "Switch operation failed\n");
1686 }
1687 }
1688
Andy Shevchenko5934df22011-05-06 12:14:06 +03001689 omap_hsmmc_set_clock(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001690
Adrian Huntera3621462009-09-22 16:44:42 -07001691 if (do_send_init_stream)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001692 send_init_stream(host);
1693
Andy Shevchenko3796fb8a2011-07-13 11:31:15 -04001694 omap_hsmmc_set_bus_mode(host);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001695
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301696 pm_runtime_put_autosuspend(host->dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001697}
1698
1699static int omap_hsmmc_get_cd(struct mmc_host *mmc)
1700{
Denis Karpov70a33412009-09-22 16:44:59 -07001701 struct omap_hsmmc_host *host = mmc_priv(mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001702
Andreas Fenkartb5cd43f2014-11-08 15:33:16 +01001703 if (!host->card_detect)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001704 return -ENOSYS;
Andreas Fenkart80412ca2014-11-08 15:33:17 +01001705 return host->card_detect(host->dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001706}
1707
Grazvydas Ignotas48168582010-08-10 18:01:52 -07001708static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
1709{
1710 struct omap_hsmmc_host *host = mmc_priv(mmc);
1711
Andreas Fenkart326119c2014-11-08 15:33:14 +01001712 if (mmc_pdata(host)->init_card)
1713 mmc_pdata(host)->init_card(card);
Grazvydas Ignotas48168582010-08-10 18:01:52 -07001714}
1715
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001716static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
1717{
1718 struct omap_hsmmc_host *host = mmc_priv(mmc);
Balaji T K5a52b082014-05-29 10:28:02 +02001719 u32 irq_mask, con;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001720 unsigned long flags;
1721
1722 spin_lock_irqsave(&host->irq_lock, flags);
1723
Balaji T K5a52b082014-05-29 10:28:02 +02001724 con = OMAP_HSMMC_READ(host->base, CON);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001725 irq_mask = OMAP_HSMMC_READ(host->base, ISE);
1726 if (enable) {
1727 host->flags |= HSMMC_SDIO_IRQ_ENABLED;
1728 irq_mask |= CIRQ_EN;
Balaji T K5a52b082014-05-29 10:28:02 +02001729 con |= CTPL | CLKEXTFREE;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001730 } else {
1731 host->flags &= ~HSMMC_SDIO_IRQ_ENABLED;
1732 irq_mask &= ~CIRQ_EN;
Balaji T K5a52b082014-05-29 10:28:02 +02001733 con &= ~(CTPL | CLKEXTFREE);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001734 }
Balaji T K5a52b082014-05-29 10:28:02 +02001735 OMAP_HSMMC_WRITE(host->base, CON, con);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001736 OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
1737
1738 /*
1739 * if enable, piggy back detection on current request
1740 * but always disable immediately
1741 */
1742 if (!host->req_in_progress || !enable)
1743 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
1744
1745 /* flush posted write */
1746 OMAP_HSMMC_READ(host->base, IE);
1747
1748 spin_unlock_irqrestore(&host->irq_lock, flags);
1749}
1750
1751static int omap_hsmmc_configure_wake_irq(struct omap_hsmmc_host *host)
1752{
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001753 int ret;
1754
1755 /*
1756 * For omaps with wake-up path, wakeirq will be irq from pinctrl and
1757 * for other omaps, wakeirq will be from GPIO (dat line remuxed to
1758 * gpio). wakeirq is needed to detect sdio irq in runtime suspend state
1759 * with functional clock disabled.
1760 */
1761 if (!host->dev->of_node || !host->wake_irq)
1762 return -ENODEV;
1763
Tony Lindgren5b83b222015-05-21 15:51:52 -07001764 ret = dev_pm_set_dedicated_wake_irq(host->dev, host->wake_irq);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001765 if (ret) {
1766 dev_err(mmc_dev(host->mmc), "Unable to request wake IRQ\n");
1767 goto err;
1768 }
1769
1770 /*
1771 * Some omaps don't have wake-up path from deeper idle states
1772 * and need to remux SDIO DAT1 to GPIO for wake-up from idle.
1773 */
1774 if (host->pdata->controller_flags & OMAP_HSMMC_SWAKEUP_MISSING) {
Andreas Fenkart455e5cd2014-05-29 10:28:05 +02001775 struct pinctrl *p = devm_pinctrl_get(host->dev);
1776 if (!p) {
1777 ret = -ENODEV;
1778 goto err_free_irq;
1779 }
1780 if (IS_ERR(pinctrl_lookup_state(p, PINCTRL_STATE_DEFAULT))) {
1781 dev_info(host->dev, "missing default pinctrl state\n");
1782 devm_pinctrl_put(p);
1783 ret = -EINVAL;
1784 goto err_free_irq;
1785 }
1786
1787 if (IS_ERR(pinctrl_lookup_state(p, PINCTRL_STATE_IDLE))) {
1788 dev_info(host->dev, "missing idle pinctrl state\n");
1789 devm_pinctrl_put(p);
1790 ret = -EINVAL;
1791 goto err_free_irq;
1792 }
1793 devm_pinctrl_put(p);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001794 }
1795
Balaji T K5a52b082014-05-29 10:28:02 +02001796 OMAP_HSMMC_WRITE(host->base, HCTL,
1797 OMAP_HSMMC_READ(host->base, HCTL) | IWE);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001798 return 0;
1799
Andreas Fenkart455e5cd2014-05-29 10:28:05 +02001800err_free_irq:
Tony Lindgren5b83b222015-05-21 15:51:52 -07001801 dev_pm_clear_wake_irq(host->dev);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001802err:
1803 dev_warn(host->dev, "no SDIO IRQ support, falling back to polling\n");
1804 host->wake_irq = 0;
1805 return ret;
1806}
1807
Denis Karpov70a33412009-09-22 16:44:59 -07001808static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001809{
1810 u32 hctl, capa, value;
1811
1812 /* Only MMC1 supports 3.0V */
Kishore Kadiyala4621d5f2011-02-28 20:48:04 +05301813 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001814 hctl = SDVS30;
1815 capa = VS30 | VS18;
1816 } else {
1817 hctl = SDVS18;
1818 capa = VS18;
1819 }
1820
1821 value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK;
1822 OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl);
1823
1824 value = OMAP_HSMMC_READ(host->base, CAPA);
1825 OMAP_HSMMC_WRITE(host->base, CAPA, value | capa);
1826
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001827 /* Set SD bus power bit */
Adrian Huntere13bb302009-03-12 17:08:26 +02001828 set_sd_bus_power(host);
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001829}
1830
Kuninori Morimotoafd8c292014-09-08 23:44:51 -07001831static int omap_hsmmc_multi_io_quirk(struct mmc_card *card,
1832 unsigned int direction, int blk_size)
1833{
1834 /* This controller can't do multiblock reads due to hw bugs */
1835 if (direction == MMC_DATA_READ)
1836 return 1;
1837
1838 return blk_size;
1839}
1840
1841static struct mmc_host_ops omap_hsmmc_ops = {
Per Forlin9782aff2011-07-01 18:55:23 +02001842 .post_req = omap_hsmmc_post_req,
1843 .pre_req = omap_hsmmc_pre_req,
Denis Karpov70a33412009-09-22 16:44:59 -07001844 .request = omap_hsmmc_request,
1845 .set_ios = omap_hsmmc_set_ios,
Denis Karpovdd498ef2009-09-22 16:44:49 -07001846 .get_cd = omap_hsmmc_get_cd,
Andreas Fenkarta49d8352015-03-03 13:28:14 +01001847 .get_ro = mmc_gpio_get_ro,
Grazvydas Ignotas48168582010-08-10 18:01:52 -07001848 .init_card = omap_hsmmc_init_card,
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001849 .enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
Denis Karpovdd498ef2009-09-22 16:44:49 -07001850};
1851
Denis Karpovd900f712009-09-22 16:44:38 -07001852#ifdef CONFIG_DEBUG_FS
1853
Denis Karpov70a33412009-09-22 16:44:59 -07001854static int omap_hsmmc_regs_show(struct seq_file *s, void *data)
Denis Karpovd900f712009-09-22 16:44:38 -07001855{
1856 struct mmc_host *mmc = s->private;
Denis Karpov70a33412009-09-22 16:44:59 -07001857 struct omap_hsmmc_host *host = mmc_priv(mmc);
Denis Karpov11dd62a2009-09-22 16:44:43 -07001858
Andreas Fenkartbb0635f2014-05-29 10:28:01 +02001859 seq_printf(s, "mmc%d:\n", mmc->index);
1860 seq_printf(s, "sdio irq mode\t%s\n",
1861 (mmc->caps & MMC_CAP_SDIO_IRQ) ? "interrupt" : "polling");
1862
1863 if (mmc->caps & MMC_CAP_SDIO_IRQ) {
1864 seq_printf(s, "sdio irq \t%s\n",
1865 (host->flags & HSMMC_SDIO_IRQ_ENABLED) ? "enabled"
1866 : "disabled");
1867 }
1868 seq_printf(s, "ctx_loss:\t%d\n", host->context_loss);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001869
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301870 pm_runtime_get_sync(host->dev);
Andreas Fenkartbb0635f2014-05-29 10:28:01 +02001871 seq_puts(s, "\nregs:\n");
Denis Karpovd900f712009-09-22 16:44:38 -07001872 seq_printf(s, "CON:\t\t0x%08x\n",
1873 OMAP_HSMMC_READ(host->base, CON));
Andreas Fenkartbb0635f2014-05-29 10:28:01 +02001874 seq_printf(s, "PSTATE:\t\t0x%08x\n",
1875 OMAP_HSMMC_READ(host->base, PSTATE));
Denis Karpovd900f712009-09-22 16:44:38 -07001876 seq_printf(s, "HCTL:\t\t0x%08x\n",
1877 OMAP_HSMMC_READ(host->base, HCTL));
1878 seq_printf(s, "SYSCTL:\t\t0x%08x\n",
1879 OMAP_HSMMC_READ(host->base, SYSCTL));
1880 seq_printf(s, "IE:\t\t0x%08x\n",
1881 OMAP_HSMMC_READ(host->base, IE));
1882 seq_printf(s, "ISE:\t\t0x%08x\n",
1883 OMAP_HSMMC_READ(host->base, ISE));
1884 seq_printf(s, "CAPA:\t\t0x%08x\n",
1885 OMAP_HSMMC_READ(host->base, CAPA));
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001886
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05301887 pm_runtime_mark_last_busy(host->dev);
1888 pm_runtime_put_autosuspend(host->dev);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001889
Denis Karpovd900f712009-09-22 16:44:38 -07001890 return 0;
1891}
1892
Denis Karpov70a33412009-09-22 16:44:59 -07001893static int omap_hsmmc_regs_open(struct inode *inode, struct file *file)
Denis Karpovd900f712009-09-22 16:44:38 -07001894{
Denis Karpov70a33412009-09-22 16:44:59 -07001895 return single_open(file, omap_hsmmc_regs_show, inode->i_private);
Denis Karpovd900f712009-09-22 16:44:38 -07001896}
1897
1898static const struct file_operations mmc_regs_fops = {
Denis Karpov70a33412009-09-22 16:44:59 -07001899 .open = omap_hsmmc_regs_open,
Denis Karpovd900f712009-09-22 16:44:38 -07001900 .read = seq_read,
1901 .llseek = seq_lseek,
1902 .release = single_release,
1903};
1904
Denis Karpov70a33412009-09-22 16:44:59 -07001905static void omap_hsmmc_debugfs(struct mmc_host *mmc)
Denis Karpovd900f712009-09-22 16:44:38 -07001906{
1907 if (mmc->debugfs_root)
1908 debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root,
1909 mmc, &mmc_regs_fops);
1910}
1911
1912#else
1913
Denis Karpov70a33412009-09-22 16:44:59 -07001914static void omap_hsmmc_debugfs(struct mmc_host *mmc)
Denis Karpovd900f712009-09-22 16:44:38 -07001915{
1916}
1917
1918#endif
1919
Rajendra Nayak46856a62012-03-12 20:32:37 +05301920#ifdef CONFIG_OF
Nishanth Menon59445b12014-02-13 23:45:48 -06001921static const struct omap_mmc_of_data omap3_pre_es3_mmc_of_data = {
1922 /* See 35xx errata 2.1.1.128 in SPRZ278F */
1923 .controller_flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
1924};
1925
1926static const struct omap_mmc_of_data omap4_mmc_of_data = {
1927 .reg_offset = 0x100,
1928};
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001929static const struct omap_mmc_of_data am33xx_mmc_of_data = {
1930 .reg_offset = 0x100,
1931 .controller_flags = OMAP_HSMMC_SWAKEUP_MISSING,
1932};
Rajendra Nayak46856a62012-03-12 20:32:37 +05301933
1934static const struct of_device_id omap_mmc_of_match[] = {
1935 {
1936 .compatible = "ti,omap2-hsmmc",
1937 },
1938 {
Nishanth Menon59445b12014-02-13 23:45:48 -06001939 .compatible = "ti,omap3-pre-es3-hsmmc",
1940 .data = &omap3_pre_es3_mmc_of_data,
1941 },
1942 {
Rajendra Nayak46856a62012-03-12 20:32:37 +05301943 .compatible = "ti,omap3-hsmmc",
1944 },
1945 {
1946 .compatible = "ti,omap4-hsmmc",
Nishanth Menon59445b12014-02-13 23:45:48 -06001947 .data = &omap4_mmc_of_data,
Rajendra Nayak46856a62012-03-12 20:32:37 +05301948 },
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02001949 {
1950 .compatible = "ti,am33xx-hsmmc",
1951 .data = &am33xx_mmc_of_data,
1952 },
Rajendra Nayak46856a62012-03-12 20:32:37 +05301953 {},
Chris Ballb6d085f2012-04-10 09:57:36 -04001954};
Rajendra Nayak46856a62012-03-12 20:32:37 +05301955MODULE_DEVICE_TABLE(of, omap_mmc_of_match);
1956
Andreas Fenkart55143432014-11-08 15:33:09 +01001957static struct omap_hsmmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
Rajendra Nayak46856a62012-03-12 20:32:37 +05301958{
Andreas Fenkart55143432014-11-08 15:33:09 +01001959 struct omap_hsmmc_platform_data *pdata;
Rajendra Nayak46856a62012-03-12 20:32:37 +05301960 struct device_node *np = dev->of_node;
Rajendra Nayak46856a62012-03-12 20:32:37 +05301961
1962 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1963 if (!pdata)
Balaji T K19df45b2014-02-28 19:08:18 +05301964 return ERR_PTR(-ENOMEM); /* out of memory */
Rajendra Nayak46856a62012-03-12 20:32:37 +05301965
1966 if (of_find_property(np, "ti,dual-volt", NULL))
1967 pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
1968
Andreas Fenkartb7a56462015-03-20 15:53:54 +01001969 pdata->gpio_cd = -EINVAL;
1970 pdata->gpio_cod = -EINVAL;
NeilBrownfdb9de12015-01-13 08:23:18 +13001971 pdata->gpio_wp = -EINVAL;
Rajendra Nayak46856a62012-03-12 20:32:37 +05301972
1973 if (of_find_property(np, "ti,non-removable", NULL)) {
Andreas Fenkart326119c2014-11-08 15:33:14 +01001974 pdata->nonremovable = true;
1975 pdata->no_regulator_off_init = true;
Rajendra Nayak46856a62012-03-12 20:32:37 +05301976 }
Rajendra Nayak46856a62012-03-12 20:32:37 +05301977
1978 if (of_find_property(np, "ti,needs-special-reset", NULL))
Andreas Fenkart326119c2014-11-08 15:33:14 +01001979 pdata->features |= HSMMC_HAS_UPDATED_RESET;
Rajendra Nayak46856a62012-03-12 20:32:37 +05301980
Hebbar, Gururajacd587092012-11-19 21:59:58 +05301981 if (of_find_property(np, "ti,needs-special-hs-handling", NULL))
Andreas Fenkart326119c2014-11-08 15:33:14 +01001982 pdata->features |= HSMMC_HAS_HSPE_SUPPORT;
Hebbar, Gururajacd587092012-11-19 21:59:58 +05301983
Rajendra Nayak46856a62012-03-12 20:32:37 +05301984 return pdata;
1985}
1986#else
Andreas Fenkart55143432014-11-08 15:33:09 +01001987static inline struct omap_hsmmc_platform_data
Rajendra Nayak46856a62012-03-12 20:32:37 +05301988 *of_get_hsmmc_pdata(struct device *dev)
1989{
Balaji T K19df45b2014-02-28 19:08:18 +05301990 return ERR_PTR(-EINVAL);
Rajendra Nayak46856a62012-03-12 20:32:37 +05301991}
1992#endif
1993
Bill Pembertonc3be1ef2012-11-19 13:23:06 -05001994static int omap_hsmmc_probe(struct platform_device *pdev)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001995{
Andreas Fenkart55143432014-11-08 15:33:09 +01001996 struct omap_hsmmc_platform_data *pdata = pdev->dev.platform_data;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001997 struct mmc_host *mmc;
Denis Karpov70a33412009-09-22 16:44:59 -07001998 struct omap_hsmmc_host *host = NULL;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001999 struct resource *res;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -08002000 int ret, irq;
Rajendra Nayak46856a62012-03-12 20:32:37 +05302001 const struct of_device_id *match;
Russell King26b88522012-04-13 12:27:37 +01002002 dma_cap_mask_t mask;
2003 unsigned tx_req, rx_req;
Nishanth Menon59445b12014-02-13 23:45:48 -06002004 const struct omap_mmc_of_data *data;
Balaji T K77fae212014-05-09 22:16:51 +05302005 void __iomem *base;
Rajendra Nayak46856a62012-03-12 20:32:37 +05302006
2007 match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
2008 if (match) {
2009 pdata = of_get_hsmmc_pdata(&pdev->dev);
Jan Luebbedc642c22013-01-30 10:07:17 +01002010
2011 if (IS_ERR(pdata))
2012 return PTR_ERR(pdata);
2013
Rajendra Nayak46856a62012-03-12 20:32:37 +05302014 if (match->data) {
Nishanth Menon59445b12014-02-13 23:45:48 -06002015 data = match->data;
2016 pdata->reg_offset = data->reg_offset;
2017 pdata->controller_flags |= data->controller_flags;
Rajendra Nayak46856a62012-03-12 20:32:37 +05302018 }
2019 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002020
2021 if (pdata == NULL) {
2022 dev_err(&pdev->dev, "Platform Data is missing\n");
2023 return -ENXIO;
2024 }
2025
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002026 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2027 irq = platform_get_irq(pdev, 0);
2028 if (res == NULL || irq < 0)
2029 return -ENXIO;
2030
Balaji T K77fae212014-05-09 22:16:51 +05302031 base = devm_ioremap_resource(&pdev->dev, res);
2032 if (IS_ERR(base))
2033 return PTR_ERR(base);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002034
Denis Karpov70a33412009-09-22 16:44:59 -07002035 mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002036 if (!mmc) {
2037 ret = -ENOMEM;
Andreas Fenkart1e363e32014-11-08 15:33:15 +01002038 goto err;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002039 }
2040
NeilBrownfdb9de12015-01-13 08:23:18 +13002041 ret = mmc_of_parse(mmc);
2042 if (ret)
2043 goto err1;
2044
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002045 host = mmc_priv(mmc);
2046 host->mmc = mmc;
2047 host->pdata = pdata;
2048 host->dev = &pdev->dev;
2049 host->use_dma = 1;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002050 host->dma_ch = -1;
2051 host->irq = irq;
Balaji T Kfc307df2012-04-02 12:26:47 +05302052 host->mapbase = res->start + pdata->reg_offset;
Balaji T K77fae212014-05-09 22:16:51 +05302053 host->base = base + pdata->reg_offset;
Adrian Hunter6da20c82010-02-15 10:03:34 -08002054 host->power_mode = MMC_POWER_OFF;
Per Forlin9782aff2011-07-01 18:55:23 +02002055 host->next_data.cookie = 1;
Kishon Vijay Abraham I3f77f702015-08-27 14:44:04 +05302056 host->vqmmc_enabled = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002057
NeilBrown41afa3142015-01-13 08:23:18 +13002058 ret = omap_hsmmc_gpio_init(mmc, host, pdata);
Andreas Fenkart1e363e32014-11-08 15:33:15 +01002059 if (ret)
2060 goto err_gpio;
2061
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002062 platform_set_drvdata(pdev, host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002063
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002064 if (pdev->dev.of_node)
2065 host->wake_irq = irq_of_parse_and_map(pdev->dev.of_node, 1);
2066
Balaji T K7a8c2ce2011-07-01 22:09:34 +05302067 mmc->ops = &omap_hsmmc_ops;
Denis Karpovdd498ef2009-09-22 16:44:49 -07002068
Daniel Mackd418ed82012-02-19 13:20:33 +01002069 mmc->f_min = OMAP_MMC_MIN_CLOCK;
2070
2071 if (pdata->max_freq > 0)
2072 mmc->f_max = pdata->max_freq;
NeilBrownfdb9de12015-01-13 08:23:18 +13002073 else if (mmc->f_max == 0)
Daniel Mackd418ed82012-02-19 13:20:33 +01002074 mmc->f_max = OMAP_MMC_MAX_CLOCK;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002075
Adrian Hunter4dffd7a2009-09-22 16:44:58 -07002076 spin_lock_init(&host->irq_lock);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002077
Balaji T K96181952014-05-09 22:16:48 +05302078 host->fclk = devm_clk_get(&pdev->dev, "fck");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002079 if (IS_ERR(host->fclk)) {
2080 ret = PTR_ERR(host->fclk);
2081 host->fclk = NULL;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002082 goto err1;
2083 }
2084
Paul Walmsley9b682562011-10-06 14:50:35 -06002085 if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) {
2086 dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n");
Kuninori Morimotoafd8c292014-09-08 23:44:51 -07002087 omap_hsmmc_ops.multi_io_quirk = omap_hsmmc_multi_io_quirk;
Paul Walmsley9b682562011-10-06 14:50:35 -06002088 }
Denis Karpovdd498ef2009-09-22 16:44:49 -07002089
Tony Lindgren5b83b222015-05-21 15:51:52 -07002090 device_init_wakeup(&pdev->dev, true);
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302091 pm_runtime_enable(host->dev);
2092 pm_runtime_get_sync(host->dev);
2093 pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY);
2094 pm_runtime_use_autosuspend(host->dev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002095
Balaji T K92a3aeb2012-02-24 21:14:34 +05302096 omap_hsmmc_context_save(host);
2097
Balaji T K96181952014-05-09 22:16:48 +05302098 host->dbclk = devm_clk_get(&pdev->dev, "mmchsdb_fck");
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302099 /*
2100 * MMC can still work without debounce clock.
2101 */
2102 if (IS_ERR(host->dbclk)) {
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302103 host->dbclk = NULL;
Rajendra Nayak94c18142012-06-27 14:19:54 +05302104 } else if (clk_prepare_enable(host->dbclk) != 0) {
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302105 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n");
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302106 host->dbclk = NULL;
Adrian Hunter2bec0892009-09-22 16:45:02 -07002107 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002108
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02002109 /* Since we do only SG emulation, we can have as many segs
2110 * as we want. */
Martin K. Petersena36274e2010-09-10 01:33:59 -04002111 mmc->max_segs = 1024;
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02002112
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002113 mmc->max_blk_size = 512; /* Block Length at max can be 1024 */
2114 mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */
2115 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
2116 mmc->max_seg_size = mmc->max_req_size;
2117
Jarkko Lavinen13189e72009-09-22 16:44:53 -07002118 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
Adrian Hunter93caf8e692010-08-11 14:17:48 -07002119 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002120
Andreas Fenkart326119c2014-11-08 15:33:14 +01002121 mmc->caps |= mmc_pdata(host)->caps;
Sukumar Ghorai3a638332010-09-15 14:49:23 +00002122 if (mmc->caps & MMC_CAP_8_BIT_DATA)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002123 mmc->caps |= MMC_CAP_4_BIT_DATA;
2124
Andreas Fenkart326119c2014-11-08 15:33:14 +01002125 if (mmc_pdata(host)->nonremovable)
Adrian Hunter23d99bb2009-09-22 16:44:48 -07002126 mmc->caps |= MMC_CAP_NONREMOVABLE;
2127
NeilBrownfdb9de12015-01-13 08:23:18 +13002128 mmc->pm_caps |= mmc_pdata(host)->pm_caps;
Eliad Peller6fdc75d2011-11-22 16:02:18 +02002129
Denis Karpov70a33412009-09-22 16:44:59 -07002130 omap_hsmmc_conf_bus_power(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002131
Santosh Shilimkar4a29b552013-05-10 17:42:35 +05302132 if (!pdev->dev.of_node) {
2133 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
2134 if (!res) {
2135 dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
2136 ret = -ENXIO;
2137 goto err_irq;
2138 }
2139 tx_req = res->start;
Balaji T Kb7bf7732012-03-07 09:55:30 -05002140
Santosh Shilimkar4a29b552013-05-10 17:42:35 +05302141 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
2142 if (!res) {
2143 dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
2144 ret = -ENXIO;
2145 goto err_irq;
2146 }
2147 rx_req = res->start;
Balaji T Kb7bf7732012-03-07 09:55:30 -05002148 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002149
Russell King26b88522012-04-13 12:27:37 +01002150 dma_cap_zero(mask);
2151 dma_cap_set(DMA_SLAVE, mask);
Russell Kingc5c98922012-04-13 12:14:39 +01002152
Matt Porterd272fbf2013-05-10 17:42:34 +05302153 host->rx_chan =
2154 dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
2155 &rx_req, &pdev->dev, "rx");
2156
Russell King26b88522012-04-13 12:27:37 +01002157 if (!host->rx_chan) {
2158 dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req);
Kevin Hilman04e8c7b2012-07-11 17:51:40 +01002159 ret = -ENXIO;
Russell King26b88522012-04-13 12:27:37 +01002160 goto err_irq;
2161 }
2162
Matt Porterd272fbf2013-05-10 17:42:34 +05302163 host->tx_chan =
2164 dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
2165 &tx_req, &pdev->dev, "tx");
2166
Russell King26b88522012-04-13 12:27:37 +01002167 if (!host->tx_chan) {
2168 dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req);
Kevin Hilman04e8c7b2012-07-11 17:51:40 +01002169 ret = -ENXIO;
Russell King26b88522012-04-13 12:27:37 +01002170 goto err_irq;
Russell Kingc5c98922012-04-13 12:14:39 +01002171 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002172
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002173 /* Request IRQ for MMC operations */
Balaji T Ke1538ed2014-05-09 22:16:49 +05302174 ret = devm_request_irq(&pdev->dev, host->irq, omap_hsmmc_irq, 0,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002175 mmc_hostname(mmc), host);
2176 if (ret) {
Venkatraman Sb1e056a2012-11-19 22:00:00 +05302177 dev_err(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002178 goto err_irq;
2179 }
2180
Kishon Vijay Abraham I987e05c2015-08-27 14:44:07 +05302181 ret = omap_hsmmc_reg_get(host);
2182 if (ret)
2183 goto err_irq;
Adrian Hunterdb0fefc2010-02-15 10:03:34 -08002184
Andreas Fenkart326119c2014-11-08 15:33:14 +01002185 mmc->ocr_avail = mmc_pdata(host)->ocr_mask;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002186
Adrian Hunterb4175772010-05-26 14:42:06 -07002187 omap_hsmmc_disable_irq(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002188
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002189 /*
2190 * For now, only support SDIO interrupt if we have a separate
2191 * wake-up interrupt configured from device tree. This is because
2192 * the wake-up interrupt is needed for idle state and some
2193 * platforms need special quirks. And we don't want to add new
2194 * legacy mux platform init code callbacks any longer as we
2195 * are moving to DT based booting anyways.
2196 */
2197 ret = omap_hsmmc_configure_wake_irq(host);
2198 if (!ret)
2199 mmc->caps |= MMC_CAP_SDIO_IRQ;
2200
Adrian Hunterb62f6222009-09-22 16:45:01 -07002201 omap_hsmmc_protect_card(host);
2202
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002203 mmc_add_host(mmc);
2204
Andreas Fenkart326119c2014-11-08 15:33:14 +01002205 if (mmc_pdata(host)->name != NULL) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002206 ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name);
2207 if (ret < 0)
2208 goto err_slot_name;
2209 }
Andreas Fenkartcde592c2015-03-03 13:28:15 +01002210 if (host->get_cover_state) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002211 ret = device_create_file(&mmc->class_dev,
Andreas Fenkartcde592c2015-03-03 13:28:15 +01002212 &dev_attr_cover_switch);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002213 if (ret < 0)
Adrian Hunterdb0fefc2010-02-15 10:03:34 -08002214 goto err_slot_name;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002215 }
2216
Denis Karpov70a33412009-09-22 16:44:59 -07002217 omap_hsmmc_debugfs(mmc);
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302218 pm_runtime_mark_last_busy(host->dev);
2219 pm_runtime_put_autosuspend(host->dev);
Denis Karpovd900f712009-09-22 16:44:38 -07002220
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002221 return 0;
2222
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002223err_slot_name:
2224 mmc_remove_host(mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002225err_irq:
Tony Lindgren5b83b222015-05-21 15:51:52 -07002226 device_init_wakeup(&pdev->dev, false);
Russell Kingc5c98922012-04-13 12:14:39 +01002227 if (host->tx_chan)
2228 dma_release_channel(host->tx_chan);
2229 if (host->rx_chan)
2230 dma_release_channel(host->rx_chan);
Balaji T Kd59d77e2012-02-24 21:14:33 +05302231 pm_runtime_put_sync(host->dev);
Tony Lindgren37f61902012-03-08 23:41:35 -05002232 pm_runtime_disable(host->dev);
Balaji T K96181952014-05-09 22:16:48 +05302233 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05302234 clk_disable_unprepare(host->dbclk);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002235err1:
Andreas Fenkart1e363e32014-11-08 15:33:15 +01002236err_gpio:
Adrian Hunterdb0fefc2010-02-15 10:03:34 -08002237 mmc_free_host(mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002238err:
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002239 return ret;
2240}
2241
Bill Pemberton6e0ee712012-11-19 13:26:03 -05002242static int omap_hsmmc_remove(struct platform_device *pdev)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002243{
Denis Karpov70a33412009-09-22 16:44:59 -07002244 struct omap_hsmmc_host *host = platform_get_drvdata(pdev);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002245
Felipe Balbi927ce942012-03-14 11:18:27 +02002246 pm_runtime_get_sync(host->dev);
2247 mmc_remove_host(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002248
Russell Kingc5c98922012-04-13 12:14:39 +01002249 if (host->tx_chan)
2250 dma_release_channel(host->tx_chan);
2251 if (host->rx_chan)
2252 dma_release_channel(host->rx_chan);
2253
Felipe Balbi927ce942012-03-14 11:18:27 +02002254 pm_runtime_put_sync(host->dev);
2255 pm_runtime_disable(host->dev);
Tony Lindgren5b83b222015-05-21 15:51:52 -07002256 device_init_wakeup(&pdev->dev, false);
Balaji T K96181952014-05-09 22:16:48 +05302257 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05302258 clk_disable_unprepare(host->dbclk);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002259
Balaji T K9d1f0282012-10-15 21:35:07 +05302260 mmc_free_host(host->mmc);
Felipe Balbi927ce942012-03-14 11:18:27 +02002261
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002262 return 0;
2263}
2264
Russ Dill3d3bbfb2015-02-27 13:24:34 +02002265#ifdef CONFIG_PM_SLEEP
Kevin Hilmana791daa2010-05-26 14:42:07 -07002266static int omap_hsmmc_suspend(struct device *dev)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002267{
Felipe Balbi927ce942012-03-14 11:18:27 +02002268 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2269
2270 if (!host)
2271 return 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002272
Felipe Balbi927ce942012-03-14 11:18:27 +02002273 pm_runtime_get_sync(host->dev);
Felipe Balbi927ce942012-03-14 11:18:27 +02002274
2275 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) {
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002276 OMAP_HSMMC_WRITE(host->base, ISE, 0);
2277 OMAP_HSMMC_WRITE(host->base, IE, 0);
2278 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
Felipe Balbi927ce942012-03-14 11:18:27 +02002279 OMAP_HSMMC_WRITE(host->base, HCTL,
2280 OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
2281 }
2282
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302283 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05302284 clk_disable_unprepare(host->dbclk);
Ulf Hansson3932afd2013-09-25 14:47:06 +02002285
Eliad Peller31f9d462011-11-22 16:02:17 +02002286 pm_runtime_put_sync(host->dev);
Ulf Hansson3932afd2013-09-25 14:47:06 +02002287 return 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002288}
2289
2290/* Routine to resume the MMC device */
Kevin Hilmana791daa2010-05-26 14:42:07 -07002291static int omap_hsmmc_resume(struct device *dev)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002292{
Felipe Balbi927ce942012-03-14 11:18:27 +02002293 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2294
2295 if (!host)
2296 return 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002297
Felipe Balbi927ce942012-03-14 11:18:27 +02002298 pm_runtime_get_sync(host->dev);
Denis Karpov11dd62a2009-09-22 16:44:43 -07002299
Rajendra Nayakcd03d9a2012-04-09 12:08:35 +05302300 if (host->dbclk)
Rajendra Nayak94c18142012-06-27 14:19:54 +05302301 clk_prepare_enable(host->dbclk);
Adrian Hunter2bec0892009-09-22 16:45:02 -07002302
Felipe Balbi927ce942012-03-14 11:18:27 +02002303 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER))
2304 omap_hsmmc_conf_bus_power(host);
Kim Kyuwon1b331e62009-02-20 13:10:08 +01002305
Felipe Balbi927ce942012-03-14 11:18:27 +02002306 omap_hsmmc_protect_card(host);
Felipe Balbi927ce942012-03-14 11:18:27 +02002307 pm_runtime_mark_last_busy(host->dev);
2308 pm_runtime_put_autosuspend(host->dev);
Ulf Hansson3932afd2013-09-25 14:47:06 +02002309 return 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002310}
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002311#endif
2312
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302313static int omap_hsmmc_runtime_suspend(struct device *dev)
2314{
2315 struct omap_hsmmc_host *host;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002316 unsigned long flags;
Andreas Fenkartf9459012014-05-29 10:28:03 +02002317 int ret = 0;
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302318
2319 host = platform_get_drvdata(to_platform_device(dev));
2320 omap_hsmmc_context_save(host);
Felipe Balbi927ce942012-03-14 11:18:27 +02002321 dev_dbg(dev, "disabled\n");
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302322
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002323 spin_lock_irqsave(&host->irq_lock, flags);
2324 if ((host->mmc->caps & MMC_CAP_SDIO_IRQ) &&
2325 (host->flags & HSMMC_SDIO_IRQ_ENABLED)) {
2326 /* disable sdio irq handling to prevent race */
2327 OMAP_HSMMC_WRITE(host->base, ISE, 0);
2328 OMAP_HSMMC_WRITE(host->base, IE, 0);
Andreas Fenkartf9459012014-05-29 10:28:03 +02002329
2330 if (!(OMAP_HSMMC_READ(host->base, PSTATE) & DLEV_DAT(1))) {
2331 /*
2332 * dat1 line low, pending sdio irq
2333 * race condition: possible irq handler running on
2334 * multi-core, abort
2335 */
2336 dev_dbg(dev, "pending sdio irq, abort suspend\n");
2337 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
2338 OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN);
2339 OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN);
2340 pm_runtime_mark_last_busy(dev);
2341 ret = -EBUSY;
2342 goto abort;
2343 }
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002344
Andreas Fenkart97978a42014-05-29 10:28:04 +02002345 pinctrl_pm_select_idle_state(dev);
Andreas Fenkart97978a42014-05-29 10:28:04 +02002346 } else {
2347 pinctrl_pm_select_idle_state(dev);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002348 }
Andreas Fenkart97978a42014-05-29 10:28:04 +02002349
Andreas Fenkartf9459012014-05-29 10:28:03 +02002350abort:
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002351 spin_unlock_irqrestore(&host->irq_lock, flags);
Andreas Fenkartf9459012014-05-29 10:28:03 +02002352 return ret;
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302353}
2354
2355static int omap_hsmmc_runtime_resume(struct device *dev)
2356{
2357 struct omap_hsmmc_host *host;
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002358 unsigned long flags;
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302359
2360 host = platform_get_drvdata(to_platform_device(dev));
2361 omap_hsmmc_context_restore(host);
Felipe Balbi927ce942012-03-14 11:18:27 +02002362 dev_dbg(dev, "enabled\n");
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302363
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002364 spin_lock_irqsave(&host->irq_lock, flags);
2365 if ((host->mmc->caps & MMC_CAP_SDIO_IRQ) &&
2366 (host->flags & HSMMC_SDIO_IRQ_ENABLED)) {
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002367
Andreas Fenkart97978a42014-05-29 10:28:04 +02002368 pinctrl_pm_select_default_state(host->dev);
2369
2370 /* irq lost, if pinmux incorrect */
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002371 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
2372 OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN);
2373 OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN);
Andreas Fenkart97978a42014-05-29 10:28:04 +02002374 } else {
2375 pinctrl_pm_select_default_state(host->dev);
Andreas Fenkart2cd3a2a52014-05-29 10:28:00 +02002376 }
2377 spin_unlock_irqrestore(&host->irq_lock, flags);
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302378 return 0;
2379}
2380
Kevin Hilmana791daa2010-05-26 14:42:07 -07002381static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
Russ Dill3d3bbfb2015-02-27 13:24:34 +02002382 SET_SYSTEM_SLEEP_PM_OPS(omap_hsmmc_suspend, omap_hsmmc_resume)
Balaji T Kfa4aa2d2011-07-01 22:09:35 +05302383 .runtime_suspend = omap_hsmmc_runtime_suspend,
2384 .runtime_resume = omap_hsmmc_runtime_resume,
Kevin Hilmana791daa2010-05-26 14:42:07 -07002385};
2386
2387static struct platform_driver omap_hsmmc_driver = {
Felipe Balbiefa25fd2012-03-14 11:18:28 +02002388 .probe = omap_hsmmc_probe,
Bill Pemberton0433c142012-11-19 13:20:26 -05002389 .remove = omap_hsmmc_remove,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002390 .driver = {
2391 .name = DRIVER_NAME,
Kevin Hilmana791daa2010-05-26 14:42:07 -07002392 .pm = &omap_hsmmc_dev_pm_ops,
Rajendra Nayak46856a62012-03-12 20:32:37 +05302393 .of_match_table = of_match_ptr(omap_mmc_of_match),
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002394 },
2395};
2396
Felipe Balbib7964502012-03-14 11:18:32 +02002397module_platform_driver(omap_hsmmc_driver);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01002398MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver");
2399MODULE_LICENSE("GPL");
2400MODULE_ALIAS("platform:" DRIVER_NAME);
2401MODULE_AUTHOR("Texas Instruments Inc");