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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
617 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 lro_min_mss_size[0x10];
621
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623
624 u8 lro_timer_supported_periods[4][0x20];
625
Matan Barakb4ff3a32016-02-09 14:57:42 +0200626 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627};
628
629struct mlx5_ifc_roce_cap_bits {
630 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 roce_version[0x8];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 r_roce_dest_udp_port[0x10];
642
643 u8 r_roce_max_src_udp_port[0x10];
644 u8 r_roce_min_src_udp_port[0x10];
645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 roce_address_table_size[0x10];
648
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650};
651
652enum {
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
662};
663
664enum {
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
674};
675
676struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Or Gerlitzbd108382017-05-28 15:24:17 +0300679 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200680 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300682
Matan Barakb4ff3a32016-02-09 14:57:42 +0200683 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200688 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200691 u8 atomic_size_qp[0x10];
692
Matan Barakb4ff3a32016-02-09 14:57:42 +0200693 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300694 u8 atomic_size_dc[0x10];
695
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300697};
698
699struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300701
702 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200703 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300704
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
707 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714};
715
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200716struct mlx5_ifc_calc_op {
717 u8 reserved_at_0[0x10];
718 u8 reserved_at_10[0x9];
719 u8 op_swap_endianness[0x1];
720 u8 op_min[0x1];
721 u8 op_xor[0x1];
722 u8 op_or[0x1];
723 u8 op_and[0x1];
724 u8 op_max[0x1];
725 u8 op_add[0x1];
726};
727
728struct mlx5_ifc_vector_calc_cap_bits {
729 u8 calc_matrix[0x1];
730 u8 reserved_at_1[0x1f];
731 u8 reserved_at_20[0x8];
732 u8 max_vec_count[0x8];
733 u8 reserved_at_30[0xd];
734 u8 max_chunk_size[0x3];
735 struct mlx5_ifc_calc_op calc0;
736 struct mlx5_ifc_calc_op calc1;
737 struct mlx5_ifc_calc_op calc2;
738 struct mlx5_ifc_calc_op calc3;
739
740 u8 reserved_at_e0[0x720];
741};
742
Saeed Mahameede2816822015-05-28 22:28:40 +0300743enum {
744 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
745 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300746 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300747};
748
749enum {
750 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
751 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
752};
753
754enum {
755 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
756 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
757 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
760};
761
762enum {
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
764 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
765 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
769};
770
771enum {
772 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
773 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
774};
775
776enum {
777 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
778 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
779 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
780};
781
782enum {
783 MLX5_CAP_PORT_TYPE_IB = 0x0,
784 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300785};
786
Max Gurtovoy1410a902017-05-28 10:53:10 +0300787enum {
788 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
789 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
790 MLX5_CAP_UMR_FENCE_NONE = 0x2,
791};
792
Eli Cohenb7755162014-10-02 12:19:44 +0300793struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200794 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300795
796 u8 log_max_srq_sz[0x8];
797 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300799 u8 log_max_qp[0x5];
800
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300802 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200803 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300804
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_cq[0x5];
809
810 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200811 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200813 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300814 u8 log_max_eq[0x4];
815
816 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200817 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200819 u8 force_teardown[0x1];
820 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200822 u8 umr_extended_translation_offset[0x1];
823 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_klm_list_size[0x6];
825
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200828 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300829 u8 log_max_ra_res_dc[0x6];
830
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200833 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 log_max_ra_res_qp[0x6];
835
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200836 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 cc_query_allowed[0x1];
838 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200839 u8 start_pad[0x1];
840 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500841 u8 reserved_at_165[0xa];
842 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300843 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300844
Saeed Mahameede2816822015-05-28 22:28:40 +0300845 u8 out_of_seq_cnt[0x1];
846 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300847 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300848 u8 reserved_at_183[0x1];
849 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300850 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300851 u8 max_qp_cnt[0xa];
852 u8 pkey_table_size[0x10];
853
Saeed Mahameede2816822015-05-28 22:28:40 +0300854 u8 vport_group_manager[0x1];
855 u8 vhca_group_manager[0x1];
856 u8 ib_virt[0x1];
857 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200858 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300859 u8 ets[0x1];
860 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200861 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300862 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200863 u8 mcam_reg[0x1];
864 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300865 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200866 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300867 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300868 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200869 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300870 u8 disable_link_up[0x1];
871 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300872 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300873 u8 num_ports[0x8];
874
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300875 u8 reserved_at_1c0[0x1];
876 u8 pps[0x1];
877 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300878 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300879 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200880 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300881 u8 reserved_at_1d0[0x1];
882 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300883 u8 general_notification_event[0x1];
884 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200885 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200886 u8 rol_s[0x1];
887 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300888 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200889 u8 wol_s[0x1];
890 u8 wol_g[0x1];
891 u8 wol_a[0x1];
892 u8 wol_b[0x1];
893 u8 wol_m[0x1];
894 u8 wol_u[0x1];
895 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300896
897 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300898 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300899 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300900
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300902 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300903 u8 reserved_at_202[0x1];
904 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200905 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300906 u8 reserved_at_205[0x5];
907 u8 umr_fence[0x2];
908 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300909 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300910 u8 cmdif_checksum[0x2];
911 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300912 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 wq_signature[0x1];
914 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300915 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 sho[0x1];
917 u8 tph[0x1];
918 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300920 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300921 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300922 u8 roce[0x1];
923 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300924 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300925
926 u8 cq_oi[0x1];
927 u8 cq_resize[0x1];
928 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300930 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300931 u8 pg[0x1];
932 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300933 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300934 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300935 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300937 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300938 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200939 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300940 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200941 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300942 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300943 u8 qkv[0x1];
944 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200945 u8 set_deth_sqpn[0x1];
946 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300947 u8 xrc[0x1];
948 u8 ud[0x1];
949 u8 uc[0x1];
950 u8 rc[0x1];
951
Eli Cohena6d51b62017-01-03 23:55:23 +0200952 u8 uar_4k[0x1];
953 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300955 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300956 u8 log_pg_sz[0x8];
957
958 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200959 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300960 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300963
964 u8 reserved_at_270[0xb];
965 u8 lag_master[0x1];
966 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300967
Tariq Toukane1c9c622016-04-11 23:10:21 +0300968 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300969 u8 max_wqe_sz_sq[0x10];
970
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 max_wqe_sz_rq[0x10];
973
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300974 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 max_wqe_sz_sq_dc[0x10];
976
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 max_qp_mcg[0x19];
979
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 log_max_mcg[0x8];
982
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_xrcd[0x5];
989
Amir Vadaia351a1b02016-07-14 10:32:38 +0300990 u8 reserved_at_340[0x8];
991 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300992 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300993
Eli Cohenb7755162014-10-02 12:19:44 +0300994
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 log_max_tis[0x5];
1003
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001010 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 log_max_tis_per_sq[0x5];
1013
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001015 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001017 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001021 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001022
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001024 u8 log_max_wq_sz[0x5];
1025
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001026 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001027 u8 disable_local_lb[0x1];
1028 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001031 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001033 u8 log_max_current_uc_list[0x5];
1034
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001036
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001038 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001040 u8 log_uar_page_sz[0x10];
1041
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001043 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001044 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045
Eli Cohena6d51b62017-01-03 23:55:23 +02001046 u8 reserved_at_500[0x20];
1047 u8 num_of_uars_per_page[0x20];
1048 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001049
1050 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001051 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001052
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001053 u8 cqe_compression_timeout[0x10];
1054 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001055
Saeed Mahameed74862162016-06-09 15:11:34 +03001056 u8 reserved_at_5e0[0x10];
1057 u8 tag_matching[0x1];
1058 u8 rndv_offload_rc[0x1];
1059 u8 rndv_offload_dc[0x1];
1060 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001061 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001062 u8 log_max_xrq[0x5];
1063
Max Gurtovoy7b135582017-01-02 11:37:38 +02001064 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001065};
1066
Saeed Mahameed81848732015-12-01 18:03:20 +02001067enum mlx5_flow_destination_type {
1068 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1069 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1070 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001071
1072 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001073};
1074
1075struct mlx5_ifc_dest_format_struct_bits {
1076 u8 destination_type[0x8];
1077 u8 destination_id[0x18];
1078
Matan Barakb4ff3a32016-02-09 14:57:42 +02001079 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001080};
1081
Amir Vadai9dc0b282016-05-13 12:55:39 +00001082struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001083 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001084
1085 u8 reserved_at_20[0x20];
1086};
1087
1088union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1089 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1090 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1091 u8 reserved_at_0[0x40];
1092};
1093
Saeed Mahameede2816822015-05-28 22:28:40 +03001094struct mlx5_ifc_fte_match_param_bits {
1095 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1096
1097 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1098
1099 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1100
Matan Barakb4ff3a32016-02-09 14:57:42 +02001101 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001102};
1103
1104enum {
1105 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1106 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1107 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1108 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1109 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1110};
1111
1112struct mlx5_ifc_rx_hash_field_select_bits {
1113 u8 l3_prot_type[0x1];
1114 u8 l4_prot_type[0x1];
1115 u8 selected_fields[0x1e];
1116};
1117
1118enum {
1119 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1120 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1121};
1122
1123enum {
1124 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1125 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1126};
1127
1128struct mlx5_ifc_wq_bits {
1129 u8 wq_type[0x4];
1130 u8 wq_signature[0x1];
1131 u8 end_padding_mode[0x2];
1132 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134
1135 u8 hds_skip_first_sge[0x1];
1136 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138 u8 page_offset[0x5];
1139 u8 lwm[0x10];
1140
Matan Barakb4ff3a32016-02-09 14:57:42 +02001141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001142 u8 pd[0x18];
1143
Matan Barakb4ff3a32016-02-09 14:57:42 +02001144 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001145 u8 uar_page[0x18];
1146
1147 u8 dbr_addr[0x40];
1148
1149 u8 hw_counter[0x20];
1150
1151 u8 sw_counter[0x20];
1152
Matan Barakb4ff3a32016-02-09 14:57:42 +02001153 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001157 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158 u8 log_wq_sz[0x5];
1159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001160 u8 reserved_at_120[0x15];
1161 u8 log_wqe_num_of_strides[0x3];
1162 u8 two_byte_shift_en[0x1];
1163 u8 reserved_at_139[0x4];
1164 u8 log_wqe_stride_size[0x3];
1165
1166 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001167
1168 struct mlx5_ifc_cmd_pas_bits pas[0];
1169};
1170
1171struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 rq_num[0x18];
1174};
1175
1176struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001178 u8 mac_addr_47_32[0x10];
1179
1180 u8 mac_addr_31_0[0x20];
1181};
1182
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001183struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001184 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001185 u8 vlan[0x0c];
1186
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001188};
1189
Saeed Mahameede2816822015-05-28 22:28:40 +03001190struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192
1193 u8 min_time_between_cnps[0x20];
1194
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001197 u8 reserved_at_d8[0x4];
1198 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 cnp_802p_prio[0x3];
1200
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202};
1203
1204struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214
1215 u8 rpg_time_reset[0x20];
1216
1217 u8 rpg_byte_reset[0x20];
1218
1219 u8 rpg_threshold[0x20];
1220
1221 u8 rpg_max_rate[0x20];
1222
1223 u8 rpg_ai_rate[0x20];
1224
1225 u8 rpg_hai_rate[0x20];
1226
1227 u8 rpg_gd[0x20];
1228
1229 u8 rpg_min_dec_fac[0x20];
1230
1231 u8 rpg_min_rate[0x20];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 rate_to_set_on_first_cnp[0x20];
1236
1237 u8 dce_tcp_g[0x20];
1238
1239 u8 dce_tcp_rtt[0x20];
1240
1241 u8 rate_reduce_monitor_period[0x20];
1242
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244
1245 u8 initial_alpha_value[0x20];
1246
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248};
1249
1250struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252
1253 u8 rppp_max_rps[0x20];
1254
1255 u8 rpg_time_reset[0x20];
1256
1257 u8 rpg_byte_reset[0x20];
1258
1259 u8 rpg_threshold[0x20];
1260
1261 u8 rpg_max_rate[0x20];
1262
1263 u8 rpg_ai_rate[0x20];
1264
1265 u8 rpg_hai_rate[0x20];
1266
1267 u8 rpg_gd[0x20];
1268
1269 u8 rpg_min_dec_fac[0x20];
1270
1271 u8 rpg_min_rate[0x20];
1272
Matan Barakb4ff3a32016-02-09 14:57:42 +02001273 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001274};
1275
1276enum {
1277 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1278 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1279 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1280};
1281
1282struct mlx5_ifc_resize_field_select_bits {
1283 u8 resize_field_select[0x20];
1284};
1285
1286enum {
1287 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1288 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1289 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1290 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1291};
1292
1293struct mlx5_ifc_modify_field_select_bits {
1294 u8 modify_field_select[0x20];
1295};
1296
1297struct mlx5_ifc_field_select_r_roce_np_bits {
1298 u8 field_select_r_roce_np[0x20];
1299};
1300
1301struct mlx5_ifc_field_select_r_roce_rp_bits {
1302 u8 field_select_r_roce_rp[0x20];
1303};
1304
1305enum {
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1316};
1317
1318struct mlx5_ifc_field_select_802_1qau_rp_bits {
1319 u8 field_select_8021qaurp[0x20];
1320};
1321
1322struct mlx5_ifc_phys_layer_cntrs_bits {
1323 u8 time_since_last_clear_high[0x20];
1324
1325 u8 time_since_last_clear_low[0x20];
1326
1327 u8 symbol_errors_high[0x20];
1328
1329 u8 symbol_errors_low[0x20];
1330
1331 u8 sync_headers_errors_high[0x20];
1332
1333 u8 sync_headers_errors_low[0x20];
1334
1335 u8 edpl_bip_errors_lane0_high[0x20];
1336
1337 u8 edpl_bip_errors_lane0_low[0x20];
1338
1339 u8 edpl_bip_errors_lane1_high[0x20];
1340
1341 u8 edpl_bip_errors_lane1_low[0x20];
1342
1343 u8 edpl_bip_errors_lane2_high[0x20];
1344
1345 u8 edpl_bip_errors_lane2_low[0x20];
1346
1347 u8 edpl_bip_errors_lane3_high[0x20];
1348
1349 u8 edpl_bip_errors_lane3_low[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1362
1363 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1364
1365 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1378
1379 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1380
1381 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1382
1383 u8 rs_fec_corrected_blocks_high[0x20];
1384
1385 u8 rs_fec_corrected_blocks_low[0x20];
1386
1387 u8 rs_fec_uncorrectable_blocks_high[0x20];
1388
1389 u8 rs_fec_uncorrectable_blocks_low[0x20];
1390
1391 u8 rs_fec_no_errors_blocks_high[0x20];
1392
1393 u8 rs_fec_no_errors_blocks_low[0x20];
1394
1395 u8 rs_fec_single_error_blocks_high[0x20];
1396
1397 u8 rs_fec_single_error_blocks_low[0x20];
1398
1399 u8 rs_fec_corrected_symbols_total_high[0x20];
1400
1401 u8 rs_fec_corrected_symbols_total_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1414
1415 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1416
1417 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1418
1419 u8 link_down_events[0x20];
1420
1421 u8 successful_recovery_events[0x20];
1422
Matan Barakb4ff3a32016-02-09 14:57:42 +02001423 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001424};
1425
Gal Pressmand8dc0502016-09-27 17:04:51 +03001426struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1427 u8 time_since_last_clear_high[0x20];
1428
1429 u8 time_since_last_clear_low[0x20];
1430
1431 u8 phy_received_bits_high[0x20];
1432
1433 u8 phy_received_bits_low[0x20];
1434
1435 u8 phy_symbol_errors_high[0x20];
1436
1437 u8 phy_symbol_errors_low[0x20];
1438
1439 u8 phy_corrected_bits_high[0x20];
1440
1441 u8 phy_corrected_bits_low[0x20];
1442
1443 u8 phy_corrected_bits_lane0_high[0x20];
1444
1445 u8 phy_corrected_bits_lane0_low[0x20];
1446
1447 u8 phy_corrected_bits_lane1_high[0x20];
1448
1449 u8 phy_corrected_bits_lane1_low[0x20];
1450
1451 u8 phy_corrected_bits_lane2_high[0x20];
1452
1453 u8 phy_corrected_bits_lane2_low[0x20];
1454
1455 u8 phy_corrected_bits_lane3_high[0x20];
1456
1457 u8 phy_corrected_bits_lane3_low[0x20];
1458
1459 u8 reserved_at_200[0x5c0];
1460};
1461
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001462struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1463 u8 symbol_error_counter[0x10];
1464
1465 u8 link_error_recovery_counter[0x8];
1466
1467 u8 link_downed_counter[0x8];
1468
1469 u8 port_rcv_errors[0x10];
1470
1471 u8 port_rcv_remote_physical_errors[0x10];
1472
1473 u8 port_rcv_switch_relay_errors[0x10];
1474
1475 u8 port_xmit_discards[0x10];
1476
1477 u8 port_xmit_constraint_errors[0x8];
1478
1479 u8 port_rcv_constraint_errors[0x8];
1480
1481 u8 reserved_at_70[0x8];
1482
1483 u8 link_overrun_errors[0x8];
1484
1485 u8 reserved_at_80[0x10];
1486
1487 u8 vl_15_dropped[0x10];
1488
Tim Wright133bea02017-05-01 17:30:08 +01001489 u8 reserved_at_a0[0x80];
1490
1491 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001492};
1493
Saeed Mahameede2816822015-05-28 22:28:40 +03001494struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1495 u8 transmit_queue_high[0x20];
1496
1497 u8 transmit_queue_low[0x20];
1498
Matan Barakb4ff3a32016-02-09 14:57:42 +02001499 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001500};
1501
1502struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1503 u8 rx_octets_high[0x20];
1504
1505 u8 rx_octets_low[0x20];
1506
Matan Barakb4ff3a32016-02-09 14:57:42 +02001507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001508
1509 u8 rx_frames_high[0x20];
1510
1511 u8 rx_frames_low[0x20];
1512
1513 u8 tx_octets_high[0x20];
1514
1515 u8 tx_octets_low[0x20];
1516
Matan Barakb4ff3a32016-02-09 14:57:42 +02001517 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001518
1519 u8 tx_frames_high[0x20];
1520
1521 u8 tx_frames_low[0x20];
1522
1523 u8 rx_pause_high[0x20];
1524
1525 u8 rx_pause_low[0x20];
1526
1527 u8 rx_pause_duration_high[0x20];
1528
1529 u8 rx_pause_duration_low[0x20];
1530
1531 u8 tx_pause_high[0x20];
1532
1533 u8 tx_pause_low[0x20];
1534
1535 u8 tx_pause_duration_high[0x20];
1536
1537 u8 tx_pause_duration_low[0x20];
1538
1539 u8 rx_pause_transition_high[0x20];
1540
1541 u8 rx_pause_transition_low[0x20];
1542
Matan Barakb4ff3a32016-02-09 14:57:42 +02001543 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001544};
1545
1546struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1547 u8 port_transmit_wait_high[0x20];
1548
1549 u8 port_transmit_wait_low[0x20];
1550
Gal Pressman2dba0792017-06-18 14:56:45 +03001551 u8 reserved_at_40[0x100];
1552
1553 u8 rx_buffer_almost_full_high[0x20];
1554
1555 u8 rx_buffer_almost_full_low[0x20];
1556
1557 u8 rx_buffer_full_high[0x20];
1558
1559 u8 rx_buffer_full_low[0x20];
1560
1561 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001562};
1563
1564struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1565 u8 dot3stats_alignment_errors_high[0x20];
1566
1567 u8 dot3stats_alignment_errors_low[0x20];
1568
1569 u8 dot3stats_fcs_errors_high[0x20];
1570
1571 u8 dot3stats_fcs_errors_low[0x20];
1572
1573 u8 dot3stats_single_collision_frames_high[0x20];
1574
1575 u8 dot3stats_single_collision_frames_low[0x20];
1576
1577 u8 dot3stats_multiple_collision_frames_high[0x20];
1578
1579 u8 dot3stats_multiple_collision_frames_low[0x20];
1580
1581 u8 dot3stats_sqe_test_errors_high[0x20];
1582
1583 u8 dot3stats_sqe_test_errors_low[0x20];
1584
1585 u8 dot3stats_deferred_transmissions_high[0x20];
1586
1587 u8 dot3stats_deferred_transmissions_low[0x20];
1588
1589 u8 dot3stats_late_collisions_high[0x20];
1590
1591 u8 dot3stats_late_collisions_low[0x20];
1592
1593 u8 dot3stats_excessive_collisions_high[0x20];
1594
1595 u8 dot3stats_excessive_collisions_low[0x20];
1596
1597 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1598
1599 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1600
1601 u8 dot3stats_carrier_sense_errors_high[0x20];
1602
1603 u8 dot3stats_carrier_sense_errors_low[0x20];
1604
1605 u8 dot3stats_frame_too_longs_high[0x20];
1606
1607 u8 dot3stats_frame_too_longs_low[0x20];
1608
1609 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1610
1611 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1612
1613 u8 dot3stats_symbol_errors_high[0x20];
1614
1615 u8 dot3stats_symbol_errors_low[0x20];
1616
1617 u8 dot3control_in_unknown_opcodes_high[0x20];
1618
1619 u8 dot3control_in_unknown_opcodes_low[0x20];
1620
1621 u8 dot3in_pause_frames_high[0x20];
1622
1623 u8 dot3in_pause_frames_low[0x20];
1624
1625 u8 dot3out_pause_frames_high[0x20];
1626
1627 u8 dot3out_pause_frames_low[0x20];
1628
Matan Barakb4ff3a32016-02-09 14:57:42 +02001629 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001630};
1631
1632struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1633 u8 ether_stats_drop_events_high[0x20];
1634
1635 u8 ether_stats_drop_events_low[0x20];
1636
1637 u8 ether_stats_octets_high[0x20];
1638
1639 u8 ether_stats_octets_low[0x20];
1640
1641 u8 ether_stats_pkts_high[0x20];
1642
1643 u8 ether_stats_pkts_low[0x20];
1644
1645 u8 ether_stats_broadcast_pkts_high[0x20];
1646
1647 u8 ether_stats_broadcast_pkts_low[0x20];
1648
1649 u8 ether_stats_multicast_pkts_high[0x20];
1650
1651 u8 ether_stats_multicast_pkts_low[0x20];
1652
1653 u8 ether_stats_crc_align_errors_high[0x20];
1654
1655 u8 ether_stats_crc_align_errors_low[0x20];
1656
1657 u8 ether_stats_undersize_pkts_high[0x20];
1658
1659 u8 ether_stats_undersize_pkts_low[0x20];
1660
1661 u8 ether_stats_oversize_pkts_high[0x20];
1662
1663 u8 ether_stats_oversize_pkts_low[0x20];
1664
1665 u8 ether_stats_fragments_high[0x20];
1666
1667 u8 ether_stats_fragments_low[0x20];
1668
1669 u8 ether_stats_jabbers_high[0x20];
1670
1671 u8 ether_stats_jabbers_low[0x20];
1672
1673 u8 ether_stats_collisions_high[0x20];
1674
1675 u8 ether_stats_collisions_low[0x20];
1676
1677 u8 ether_stats_pkts64octets_high[0x20];
1678
1679 u8 ether_stats_pkts64octets_low[0x20];
1680
1681 u8 ether_stats_pkts65to127octets_high[0x20];
1682
1683 u8 ether_stats_pkts65to127octets_low[0x20];
1684
1685 u8 ether_stats_pkts128to255octets_high[0x20];
1686
1687 u8 ether_stats_pkts128to255octets_low[0x20];
1688
1689 u8 ether_stats_pkts256to511octets_high[0x20];
1690
1691 u8 ether_stats_pkts256to511octets_low[0x20];
1692
1693 u8 ether_stats_pkts512to1023octets_high[0x20];
1694
1695 u8 ether_stats_pkts512to1023octets_low[0x20];
1696
1697 u8 ether_stats_pkts1024to1518octets_high[0x20];
1698
1699 u8 ether_stats_pkts1024to1518octets_low[0x20];
1700
1701 u8 ether_stats_pkts1519to2047octets_high[0x20];
1702
1703 u8 ether_stats_pkts1519to2047octets_low[0x20];
1704
1705 u8 ether_stats_pkts2048to4095octets_high[0x20];
1706
1707 u8 ether_stats_pkts2048to4095octets_low[0x20];
1708
1709 u8 ether_stats_pkts4096to8191octets_high[0x20];
1710
1711 u8 ether_stats_pkts4096to8191octets_low[0x20];
1712
1713 u8 ether_stats_pkts8192to10239octets_high[0x20];
1714
1715 u8 ether_stats_pkts8192to10239octets_low[0x20];
1716
Matan Barakb4ff3a32016-02-09 14:57:42 +02001717 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001718};
1719
1720struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1721 u8 if_in_octets_high[0x20];
1722
1723 u8 if_in_octets_low[0x20];
1724
1725 u8 if_in_ucast_pkts_high[0x20];
1726
1727 u8 if_in_ucast_pkts_low[0x20];
1728
1729 u8 if_in_discards_high[0x20];
1730
1731 u8 if_in_discards_low[0x20];
1732
1733 u8 if_in_errors_high[0x20];
1734
1735 u8 if_in_errors_low[0x20];
1736
1737 u8 if_in_unknown_protos_high[0x20];
1738
1739 u8 if_in_unknown_protos_low[0x20];
1740
1741 u8 if_out_octets_high[0x20];
1742
1743 u8 if_out_octets_low[0x20];
1744
1745 u8 if_out_ucast_pkts_high[0x20];
1746
1747 u8 if_out_ucast_pkts_low[0x20];
1748
1749 u8 if_out_discards_high[0x20];
1750
1751 u8 if_out_discards_low[0x20];
1752
1753 u8 if_out_errors_high[0x20];
1754
1755 u8 if_out_errors_low[0x20];
1756
1757 u8 if_in_multicast_pkts_high[0x20];
1758
1759 u8 if_in_multicast_pkts_low[0x20];
1760
1761 u8 if_in_broadcast_pkts_high[0x20];
1762
1763 u8 if_in_broadcast_pkts_low[0x20];
1764
1765 u8 if_out_multicast_pkts_high[0x20];
1766
1767 u8 if_out_multicast_pkts_low[0x20];
1768
1769 u8 if_out_broadcast_pkts_high[0x20];
1770
1771 u8 if_out_broadcast_pkts_low[0x20];
1772
Matan Barakb4ff3a32016-02-09 14:57:42 +02001773 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001774};
1775
1776struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1777 u8 a_frames_transmitted_ok_high[0x20];
1778
1779 u8 a_frames_transmitted_ok_low[0x20];
1780
1781 u8 a_frames_received_ok_high[0x20];
1782
1783 u8 a_frames_received_ok_low[0x20];
1784
1785 u8 a_frame_check_sequence_errors_high[0x20];
1786
1787 u8 a_frame_check_sequence_errors_low[0x20];
1788
1789 u8 a_alignment_errors_high[0x20];
1790
1791 u8 a_alignment_errors_low[0x20];
1792
1793 u8 a_octets_transmitted_ok_high[0x20];
1794
1795 u8 a_octets_transmitted_ok_low[0x20];
1796
1797 u8 a_octets_received_ok_high[0x20];
1798
1799 u8 a_octets_received_ok_low[0x20];
1800
1801 u8 a_multicast_frames_xmitted_ok_high[0x20];
1802
1803 u8 a_multicast_frames_xmitted_ok_low[0x20];
1804
1805 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1806
1807 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1808
1809 u8 a_multicast_frames_received_ok_high[0x20];
1810
1811 u8 a_multicast_frames_received_ok_low[0x20];
1812
1813 u8 a_broadcast_frames_received_ok_high[0x20];
1814
1815 u8 a_broadcast_frames_received_ok_low[0x20];
1816
1817 u8 a_in_range_length_errors_high[0x20];
1818
1819 u8 a_in_range_length_errors_low[0x20];
1820
1821 u8 a_out_of_range_length_field_high[0x20];
1822
1823 u8 a_out_of_range_length_field_low[0x20];
1824
1825 u8 a_frame_too_long_errors_high[0x20];
1826
1827 u8 a_frame_too_long_errors_low[0x20];
1828
1829 u8 a_symbol_error_during_carrier_high[0x20];
1830
1831 u8 a_symbol_error_during_carrier_low[0x20];
1832
1833 u8 a_mac_control_frames_transmitted_high[0x20];
1834
1835 u8 a_mac_control_frames_transmitted_low[0x20];
1836
1837 u8 a_mac_control_frames_received_high[0x20];
1838
1839 u8 a_mac_control_frames_received_low[0x20];
1840
1841 u8 a_unsupported_opcodes_received_high[0x20];
1842
1843 u8 a_unsupported_opcodes_received_low[0x20];
1844
1845 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1846
1847 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1848
1849 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1850
1851 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1852
Matan Barakb4ff3a32016-02-09 14:57:42 +02001853 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001854};
1855
Gal Pressman8ed1a632016-11-17 13:46:01 +02001856struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1857 u8 life_time_counter_high[0x20];
1858
1859 u8 life_time_counter_low[0x20];
1860
1861 u8 rx_errors[0x20];
1862
1863 u8 tx_errors[0x20];
1864
1865 u8 l0_to_recovery_eieos[0x20];
1866
1867 u8 l0_to_recovery_ts[0x20];
1868
1869 u8 l0_to_recovery_framing[0x20];
1870
1871 u8 l0_to_recovery_retrain[0x20];
1872
1873 u8 crc_error_dllp[0x20];
1874
1875 u8 crc_error_tlp[0x20];
1876
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001877 u8 tx_overflow_buffer_pkt_high[0x20];
1878
1879 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001880
1881 u8 outbound_stalled_reads[0x20];
1882
1883 u8 outbound_stalled_writes[0x20];
1884
1885 u8 outbound_stalled_reads_events[0x20];
1886
1887 u8 outbound_stalled_writes_events[0x20];
1888
1889 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001890};
1891
Saeed Mahameede2816822015-05-28 22:28:40 +03001892struct mlx5_ifc_cmd_inter_comp_event_bits {
1893 u8 command_completion_vector[0x20];
1894
Matan Barakb4ff3a32016-02-09 14:57:42 +02001895 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001896};
1897
1898struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001899 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001900 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902 u8 vl[0x4];
1903
Matan Barakb4ff3a32016-02-09 14:57:42 +02001904 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001905};
1906
1907struct mlx5_ifc_db_bf_congestion_event_bits {
1908 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001909 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001910 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001911 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914};
1915
1916struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918
1919 u8 gpio_event_hi[0x20];
1920
1921 u8 gpio_event_lo[0x20];
1922
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924};
1925
1926struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001927 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001928
1929 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001930 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001931
Matan Barakb4ff3a32016-02-09 14:57:42 +02001932 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001933};
1934
1935struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937};
1938
1939enum {
1940 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1941 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1942};
1943
1944struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001945 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001946 u8 cqn[0x18];
1947
Matan Barakb4ff3a32016-02-09 14:57:42 +02001948 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001949
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951 u8 syndrome[0x8];
1952
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954};
1955
1956struct mlx5_ifc_rdma_page_fault_event_bits {
1957 u8 bytes_committed[0x20];
1958
1959 u8 r_key[0x20];
1960
Matan Barakb4ff3a32016-02-09 14:57:42 +02001961 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001962 u8 packet_len[0x10];
1963
1964 u8 rdma_op_len[0x20];
1965
1966 u8 rdma_va[0x40];
1967
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 rdma[0x1];
1970 u8 write[0x1];
1971 u8 requestor[0x1];
1972 u8 qp_number[0x18];
1973};
1974
1975struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1976 u8 bytes_committed[0x20];
1977
Matan Barakb4ff3a32016-02-09 14:57:42 +02001978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001979 u8 wqe_index[0x10];
1980
Matan Barakb4ff3a32016-02-09 14:57:42 +02001981 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001982 u8 len[0x10];
1983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987 u8 rdma[0x1];
1988 u8 write_read[0x1];
1989 u8 requestor[0x1];
1990 u8 qpn[0x18];
1991};
1992
1993struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001994 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001995
1996 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001997 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001998
Matan Barakb4ff3a32016-02-09 14:57:42 +02001999 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002000 u8 qpn_rqn_sqn[0x18];
2001};
2002
2003struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005
Matan Barakb4ff3a32016-02-09 14:57:42 +02002006 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002007 u8 dct_number[0x18];
2008};
2009
2010struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002011 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002012
Matan Barakb4ff3a32016-02-09 14:57:42 +02002013 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002014 u8 cq_number[0x18];
2015};
2016
2017enum {
2018 MLX5_QPC_STATE_RST = 0x0,
2019 MLX5_QPC_STATE_INIT = 0x1,
2020 MLX5_QPC_STATE_RTR = 0x2,
2021 MLX5_QPC_STATE_RTS = 0x3,
2022 MLX5_QPC_STATE_SQER = 0x4,
2023 MLX5_QPC_STATE_ERR = 0x6,
2024 MLX5_QPC_STATE_SQD = 0x7,
2025 MLX5_QPC_STATE_SUSPENDED = 0x9,
2026};
2027
2028enum {
2029 MLX5_QPC_ST_RC = 0x0,
2030 MLX5_QPC_ST_UC = 0x1,
2031 MLX5_QPC_ST_UD = 0x2,
2032 MLX5_QPC_ST_XRC = 0x3,
2033 MLX5_QPC_ST_DCI = 0x5,
2034 MLX5_QPC_ST_QP0 = 0x7,
2035 MLX5_QPC_ST_QP1 = 0x8,
2036 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2037 MLX5_QPC_ST_REG_UMR = 0xc,
2038};
2039
2040enum {
2041 MLX5_QPC_PM_STATE_ARMED = 0x0,
2042 MLX5_QPC_PM_STATE_REARM = 0x1,
2043 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2044 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2045};
2046
2047enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002048 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2049};
2050
2051enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002052 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2053 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2054};
2055
2056enum {
2057 MLX5_QPC_MTU_256_BYTES = 0x1,
2058 MLX5_QPC_MTU_512_BYTES = 0x2,
2059 MLX5_QPC_MTU_1K_BYTES = 0x3,
2060 MLX5_QPC_MTU_2K_BYTES = 0x4,
2061 MLX5_QPC_MTU_4K_BYTES = 0x5,
2062 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2063};
2064
2065enum {
2066 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2067 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2068 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2069 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2070 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2071 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2072 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2073 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2074};
2075
2076enum {
2077 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2078 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2079 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2080};
2081
2082enum {
2083 MLX5_QPC_CS_RES_DISABLE = 0x0,
2084 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2085 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2086};
2087
2088struct mlx5_ifc_qpc_bits {
2089 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002090 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002092 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002093 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002094 u8 reserved_at_15[0x3];
2095 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002097 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002098
2099 u8 wq_signature[0x1];
2100 u8 block_lb_mc[0x1];
2101 u8 atomic_like_write_en[0x1];
2102 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002105 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002106 u8 pd[0x18];
2107
2108 u8 mtu[0x3];
2109 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 log_rq_size[0x4];
2112 u8 log_rq_stride[0x3];
2113 u8 no_sq[0x1];
2114 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002117 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002118
2119 u8 counter_set_id[0x8];
2120 u8 uar_page[0x18];
2121
Matan Barakb4ff3a32016-02-09 14:57:42 +02002122 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123 u8 user_index[0x18];
2124
Matan Barakb4ff3a32016-02-09 14:57:42 +02002125 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002126 u8 log_page_size[0x5];
2127 u8 remote_qpn[0x18];
2128
2129 struct mlx5_ifc_ads_bits primary_address_path;
2130
2131 struct mlx5_ifc_ads_bits secondary_address_path;
2132
2133 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002134 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 retry_count[0x3];
2138 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140 u8 fre[0x1];
2141 u8 cur_rnr_retry[0x3];
2142 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144
Matan Barakb4ff3a32016-02-09 14:57:42 +02002145 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 next_send_psn[0x18];
2149
Matan Barakb4ff3a32016-02-09 14:57:42 +02002150 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002151 u8 cqn_snd[0x18];
2152
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002153 u8 reserved_at_400[0x8];
2154 u8 deth_sqpn[0x18];
2155
2156 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157
Matan Barakb4ff3a32016-02-09 14:57:42 +02002158 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002159 u8 last_acked_psn[0x18];
2160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 ssn[0x18];
2163
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167 u8 atomic_mode[0x4];
2168 u8 rre[0x1];
2169 u8 rwe[0x1];
2170 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002173 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002174 u8 cd_slave_receive[0x1];
2175 u8 cd_slave_send[0x1];
2176 u8 cd_master[0x1];
2177
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 min_rnr_nak[0x5];
2180 u8 next_rcv_psn[0x18];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 xrcd[0x18];
2184
Matan Barakb4ff3a32016-02-09 14:57:42 +02002185 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002186 u8 cqn_rcv[0x18];
2187
2188 u8 dbr_addr[0x40];
2189
2190 u8 q_key[0x20];
2191
Matan Barakb4ff3a32016-02-09 14:57:42 +02002192 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002193 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002194 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 rmsn[0x18];
2198
2199 u8 hw_sq_wqebb_counter[0x10];
2200 u8 sw_sq_wqebb_counter[0x10];
2201
2202 u8 hw_rq_counter[0x20];
2203
2204 u8 sw_rq_counter[0x20];
2205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207
Matan Barakb4ff3a32016-02-09 14:57:42 +02002208 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002209 u8 cgs[0x1];
2210 u8 cs_req[0x8];
2211 u8 cs_res[0x8];
2212
2213 u8 dc_access_key[0x40];
2214
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216};
2217
2218struct mlx5_ifc_roce_addr_layout_bits {
2219 u8 source_l3_address[16][0x8];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222 u8 vlan_valid[0x1];
2223 u8 vlan_id[0xc];
2224 u8 source_mac_47_32[0x10];
2225
2226 u8 source_mac_31_0[0x20];
2227
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229 u8 roce_l3_type[0x4];
2230 u8 roce_version[0x8];
2231
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233};
2234
2235union mlx5_ifc_hca_cap_union_bits {
2236 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2237 struct mlx5_ifc_odp_cap_bits odp_cap;
2238 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2239 struct mlx5_ifc_roce_cap_bits roce_cap;
2240 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2241 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002242 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002243 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002244 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002245 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002246 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248};
2249
2250enum {
2251 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2252 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2253 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002254 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002255 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2256 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002257 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002258};
2259
2260struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002261 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002262
2263 u8 group_id[0x20];
2264
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266 u8 flow_tag[0x18];
2267
Matan Barakb4ff3a32016-02-09 14:57:42 +02002268 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002269 u8 action[0x10];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 destination_list_size[0x18];
2273
Amir Vadai9dc0b282016-05-13 12:55:39 +00002274 u8 reserved_at_a0[0x8];
2275 u8 flow_counter_list_size[0x18];
2276
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002277 u8 encap_id[0x20];
2278
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002279 u8 modify_header_id[0x20];
2280
2281 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282
2283 struct mlx5_ifc_fte_match_param_bits match_value;
2284
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286
Amir Vadai9dc0b282016-05-13 12:55:39 +00002287 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288};
2289
2290enum {
2291 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2292 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2293};
2294
2295struct mlx5_ifc_xrc_srqc_bits {
2296 u8 state[0x4];
2297 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002299
2300 u8 wq_signature[0x1];
2301 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002302 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002303 u8 rlky[0x1];
2304 u8 basic_cyclic_rcv_wqe[0x1];
2305 u8 log_rq_stride[0x3];
2306 u8 xrcd[0x18];
2307
2308 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002309 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002310 u8 cqn[0x18];
2311
Matan Barakb4ff3a32016-02-09 14:57:42 +02002312 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313
2314 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316 u8 log_page_size[0x6];
2317 u8 user_index[0x18];
2318
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322 u8 pd[0x18];
2323
2324 u8 lwm[0x10];
2325 u8 wqe_cnt[0x10];
2326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328
2329 u8 db_record_addr_h[0x20];
2330
2331 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002332 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002333
Matan Barakb4ff3a32016-02-09 14:57:42 +02002334 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002335};
2336
2337struct mlx5_ifc_traffic_counter_bits {
2338 u8 packets[0x40];
2339
2340 u8 octets[0x40];
2341};
2342
2343struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002344 u8 strict_lag_tx_port_affinity[0x1];
2345 u8 reserved_at_1[0x3];
2346 u8 lag_tx_port_affinity[0x04];
2347
2348 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002349 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 transport_domain[0x18];
2356
Erez Shitrit500a3d02017-04-13 06:36:51 +03002357 u8 reserved_at_140[0x8];
2358 u8 underlay_qpn[0x18];
2359 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360};
2361
2362enum {
2363 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2364 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2365};
2366
2367enum {
2368 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2369 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2370};
2371
2372enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002373 MLX5_RX_HASH_FN_NONE = 0x0,
2374 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2375 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002376};
2377
2378enum {
2379 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2380 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2381};
2382
2383struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
2386 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002387 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392 u8 lro_timeout_period_usecs[0x10];
2393 u8 lro_enable_mask[0x4];
2394 u8 lro_max_ip_payload_size[0x8];
2395
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399 u8 inline_rqn[0x18];
2400
2401 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405 u8 indirect_table[0x18];
2406
2407 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 self_lb_block[0x2];
2410 u8 transport_domain[0x18];
2411
2412 u8 rx_hash_toeplitz_key[10][0x20];
2413
2414 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2415
2416 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419};
2420
2421enum {
2422 MLX5_SRQC_STATE_GOOD = 0x0,
2423 MLX5_SRQC_STATE_ERROR = 0x1,
2424};
2425
2426struct mlx5_ifc_srqc_bits {
2427 u8 state[0x4];
2428 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002429 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002430
2431 u8 wq_signature[0x1];
2432 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002433 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002434 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002435 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002436 u8 log_rq_stride[0x3];
2437 u8 xrcd[0x18];
2438
2439 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 cqn[0x18];
2442
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444
Matan Barakb4ff3a32016-02-09 14:57:42 +02002445 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002447 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002448
Matan Barakb4ff3a32016-02-09 14:57:42 +02002449 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452 u8 pd[0x18];
2453
2454 u8 lwm[0x10];
2455 u8 wqe_cnt[0x10];
2456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002459 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462};
2463
2464enum {
2465 MLX5_SQC_STATE_RST = 0x0,
2466 MLX5_SQC_STATE_RDY = 0x1,
2467 MLX5_SQC_STATE_ERR = 0x3,
2468};
2469
2470struct mlx5_ifc_sqc_bits {
2471 u8 rlky[0x1];
2472 u8 cd_master[0x1];
2473 u8 fre[0x1];
2474 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002475 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002476 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002477 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002478 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002479 u8 allow_swp[0x1];
2480 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002481
Matan Barakb4ff3a32016-02-09 14:57:42 +02002482 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483 u8 user_index[0x18];
2484
Matan Barakb4ff3a32016-02-09 14:57:42 +02002485 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486 u8 cqn[0x18];
2487
Saeed Mahameed74862162016-06-09 15:11:34 +03002488 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489
Saeed Mahameed74862162016-06-09 15:11:34 +03002490 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493
Matan Barakb4ff3a32016-02-09 14:57:42 +02002494 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497 u8 tis_num_0[0x18];
2498
2499 struct mlx5_ifc_wq_bits wq;
2500};
2501
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002502enum {
2503 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2504 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2505 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2506 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2507};
2508
2509struct mlx5_ifc_scheduling_context_bits {
2510 u8 element_type[0x8];
2511 u8 reserved_at_8[0x18];
2512
2513 u8 element_attributes[0x20];
2514
2515 u8 parent_element_id[0x20];
2516
2517 u8 reserved_at_60[0x40];
2518
2519 u8 bw_share[0x20];
2520
2521 u8 max_average_bw[0x20];
2522
2523 u8 reserved_at_e0[0x120];
2524};
2525
Saeed Mahameede2816822015-05-28 22:28:40 +03002526struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002527 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528
Matan Barakb4ff3a32016-02-09 14:57:42 +02002529 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530 u8 rqt_max_size[0x10];
2531
Matan Barakb4ff3a32016-02-09 14:57:42 +02002532 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533 u8 rqt_actual_size[0x10];
2534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536
2537 struct mlx5_ifc_rq_num_bits rq_num[0];
2538};
2539
2540enum {
2541 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2542 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2543};
2544
2545enum {
2546 MLX5_RQC_STATE_RST = 0x0,
2547 MLX5_RQC_STATE_RDY = 0x1,
2548 MLX5_RQC_STATE_ERR = 0x3,
2549};
2550
2551struct mlx5_ifc_rqc_bits {
2552 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002553 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002554 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555 u8 vsd[0x1];
2556 u8 mem_rq_type[0x4];
2557 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
Matan Barakb4ff3a32016-02-09 14:57:42 +02002562 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563 u8 user_index[0x18];
2564
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566 u8 cqn[0x18];
2567
2568 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570
Matan Barakb4ff3a32016-02-09 14:57:42 +02002571 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 rmpn[0x18];
2573
Matan Barakb4ff3a32016-02-09 14:57:42 +02002574 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002575
2576 struct mlx5_ifc_wq_bits wq;
2577};
2578
2579enum {
2580 MLX5_RMPC_STATE_RDY = 0x1,
2581 MLX5_RMPC_STATE_ERR = 0x3,
2582};
2583
2584struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002585 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002586 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002587 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002588
2589 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002590 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002591
Matan Barakb4ff3a32016-02-09 14:57:42 +02002592 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002593
2594 struct mlx5_ifc_wq_bits wq;
2595};
2596
Saeed Mahameede2816822015-05-28 22:28:40 +03002597struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002598 u8 reserved_at_0[0x5];
2599 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002600 u8 reserved_at_8[0x15];
2601 u8 disable_mc_local_lb[0x1];
2602 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002603 u8 roce_en[0x1];
2604
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002605 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002607 u8 event_on_mtu[0x1];
2608 u8 event_on_promisc_change[0x1];
2609 u8 event_on_vlan_change[0x1];
2610 u8 event_on_mc_address_change[0x1];
2611 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002614
2615 u8 mtu[0x10];
2616
Achiad Shochat9efa7522015-12-23 18:47:20 +02002617 u8 system_image_guid[0x40];
2618 u8 port_guid[0x40];
2619 u8 node_guid[0x40];
2620
Matan Barakb4ff3a32016-02-09 14:57:42 +02002621 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002622 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002624
2625 u8 promisc_uc[0x1];
2626 u8 promisc_mc[0x1];
2627 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002630 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002631 u8 allowed_list_size[0xc];
2632
2633 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2634
Matan Barakb4ff3a32016-02-09 14:57:42 +02002635 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002636
2637 u8 current_uc_mac_address[0][0x40];
2638};
2639
2640enum {
2641 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2642 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2643 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002644 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002645};
2646
2647struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002648 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002649 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002650 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002651 u8 small_fence_on_rdma_read_response[0x1];
2652 u8 umr_en[0x1];
2653 u8 a[0x1];
2654 u8 rw[0x1];
2655 u8 rr[0x1];
2656 u8 lw[0x1];
2657 u8 lr[0x1];
2658 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660
2661 u8 qpn[0x18];
2662 u8 mkey_7_0[0x8];
2663
Matan Barakb4ff3a32016-02-09 14:57:42 +02002664 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
2666 u8 length64[0x1];
2667 u8 bsf_en[0x1];
2668 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002669 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002670 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672 u8 en_rinval[0x1];
2673 u8 pd[0x18];
2674
2675 u8 start_addr[0x40];
2676
2677 u8 len[0x40];
2678
2679 u8 bsf_octword_size[0x20];
2680
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682
2683 u8 translations_octword_size[0x20];
2684
Matan Barakb4ff3a32016-02-09 14:57:42 +02002685 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002686 u8 log_page_size[0x5];
2687
Matan Barakb4ff3a32016-02-09 14:57:42 +02002688 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002689};
2690
2691struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002693 u8 pkey[0x10];
2694};
2695
2696struct mlx5_ifc_array128_auto_bits {
2697 u8 array128_auto[16][0x8];
2698};
2699
2700struct mlx5_ifc_hca_vport_context_bits {
2701 u8 field_select[0x20];
2702
Matan Barakb4ff3a32016-02-09 14:57:42 +02002703 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704
2705 u8 sm_virt_aware[0x1];
2706 u8 has_smi[0x1];
2707 u8 has_raw[0x1];
2708 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002710 u8 port_physical_state[0x4];
2711 u8 vport_state_policy[0x4];
2712 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002713 u8 vport_state[0x4];
2714
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002716
2717 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718
2719 u8 port_guid[0x40];
2720
2721 u8 node_guid[0x40];
2722
2723 u8 cap_mask1[0x20];
2724
2725 u8 cap_mask1_field_select[0x20];
2726
2727 u8 cap_mask2[0x20];
2728
2729 u8 cap_mask2_field_select[0x20];
2730
Matan Barakb4ff3a32016-02-09 14:57:42 +02002731 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002732
2733 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002734 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002735 u8 init_type_reply[0x4];
2736 u8 lmc[0x3];
2737 u8 subnet_timeout[0x5];
2738
2739 u8 sm_lid[0x10];
2740 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
2743 u8 qkey_violation_counter[0x10];
2744 u8 pkey_violation_counter[0x10];
2745
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747};
2748
Saeed Mahameedd6666752015-12-01 18:03:22 +02002749struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002751 u8 vport_svlan_strip[0x1];
2752 u8 vport_cvlan_strip[0x1];
2753 u8 vport_svlan_insert[0x1];
2754 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002758
2759 u8 svlan_cfi[0x1];
2760 u8 svlan_pcp[0x3];
2761 u8 svlan_id[0xc];
2762 u8 cvlan_cfi[0x1];
2763 u8 cvlan_pcp[0x3];
2764 u8 cvlan_id[0xc];
2765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002767};
2768
Saeed Mahameede2816822015-05-28 22:28:40 +03002769enum {
2770 MLX5_EQC_STATUS_OK = 0x0,
2771 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2772};
2773
2774enum {
2775 MLX5_EQC_ST_ARMED = 0x9,
2776 MLX5_EQC_ST_FIRED = 0xa,
2777};
2778
2779struct mlx5_ifc_eqc_bits {
2780 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782 u8 ec[0x1];
2783 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002784 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002785 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795 u8 log_eq_size[0x5];
2796 u8 uar_page[0x18];
2797
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799
Matan Barakb4ff3a32016-02-09 14:57:42 +02002800 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002801 u8 intr[0x8];
2802
Matan Barakb4ff3a32016-02-09 14:57:42 +02002803 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002804 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 consumer_counter[0x18];
2811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 producer_counter[0x18];
2814
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002816};
2817
2818enum {
2819 MLX5_DCTC_STATE_ACTIVE = 0x0,
2820 MLX5_DCTC_STATE_DRAINING = 0x1,
2821 MLX5_DCTC_STATE_DRAINED = 0x2,
2822};
2823
2824enum {
2825 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2826 MLX5_DCTC_CS_RES_NA = 0x1,
2827 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2828};
2829
2830enum {
2831 MLX5_DCTC_MTU_256_BYTES = 0x1,
2832 MLX5_DCTC_MTU_512_BYTES = 0x2,
2833 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2834 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2835 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2836};
2837
2838struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844 u8 user_index[0x18];
2845
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 cqn[0x18];
2848
2849 u8 counter_set_id[0x8];
2850 u8 atomic_mode[0x4];
2851 u8 rre[0x1];
2852 u8 rwe[0x1];
2853 u8 rae[0x1];
2854 u8 atomic_like_write_en[0x1];
2855 u8 latency_sensitive[0x1];
2856 u8 rlky[0x1];
2857 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859
Matan Barakb4ff3a32016-02-09 14:57:42 +02002860 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002861 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002862 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002863 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002867 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002868
Matan Barakb4ff3a32016-02-09 14:57:42 +02002869 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002870 u8 pd[0x18];
2871
2872 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002873 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874 u8 flow_label[0x14];
2875
2876 u8 dc_access_key[0x40];
2877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 mtu[0x3];
2880 u8 port[0x8];
2881 u8 pkey_index[0x10];
2882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886 u8 hop_limit[0x8];
2887
2888 u8 dc_access_key_violation_count[0x20];
2889
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 dei_cfi[0x1];
2892 u8 eth_prio[0x3];
2893 u8 ecn[0x2];
2894 u8 dscp[0x6];
2895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897};
2898
2899enum {
2900 MLX5_CQC_STATUS_OK = 0x0,
2901 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2902 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2903};
2904
2905enum {
2906 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2907 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2908};
2909
2910enum {
2911 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2912 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2913 MLX5_CQC_ST_FIRED = 0xa,
2914};
2915
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002916enum {
2917 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2918 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002919 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002920};
2921
Saeed Mahameede2816822015-05-28 22:28:40 +03002922struct mlx5_ifc_cqc_bits {
2923 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 cqe_sz[0x3];
2926 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 scqe_break_moderation_en[0x1];
2929 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002930 u8 cq_period_mode[0x2];
2931 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 mini_cqe_res_format[0x2];
2933 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943 u8 log_cq_size[0x5];
2944 u8 uar_page[0x18];
2945
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947 u8 cq_period[0xc];
2948 u8 cq_max_count[0x10];
2949
Matan Barakb4ff3a32016-02-09 14:57:42 +02002950 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002951 u8 c_eqn[0x8];
2952
Matan Barakb4ff3a32016-02-09 14:57:42 +02002953 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002954 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002956
Matan Barakb4ff3a32016-02-09 14:57:42 +02002957 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960 u8 last_notified_index[0x18];
2961
Matan Barakb4ff3a32016-02-09 14:57:42 +02002962 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002963 u8 last_solicit_index[0x18];
2964
Matan Barakb4ff3a32016-02-09 14:57:42 +02002965 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002966 u8 consumer_counter[0x18];
2967
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969 u8 producer_counter[0x18];
2970
Matan Barakb4ff3a32016-02-09 14:57:42 +02002971 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002972
2973 u8 dbr_addr[0x40];
2974};
2975
2976union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2977 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2978 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2979 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002980 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002981};
2982
2983struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002984 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002985
Matan Barakb4ff3a32016-02-09 14:57:42 +02002986 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002987 u8 ieee_vendor_id[0x18];
2988
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990 u8 vsd_vendor_id[0x10];
2991
2992 u8 vsd[208][0x8];
2993
2994 u8 vsd_contd_psid[16][0x8];
2995};
2996
Saeed Mahameed74862162016-06-09 15:11:34 +03002997enum {
2998 MLX5_XRQC_STATE_GOOD = 0x0,
2999 MLX5_XRQC_STATE_ERROR = 0x1,
3000};
3001
3002enum {
3003 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3004 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3005};
3006
3007enum {
3008 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3009};
3010
3011struct mlx5_ifc_tag_matching_topology_context_bits {
3012 u8 log_matching_list_sz[0x4];
3013 u8 reserved_at_4[0xc];
3014 u8 append_next_index[0x10];
3015
3016 u8 sw_phase_cnt[0x10];
3017 u8 hw_phase_cnt[0x10];
3018
3019 u8 reserved_at_40[0x40];
3020};
3021
3022struct mlx5_ifc_xrqc_bits {
3023 u8 state[0x4];
3024 u8 rlkey[0x1];
3025 u8 reserved_at_5[0xf];
3026 u8 topology[0x4];
3027 u8 reserved_at_18[0x4];
3028 u8 offload[0x4];
3029
3030 u8 reserved_at_20[0x8];
3031 u8 user_index[0x18];
3032
3033 u8 reserved_at_40[0x8];
3034 u8 cqn[0x18];
3035
3036 u8 reserved_at_60[0xa0];
3037
3038 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3039
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003040 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003041
3042 struct mlx5_ifc_wq_bits wq;
3043};
3044
Saeed Mahameede2816822015-05-28 22:28:40 +03003045union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3046 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3047 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003048 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003049};
3050
3051union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3052 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3053 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3054 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056};
3057
3058union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3059 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3060 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3061 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3062 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3063 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3064 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3065 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003066 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003067 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003068 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003069 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003070};
3071
Gal Pressman8ed1a632016-11-17 13:46:01 +02003072union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3073 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3074 u8 reserved_at_0[0x7c0];
3075};
3076
Saeed Mahameede2816822015-05-28 22:28:40 +03003077union mlx5_ifc_event_auto_bits {
3078 struct mlx5_ifc_comp_event_bits comp_event;
3079 struct mlx5_ifc_dct_events_bits dct_events;
3080 struct mlx5_ifc_qp_events_bits qp_events;
3081 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3082 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3083 struct mlx5_ifc_cq_error_bits cq_error;
3084 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3085 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3086 struct mlx5_ifc_gpio_event_bits gpio_event;
3087 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3088 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3089 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003090 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003091};
3092
3093struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095
3096 u8 assert_existptr[0x20];
3097
3098 u8 assert_callra[0x20];
3099
Matan Barakb4ff3a32016-02-09 14:57:42 +02003100 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003101
3102 u8 fw_version[0x20];
3103
3104 u8 hw_id[0x20];
3105
Matan Barakb4ff3a32016-02-09 14:57:42 +02003106 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003107
3108 u8 irisc_index[0x8];
3109 u8 synd[0x8];
3110 u8 ext_synd[0x10];
3111};
3112
3113struct mlx5_ifc_register_loopback_control_bits {
3114 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003115 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003116 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003117 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003118
Matan Barakb4ff3a32016-02-09 14:57:42 +02003119 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003120};
3121
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003122struct mlx5_ifc_vport_tc_element_bits {
3123 u8 traffic_class[0x4];
3124 u8 reserved_at_4[0xc];
3125 u8 vport_number[0x10];
3126};
3127
3128struct mlx5_ifc_vport_element_bits {
3129 u8 reserved_at_0[0x10];
3130 u8 vport_number[0x10];
3131};
3132
3133enum {
3134 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3135 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3136 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3137};
3138
3139struct mlx5_ifc_tsar_element_bits {
3140 u8 reserved_at_0[0x8];
3141 u8 tsar_type[0x8];
3142 u8 reserved_at_10[0x10];
3143};
3144
Majd Dibbiny8812c242017-02-09 14:20:12 +02003145enum {
3146 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3147 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3148};
3149
Saeed Mahameede2816822015-05-28 22:28:40 +03003150struct mlx5_ifc_teardown_hca_out_bits {
3151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003153
3154 u8 syndrome[0x20];
3155
Majd Dibbiny8812c242017-02-09 14:20:12 +02003156 u8 reserved_at_40[0x3f];
3157
3158 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159};
3160
3161enum {
3162 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003163 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003164};
3165
3166struct mlx5_ifc_teardown_hca_in_bits {
3167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171 u8 op_mod[0x10];
3172
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174 u8 profile[0x10];
3175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177};
3178
3179struct mlx5_ifc_sqerr2rts_qp_out_bits {
3180 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182
3183 u8 syndrome[0x20];
3184
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186};
3187
3188struct mlx5_ifc_sqerr2rts_qp_in_bits {
3189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191
Matan Barakb4ff3a32016-02-09 14:57:42 +02003192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003193 u8 op_mod[0x10];
3194
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196 u8 qpn[0x18];
3197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199
3200 u8 opt_param_mask[0x20];
3201
Matan Barakb4ff3a32016-02-09 14:57:42 +02003202 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003203
3204 struct mlx5_ifc_qpc_bits qpc;
3205
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207};
3208
3209struct mlx5_ifc_sqd2rts_qp_out_bits {
3210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
3213 u8 syndrome[0x20];
3214
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216};
3217
3218struct mlx5_ifc_sqd2rts_qp_in_bits {
3219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221
Matan Barakb4ff3a32016-02-09 14:57:42 +02003222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003223 u8 op_mod[0x10];
3224
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226 u8 qpn[0x18];
3227
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229
3230 u8 opt_param_mask[0x20];
3231
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233
3234 struct mlx5_ifc_qpc_bits qpc;
3235
Matan Barakb4ff3a32016-02-09 14:57:42 +02003236 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237};
3238
3239struct mlx5_ifc_set_roce_address_out_bits {
3240 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242
3243 u8 syndrome[0x20];
3244
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246};
3247
3248struct mlx5_ifc_set_roce_address_in_bits {
3249 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003250 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253 u8 op_mod[0x10];
3254
3255 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257
Matan Barakb4ff3a32016-02-09 14:57:42 +02003258 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003259
3260 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3261};
3262
3263struct mlx5_ifc_set_mad_demux_out_bits {
3264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266
3267 u8 syndrome[0x20];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270};
3271
3272enum {
3273 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3274 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3275};
3276
3277struct mlx5_ifc_set_mad_demux_in_bits {
3278 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280
Matan Barakb4ff3a32016-02-09 14:57:42 +02003281 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003282 u8 op_mod[0x10];
3283
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289};
3290
3291struct mlx5_ifc_set_l2_table_entry_out_bits {
3292 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294
3295 u8 syndrome[0x20];
3296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298};
3299
3300struct mlx5_ifc_set_l2_table_entry_in_bits {
3301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305 u8 op_mod[0x10];
3306
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308
Matan Barakb4ff3a32016-02-09 14:57:42 +02003309 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003310 u8 table_index[0x18];
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315 u8 vlan_valid[0x1];
3316 u8 vlan[0xc];
3317
3318 struct mlx5_ifc_mac_address_layout_bits mac_address;
3319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321};
3322
3323struct mlx5_ifc_set_issi_out_bits {
3324 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326
3327 u8 syndrome[0x20];
3328
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330};
3331
3332struct mlx5_ifc_set_issi_in_bits {
3333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003337 u8 op_mod[0x10];
3338
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003340 u8 current_issi[0x10];
3341
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343};
3344
3345struct mlx5_ifc_set_hca_cap_out_bits {
3346 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348
3349 u8 syndrome[0x20];
3350
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003352};
3353
3354struct mlx5_ifc_set_hca_cap_in_bits {
3355 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003359 u8 op_mod[0x10];
3360
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003362
Saeed Mahameede2816822015-05-28 22:28:40 +03003363 union mlx5_ifc_hca_cap_union_bits capability;
3364};
3365
Maor Gottlieb26a81452015-12-10 17:12:39 +02003366enum {
3367 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3368 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3369 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3370 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3371};
3372
Saeed Mahameede2816822015-05-28 22:28:40 +03003373struct mlx5_ifc_set_fte_out_bits {
3374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003375 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003376
3377 u8 syndrome[0x20];
3378
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380};
3381
3382struct mlx5_ifc_set_fte_in_bits {
3383 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387 u8 op_mod[0x10];
3388
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003389 u8 other_vport[0x1];
3390 u8 reserved_at_41[0xf];
3391 u8 vport_number[0x10];
3392
3393 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003396 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003397
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399 u8 table_id[0x18];
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003402 u8 modify_enable_mask[0x8];
3403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405
3406 u8 flow_index[0x20];
3407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409
3410 struct mlx5_ifc_flow_context_bits flow_context;
3411};
3412
3413struct mlx5_ifc_rts2rts_qp_out_bits {
3414 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416
3417 u8 syndrome[0x20];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420};
3421
3422struct mlx5_ifc_rts2rts_qp_in_bits {
3423 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425
Matan Barakb4ff3a32016-02-09 14:57:42 +02003426 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003427 u8 op_mod[0x10];
3428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430 u8 qpn[0x18];
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433
3434 u8 opt_param_mask[0x20];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
3438 struct mlx5_ifc_qpc_bits qpc;
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441};
3442
3443struct mlx5_ifc_rtr2rts_qp_out_bits {
3444 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446
3447 u8 syndrome[0x20];
3448
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450};
3451
3452struct mlx5_ifc_rtr2rts_qp_in_bits {
3453 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457 u8 op_mod[0x10];
3458
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460 u8 qpn[0x18];
3461
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463
3464 u8 opt_param_mask[0x20];
3465
Matan Barakb4ff3a32016-02-09 14:57:42 +02003466 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003467
3468 struct mlx5_ifc_qpc_bits qpc;
3469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471};
3472
3473struct mlx5_ifc_rst2init_qp_out_bits {
3474 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476
3477 u8 syndrome[0x20];
3478
Matan Barakb4ff3a32016-02-09 14:57:42 +02003479 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003480};
3481
3482struct mlx5_ifc_rst2init_qp_in_bits {
3483 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487 u8 op_mod[0x10];
3488
Matan Barakb4ff3a32016-02-09 14:57:42 +02003489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003490 u8 qpn[0x18];
3491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493
3494 u8 opt_param_mask[0x20];
3495
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
3498 struct mlx5_ifc_qpc_bits qpc;
3499
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501};
3502
Saeed Mahameed74862162016-06-09 15:11:34 +03003503struct mlx5_ifc_query_xrq_out_bits {
3504 u8 status[0x8];
3505 u8 reserved_at_8[0x18];
3506
3507 u8 syndrome[0x20];
3508
3509 u8 reserved_at_40[0x40];
3510
3511 struct mlx5_ifc_xrqc_bits xrq_context;
3512};
3513
3514struct mlx5_ifc_query_xrq_in_bits {
3515 u8 opcode[0x10];
3516 u8 reserved_at_10[0x10];
3517
3518 u8 reserved_at_20[0x10];
3519 u8 op_mod[0x10];
3520
3521 u8 reserved_at_40[0x8];
3522 u8 xrqn[0x18];
3523
3524 u8 reserved_at_60[0x20];
3525};
3526
Saeed Mahameede2816822015-05-28 22:28:40 +03003527struct mlx5_ifc_query_xrc_srq_out_bits {
3528 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530
3531 u8 syndrome[0x20];
3532
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534
3535 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3536
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538
3539 u8 pas[0][0x40];
3540};
3541
3542struct mlx5_ifc_query_xrc_srq_in_bits {
3543 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003544 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003545
Matan Barakb4ff3a32016-02-09 14:57:42 +02003546 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003547 u8 op_mod[0x10];
3548
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550 u8 xrc_srqn[0x18];
3551
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553};
3554
3555enum {
3556 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3557 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3558};
3559
3560struct mlx5_ifc_query_vport_state_out_bits {
3561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003563
3564 u8 syndrome[0x20];
3565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567
Matan Barakb4ff3a32016-02-09 14:57:42 +02003568 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003569 u8 admin_state[0x4];
3570 u8 state[0x4];
3571};
3572
3573enum {
3574 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003575 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003576};
3577
3578struct mlx5_ifc_query_vport_state_in_bits {
3579 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003581
Matan Barakb4ff3a32016-02-09 14:57:42 +02003582 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003583 u8 op_mod[0x10];
3584
3585 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587 u8 vport_number[0x10];
3588
Matan Barakb4ff3a32016-02-09 14:57:42 +02003589 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003590};
3591
3592struct mlx5_ifc_query_vport_counter_out_bits {
3593 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595
3596 u8 syndrome[0x20];
3597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
3600 struct mlx5_ifc_traffic_counter_bits received_errors;
3601
3602 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3603
3604 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3605
3606 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3607
3608 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3609
3610 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3611
3612 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3613
3614 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3615
3616 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3617
3618 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3619
3620 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3621
3622 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3623
Matan Barakb4ff3a32016-02-09 14:57:42 +02003624 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003625};
3626
3627enum {
3628 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3629};
3630
3631struct mlx5_ifc_query_vport_counter_in_bits {
3632 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636 u8 op_mod[0x10];
3637
3638 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003639 u8 reserved_at_41[0xb];
3640 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641 u8 vport_number[0x10];
3642
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
3645 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647
Matan Barakb4ff3a32016-02-09 14:57:42 +02003648 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003649};
3650
3651struct mlx5_ifc_query_tis_out_bits {
3652 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003653 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003654
3655 u8 syndrome[0x20];
3656
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658
3659 struct mlx5_ifc_tisc_bits tis_context;
3660};
3661
3662struct mlx5_ifc_query_tis_in_bits {
3663 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667 u8 op_mod[0x10];
3668
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670 u8 tisn[0x18];
3671
Matan Barakb4ff3a32016-02-09 14:57:42 +02003672 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673};
3674
3675struct mlx5_ifc_query_tir_out_bits {
3676 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678
3679 u8 syndrome[0x20];
3680
Matan Barakb4ff3a32016-02-09 14:57:42 +02003681 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003682
3683 struct mlx5_ifc_tirc_bits tir_context;
3684};
3685
3686struct mlx5_ifc_query_tir_in_bits {
3687 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691 u8 op_mod[0x10];
3692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694 u8 tirn[0x18];
3695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697};
3698
3699struct mlx5_ifc_query_srq_out_bits {
3700 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702
3703 u8 syndrome[0x20];
3704
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
3707 struct mlx5_ifc_srqc_bits srq_context_entry;
3708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710
3711 u8 pas[0][0x40];
3712};
3713
3714struct mlx5_ifc_query_srq_in_bits {
3715 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719 u8 op_mod[0x10];
3720
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722 u8 srqn[0x18];
3723
Matan Barakb4ff3a32016-02-09 14:57:42 +02003724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003725};
3726
3727struct mlx5_ifc_query_sq_out_bits {
3728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
3731 u8 syndrome[0x20];
3732
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 struct mlx5_ifc_sqc_bits sq_context;
3736};
3737
3738struct mlx5_ifc_query_sq_in_bits {
3739 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003740 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003741
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743 u8 op_mod[0x10];
3744
Matan Barakb4ff3a32016-02-09 14:57:42 +02003745 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003746 u8 sqn[0x18];
3747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749};
3750
3751struct mlx5_ifc_query_special_contexts_out_bits {
3752 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754
3755 u8 syndrome[0x20];
3756
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003757 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003758
3759 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003760
3761 u8 null_mkey[0x20];
3762
3763 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003764};
3765
3766struct mlx5_ifc_query_special_contexts_in_bits {
3767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771 u8 op_mod[0x10];
3772
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774};
3775
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003776struct mlx5_ifc_query_scheduling_element_out_bits {
3777 u8 opcode[0x10];
3778 u8 reserved_at_10[0x10];
3779
3780 u8 reserved_at_20[0x10];
3781 u8 op_mod[0x10];
3782
3783 u8 reserved_at_40[0xc0];
3784
3785 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3786
3787 u8 reserved_at_300[0x100];
3788};
3789
3790enum {
3791 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3792};
3793
3794struct mlx5_ifc_query_scheduling_element_in_bits {
3795 u8 opcode[0x10];
3796 u8 reserved_at_10[0x10];
3797
3798 u8 reserved_at_20[0x10];
3799 u8 op_mod[0x10];
3800
3801 u8 scheduling_hierarchy[0x8];
3802 u8 reserved_at_48[0x18];
3803
3804 u8 scheduling_element_id[0x20];
3805
3806 u8 reserved_at_80[0x180];
3807};
3808
Saeed Mahameede2816822015-05-28 22:28:40 +03003809struct mlx5_ifc_query_rqt_out_bits {
3810 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003811 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003812
3813 u8 syndrome[0x20];
3814
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816
3817 struct mlx5_ifc_rqtc_bits rqt_context;
3818};
3819
3820struct mlx5_ifc_query_rqt_in_bits {
3821 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825 u8 op_mod[0x10];
3826
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828 u8 rqtn[0x18];
3829
Matan Barakb4ff3a32016-02-09 14:57:42 +02003830 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003831};
3832
3833struct mlx5_ifc_query_rq_out_bits {
3834 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003835 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836
3837 u8 syndrome[0x20];
3838
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
3841 struct mlx5_ifc_rqc_bits rq_context;
3842};
3843
3844struct mlx5_ifc_query_rq_in_bits {
3845 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847
Matan Barakb4ff3a32016-02-09 14:57:42 +02003848 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003849 u8 op_mod[0x10];
3850
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852 u8 rqn[0x18];
3853
Matan Barakb4ff3a32016-02-09 14:57:42 +02003854 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003855};
3856
3857struct mlx5_ifc_query_roce_address_out_bits {
3858 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860
3861 u8 syndrome[0x20];
3862
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
3865 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3866};
3867
3868struct mlx5_ifc_query_roce_address_in_bits {
3869 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873 u8 op_mod[0x10];
3874
3875 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879};
3880
3881struct mlx5_ifc_query_rmp_out_bits {
3882 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884
3885 u8 syndrome[0x20];
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 struct mlx5_ifc_rmpc_bits rmp_context;
3890};
3891
3892struct mlx5_ifc_query_rmp_in_bits {
3893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897 u8 op_mod[0x10];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900 u8 rmpn[0x18];
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903};
3904
3905struct mlx5_ifc_query_qp_out_bits {
3906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908
3909 u8 syndrome[0x20];
3910
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 u8 opt_param_mask[0x20];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 struct mlx5_ifc_qpc_bits qpc;
3918
Matan Barakb4ff3a32016-02-09 14:57:42 +02003919 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920
3921 u8 pas[0][0x40];
3922};
3923
3924struct mlx5_ifc_query_qp_in_bits {
3925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929 u8 op_mod[0x10];
3930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932 u8 qpn[0x18];
3933
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935};
3936
3937struct mlx5_ifc_query_q_counter_out_bits {
3938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940
3941 u8 syndrome[0x20];
3942
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944
3945 u8 rx_write_requests[0x20];
3946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
3949 u8 rx_read_requests[0x20];
3950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952
3953 u8 rx_atomic_requests[0x20];
3954
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956
3957 u8 rx_dct_connect[0x20];
3958
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960
3961 u8 out_of_buffer[0x20];
3962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964
3965 u8 out_of_sequence[0x20];
3966
Saeed Mahameed74862162016-06-09 15:11:34 +03003967 u8 reserved_at_1e0[0x20];
3968
3969 u8 duplicate_request[0x20];
3970
3971 u8 reserved_at_220[0x20];
3972
3973 u8 rnr_nak_retry_err[0x20];
3974
3975 u8 reserved_at_260[0x20];
3976
3977 u8 packet_seq_err[0x20];
3978
3979 u8 reserved_at_2a0[0x20];
3980
3981 u8 implied_nak_seq_err[0x20];
3982
3983 u8 reserved_at_2e0[0x20];
3984
3985 u8 local_ack_timeout_err[0x20];
3986
Parav Pandit58dcb602017-06-19 07:19:37 +03003987 u8 reserved_at_320[0xa0];
3988
3989 u8 resp_local_length_error[0x20];
3990
3991 u8 req_local_length_error[0x20];
3992
3993 u8 resp_local_qp_error[0x20];
3994
3995 u8 local_operation_error[0x20];
3996
3997 u8 resp_local_protection[0x20];
3998
3999 u8 req_local_protection[0x20];
4000
4001 u8 resp_cqe_error[0x20];
4002
4003 u8 req_cqe_error[0x20];
4004
4005 u8 req_mw_binding[0x20];
4006
4007 u8 req_bad_response[0x20];
4008
4009 u8 req_remote_invalid_request[0x20];
4010
4011 u8 resp_remote_invalid_request[0x20];
4012
4013 u8 req_remote_access_errors[0x20];
4014
4015 u8 resp_remote_access_errors[0x20];
4016
4017 u8 req_remote_operation_errors[0x20];
4018
4019 u8 req_transport_retries_exceeded[0x20];
4020
4021 u8 cq_overflow[0x20];
4022
4023 u8 resp_cqe_flush_error[0x20];
4024
4025 u8 req_cqe_flush_error[0x20];
4026
4027 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004028};
4029
4030struct mlx5_ifc_query_q_counter_in_bits {
4031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033
Matan Barakb4ff3a32016-02-09 14:57:42 +02004034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004035 u8 op_mod[0x10];
4036
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
4039 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043 u8 counter_set_id[0x8];
4044};
4045
4046struct mlx5_ifc_query_pages_out_bits {
4047 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049
4050 u8 syndrome[0x20];
4051
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053 u8 function_id[0x10];
4054
4055 u8 num_pages[0x20];
4056};
4057
4058enum {
4059 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4060 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4061 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4062};
4063
4064struct mlx5_ifc_query_pages_in_bits {
4065 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069 u8 op_mod[0x10];
4070
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072 u8 function_id[0x10];
4073
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075};
4076
4077struct mlx5_ifc_query_nic_vport_context_out_bits {
4078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 u8 syndrome[0x20];
4082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
4085 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4086};
4087
4088struct mlx5_ifc_query_nic_vport_context_in_bits {
4089 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093 u8 op_mod[0x10];
4094
4095 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097 u8 vport_number[0x10];
4098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102};
4103
4104struct mlx5_ifc_query_mkey_out_bits {
4105 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107
4108 u8 syndrome[0x20];
4109
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115
4116 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4117
4118 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4119};
4120
4121struct mlx5_ifc_query_mkey_in_bits {
4122 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126 u8 op_mod[0x10];
4127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 mkey_index[0x18];
4130
4131 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133};
4134
4135struct mlx5_ifc_query_mad_demux_out_bits {
4136 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004137 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004138
4139 u8 syndrome[0x20];
4140
Matan Barakb4ff3a32016-02-09 14:57:42 +02004141 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004142
4143 u8 mad_dumux_parameters_block[0x20];
4144};
4145
4146struct mlx5_ifc_query_mad_demux_in_bits {
4147 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004148 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004149
Matan Barakb4ff3a32016-02-09 14:57:42 +02004150 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004151 u8 op_mod[0x10];
4152
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154};
4155
4156struct mlx5_ifc_query_l2_table_entry_out_bits {
4157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159
4160 u8 syndrome[0x20];
4161
Matan Barakb4ff3a32016-02-09 14:57:42 +02004162 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004163
Matan Barakb4ff3a32016-02-09 14:57:42 +02004164 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165 u8 vlan_valid[0x1];
4166 u8 vlan[0xc];
4167
4168 struct mlx5_ifc_mac_address_layout_bits mac_address;
4169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171};
4172
4173struct mlx5_ifc_query_l2_table_entry_in_bits {
4174 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178 u8 op_mod[0x10];
4179
Matan Barakb4ff3a32016-02-09 14:57:42 +02004180 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004181
Matan Barakb4ff3a32016-02-09 14:57:42 +02004182 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004183 u8 table_index[0x18];
4184
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186};
4187
4188struct mlx5_ifc_query_issi_out_bits {
4189 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 u8 syndrome[0x20];
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195 u8 current_issi[0x10];
4196
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198
Matan Barakb4ff3a32016-02-09 14:57:42 +02004199 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004200 u8 supported_issi_dw0[0x20];
4201};
4202
4203struct mlx5_ifc_query_issi_in_bits {
4204 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208 u8 op_mod[0x10];
4209
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211};
4212
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004213struct mlx5_ifc_set_driver_version_out_bits {
4214 u8 status[0x8];
4215 u8 reserved_0[0x18];
4216
4217 u8 syndrome[0x20];
4218 u8 reserved_1[0x40];
4219};
4220
4221struct mlx5_ifc_set_driver_version_in_bits {
4222 u8 opcode[0x10];
4223 u8 reserved_0[0x10];
4224
4225 u8 reserved_1[0x10];
4226 u8 op_mod[0x10];
4227
4228 u8 reserved_2[0x40];
4229 u8 driver_version[64][0x8];
4230};
4231
Saeed Mahameede2816822015-05-28 22:28:40 +03004232struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4233 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235
4236 u8 syndrome[0x20];
4237
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
4240 struct mlx5_ifc_pkey_bits pkey[0];
4241};
4242
4243struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248 u8 op_mod[0x10];
4249
4250 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004252 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253 u8 vport_number[0x10];
4254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256 u8 pkey_index[0x10];
4257};
4258
Eli Coheneff901d2016-03-11 22:58:42 +02004259enum {
4260 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4261 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4262 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4263};
4264
Saeed Mahameede2816822015-05-28 22:28:40 +03004265struct mlx5_ifc_query_hca_vport_gid_out_bits {
4266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268
4269 u8 syndrome[0x20];
4270
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272
4273 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275
4276 struct mlx5_ifc_array128_auto_bits gid[0];
4277};
4278
4279struct mlx5_ifc_query_hca_vport_gid_in_bits {
4280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284 u8 op_mod[0x10];
4285
4286 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004288 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 vport_number[0x10];
4290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292 u8 gid_index[0x10];
4293};
4294
4295struct mlx5_ifc_query_hca_vport_context_out_bits {
4296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004298
4299 u8 syndrome[0x20];
4300
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302
4303 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4304};
4305
4306struct mlx5_ifc_query_hca_vport_context_in_bits {
4307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309
Matan Barakb4ff3a32016-02-09 14:57:42 +02004310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004311 u8 op_mod[0x10];
4312
4313 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004315 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316 u8 vport_number[0x10];
4317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319};
4320
4321struct mlx5_ifc_query_hca_cap_out_bits {
4322 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324
4325 u8 syndrome[0x20];
4326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
4329 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004330};
4331
4332struct mlx5_ifc_query_hca_cap_in_bits {
4333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004335
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004337 u8 op_mod[0x10];
4338
Matan Barakb4ff3a32016-02-09 14:57:42 +02004339 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004340};
4341
Saeed Mahameede2816822015-05-28 22:28:40 +03004342struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004345
4346 u8 syndrome[0x20];
4347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004349
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004353 u8 log_size[0x8];
4354
Matan Barakb4ff3a32016-02-09 14:57:42 +02004355 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004356};
4357
Saeed Mahameede2816822015-05-28 22:28:40 +03004358struct mlx5_ifc_query_flow_table_in_bits {
4359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363 u8 op_mod[0x10];
4364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366
4367 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371 u8 table_id[0x18];
4372
Matan Barakb4ff3a32016-02-09 14:57:42 +02004373 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004374};
4375
4376struct mlx5_ifc_query_fte_out_bits {
4377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379
4380 u8 syndrome[0x20];
4381
Matan Barakb4ff3a32016-02-09 14:57:42 +02004382 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004383
4384 struct mlx5_ifc_flow_context_bits flow_context;
4385};
4386
4387struct mlx5_ifc_query_fte_in_bits {
4388 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004390
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392 u8 op_mod[0x10];
4393
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004395
4396 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004397 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004400 u8 table_id[0x18];
4401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403
4404 u8 flow_index[0x20];
4405
Matan Barakb4ff3a32016-02-09 14:57:42 +02004406 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004407};
4408
4409enum {
4410 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4411 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4412 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4413};
4414
4415struct mlx5_ifc_query_flow_group_out_bits {
4416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004417 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004418
4419 u8 syndrome[0x20];
4420
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422
4423 u8 start_flow_index[0x20];
4424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426
4427 u8 end_flow_index[0x20];
4428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004432 u8 match_criteria_enable[0x8];
4433
4434 struct mlx5_ifc_fte_match_param_bits match_criteria;
4435
Matan Barakb4ff3a32016-02-09 14:57:42 +02004436 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004437};
4438
4439struct mlx5_ifc_query_flow_group_in_bits {
4440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004442
Matan Barakb4ff3a32016-02-09 14:57:42 +02004443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004444 u8 op_mod[0x10];
4445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447
4448 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004449 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452 u8 table_id[0x18];
4453
4454 u8 group_id[0x20];
4455
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004457};
4458
Amir Vadai9dc0b282016-05-13 12:55:39 +00004459struct mlx5_ifc_query_flow_counter_out_bits {
4460 u8 status[0x8];
4461 u8 reserved_at_8[0x18];
4462
4463 u8 syndrome[0x20];
4464
4465 u8 reserved_at_40[0x40];
4466
4467 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4468};
4469
4470struct mlx5_ifc_query_flow_counter_in_bits {
4471 u8 opcode[0x10];
4472 u8 reserved_at_10[0x10];
4473
4474 u8 reserved_at_20[0x10];
4475 u8 op_mod[0x10];
4476
4477 u8 reserved_at_40[0x80];
4478
4479 u8 clear[0x1];
4480 u8 reserved_at_c1[0xf];
4481 u8 num_of_counters[0x10];
4482
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004483 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004484};
4485
Saeed Mahameedd6666752015-12-01 18:03:22 +02004486struct mlx5_ifc_query_esw_vport_context_out_bits {
4487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004489
4490 u8 syndrome[0x20];
4491
Matan Barakb4ff3a32016-02-09 14:57:42 +02004492 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004493
4494 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4495};
4496
4497struct mlx5_ifc_query_esw_vport_context_in_bits {
4498 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004500
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004502 u8 op_mod[0x10];
4503
4504 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004506 u8 vport_number[0x10];
4507
Matan Barakb4ff3a32016-02-09 14:57:42 +02004508 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004509};
4510
4511struct mlx5_ifc_modify_esw_vport_context_out_bits {
4512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004513 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004514
4515 u8 syndrome[0x20];
4516
Matan Barakb4ff3a32016-02-09 14:57:42 +02004517 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004518};
4519
4520struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004522 u8 vport_cvlan_insert[0x1];
4523 u8 vport_svlan_insert[0x1];
4524 u8 vport_cvlan_strip[0x1];
4525 u8 vport_svlan_strip[0x1];
4526};
4527
4528struct mlx5_ifc_modify_esw_vport_context_in_bits {
4529 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004530 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004531
Matan Barakb4ff3a32016-02-09 14:57:42 +02004532 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004533 u8 op_mod[0x10];
4534
4535 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004537 u8 vport_number[0x10];
4538
4539 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4540
4541 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4542};
4543
Saeed Mahameede2816822015-05-28 22:28:40 +03004544struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004545 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004546 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004547
4548 u8 syndrome[0x20];
4549
Matan Barakb4ff3a32016-02-09 14:57:42 +02004550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004551
4552 struct mlx5_ifc_eqc_bits eq_context_entry;
4553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555
4556 u8 event_bitmask[0x40];
4557
Matan Barakb4ff3a32016-02-09 14:57:42 +02004558 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004559
4560 u8 pas[0][0x40];
4561};
4562
4563struct mlx5_ifc_query_eq_in_bits {
4564 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004566
Matan Barakb4ff3a32016-02-09 14:57:42 +02004567 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004568 u8 op_mod[0x10];
4569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571 u8 eq_number[0x8];
4572
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004574};
4575
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004576struct mlx5_ifc_encap_header_in_bits {
4577 u8 reserved_at_0[0x5];
4578 u8 header_type[0x3];
4579 u8 reserved_at_8[0xe];
4580 u8 encap_header_size[0xa];
4581
4582 u8 reserved_at_20[0x10];
4583 u8 encap_header[2][0x8];
4584
4585 u8 more_encap_header[0][0x8];
4586};
4587
4588struct mlx5_ifc_query_encap_header_out_bits {
4589 u8 status[0x8];
4590 u8 reserved_at_8[0x18];
4591
4592 u8 syndrome[0x20];
4593
4594 u8 reserved_at_40[0xa0];
4595
4596 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4597};
4598
4599struct mlx5_ifc_query_encap_header_in_bits {
4600 u8 opcode[0x10];
4601 u8 reserved_at_10[0x10];
4602
4603 u8 reserved_at_20[0x10];
4604 u8 op_mod[0x10];
4605
4606 u8 encap_id[0x20];
4607
4608 u8 reserved_at_60[0xa0];
4609};
4610
4611struct mlx5_ifc_alloc_encap_header_out_bits {
4612 u8 status[0x8];
4613 u8 reserved_at_8[0x18];
4614
4615 u8 syndrome[0x20];
4616
4617 u8 encap_id[0x20];
4618
4619 u8 reserved_at_60[0x20];
4620};
4621
4622struct mlx5_ifc_alloc_encap_header_in_bits {
4623 u8 opcode[0x10];
4624 u8 reserved_at_10[0x10];
4625
4626 u8 reserved_at_20[0x10];
4627 u8 op_mod[0x10];
4628
4629 u8 reserved_at_40[0xa0];
4630
4631 struct mlx5_ifc_encap_header_in_bits encap_header;
4632};
4633
4634struct mlx5_ifc_dealloc_encap_header_out_bits {
4635 u8 status[0x8];
4636 u8 reserved_at_8[0x18];
4637
4638 u8 syndrome[0x20];
4639
4640 u8 reserved_at_40[0x40];
4641};
4642
4643struct mlx5_ifc_dealloc_encap_header_in_bits {
4644 u8 opcode[0x10];
4645 u8 reserved_at_10[0x10];
4646
4647 u8 reserved_20[0x10];
4648 u8 op_mod[0x10];
4649
4650 u8 encap_id[0x20];
4651
4652 u8 reserved_60[0x20];
4653};
4654
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004655struct mlx5_ifc_set_action_in_bits {
4656 u8 action_type[0x4];
4657 u8 field[0xc];
4658 u8 reserved_at_10[0x3];
4659 u8 offset[0x5];
4660 u8 reserved_at_18[0x3];
4661 u8 length[0x5];
4662
4663 u8 data[0x20];
4664};
4665
4666struct mlx5_ifc_add_action_in_bits {
4667 u8 action_type[0x4];
4668 u8 field[0xc];
4669 u8 reserved_at_10[0x10];
4670
4671 u8 data[0x20];
4672};
4673
4674union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4675 struct mlx5_ifc_set_action_in_bits set_action_in;
4676 struct mlx5_ifc_add_action_in_bits add_action_in;
4677 u8 reserved_at_0[0x40];
4678};
4679
4680enum {
4681 MLX5_ACTION_TYPE_SET = 0x1,
4682 MLX5_ACTION_TYPE_ADD = 0x2,
4683};
4684
4685enum {
4686 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4687 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4688 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4689 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4690 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4691 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4692 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4693 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4694 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4695 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4696 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4697 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4698 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4699 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4700 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4701 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4702 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4703 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4704 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4705 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4706 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4707 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004708 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004709};
4710
4711struct mlx5_ifc_alloc_modify_header_context_out_bits {
4712 u8 status[0x8];
4713 u8 reserved_at_8[0x18];
4714
4715 u8 syndrome[0x20];
4716
4717 u8 modify_header_id[0x20];
4718
4719 u8 reserved_at_60[0x20];
4720};
4721
4722struct mlx5_ifc_alloc_modify_header_context_in_bits {
4723 u8 opcode[0x10];
4724 u8 reserved_at_10[0x10];
4725
4726 u8 reserved_at_20[0x10];
4727 u8 op_mod[0x10];
4728
4729 u8 reserved_at_40[0x20];
4730
4731 u8 table_type[0x8];
4732 u8 reserved_at_68[0x10];
4733 u8 num_of_actions[0x8];
4734
4735 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4736};
4737
4738struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4739 u8 status[0x8];
4740 u8 reserved_at_8[0x18];
4741
4742 u8 syndrome[0x20];
4743
4744 u8 reserved_at_40[0x40];
4745};
4746
4747struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4748 u8 opcode[0x10];
4749 u8 reserved_at_10[0x10];
4750
4751 u8 reserved_at_20[0x10];
4752 u8 op_mod[0x10];
4753
4754 u8 modify_header_id[0x20];
4755
4756 u8 reserved_at_60[0x20];
4757};
4758
Saeed Mahameede2816822015-05-28 22:28:40 +03004759struct mlx5_ifc_query_dct_out_bits {
4760 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004761 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004762
4763 u8 syndrome[0x20];
4764
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004766
4767 struct mlx5_ifc_dctc_bits dct_context_entry;
4768
Matan Barakb4ff3a32016-02-09 14:57:42 +02004769 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770};
4771
4772struct mlx5_ifc_query_dct_in_bits {
4773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777 u8 op_mod[0x10];
4778
Matan Barakb4ff3a32016-02-09 14:57:42 +02004779 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780 u8 dctn[0x18];
4781
Matan Barakb4ff3a32016-02-09 14:57:42 +02004782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004783};
4784
4785struct mlx5_ifc_query_cq_out_bits {
4786 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004787 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788
4789 u8 syndrome[0x20];
4790
Matan Barakb4ff3a32016-02-09 14:57:42 +02004791 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004792
4793 struct mlx5_ifc_cqc_bits cq_context;
4794
Matan Barakb4ff3a32016-02-09 14:57:42 +02004795 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004796
4797 u8 pas[0][0x40];
4798};
4799
4800struct mlx5_ifc_query_cq_in_bits {
4801 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803
Matan Barakb4ff3a32016-02-09 14:57:42 +02004804 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004805 u8 op_mod[0x10];
4806
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808 u8 cqn[0x18];
4809
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811};
4812
4813struct mlx5_ifc_query_cong_status_out_bits {
4814 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004815 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004816
4817 u8 syndrome[0x20];
4818
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820
4821 u8 enable[0x1];
4822 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004823 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004824};
4825
4826struct mlx5_ifc_query_cong_status_in_bits {
4827 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829
Matan Barakb4ff3a32016-02-09 14:57:42 +02004830 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831 u8 op_mod[0x10];
4832
Matan Barakb4ff3a32016-02-09 14:57:42 +02004833 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004834 u8 priority[0x4];
4835 u8 cong_protocol[0x4];
4836
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838};
4839
4840struct mlx5_ifc_query_cong_statistics_out_bits {
4841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843
4844 u8 syndrome[0x20];
4845
Matan Barakb4ff3a32016-02-09 14:57:42 +02004846 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004847
Parav Pandite1f24a72017-04-16 07:29:29 +03004848 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
4850 u8 sum_flows[0x20];
4851
Parav Pandite1f24a72017-04-16 07:29:29 +03004852 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
Parav Pandite1f24a72017-04-16 07:29:29 +03004854 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855
Parav Pandite1f24a72017-04-16 07:29:29 +03004856 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004857
Parav Pandite1f24a72017-04-16 07:29:29 +03004858 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
4862 u8 time_stamp_high[0x20];
4863
4864 u8 time_stamp_low[0x20];
4865
4866 u8 accumulators_period[0x20];
4867
Parav Pandite1f24a72017-04-16 07:29:29 +03004868 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
Parav Pandite1f24a72017-04-16 07:29:29 +03004870 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871
Parav Pandite1f24a72017-04-16 07:29:29 +03004872 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
Parav Pandite1f24a72017-04-16 07:29:29 +03004874 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875
Matan Barakb4ff3a32016-02-09 14:57:42 +02004876 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877};
4878
4879struct mlx5_ifc_query_cong_statistics_in_bits {
4880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884 u8 op_mod[0x10];
4885
4886 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890};
4891
4892struct mlx5_ifc_query_cong_params_out_bits {
4893 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004894 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004895
4896 u8 syndrome[0x20];
4897
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899
4900 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4901};
4902
4903struct mlx5_ifc_query_cong_params_in_bits {
4904 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004905 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906
Matan Barakb4ff3a32016-02-09 14:57:42 +02004907 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908 u8 op_mod[0x10];
4909
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911 u8 cong_protocol[0x4];
4912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914};
4915
4916struct mlx5_ifc_query_adapter_out_bits {
4917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919
4920 u8 syndrome[0x20];
4921
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
4924 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4925};
4926
4927struct mlx5_ifc_query_adapter_in_bits {
4928 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932 u8 op_mod[0x10];
4933
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935};
4936
4937struct mlx5_ifc_qp_2rst_out_bits {
4938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940
4941 u8 syndrome[0x20];
4942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944};
4945
4946struct mlx5_ifc_qp_2rst_in_bits {
4947 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004948 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951 u8 op_mod[0x10];
4952
Matan Barakb4ff3a32016-02-09 14:57:42 +02004953 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004954 u8 qpn[0x18];
4955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957};
4958
4959struct mlx5_ifc_qp_2err_out_bits {
4960 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962
4963 u8 syndrome[0x20];
4964
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966};
4967
4968struct mlx5_ifc_qp_2err_in_bits {
4969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973 u8 op_mod[0x10];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976 u8 qpn[0x18];
4977
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979};
4980
4981struct mlx5_ifc_page_fault_resume_out_bits {
4982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984
4985 u8 syndrome[0x20];
4986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988};
4989
4990struct mlx5_ifc_page_fault_resume_in_bits {
4991 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004992 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993
Matan Barakb4ff3a32016-02-09 14:57:42 +02004994 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995 u8 op_mod[0x10];
4996
4997 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004999 u8 page_fault_type[0x3];
5000 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005002 u8 reserved_at_60[0x8];
5003 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004};
5005
5006struct mlx5_ifc_nop_out_bits {
5007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
5010 u8 syndrome[0x20];
5011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013};
5014
5015struct mlx5_ifc_nop_in_bits {
5016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020 u8 op_mod[0x10];
5021
Matan Barakb4ff3a32016-02-09 14:57:42 +02005022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005023};
5024
5025struct mlx5_ifc_modify_vport_state_out_bits {
5026 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028
5029 u8 syndrome[0x20];
5030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032};
5033
5034struct mlx5_ifc_modify_vport_state_in_bits {
5035 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039 u8 op_mod[0x10];
5040
5041 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043 u8 vport_number[0x10];
5044
Matan Barakb4ff3a32016-02-09 14:57:42 +02005045 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048};
5049
5050struct mlx5_ifc_modify_tis_out_bits {
5051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
5054 u8 syndrome[0x20];
5055
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057};
5058
majd@mellanox.com75850d02016-01-14 19:13:06 +02005059struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005061
Aviv Heller84df61e2016-05-10 13:47:50 +03005062 u8 reserved_at_20[0x1d];
5063 u8 lag_tx_port_affinity[0x1];
5064 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005065 u8 prio[0x1];
5066};
5067
Saeed Mahameede2816822015-05-28 22:28:40 +03005068struct mlx5_ifc_modify_tis_in_bits {
5069 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073 u8 op_mod[0x10];
5074
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076 u8 tisn[0x18];
5077
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079
majd@mellanox.com75850d02016-01-14 19:13:06 +02005080 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
Matan Barakb4ff3a32016-02-09 14:57:42 +02005082 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083
5084 struct mlx5_ifc_tisc_bits ctx;
5085};
5086
Achiad Shochatd9eea402015-08-04 14:05:42 +03005087struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005089
Matan Barakb4ff3a32016-02-09 14:57:42 +02005090 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005091 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005092 u8 reserved_at_3c[0x1];
5093 u8 hash[0x1];
5094 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005095 u8 lro[0x1];
5096};
5097
Saeed Mahameede2816822015-05-28 22:28:40 +03005098struct mlx5_ifc_modify_tir_out_bits {
5099 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101
5102 u8 syndrome[0x20];
5103
Matan Barakb4ff3a32016-02-09 14:57:42 +02005104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005105};
5106
5107struct mlx5_ifc_modify_tir_in_bits {
5108 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112 u8 op_mod[0x10];
5113
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115 u8 tirn[0x18];
5116
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118
Achiad Shochatd9eea402015-08-04 14:05:42 +03005119 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005120
Matan Barakb4ff3a32016-02-09 14:57:42 +02005121 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005122
5123 struct mlx5_ifc_tirc_bits ctx;
5124};
5125
5126struct mlx5_ifc_modify_sq_out_bits {
5127 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005129
5130 u8 syndrome[0x20];
5131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133};
5134
5135struct mlx5_ifc_modify_sq_in_bits {
5136 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005137 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005138
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140 u8 op_mod[0x10];
5141
5142 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 sqn[0x18];
5145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147
5148 u8 modify_bitmask[0x40];
5149
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
5152 struct mlx5_ifc_sqc_bits ctx;
5153};
5154
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005155struct mlx5_ifc_modify_scheduling_element_out_bits {
5156 u8 status[0x8];
5157 u8 reserved_at_8[0x18];
5158
5159 u8 syndrome[0x20];
5160
5161 u8 reserved_at_40[0x1c0];
5162};
5163
5164enum {
5165 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5166 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5167};
5168
5169struct mlx5_ifc_modify_scheduling_element_in_bits {
5170 u8 opcode[0x10];
5171 u8 reserved_at_10[0x10];
5172
5173 u8 reserved_at_20[0x10];
5174 u8 op_mod[0x10];
5175
5176 u8 scheduling_hierarchy[0x8];
5177 u8 reserved_at_48[0x18];
5178
5179 u8 scheduling_element_id[0x20];
5180
5181 u8 reserved_at_80[0x20];
5182
5183 u8 modify_bitmask[0x20];
5184
5185 u8 reserved_at_c0[0x40];
5186
5187 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5188
5189 u8 reserved_at_300[0x100];
5190};
5191
Saeed Mahameede2816822015-05-28 22:28:40 +03005192struct mlx5_ifc_modify_rqt_out_bits {
5193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
5196 u8 syndrome[0x20];
5197
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005199};
5200
Achiad Shochat5c503682015-08-04 14:05:43 +03005201struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005203
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005205 u8 rqn_list[0x1];
5206};
5207
Saeed Mahameede2816822015-05-28 22:28:40 +03005208struct mlx5_ifc_modify_rqt_in_bits {
5209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213 u8 op_mod[0x10];
5214
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216 u8 rqtn[0x18];
5217
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219
Achiad Shochat5c503682015-08-04 14:05:43 +03005220 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005221
Matan Barakb4ff3a32016-02-09 14:57:42 +02005222 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005223
5224 struct mlx5_ifc_rqtc_bits ctx;
5225};
5226
5227struct mlx5_ifc_modify_rq_out_bits {
5228 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230
5231 u8 syndrome[0x20];
5232
Matan Barakb4ff3a32016-02-09 14:57:42 +02005233 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005234};
5235
Alex Vesker83b502a2016-08-04 17:32:02 +03005236enum {
5237 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005238 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005239 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005240};
5241
Saeed Mahameede2816822015-05-28 22:28:40 +03005242struct mlx5_ifc_modify_rq_in_bits {
5243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247 u8 op_mod[0x10];
5248
5249 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251 u8 rqn[0x18];
5252
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254
5255 u8 modify_bitmask[0x40];
5256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258
5259 struct mlx5_ifc_rqc_bits ctx;
5260};
5261
5262struct mlx5_ifc_modify_rmp_out_bits {
5263 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005264 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005265
5266 u8 syndrome[0x20];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269};
5270
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005271struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005273
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005275 u8 lwm[0x1];
5276};
5277
Saeed Mahameede2816822015-05-28 22:28:40 +03005278struct mlx5_ifc_modify_rmp_in_bits {
5279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005281
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283 u8 op_mod[0x10];
5284
5285 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287 u8 rmpn[0x18];
5288
Matan Barakb4ff3a32016-02-09 14:57:42 +02005289 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005290
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005291 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005292
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
5295 struct mlx5_ifc_rmpc_bits ctx;
5296};
5297
5298struct mlx5_ifc_modify_nic_vport_context_out_bits {
5299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301
5302 u8 syndrome[0x20];
5303
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305};
5306
5307struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005308 u8 reserved_at_0[0x14];
5309 u8 disable_uc_local_lb[0x1];
5310 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005311 u8 node_guid[0x1];
5312 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005313 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005314 u8 mtu[0x1];
5315 u8 change_event[0x1];
5316 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005317 u8 permanent_address[0x1];
5318 u8 addresses_list[0x1];
5319 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005320 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005321};
5322
5323struct mlx5_ifc_modify_nic_vport_context_in_bits {
5324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326
Matan Barakb4ff3a32016-02-09 14:57:42 +02005327 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005328 u8 op_mod[0x10];
5329
5330 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332 u8 vport_number[0x10];
5333
5334 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337
5338 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5339};
5340
5341struct mlx5_ifc_modify_hca_vport_context_out_bits {
5342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
5345 u8 syndrome[0x20];
5346
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005348};
5349
5350struct mlx5_ifc_modify_hca_vport_context_in_bits {
5351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353
Matan Barakb4ff3a32016-02-09 14:57:42 +02005354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005355 u8 op_mod[0x10];
5356
5357 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005359 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 vport_number[0x10];
5361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363
5364 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5365};
5366
5367struct mlx5_ifc_modify_cq_out_bits {
5368 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370
5371 u8 syndrome[0x20];
5372
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374};
5375
5376enum {
5377 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5378 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5379};
5380
5381struct mlx5_ifc_modify_cq_in_bits {
5382 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005383 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005384
Matan Barakb4ff3a32016-02-09 14:57:42 +02005385 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005386 u8 op_mod[0x10];
5387
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389 u8 cqn[0x18];
5390
5391 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5392
5393 struct mlx5_ifc_cqc_bits cq_context;
5394
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005396
5397 u8 pas[0][0x40];
5398};
5399
5400struct mlx5_ifc_modify_cong_status_out_bits {
5401 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403
5404 u8 syndrome[0x20];
5405
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407};
5408
5409struct mlx5_ifc_modify_cong_status_in_bits {
5410 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005412
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005414 u8 op_mod[0x10];
5415
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417 u8 priority[0x4];
5418 u8 cong_protocol[0x4];
5419
5420 u8 enable[0x1];
5421 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423};
5424
5425struct mlx5_ifc_modify_cong_params_out_bits {
5426 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
5429 u8 syndrome[0x20];
5430
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432};
5433
5434struct mlx5_ifc_modify_cong_params_in_bits {
5435 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439 u8 op_mod[0x10];
5440
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442 u8 cong_protocol[0x4];
5443
5444 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447
5448 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5449};
5450
5451struct mlx5_ifc_manage_pages_out_bits {
5452 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454
5455 u8 syndrome[0x20];
5456
5457 u8 output_num_entries[0x20];
5458
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460
5461 u8 pas[0][0x40];
5462};
5463
5464enum {
5465 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5466 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5467 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5468};
5469
5470struct mlx5_ifc_manage_pages_in_bits {
5471 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473
Matan Barakb4ff3a32016-02-09 14:57:42 +02005474 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005475 u8 op_mod[0x10];
5476
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478 u8 function_id[0x10];
5479
5480 u8 input_num_entries[0x20];
5481
5482 u8 pas[0][0x40];
5483};
5484
5485struct mlx5_ifc_mad_ifc_out_bits {
5486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005487 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005488
5489 u8 syndrome[0x20];
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 u8 response_mad_packet[256][0x8];
5494};
5495
5496struct mlx5_ifc_mad_ifc_in_bits {
5497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501 u8 op_mod[0x10];
5502
5503 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505 u8 port[0x8];
5506
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508
5509 u8 mad[256][0x8];
5510};
5511
5512struct mlx5_ifc_init_hca_out_bits {
5513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
5516 u8 syndrome[0x20];
5517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519};
5520
5521struct mlx5_ifc_init_hca_in_bits {
5522 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524
Matan Barakb4ff3a32016-02-09 14:57:42 +02005525 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005526 u8 op_mod[0x10];
5527
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529};
5530
5531struct mlx5_ifc_init2rtr_qp_out_bits {
5532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
5535 u8 syndrome[0x20];
5536
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538};
5539
5540struct mlx5_ifc_init2rtr_qp_in_bits {
5541 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
Matan Barakb4ff3a32016-02-09 14:57:42 +02005544 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005545 u8 op_mod[0x10];
5546
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548 u8 qpn[0x18];
5549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551
5552 u8 opt_param_mask[0x20];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
5556 struct mlx5_ifc_qpc_bits qpc;
5557
Matan Barakb4ff3a32016-02-09 14:57:42 +02005558 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005559};
5560
5561struct mlx5_ifc_init2init_qp_out_bits {
5562 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564
5565 u8 syndrome[0x20];
5566
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568};
5569
5570struct mlx5_ifc_init2init_qp_in_bits {
5571 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575 u8 op_mod[0x10];
5576
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578 u8 qpn[0x18];
5579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581
5582 u8 opt_param_mask[0x20];
5583
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
5586 struct mlx5_ifc_qpc_bits qpc;
5587
Matan Barakb4ff3a32016-02-09 14:57:42 +02005588 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005589};
5590
5591struct mlx5_ifc_get_dropped_packet_log_out_bits {
5592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594
5595 u8 syndrome[0x20];
5596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598
5599 u8 packet_headers_log[128][0x8];
5600
5601 u8 packet_syndrome[64][0x8];
5602};
5603
5604struct mlx5_ifc_get_dropped_packet_log_in_bits {
5605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607
Matan Barakb4ff3a32016-02-09 14:57:42 +02005608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005609 u8 op_mod[0x10];
5610
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612};
5613
5614struct mlx5_ifc_gen_eqe_in_bits {
5615 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619 u8 op_mod[0x10];
5620
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622 u8 eq_number[0x8];
5623
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625
5626 u8 eqe[64][0x8];
5627};
5628
5629struct mlx5_ifc_gen_eq_out_bits {
5630 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632
5633 u8 syndrome[0x20];
5634
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636};
5637
5638struct mlx5_ifc_enable_hca_out_bits {
5639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641
5642 u8 syndrome[0x20];
5643
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645};
5646
5647struct mlx5_ifc_enable_hca_in_bits {
5648 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650
Matan Barakb4ff3a32016-02-09 14:57:42 +02005651 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005652 u8 op_mod[0x10];
5653
Matan Barakb4ff3a32016-02-09 14:57:42 +02005654 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005655 u8 function_id[0x10];
5656
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658};
5659
5660struct mlx5_ifc_drain_dct_out_bits {
5661 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663
5664 u8 syndrome[0x20];
5665
Matan Barakb4ff3a32016-02-09 14:57:42 +02005666 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005667};
5668
5669struct mlx5_ifc_drain_dct_in_bits {
5670 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674 u8 op_mod[0x10];
5675
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677 u8 dctn[0x18];
5678
Matan Barakb4ff3a32016-02-09 14:57:42 +02005679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005680};
5681
5682struct mlx5_ifc_disable_hca_out_bits {
5683 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685
5686 u8 syndrome[0x20];
5687
Matan Barakb4ff3a32016-02-09 14:57:42 +02005688 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689};
5690
5691struct mlx5_ifc_disable_hca_in_bits {
5692 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696 u8 op_mod[0x10];
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699 u8 function_id[0x10];
5700
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005702};
5703
5704struct mlx5_ifc_detach_from_mcg_out_bits {
5705 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707
5708 u8 syndrome[0x20];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711};
5712
5713struct mlx5_ifc_detach_from_mcg_in_bits {
5714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716
Matan Barakb4ff3a32016-02-09 14:57:42 +02005717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005718 u8 op_mod[0x10];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721 u8 qpn[0x18];
5722
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
5725 u8 multicast_gid[16][0x8];
5726};
5727
Saeed Mahameed74862162016-06-09 15:11:34 +03005728struct mlx5_ifc_destroy_xrq_out_bits {
5729 u8 status[0x8];
5730 u8 reserved_at_8[0x18];
5731
5732 u8 syndrome[0x20];
5733
5734 u8 reserved_at_40[0x40];
5735};
5736
5737struct mlx5_ifc_destroy_xrq_in_bits {
5738 u8 opcode[0x10];
5739 u8 reserved_at_10[0x10];
5740
5741 u8 reserved_at_20[0x10];
5742 u8 op_mod[0x10];
5743
5744 u8 reserved_at_40[0x8];
5745 u8 xrqn[0x18];
5746
5747 u8 reserved_at_60[0x20];
5748};
5749
Saeed Mahameede2816822015-05-28 22:28:40 +03005750struct mlx5_ifc_destroy_xrc_srq_out_bits {
5751 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753
5754 u8 syndrome[0x20];
5755
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757};
5758
5759struct mlx5_ifc_destroy_xrc_srq_in_bits {
5760 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764 u8 op_mod[0x10];
5765
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767 u8 xrc_srqn[0x18];
5768
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770};
5771
5772struct mlx5_ifc_destroy_tis_out_bits {
5773 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775
5776 u8 syndrome[0x20];
5777
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779};
5780
5781struct mlx5_ifc_destroy_tis_in_bits {
5782 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005783 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005784
Matan Barakb4ff3a32016-02-09 14:57:42 +02005785 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005786 u8 op_mod[0x10];
5787
Matan Barakb4ff3a32016-02-09 14:57:42 +02005788 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005789 u8 tisn[0x18];
5790
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792};
5793
5794struct mlx5_ifc_destroy_tir_out_bits {
5795 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797
5798 u8 syndrome[0x20];
5799
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801};
5802
5803struct mlx5_ifc_destroy_tir_in_bits {
5804 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005806
Matan Barakb4ff3a32016-02-09 14:57:42 +02005807 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005808 u8 op_mod[0x10];
5809
Matan Barakb4ff3a32016-02-09 14:57:42 +02005810 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005811 u8 tirn[0x18];
5812
Matan Barakb4ff3a32016-02-09 14:57:42 +02005813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005814};
5815
5816struct mlx5_ifc_destroy_srq_out_bits {
5817 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819
5820 u8 syndrome[0x20];
5821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823};
5824
5825struct mlx5_ifc_destroy_srq_in_bits {
5826 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828
Matan Barakb4ff3a32016-02-09 14:57:42 +02005829 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005830 u8 op_mod[0x10];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833 u8 srqn[0x18];
5834
Matan Barakb4ff3a32016-02-09 14:57:42 +02005835 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005836};
5837
5838struct mlx5_ifc_destroy_sq_out_bits {
5839 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841
5842 u8 syndrome[0x20];
5843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845};
5846
5847struct mlx5_ifc_destroy_sq_in_bits {
5848 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850
Matan Barakb4ff3a32016-02-09 14:57:42 +02005851 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005852 u8 op_mod[0x10];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855 u8 sqn[0x18];
5856
Matan Barakb4ff3a32016-02-09 14:57:42 +02005857 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005858};
5859
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005860struct mlx5_ifc_destroy_scheduling_element_out_bits {
5861 u8 status[0x8];
5862 u8 reserved_at_8[0x18];
5863
5864 u8 syndrome[0x20];
5865
5866 u8 reserved_at_40[0x1c0];
5867};
5868
5869struct mlx5_ifc_destroy_scheduling_element_in_bits {
5870 u8 opcode[0x10];
5871 u8 reserved_at_10[0x10];
5872
5873 u8 reserved_at_20[0x10];
5874 u8 op_mod[0x10];
5875
5876 u8 scheduling_hierarchy[0x8];
5877 u8 reserved_at_48[0x18];
5878
5879 u8 scheduling_element_id[0x20];
5880
5881 u8 reserved_at_80[0x180];
5882};
5883
Saeed Mahameede2816822015-05-28 22:28:40 +03005884struct mlx5_ifc_destroy_rqt_out_bits {
5885 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887
5888 u8 syndrome[0x20];
5889
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891};
5892
5893struct mlx5_ifc_destroy_rqt_in_bits {
5894 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898 u8 op_mod[0x10];
5899
Matan Barakb4ff3a32016-02-09 14:57:42 +02005900 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005901 u8 rqtn[0x18];
5902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904};
5905
5906struct mlx5_ifc_destroy_rq_out_bits {
5907 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909
5910 u8 syndrome[0x20];
5911
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913};
5914
5915struct mlx5_ifc_destroy_rq_in_bits {
5916 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918
Matan Barakb4ff3a32016-02-09 14:57:42 +02005919 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005920 u8 op_mod[0x10];
5921
Matan Barakb4ff3a32016-02-09 14:57:42 +02005922 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005923 u8 rqn[0x18];
5924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926};
5927
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005928struct mlx5_ifc_set_delay_drop_params_in_bits {
5929 u8 opcode[0x10];
5930 u8 reserved_at_10[0x10];
5931
5932 u8 reserved_at_20[0x10];
5933 u8 op_mod[0x10];
5934
5935 u8 reserved_at_40[0x20];
5936
5937 u8 reserved_at_60[0x10];
5938 u8 delay_drop_timeout[0x10];
5939};
5940
5941struct mlx5_ifc_set_delay_drop_params_out_bits {
5942 u8 status[0x8];
5943 u8 reserved_at_8[0x18];
5944
5945 u8 syndrome[0x20];
5946
5947 u8 reserved_at_40[0x40];
5948};
5949
Saeed Mahameede2816822015-05-28 22:28:40 +03005950struct mlx5_ifc_destroy_rmp_out_bits {
5951 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953
5954 u8 syndrome[0x20];
5955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957};
5958
5959struct mlx5_ifc_destroy_rmp_in_bits {
5960 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964 u8 op_mod[0x10];
5965
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967 u8 rmpn[0x18];
5968
Matan Barakb4ff3a32016-02-09 14:57:42 +02005969 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005970};
5971
5972struct mlx5_ifc_destroy_qp_out_bits {
5973 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975
5976 u8 syndrome[0x20];
5977
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979};
5980
5981struct mlx5_ifc_destroy_qp_in_bits {
5982 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005983 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005984
Matan Barakb4ff3a32016-02-09 14:57:42 +02005985 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986 u8 op_mod[0x10];
5987
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989 u8 qpn[0x18];
5990
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992};
5993
5994struct mlx5_ifc_destroy_psv_out_bits {
5995 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997
5998 u8 syndrome[0x20];
5999
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001};
6002
6003struct mlx5_ifc_destroy_psv_in_bits {
6004 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006
Matan Barakb4ff3a32016-02-09 14:57:42 +02006007 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006008 u8 op_mod[0x10];
6009
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011 u8 psvn[0x18];
6012
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014};
6015
6016struct mlx5_ifc_destroy_mkey_out_bits {
6017 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019
6020 u8 syndrome[0x20];
6021
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023};
6024
6025struct mlx5_ifc_destroy_mkey_in_bits {
6026 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030 u8 op_mod[0x10];
6031
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033 u8 mkey_index[0x18];
6034
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036};
6037
6038struct mlx5_ifc_destroy_flow_table_out_bits {
6039 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041
6042 u8 syndrome[0x20];
6043
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045};
6046
6047struct mlx5_ifc_destroy_flow_table_in_bits {
6048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052 u8 op_mod[0x10];
6053
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006054 u8 other_vport[0x1];
6055 u8 reserved_at_41[0xf];
6056 u8 vport_number[0x10];
6057
6058 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059
6060 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062
Matan Barakb4ff3a32016-02-09 14:57:42 +02006063 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064 u8 table_id[0x18];
6065
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067};
6068
6069struct mlx5_ifc_destroy_flow_group_out_bits {
6070 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072
6073 u8 syndrome[0x20];
6074
Matan Barakb4ff3a32016-02-09 14:57:42 +02006075 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006076};
6077
6078struct mlx5_ifc_destroy_flow_group_in_bits {
6079 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006080 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083 u8 op_mod[0x10];
6084
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006085 u8 other_vport[0x1];
6086 u8 reserved_at_41[0xf];
6087 u8 vport_number[0x10];
6088
6089 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090
6091 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095 u8 table_id[0x18];
6096
6097 u8 group_id[0x20];
6098
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100};
6101
6102struct mlx5_ifc_destroy_eq_out_bits {
6103 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105
6106 u8 syndrome[0x20];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109};
6110
6111struct mlx5_ifc_destroy_eq_in_bits {
6112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 op_mod[0x10];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119 u8 eq_number[0x8];
6120
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122};
6123
6124struct mlx5_ifc_destroy_dct_out_bits {
6125 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127
6128 u8 syndrome[0x20];
6129
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131};
6132
6133struct mlx5_ifc_destroy_dct_in_bits {
6134 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138 u8 op_mod[0x10];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141 u8 dctn[0x18];
6142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144};
6145
6146struct mlx5_ifc_destroy_cq_out_bits {
6147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149
6150 u8 syndrome[0x20];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_destroy_cq_in_bits {
6156 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 op_mod[0x10];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163 u8 cqn[0x18];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166};
6167
6168struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 syndrome[0x20];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 op_mod[0x10];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185
Matan Barakb4ff3a32016-02-09 14:57:42 +02006186 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006187 u8 vxlan_udp_port[0x10];
6188};
6189
6190struct mlx5_ifc_delete_l2_table_entry_out_bits {
6191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193
6194 u8 syndrome[0x20];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_delete_l2_table_entry_in_bits {
6200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 op_mod[0x10];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207
Matan Barakb4ff3a32016-02-09 14:57:42 +02006208 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209 u8 table_index[0x18];
6210
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212};
6213
6214struct mlx5_ifc_delete_fte_out_bits {
6215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
6218 u8 syndrome[0x20];
6219
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221};
6222
6223struct mlx5_ifc_delete_fte_in_bits {
6224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226
Matan Barakb4ff3a32016-02-09 14:57:42 +02006227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006228 u8 op_mod[0x10];
6229
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006230 u8 other_vport[0x1];
6231 u8 reserved_at_41[0xf];
6232 u8 vport_number[0x10];
6233
6234 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235
6236 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240 u8 table_id[0x18];
6241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243
6244 u8 flow_index[0x20];
6245
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247};
6248
6249struct mlx5_ifc_dealloc_xrcd_out_bits {
6250 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006251 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006252
6253 u8 syndrome[0x20];
6254
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256};
6257
6258struct mlx5_ifc_dealloc_xrcd_in_bits {
6259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263 u8 op_mod[0x10];
6264
Matan Barakb4ff3a32016-02-09 14:57:42 +02006265 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006266 u8 xrcd[0x18];
6267
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269};
6270
6271struct mlx5_ifc_dealloc_uar_out_bits {
6272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274
6275 u8 syndrome[0x20];
6276
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278};
6279
6280struct mlx5_ifc_dealloc_uar_in_bits {
6281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285 u8 op_mod[0x10];
6286
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288 u8 uar[0x18];
6289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291};
6292
6293struct mlx5_ifc_dealloc_transport_domain_out_bits {
6294 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296
6297 u8 syndrome[0x20];
6298
Matan Barakb4ff3a32016-02-09 14:57:42 +02006299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006300};
6301
6302struct mlx5_ifc_dealloc_transport_domain_in_bits {
6303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305
Matan Barakb4ff3a32016-02-09 14:57:42 +02006306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006307 u8 op_mod[0x10];
6308
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310 u8 transport_domain[0x18];
6311
Matan Barakb4ff3a32016-02-09 14:57:42 +02006312 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006313};
6314
6315struct mlx5_ifc_dealloc_q_counter_out_bits {
6316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318
6319 u8 syndrome[0x20];
6320
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322};
6323
6324struct mlx5_ifc_dealloc_q_counter_in_bits {
6325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329 u8 op_mod[0x10];
6330
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332 u8 counter_set_id[0x8];
6333
Matan Barakb4ff3a32016-02-09 14:57:42 +02006334 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006335};
6336
6337struct mlx5_ifc_dealloc_pd_out_bits {
6338 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340
6341 u8 syndrome[0x20];
6342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344};
6345
6346struct mlx5_ifc_dealloc_pd_in_bits {
6347 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351 u8 op_mod[0x10];
6352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354 u8 pd[0x18];
6355
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357};
6358
Amir Vadai9dc0b282016-05-13 12:55:39 +00006359struct mlx5_ifc_dealloc_flow_counter_out_bits {
6360 u8 status[0x8];
6361 u8 reserved_at_8[0x18];
6362
6363 u8 syndrome[0x20];
6364
6365 u8 reserved_at_40[0x40];
6366};
6367
6368struct mlx5_ifc_dealloc_flow_counter_in_bits {
6369 u8 opcode[0x10];
6370 u8 reserved_at_10[0x10];
6371
6372 u8 reserved_at_20[0x10];
6373 u8 op_mod[0x10];
6374
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006375 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006376
6377 u8 reserved_at_60[0x20];
6378};
6379
Saeed Mahameed74862162016-06-09 15:11:34 +03006380struct mlx5_ifc_create_xrq_out_bits {
6381 u8 status[0x8];
6382 u8 reserved_at_8[0x18];
6383
6384 u8 syndrome[0x20];
6385
6386 u8 reserved_at_40[0x8];
6387 u8 xrqn[0x18];
6388
6389 u8 reserved_at_60[0x20];
6390};
6391
6392struct mlx5_ifc_create_xrq_in_bits {
6393 u8 opcode[0x10];
6394 u8 reserved_at_10[0x10];
6395
6396 u8 reserved_at_20[0x10];
6397 u8 op_mod[0x10];
6398
6399 u8 reserved_at_40[0x40];
6400
6401 struct mlx5_ifc_xrqc_bits xrq_context;
6402};
6403
Saeed Mahameede2816822015-05-28 22:28:40 +03006404struct mlx5_ifc_create_xrc_srq_out_bits {
6405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407
6408 u8 syndrome[0x20];
6409
Matan Barakb4ff3a32016-02-09 14:57:42 +02006410 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006411 u8 xrc_srqn[0x18];
6412
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414};
6415
6416struct mlx5_ifc_create_xrc_srq_in_bits {
6417 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421 u8 op_mod[0x10];
6422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424
6425 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6426
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428
6429 u8 pas[0][0x40];
6430};
6431
6432struct mlx5_ifc_create_tis_out_bits {
6433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435
6436 u8 syndrome[0x20];
6437
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439 u8 tisn[0x18];
6440
Matan Barakb4ff3a32016-02-09 14:57:42 +02006441 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006442};
6443
6444struct mlx5_ifc_create_tis_in_bits {
6445 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449 u8 op_mod[0x10];
6450
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452
6453 struct mlx5_ifc_tisc_bits ctx;
6454};
6455
6456struct mlx5_ifc_create_tir_out_bits {
6457 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459
6460 u8 syndrome[0x20];
6461
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463 u8 tirn[0x18];
6464
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466};
6467
6468struct mlx5_ifc_create_tir_in_bits {
6469 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471
Matan Barakb4ff3a32016-02-09 14:57:42 +02006472 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006473 u8 op_mod[0x10];
6474
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476
6477 struct mlx5_ifc_tirc_bits ctx;
6478};
6479
6480struct mlx5_ifc_create_srq_out_bits {
6481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
6484 u8 syndrome[0x20];
6485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487 u8 srqn[0x18];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490};
6491
6492struct mlx5_ifc_create_srq_in_bits {
6493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497 u8 op_mod[0x10];
6498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
6501 struct mlx5_ifc_srqc_bits srq_context_entry;
6502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504
6505 u8 pas[0][0x40];
6506};
6507
6508struct mlx5_ifc_create_sq_out_bits {
6509 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006510 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511
6512 u8 syndrome[0x20];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515 u8 sqn[0x18];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518};
6519
6520struct mlx5_ifc_create_sq_in_bits {
6521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525 u8 op_mod[0x10];
6526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528
6529 struct mlx5_ifc_sqc_bits ctx;
6530};
6531
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006532struct mlx5_ifc_create_scheduling_element_out_bits {
6533 u8 status[0x8];
6534 u8 reserved_at_8[0x18];
6535
6536 u8 syndrome[0x20];
6537
6538 u8 reserved_at_40[0x40];
6539
6540 u8 scheduling_element_id[0x20];
6541
6542 u8 reserved_at_a0[0x160];
6543};
6544
6545struct mlx5_ifc_create_scheduling_element_in_bits {
6546 u8 opcode[0x10];
6547 u8 reserved_at_10[0x10];
6548
6549 u8 reserved_at_20[0x10];
6550 u8 op_mod[0x10];
6551
6552 u8 scheduling_hierarchy[0x8];
6553 u8 reserved_at_48[0x18];
6554
6555 u8 reserved_at_60[0xa0];
6556
6557 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6558
6559 u8 reserved_at_300[0x100];
6560};
6561
Saeed Mahameede2816822015-05-28 22:28:40 +03006562struct mlx5_ifc_create_rqt_out_bits {
6563 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006564 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006565
6566 u8 syndrome[0x20];
6567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569 u8 rqtn[0x18];
6570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572};
6573
6574struct mlx5_ifc_create_rqt_in_bits {
6575 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006576 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006577
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579 u8 op_mod[0x10];
6580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582
6583 struct mlx5_ifc_rqtc_bits rqt_context;
6584};
6585
6586struct mlx5_ifc_create_rq_out_bits {
6587 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006588 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006589
6590 u8 syndrome[0x20];
6591
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593 u8 rqn[0x18];
6594
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596};
6597
6598struct mlx5_ifc_create_rq_in_bits {
6599 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603 u8 op_mod[0x10];
6604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606
6607 struct mlx5_ifc_rqc_bits ctx;
6608};
6609
6610struct mlx5_ifc_create_rmp_out_bits {
6611 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613
6614 u8 syndrome[0x20];
6615
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617 u8 rmpn[0x18];
6618
Matan Barakb4ff3a32016-02-09 14:57:42 +02006619 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006620};
6621
6622struct mlx5_ifc_create_rmp_in_bits {
6623 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625
Matan Barakb4ff3a32016-02-09 14:57:42 +02006626 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006627 u8 op_mod[0x10];
6628
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630
6631 struct mlx5_ifc_rmpc_bits ctx;
6632};
6633
6634struct mlx5_ifc_create_qp_out_bits {
6635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637
6638 u8 syndrome[0x20];
6639
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641 u8 qpn[0x18];
6642
Matan Barakb4ff3a32016-02-09 14:57:42 +02006643 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644};
6645
6646struct mlx5_ifc_create_qp_in_bits {
6647 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651 u8 op_mod[0x10];
6652
Matan Barakb4ff3a32016-02-09 14:57:42 +02006653 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006654
6655 u8 opt_param_mask[0x20];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 struct mlx5_ifc_qpc_bits qpc;
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 u8 pas[0][0x40];
6664};
6665
6666struct mlx5_ifc_create_psv_out_bits {
6667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 u8 syndrome[0x20];
6671
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673
Matan Barakb4ff3a32016-02-09 14:57:42 +02006674 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006675 u8 psv0_index[0x18];
6676
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678 u8 psv1_index[0x18];
6679
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681 u8 psv2_index[0x18];
6682
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684 u8 psv3_index[0x18];
6685};
6686
6687struct mlx5_ifc_create_psv_in_bits {
6688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690
Matan Barakb4ff3a32016-02-09 14:57:42 +02006691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006692 u8 op_mod[0x10];
6693
6694 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696 u8 pd[0x18];
6697
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699};
6700
6701struct mlx5_ifc_create_mkey_out_bits {
6702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704
6705 u8 syndrome[0x20];
6706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708 u8 mkey_index[0x18];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711};
6712
6713struct mlx5_ifc_create_mkey_in_bits {
6714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718 u8 op_mod[0x10];
6719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
6722 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724
6725 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6726
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728
6729 u8 translations_octword_actual_size[0x20];
6730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732
6733 u8 klm_pas_mtt[0][0x20];
6734};
6735
6736struct mlx5_ifc_create_flow_table_out_bits {
6737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
6740 u8 syndrome[0x20];
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743 u8 table_id[0x18];
6744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746};
6747
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006748struct mlx5_ifc_flow_table_context_bits {
6749 u8 encap_en[0x1];
6750 u8 decap_en[0x1];
6751 u8 reserved_at_2[0x2];
6752 u8 table_miss_action[0x4];
6753 u8 level[0x8];
6754 u8 reserved_at_10[0x8];
6755 u8 log_size[0x8];
6756
6757 u8 reserved_at_20[0x8];
6758 u8 table_miss_id[0x18];
6759
6760 u8 reserved_at_40[0x8];
6761 u8 lag_master_next_table_id[0x18];
6762
6763 u8 reserved_at_60[0xe0];
6764};
6765
Saeed Mahameede2816822015-05-28 22:28:40 +03006766struct mlx5_ifc_create_flow_table_in_bits {
6767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771 u8 op_mod[0x10];
6772
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006773 u8 other_vport[0x1];
6774 u8 reserved_at_41[0xf];
6775 u8 vport_number[0x10];
6776
6777 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778
6779 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006784 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006785};
6786
6787struct mlx5_ifc_create_flow_group_out_bits {
6788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790
6791 u8 syndrome[0x20];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794 u8 group_id[0x18];
6795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797};
6798
6799enum {
6800 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6801 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6802 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6803};
6804
6805struct mlx5_ifc_create_flow_group_in_bits {
6806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
Matan Barakb4ff3a32016-02-09 14:57:42 +02006809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810 u8 op_mod[0x10];
6811
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006812 u8 other_vport[0x1];
6813 u8 reserved_at_41[0xf];
6814 u8 vport_number[0x10];
6815
6816 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817
6818 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822 u8 table_id[0x18];
6823
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
6826 u8 start_flow_index[0x20];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829
6830 u8 end_flow_index[0x20];
6831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835 u8 match_criteria_enable[0x8];
6836
6837 struct mlx5_ifc_fte_match_param_bits match_criteria;
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842struct mlx5_ifc_create_eq_out_bits {
6843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
6846 u8 syndrome[0x20];
6847
Matan Barakb4ff3a32016-02-09 14:57:42 +02006848 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849 u8 eq_number[0x8];
6850
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852};
6853
6854struct mlx5_ifc_create_eq_in_bits {
6855 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859 u8 op_mod[0x10];
6860
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
6863 struct mlx5_ifc_eqc_bits eq_context_entry;
6864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866
6867 u8 event_bitmask[0x40];
6868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870
6871 u8 pas[0][0x40];
6872};
6873
6874struct mlx5_ifc_create_dct_out_bits {
6875 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877
6878 u8 syndrome[0x20];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881 u8 dctn[0x18];
6882
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884};
6885
6886struct mlx5_ifc_create_dct_in_bits {
6887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891 u8 op_mod[0x10];
6892
Matan Barakb4ff3a32016-02-09 14:57:42 +02006893 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006894
6895 struct mlx5_ifc_dctc_bits dct_context_entry;
6896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898};
6899
6900struct mlx5_ifc_create_cq_out_bits {
6901 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903
6904 u8 syndrome[0x20];
6905
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907 u8 cqn[0x18];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910};
6911
6912struct mlx5_ifc_create_cq_in_bits {
6913 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915
Matan Barakb4ff3a32016-02-09 14:57:42 +02006916 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917 u8 op_mod[0x10];
6918
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
6921 struct mlx5_ifc_cqc_bits cq_context;
6922
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
6925 u8 pas[0][0x40];
6926};
6927
6928struct mlx5_ifc_config_int_moderation_out_bits {
6929 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006930 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006931
6932 u8 syndrome[0x20];
6933
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935 u8 min_delay[0xc];
6936 u8 int_vector[0x10];
6937
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939};
6940
6941enum {
6942 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6943 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6944};
6945
6946struct mlx5_ifc_config_int_moderation_in_bits {
6947 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949
Matan Barakb4ff3a32016-02-09 14:57:42 +02006950 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006951 u8 op_mod[0x10];
6952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954 u8 min_delay[0xc];
6955 u8 int_vector[0x10];
6956
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958};
6959
6960struct mlx5_ifc_attach_to_mcg_out_bits {
6961 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006962 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006963
6964 u8 syndrome[0x20];
6965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967};
6968
6969struct mlx5_ifc_attach_to_mcg_in_bits {
6970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974 u8 op_mod[0x10];
6975
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977 u8 qpn[0x18];
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980
6981 u8 multicast_gid[16][0x8];
6982};
6983
Saeed Mahameed74862162016-06-09 15:11:34 +03006984struct mlx5_ifc_arm_xrq_out_bits {
6985 u8 status[0x8];
6986 u8 reserved_at_8[0x18];
6987
6988 u8 syndrome[0x20];
6989
6990 u8 reserved_at_40[0x40];
6991};
6992
6993struct mlx5_ifc_arm_xrq_in_bits {
6994 u8 opcode[0x10];
6995 u8 reserved_at_10[0x10];
6996
6997 u8 reserved_at_20[0x10];
6998 u8 op_mod[0x10];
6999
7000 u8 reserved_at_40[0x8];
7001 u8 xrqn[0x18];
7002
7003 u8 reserved_at_60[0x10];
7004 u8 lwm[0x10];
7005};
7006
Saeed Mahameede2816822015-05-28 22:28:40 +03007007struct mlx5_ifc_arm_xrc_srq_out_bits {
7008 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010
7011 u8 syndrome[0x20];
7012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014};
7015
7016enum {
7017 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7018};
7019
7020struct mlx5_ifc_arm_xrc_srq_in_bits {
7021 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023
Matan Barakb4ff3a32016-02-09 14:57:42 +02007024 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007025 u8 op_mod[0x10];
7026
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028 u8 xrc_srqn[0x18];
7029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 lwm[0x10];
7032};
7033
7034struct mlx5_ifc_arm_rq_out_bits {
7035 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037
7038 u8 syndrome[0x20];
7039
Matan Barakb4ff3a32016-02-09 14:57:42 +02007040 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007041};
7042
7043enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007044 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7045 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007046};
7047
7048struct mlx5_ifc_arm_rq_in_bits {
7049 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053 u8 op_mod[0x10];
7054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056 u8 srq_number[0x18];
7057
Matan Barakb4ff3a32016-02-09 14:57:42 +02007058 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007059 u8 lwm[0x10];
7060};
7061
7062struct mlx5_ifc_arm_dct_out_bits {
7063 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065
7066 u8 syndrome[0x20];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069};
7070
7071struct mlx5_ifc_arm_dct_in_bits {
7072 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 op_mod[0x10];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079 u8 dct_number[0x18];
7080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082};
7083
7084struct mlx5_ifc_alloc_xrcd_out_bits {
7085 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087
7088 u8 syndrome[0x20];
7089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091 u8 xrcd[0x18];
7092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094};
7095
7096struct mlx5_ifc_alloc_xrcd_in_bits {
7097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101 u8 op_mod[0x10];
7102
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104};
7105
7106struct mlx5_ifc_alloc_uar_out_bits {
7107 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109
7110 u8 syndrome[0x20];
7111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113 u8 uar[0x18];
7114
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116};
7117
7118struct mlx5_ifc_alloc_uar_in_bits {
7119 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007120 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123 u8 op_mod[0x10];
7124
Matan Barakb4ff3a32016-02-09 14:57:42 +02007125 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007126};
7127
7128struct mlx5_ifc_alloc_transport_domain_out_bits {
7129 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131
7132 u8 syndrome[0x20];
7133
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135 u8 transport_domain[0x18];
7136
Matan Barakb4ff3a32016-02-09 14:57:42 +02007137 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007138};
7139
7140struct mlx5_ifc_alloc_transport_domain_in_bits {
7141 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007142 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145 u8 op_mod[0x10];
7146
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148};
7149
7150struct mlx5_ifc_alloc_q_counter_out_bits {
7151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153
7154 u8 syndrome[0x20];
7155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157 u8 counter_set_id[0x8];
7158
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160};
7161
7162struct mlx5_ifc_alloc_q_counter_in_bits {
7163 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167 u8 op_mod[0x10];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170};
7171
7172struct mlx5_ifc_alloc_pd_out_bits {
7173 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175
7176 u8 syndrome[0x20];
7177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179 u8 pd[0x18];
7180
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182};
7183
7184struct mlx5_ifc_alloc_pd_in_bits {
7185 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189 u8 op_mod[0x10];
7190
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192};
7193
Amir Vadai9dc0b282016-05-13 12:55:39 +00007194struct mlx5_ifc_alloc_flow_counter_out_bits {
7195 u8 status[0x8];
7196 u8 reserved_at_8[0x18];
7197
7198 u8 syndrome[0x20];
7199
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007200 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007201
7202 u8 reserved_at_60[0x20];
7203};
7204
7205struct mlx5_ifc_alloc_flow_counter_in_bits {
7206 u8 opcode[0x10];
7207 u8 reserved_at_10[0x10];
7208
7209 u8 reserved_at_20[0x10];
7210 u8 op_mod[0x10];
7211
7212 u8 reserved_at_40[0x40];
7213};
7214
Saeed Mahameede2816822015-05-28 22:28:40 +03007215struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7216 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218
7219 u8 syndrome[0x20];
7220
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222};
7223
7224struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229 u8 op_mod[0x10];
7230
Matan Barakb4ff3a32016-02-09 14:57:42 +02007231 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007232
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234 u8 vxlan_udp_port[0x10];
7235};
7236
Saeed Mahameed74862162016-06-09 15:11:34 +03007237struct mlx5_ifc_set_rate_limit_out_bits {
7238 u8 status[0x8];
7239 u8 reserved_at_8[0x18];
7240
7241 u8 syndrome[0x20];
7242
7243 u8 reserved_at_40[0x40];
7244};
7245
7246struct mlx5_ifc_set_rate_limit_in_bits {
7247 u8 opcode[0x10];
7248 u8 reserved_at_10[0x10];
7249
7250 u8 reserved_at_20[0x10];
7251 u8 op_mod[0x10];
7252
7253 u8 reserved_at_40[0x10];
7254 u8 rate_limit_index[0x10];
7255
7256 u8 reserved_at_60[0x20];
7257
7258 u8 rate_limit[0x20];
7259};
7260
Saeed Mahameede2816822015-05-28 22:28:40 +03007261struct mlx5_ifc_access_register_out_bits {
7262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264
7265 u8 syndrome[0x20];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268
7269 u8 register_data[0][0x20];
7270};
7271
7272enum {
7273 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7274 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7275};
7276
7277struct mlx5_ifc_access_register_in_bits {
7278 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280
Matan Barakb4ff3a32016-02-09 14:57:42 +02007281 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007282 u8 op_mod[0x10];
7283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285 u8 register_id[0x10];
7286
7287 u8 argument[0x20];
7288
7289 u8 register_data[0][0x20];
7290};
7291
7292struct mlx5_ifc_sltp_reg_bits {
7293 u8 status[0x4];
7294 u8 version[0x4];
7295 u8 local_port[0x8];
7296 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300
Matan Barakb4ff3a32016-02-09 14:57:42 +02007301 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007302
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304 u8 polarity[0x1];
7305 u8 ob_tap0[0x8];
7306 u8 ob_tap1[0x8];
7307 u8 ob_tap2[0x8];
7308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 ob_preemp_mode[0x4];
7311 u8 ob_reg[0x8];
7312 u8 ob_bias[0x8];
7313
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315};
7316
7317struct mlx5_ifc_slrg_reg_bits {
7318 u8 status[0x4];
7319 u8 version[0x4];
7320 u8 local_port[0x8];
7321 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007322 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007323 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007324 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007325
7326 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007327 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007328 u8 grade_lane_speed[0x4];
7329
7330 u8 grade_version[0x8];
7331 u8 grade[0x18];
7332
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334 u8 height_grade_type[0x4];
7335 u8 height_grade[0x18];
7336
7337 u8 height_dz[0x10];
7338 u8 height_dv[0x10];
7339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 height_sigma[0x10];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344
Matan Barakb4ff3a32016-02-09 14:57:42 +02007345 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007346 u8 phase_grade_type[0x4];
7347 u8 phase_grade[0x18];
7348
Matan Barakb4ff3a32016-02-09 14:57:42 +02007349 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007350 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352 u8 phase_eo_neg[0x8];
7353
7354 u8 ffe_set_tested[0x10];
7355 u8 test_errors_per_lane[0x10];
7356};
7357
7358struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362
Matan Barakb4ff3a32016-02-09 14:57:42 +02007363 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007364 u8 vl_hw_cap[0x4];
7365
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367 u8 vl_admin[0x4];
7368
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 vl_operational[0x4];
7371};
7372
7373struct mlx5_ifc_pude_reg_bits {
7374 u8 swid[0x8];
7375 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007376 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007377 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007378 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007379 u8 oper_status[0x4];
7380
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382};
7383
7384struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007385 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007386 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007387 u8 an_disable_cap[0x1];
7388 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391 u8 proto_mask[0x3];
7392
Saeed Mahameed74862162016-06-09 15:11:34 +03007393 u8 an_status[0x4];
7394 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395
7396 u8 eth_proto_capability[0x20];
7397
7398 u8 ib_link_width_capability[0x10];
7399 u8 ib_proto_capability[0x10];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402
7403 u8 eth_proto_admin[0x20];
7404
7405 u8 ib_link_width_admin[0x10];
7406 u8 ib_proto_admin[0x10];
7407
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409
7410 u8 eth_proto_oper[0x20];
7411
7412 u8 ib_link_width_oper[0x10];
7413 u8 ib_proto_oper[0x10];
7414
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007415 u8 reserved_at_160[0x1c];
7416 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417
7418 u8 eth_proto_lp_advertise[0x20];
7419
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421};
7422
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007423struct mlx5_ifc_mlcr_reg_bits {
7424 u8 reserved_at_0[0x8];
7425 u8 local_port[0x8];
7426 u8 reserved_at_10[0x20];
7427
7428 u8 beacon_duration[0x10];
7429 u8 reserved_at_40[0x10];
7430
7431 u8 beacon_remain[0x10];
7432};
7433
Saeed Mahameede2816822015-05-28 22:28:40 +03007434struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007435 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007436
7437 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 repetitions_mode[0x4];
7440 u8 num_of_repetitions[0x8];
7441
7442 u8 grade_version[0x8];
7443 u8 height_grade_type[0x4];
7444 u8 phase_grade_type[0x4];
7445 u8 height_grade_weight[0x8];
7446 u8 phase_grade_weight[0x8];
7447
7448 u8 gisim_measure_bits[0x10];
7449 u8 adaptive_tap_measure_bits[0x10];
7450
7451 u8 ber_bath_high_error_threshold[0x10];
7452 u8 ber_bath_mid_error_threshold[0x10];
7453
7454 u8 ber_bath_low_error_threshold[0x10];
7455 u8 one_ratio_high_threshold[0x10];
7456
7457 u8 one_ratio_high_mid_threshold[0x10];
7458 u8 one_ratio_low_mid_threshold[0x10];
7459
7460 u8 one_ratio_low_threshold[0x10];
7461 u8 ndeo_error_threshold[0x10];
7462
7463 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 mix90_phase_for_voltage_bath[0x8];
7466
7467 u8 mixer_offset_start[0x10];
7468 u8 mixer_offset_end[0x10];
7469
Matan Barakb4ff3a32016-02-09 14:57:42 +02007470 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007471 u8 ber_test_time[0xb];
7472};
7473
7474struct mlx5_ifc_pspa_reg_bits {
7475 u8 swid[0x8];
7476 u8 local_port[0x8];
7477 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481};
7482
7483struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007484 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489 u8 mode[0x2];
7490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 min_threshold[0x10];
7495
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 max_threshold[0x10];
7498
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500 u8 mark_probability_denominator[0x10];
7501
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503};
7504
7505struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007506 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513 u8 wrps_admin[0x4];
7514
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 wrps_status[0x4];
7517
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 down_threshold[0x8];
7522
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526 u8 srps_admin[0x4];
7527
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 srps_status[0x4];
7530
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532};
7533
7534struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007537 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007538
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542 u8 lb_en[0x8];
7543};
7544
7545struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551
7552 u8 port_profile_mode[0x8];
7553 u8 static_port_profile[0x8];
7554 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556
7557 u8 retransmission_active[0x8];
7558 u8 fec_mode_active[0x18];
7559
Matan Barakb4ff3a32016-02-09 14:57:42 +02007560 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007561};
7562
7563struct mlx5_ifc_ppcnt_reg_bits {
7564 u8 swid[0x8];
7565 u8 local_port[0x8];
7566 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568 u8 grp[0x6];
7569
7570 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 prio_tc[0x3];
7573
7574 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7575};
7576
Gal Pressman8ed1a632016-11-17 13:46:01 +02007577struct mlx5_ifc_mpcnt_reg_bits {
7578 u8 reserved_at_0[0x8];
7579 u8 pcie_index[0x8];
7580 u8 reserved_at_10[0xa];
7581 u8 grp[0x6];
7582
7583 u8 clr[0x1];
7584 u8 reserved_at_21[0x1f];
7585
7586 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7587};
7588
Saeed Mahameede2816822015-05-28 22:28:40 +03007589struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 local_port[0x8];
7594 u8 mac_47_32[0x10];
7595
7596 u8 mac_31_0[0x20];
7597
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599};
7600
7601struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007605
7606 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608
7609 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611
7612 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614};
7615
7616struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 attenuation_5g[0x8];
7623
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625 u8 attenuation_7g[0x8];
7626
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 attenuation_12g[0x8];
7629};
7630
7631struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 module_status[0x4];
7636
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638};
7639
7640struct mlx5_ifc_pmpc_reg_bits {
7641 u8 module_state_updated[32][0x8];
7642};
7643
7644struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646 u8 mlpn_status[0x4];
7647 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649
7650 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652};
7653
7654struct mlx5_ifc_pmlp_reg_bits {
7655 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 width[0x8];
7660
7661 u8 lane0_module_mapping[0x20];
7662
7663 u8 lane1_module_mapping[0x20];
7664
7665 u8 lane2_module_mapping[0x20];
7666
7667 u8 lane3_module_mapping[0x20];
7668
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670};
7671
7672struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678 u8 oper_status[0x4];
7679
7680 u8 ase[0x1];
7681 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 e[0x2];
7684
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686};
7687
7688struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 lane_speed[0x10];
7697
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699 u8 lpbf[0x1];
7700 u8 fec_mode_policy[0x8];
7701
7702 u8 retransmission_capability[0x8];
7703 u8 fec_mode_capability[0x18];
7704
7705 u8 retransmission_support_admin[0x8];
7706 u8 fec_mode_support_admin[0x18];
7707
7708 u8 retransmission_request_admin[0x8];
7709 u8 fec_mode_request_admin[0x18];
7710
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712};
7713
7714struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718 u8 ib_port[0x8];
7719
Matan Barakb4ff3a32016-02-09 14:57:42 +02007720 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007721};
7722
7723struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007726 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007727 u8 lbf_mode[0x3];
7728
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730};
7731
7732struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736
7737 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741};
7742
7743struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749
7750 u8 port_filter[8][0x20];
7751
7752 u8 port_filter_update_en[8][0x20];
7753};
7754
7755struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007756 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007757 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007758 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007759
7760 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 prio_mask_rx[0x8];
7765
7766 u8 pptx[0x1];
7767 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007768 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007769 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007770 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007771
7772 u8 pprx[0x1];
7773 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779};
7780
7781struct mlx5_ifc_pelc_reg_bits {
7782 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007783 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007784 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786
7787 u8 op_admin[0x8];
7788 u8 op_capability[0x8];
7789 u8 op_request[0x8];
7790 u8 op_active[0x8];
7791
7792 u8 admin[0x40];
7793
7794 u8 capability[0x40];
7795
7796 u8 request[0x40];
7797
7798 u8 active[0x40];
7799
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801};
7802
7803struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 error_type[0x8];
7816};
7817
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007818struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007819 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007820
Gal Pressman2dba0792017-06-18 14:56:45 +03007821 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007822 u8 ptys_connector_type[0x1];
7823 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007824 u8 ppcnt_discard_group[0x1];
7825 u8 ppcnt_statistical_group[0x1];
7826};
7827
7828struct mlx5_ifc_pcam_reg_bits {
7829 u8 reserved_at_0[0x8];
7830 u8 feature_group[0x8];
7831 u8 reserved_at_10[0x8];
7832 u8 access_reg_group[0x8];
7833
7834 u8 reserved_at_20[0x20];
7835
7836 union {
7837 u8 reserved_at_0[0x80];
7838 } port_access_reg_cap_mask;
7839
7840 u8 reserved_at_c0[0x80];
7841
7842 union {
7843 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7844 u8 reserved_at_0[0x80];
7845 } feature_cap_mask;
7846
7847 u8 reserved_at_1c0[0xc0];
7848};
7849
7850struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007851 u8 reserved_at_0[0x7b];
7852 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007853 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007854 u8 mtpps_enh_out_per_adj[0x1];
7855 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007856 u8 pcie_performance_group[0x1];
7857};
7858
Or Gerlitz0ab87742017-06-11 15:25:38 +03007859struct mlx5_ifc_mcam_access_reg_bits {
7860 u8 reserved_at_0[0x1c];
7861 u8 mcda[0x1];
7862 u8 mcc[0x1];
7863 u8 mcqi[0x1];
7864 u8 reserved_at_1f[0x1];
7865
7866 u8 regs_95_to_64[0x20];
7867 u8 regs_63_to_32[0x20];
7868 u8 regs_31_to_0[0x20];
7869};
7870
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007871struct mlx5_ifc_mcam_reg_bits {
7872 u8 reserved_at_0[0x8];
7873 u8 feature_group[0x8];
7874 u8 reserved_at_10[0x8];
7875 u8 access_reg_group[0x8];
7876
7877 u8 reserved_at_20[0x20];
7878
7879 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007880 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007881 u8 reserved_at_0[0x80];
7882 } mng_access_reg_cap_mask;
7883
7884 u8 reserved_at_c0[0x80];
7885
7886 union {
7887 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7888 u8 reserved_at_0[0x80];
7889 } mng_feature_cap_mask;
7890
7891 u8 reserved_at_1c0[0x80];
7892};
7893
Huy Nguyenc02762e2017-07-18 16:03:17 -05007894struct mlx5_ifc_qcam_access_reg_cap_mask {
7895 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7896 u8 qpdpm[0x1];
7897 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7898 u8 qdpm[0x1];
7899 u8 qpts[0x1];
7900 u8 qcap[0x1];
7901 u8 qcam_access_reg_cap_mask_0[0x1];
7902};
7903
7904struct mlx5_ifc_qcam_qos_feature_cap_mask {
7905 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7906 u8 qpts_trust_both[0x1];
7907};
7908
7909struct mlx5_ifc_qcam_reg_bits {
7910 u8 reserved_at_0[0x8];
7911 u8 feature_group[0x8];
7912 u8 reserved_at_10[0x8];
7913 u8 access_reg_group[0x8];
7914 u8 reserved_at_20[0x20];
7915
7916 union {
7917 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7918 u8 reserved_at_0[0x80];
7919 } qos_access_reg_cap_mask;
7920
7921 u8 reserved_at_c0[0x80];
7922
7923 union {
7924 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7925 u8 reserved_at_0[0x80];
7926 } qos_feature_cap_mask;
7927
7928 u8 reserved_at_1c0[0x80];
7929};
7930
Saeed Mahameede2816822015-05-28 22:28:40 +03007931struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007934 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007935
7936 u8 port_capability_mask[4][0x20];
7937};
7938
7939struct mlx5_ifc_paos_reg_bits {
7940 u8 swid[0x8];
7941 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945 u8 oper_status[0x4];
7946
7947 u8 ase[0x1];
7948 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007949 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950 u8 e[0x2];
7951
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953};
7954
7955struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959 u8 opamp_group_type[0x4];
7960
7961 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963 u8 num_of_indices[0xc];
7964
7965 u8 index_data[18][0x10];
7966};
7967
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007968struct mlx5_ifc_pcmr_reg_bits {
7969 u8 reserved_at_0[0x8];
7970 u8 local_port[0x8];
7971 u8 reserved_at_10[0x2e];
7972 u8 fcs_cap[0x1];
7973 u8 reserved_at_3f[0x1f];
7974 u8 fcs_chk[0x1];
7975 u8 reserved_at_5f[0x1];
7976};
7977
Saeed Mahameede2816822015-05-28 22:28:40 +03007978struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007979 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007980 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007981 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007982 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007983 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007984 u8 module[0x8];
7985};
7986
7987struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989 u8 lossy[0x1];
7990 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007991 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007992 u8 size[0xc];
7993
7994 u8 xoff_threshold[0x10];
7995 u8 xon_threshold[0x10];
7996};
7997
7998struct mlx5_ifc_set_node_in_bits {
7999 u8 node_description[64][0x8];
8000};
8001
8002struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008003 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008004 u8 power_settings_level[0x8];
8005
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007};
8008
8009struct mlx5_ifc_register_host_endianness_bits {
8010 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008011 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008012
Matan Barakb4ff3a32016-02-09 14:57:42 +02008013 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008014};
8015
8016struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008017 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008018
8019 u8 mkey[0x20];
8020
8021 u8 addressh_63_32[0x20];
8022
8023 u8 addressl_31_0[0x20];
8024};
8025
8026struct mlx5_ifc_ud_adrs_vector_bits {
8027 u8 dc_key[0x40];
8028
8029 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008030 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008031 u8 destination_qp_dct[0x18];
8032
8033 u8 static_rate[0x4];
8034 u8 sl_eth_prio[0x4];
8035 u8 fl[0x1];
8036 u8 mlid[0x7];
8037 u8 rlid_udp_sport[0x10];
8038
Matan Barakb4ff3a32016-02-09 14:57:42 +02008039 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008040
8041 u8 rmac_47_16[0x20];
8042
8043 u8 rmac_15_0[0x10];
8044 u8 tclass[0x8];
8045 u8 hop_limit[0x8];
8046
Matan Barakb4ff3a32016-02-09 14:57:42 +02008047 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008048 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050 u8 src_addr_index[0x8];
8051 u8 flow_label[0x14];
8052
8053 u8 rgid_rip[16][0x8];
8054};
8055
8056struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008057 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008058 u8 function_id[0x10];
8059
8060 u8 num_pages[0x20];
8061
Matan Barakb4ff3a32016-02-09 14:57:42 +02008062 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008063};
8064
8065struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008066 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008067 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008068 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008069 u8 event_sub_type[0x8];
8070
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072
8073 union mlx5_ifc_event_auto_bits event_data;
8074
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008077 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008078 u8 owner[0x1];
8079};
8080
8081enum {
8082 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8083};
8084
8085struct mlx5_ifc_cmd_queue_entry_bits {
8086 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008087 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008088
8089 u8 input_length[0x20];
8090
8091 u8 input_mailbox_pointer_63_32[0x20];
8092
8093 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008094 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008095
8096 u8 command_input_inline_data[16][0x8];
8097
8098 u8 command_output_inline_data[16][0x8];
8099
8100 u8 output_mailbox_pointer_63_32[0x20];
8101
8102 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104
8105 u8 output_length[0x20];
8106
8107 u8 token[0x8];
8108 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008109 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008110 u8 status[0x7];
8111 u8 ownership[0x1];
8112};
8113
8114struct mlx5_ifc_cmd_out_bits {
8115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008117
8118 u8 syndrome[0x20];
8119
8120 u8 command_output[0x20];
8121};
8122
8123struct mlx5_ifc_cmd_in_bits {
8124 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008125 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008126
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008128 u8 op_mod[0x10];
8129
8130 u8 command[0][0x20];
8131};
8132
8133struct mlx5_ifc_cmd_if_box_bits {
8134 u8 mailbox_data[512][0x8];
8135
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137
8138 u8 next_pointer_63_32[0x20];
8139
8140 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008141 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008142
8143 u8 block_number[0x20];
8144
Matan Barakb4ff3a32016-02-09 14:57:42 +02008145 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008146 u8 token[0x8];
8147 u8 ctrl_signature[0x8];
8148 u8 signature[0x8];
8149};
8150
8151struct mlx5_ifc_mtt_bits {
8152 u8 ptag_63_32[0x20];
8153
8154 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008155 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008156 u8 wr_en[0x1];
8157 u8 rd_en[0x1];
8158};
8159
Tariq Toukan928cfe82016-02-22 18:17:29 +02008160struct mlx5_ifc_query_wol_rol_out_bits {
8161 u8 status[0x8];
8162 u8 reserved_at_8[0x18];
8163
8164 u8 syndrome[0x20];
8165
8166 u8 reserved_at_40[0x10];
8167 u8 rol_mode[0x8];
8168 u8 wol_mode[0x8];
8169
8170 u8 reserved_at_60[0x20];
8171};
8172
8173struct mlx5_ifc_query_wol_rol_in_bits {
8174 u8 opcode[0x10];
8175 u8 reserved_at_10[0x10];
8176
8177 u8 reserved_at_20[0x10];
8178 u8 op_mod[0x10];
8179
8180 u8 reserved_at_40[0x40];
8181};
8182
8183struct mlx5_ifc_set_wol_rol_out_bits {
8184 u8 status[0x8];
8185 u8 reserved_at_8[0x18];
8186
8187 u8 syndrome[0x20];
8188
8189 u8 reserved_at_40[0x40];
8190};
8191
8192struct mlx5_ifc_set_wol_rol_in_bits {
8193 u8 opcode[0x10];
8194 u8 reserved_at_10[0x10];
8195
8196 u8 reserved_at_20[0x10];
8197 u8 op_mod[0x10];
8198
8199 u8 rol_mode_valid[0x1];
8200 u8 wol_mode_valid[0x1];
8201 u8 reserved_at_42[0xe];
8202 u8 rol_mode[0x8];
8203 u8 wol_mode[0x8];
8204
8205 u8 reserved_at_60[0x20];
8206};
8207
Saeed Mahameede2816822015-05-28 22:28:40 +03008208enum {
8209 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8210 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8211 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8212};
8213
8214enum {
8215 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8216 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8217 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8218};
8219
8220enum {
8221 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8222 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8223 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8224 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8225 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8226 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8227 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8228 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8229 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8230 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8231 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8232};
8233
8234struct mlx5_ifc_initial_seg_bits {
8235 u8 fw_rev_minor[0x10];
8236 u8 fw_rev_major[0x10];
8237
8238 u8 cmd_interface_rev[0x10];
8239 u8 fw_rev_subminor[0x10];
8240
Matan Barakb4ff3a32016-02-09 14:57:42 +02008241 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008242
8243 u8 cmdq_phy_addr_63_32[0x20];
8244
8245 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008246 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008247 u8 nic_interface[0x2];
8248 u8 log_cmdq_size[0x4];
8249 u8 log_cmdq_stride[0x4];
8250
8251 u8 command_doorbell_vector[0x20];
8252
Matan Barakb4ff3a32016-02-09 14:57:42 +02008253 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008254
8255 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008256 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008257 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008258 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008259
8260 struct mlx5_ifc_health_buffer_bits health_buffer;
8261
8262 u8 no_dram_nic_offset[0x20];
8263
Matan Barakb4ff3a32016-02-09 14:57:42 +02008264 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008265
Matan Barakb4ff3a32016-02-09 14:57:42 +02008266 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008267 u8 clear_int[0x1];
8268
8269 u8 health_syndrome[0x8];
8270 u8 health_counter[0x18];
8271
Matan Barakb4ff3a32016-02-09 14:57:42 +02008272 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008273};
8274
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008275struct mlx5_ifc_mtpps_reg_bits {
8276 u8 reserved_at_0[0xc];
8277 u8 cap_number_of_pps_pins[0x4];
8278 u8 reserved_at_10[0x4];
8279 u8 cap_max_num_of_pps_in_pins[0x4];
8280 u8 reserved_at_18[0x4];
8281 u8 cap_max_num_of_pps_out_pins[0x4];
8282
8283 u8 reserved_at_20[0x24];
8284 u8 cap_pin_3_mode[0x4];
8285 u8 reserved_at_48[0x4];
8286 u8 cap_pin_2_mode[0x4];
8287 u8 reserved_at_50[0x4];
8288 u8 cap_pin_1_mode[0x4];
8289 u8 reserved_at_58[0x4];
8290 u8 cap_pin_0_mode[0x4];
8291
8292 u8 reserved_at_60[0x4];
8293 u8 cap_pin_7_mode[0x4];
8294 u8 reserved_at_68[0x4];
8295 u8 cap_pin_6_mode[0x4];
8296 u8 reserved_at_70[0x4];
8297 u8 cap_pin_5_mode[0x4];
8298 u8 reserved_at_78[0x4];
8299 u8 cap_pin_4_mode[0x4];
8300
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008301 u8 field_select[0x20];
8302 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008303
8304 u8 enable[0x1];
8305 u8 reserved_at_101[0xb];
8306 u8 pattern[0x4];
8307 u8 reserved_at_110[0x4];
8308 u8 pin_mode[0x4];
8309 u8 pin[0x8];
8310
8311 u8 reserved_at_120[0x20];
8312
8313 u8 time_stamp[0x40];
8314
8315 u8 out_pulse_duration[0x10];
8316 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008317 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008318
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008319 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008320};
8321
8322struct mlx5_ifc_mtppse_reg_bits {
8323 u8 reserved_at_0[0x18];
8324 u8 pin[0x8];
8325 u8 event_arm[0x1];
8326 u8 reserved_at_21[0x1b];
8327 u8 event_generation_mode[0x4];
8328 u8 reserved_at_40[0x40];
8329};
8330
Or Gerlitz47176282017-04-18 13:35:39 +03008331struct mlx5_ifc_mcqi_cap_bits {
8332 u8 supported_info_bitmask[0x20];
8333
8334 u8 component_size[0x20];
8335
8336 u8 max_component_size[0x20];
8337
8338 u8 log_mcda_word_size[0x4];
8339 u8 reserved_at_64[0xc];
8340 u8 mcda_max_write_size[0x10];
8341
8342 u8 rd_en[0x1];
8343 u8 reserved_at_81[0x1];
8344 u8 match_chip_id[0x1];
8345 u8 match_psid[0x1];
8346 u8 check_user_timestamp[0x1];
8347 u8 match_base_guid_mac[0x1];
8348 u8 reserved_at_86[0x1a];
8349};
8350
8351struct mlx5_ifc_mcqi_reg_bits {
8352 u8 read_pending_component[0x1];
8353 u8 reserved_at_1[0xf];
8354 u8 component_index[0x10];
8355
8356 u8 reserved_at_20[0x20];
8357
8358 u8 reserved_at_40[0x1b];
8359 u8 info_type[0x5];
8360
8361 u8 info_size[0x20];
8362
8363 u8 offset[0x20];
8364
8365 u8 reserved_at_a0[0x10];
8366 u8 data_size[0x10];
8367
8368 u8 data[0][0x20];
8369};
8370
8371struct mlx5_ifc_mcc_reg_bits {
8372 u8 reserved_at_0[0x4];
8373 u8 time_elapsed_since_last_cmd[0xc];
8374 u8 reserved_at_10[0x8];
8375 u8 instruction[0x8];
8376
8377 u8 reserved_at_20[0x10];
8378 u8 component_index[0x10];
8379
8380 u8 reserved_at_40[0x8];
8381 u8 update_handle[0x18];
8382
8383 u8 handle_owner_type[0x4];
8384 u8 handle_owner_host_id[0x4];
8385 u8 reserved_at_68[0x1];
8386 u8 control_progress[0x7];
8387 u8 error_code[0x8];
8388 u8 reserved_at_78[0x4];
8389 u8 control_state[0x4];
8390
8391 u8 component_size[0x20];
8392
8393 u8 reserved_at_a0[0x60];
8394};
8395
8396struct mlx5_ifc_mcda_reg_bits {
8397 u8 reserved_at_0[0x8];
8398 u8 update_handle[0x18];
8399
8400 u8 offset[0x20];
8401
8402 u8 reserved_at_40[0x10];
8403 u8 size[0x10];
8404
8405 u8 reserved_at_60[0x20];
8406
8407 u8 data[0][0x20];
8408};
8409
Saeed Mahameede2816822015-05-28 22:28:40 +03008410union mlx5_ifc_ports_control_registers_document_bits {
8411 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8412 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8413 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8414 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8415 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8416 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8417 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8418 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8419 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8420 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8421 struct mlx5_ifc_paos_reg_bits paos_reg;
8422 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8423 struct mlx5_ifc_peir_reg_bits peir_reg;
8424 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8425 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008426 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008427 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8428 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8429 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8430 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8431 struct mlx5_ifc_plib_reg_bits plib_reg;
8432 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8433 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8434 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8435 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8436 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8437 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8438 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8439 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8440 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8441 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008442 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008443 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8444 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8445 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8446 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8447 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8448 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8449 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008450 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008451 struct mlx5_ifc_pude_reg_bits pude_reg;
8452 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8453 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8454 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008455 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8456 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008457 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008458 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8459 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008460 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8461 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8462 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008463 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008464};
8465
8466union mlx5_ifc_debug_enhancements_document_bits {
8467 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008468 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008469};
8470
8471union mlx5_ifc_uplink_pci_interface_document_bits {
8472 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008473 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008474};
8475
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008476struct mlx5_ifc_set_flow_table_root_out_bits {
8477 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008478 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008479
8480 u8 syndrome[0x20];
8481
Matan Barakb4ff3a32016-02-09 14:57:42 +02008482 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008483};
8484
8485struct mlx5_ifc_set_flow_table_root_in_bits {
8486 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008487 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008488
Matan Barakb4ff3a32016-02-09 14:57:42 +02008489 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008490 u8 op_mod[0x10];
8491
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008492 u8 other_vport[0x1];
8493 u8 reserved_at_41[0xf];
8494 u8 vport_number[0x10];
8495
8496 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008497
8498 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008499 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008500
Matan Barakb4ff3a32016-02-09 14:57:42 +02008501 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008502 u8 table_id[0x18];
8503
Erez Shitrit500a3d02017-04-13 06:36:51 +03008504 u8 reserved_at_c0[0x8];
8505 u8 underlay_qpn[0x18];
8506 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008507};
8508
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008509enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008510 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8511 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008512};
8513
8514struct mlx5_ifc_modify_flow_table_out_bits {
8515 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008516 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008517
8518 u8 syndrome[0x20];
8519
Matan Barakb4ff3a32016-02-09 14:57:42 +02008520 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008521};
8522
8523struct mlx5_ifc_modify_flow_table_in_bits {
8524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008525 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008526
Matan Barakb4ff3a32016-02-09 14:57:42 +02008527 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008528 u8 op_mod[0x10];
8529
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008530 u8 other_vport[0x1];
8531 u8 reserved_at_41[0xf];
8532 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008533
Matan Barakb4ff3a32016-02-09 14:57:42 +02008534 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008535 u8 modify_field_select[0x10];
8536
8537 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008538 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008539
Matan Barakb4ff3a32016-02-09 14:57:42 +02008540 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008541 u8 table_id[0x18];
8542
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008543 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008544};
8545
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008546struct mlx5_ifc_ets_tcn_config_reg_bits {
8547 u8 g[0x1];
8548 u8 b[0x1];
8549 u8 r[0x1];
8550 u8 reserved_at_3[0x9];
8551 u8 group[0x4];
8552 u8 reserved_at_10[0x9];
8553 u8 bw_allocation[0x7];
8554
8555 u8 reserved_at_20[0xc];
8556 u8 max_bw_units[0x4];
8557 u8 reserved_at_30[0x8];
8558 u8 max_bw_value[0x8];
8559};
8560
8561struct mlx5_ifc_ets_global_config_reg_bits {
8562 u8 reserved_at_0[0x2];
8563 u8 r[0x1];
8564 u8 reserved_at_3[0x1d];
8565
8566 u8 reserved_at_20[0xc];
8567 u8 max_bw_units[0x4];
8568 u8 reserved_at_30[0x8];
8569 u8 max_bw_value[0x8];
8570};
8571
8572struct mlx5_ifc_qetc_reg_bits {
8573 u8 reserved_at_0[0x8];
8574 u8 port_number[0x8];
8575 u8 reserved_at_10[0x30];
8576
8577 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8578 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8579};
8580
Huy Nguyen415a64a2017-07-18 16:08:46 -05008581struct mlx5_ifc_qpdpm_dscp_reg_bits {
8582 u8 e[0x1];
8583 u8 reserved_at_01[0x0b];
8584 u8 prio[0x04];
8585};
8586
8587struct mlx5_ifc_qpdpm_reg_bits {
8588 u8 reserved_at_0[0x8];
8589 u8 local_port[0x8];
8590 u8 reserved_at_10[0x10];
8591 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8592};
8593
8594struct mlx5_ifc_qpts_reg_bits {
8595 u8 reserved_at_0[0x8];
8596 u8 local_port[0x8];
8597 u8 reserved_at_10[0x2d];
8598 u8 trust_state[0x3];
8599};
8600
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008601struct mlx5_ifc_qtct_reg_bits {
8602 u8 reserved_at_0[0x8];
8603 u8 port_number[0x8];
8604 u8 reserved_at_10[0xd];
8605 u8 prio[0x3];
8606
8607 u8 reserved_at_20[0x1d];
8608 u8 tclass[0x3];
8609};
8610
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008611struct mlx5_ifc_mcia_reg_bits {
8612 u8 l[0x1];
8613 u8 reserved_at_1[0x7];
8614 u8 module[0x8];
8615 u8 reserved_at_10[0x8];
8616 u8 status[0x8];
8617
8618 u8 i2c_device_address[0x8];
8619 u8 page_number[0x8];
8620 u8 device_address[0x10];
8621
8622 u8 reserved_at_40[0x10];
8623 u8 size[0x10];
8624
8625 u8 reserved_at_60[0x20];
8626
8627 u8 dword_0[0x20];
8628 u8 dword_1[0x20];
8629 u8 dword_2[0x20];
8630 u8 dword_3[0x20];
8631 u8 dword_4[0x20];
8632 u8 dword_5[0x20];
8633 u8 dword_6[0x20];
8634 u8 dword_7[0x20];
8635 u8 dword_8[0x20];
8636 u8 dword_9[0x20];
8637 u8 dword_10[0x20];
8638 u8 dword_11[0x20];
8639};
8640
Saeed Mahameed74862162016-06-09 15:11:34 +03008641struct mlx5_ifc_dcbx_param_bits {
8642 u8 dcbx_cee_cap[0x1];
8643 u8 dcbx_ieee_cap[0x1];
8644 u8 dcbx_standby_cap[0x1];
8645 u8 reserved_at_0[0x5];
8646 u8 port_number[0x8];
8647 u8 reserved_at_10[0xa];
8648 u8 max_application_table_size[6];
8649 u8 reserved_at_20[0x15];
8650 u8 version_oper[0x3];
8651 u8 reserved_at_38[5];
8652 u8 version_admin[0x3];
8653 u8 willing_admin[0x1];
8654 u8 reserved_at_41[0x3];
8655 u8 pfc_cap_oper[0x4];
8656 u8 reserved_at_48[0x4];
8657 u8 pfc_cap_admin[0x4];
8658 u8 reserved_at_50[0x4];
8659 u8 num_of_tc_oper[0x4];
8660 u8 reserved_at_58[0x4];
8661 u8 num_of_tc_admin[0x4];
8662 u8 remote_willing[0x1];
8663 u8 reserved_at_61[3];
8664 u8 remote_pfc_cap[4];
8665 u8 reserved_at_68[0x14];
8666 u8 remote_num_of_tc[0x4];
8667 u8 reserved_at_80[0x18];
8668 u8 error[0x8];
8669 u8 reserved_at_a0[0x160];
8670};
Aviv Heller84df61e2016-05-10 13:47:50 +03008671
8672struct mlx5_ifc_lagc_bits {
8673 u8 reserved_at_0[0x1d];
8674 u8 lag_state[0x3];
8675
8676 u8 reserved_at_20[0x14];
8677 u8 tx_remap_affinity_2[0x4];
8678 u8 reserved_at_38[0x4];
8679 u8 tx_remap_affinity_1[0x4];
8680};
8681
8682struct mlx5_ifc_create_lag_out_bits {
8683 u8 status[0x8];
8684 u8 reserved_at_8[0x18];
8685
8686 u8 syndrome[0x20];
8687
8688 u8 reserved_at_40[0x40];
8689};
8690
8691struct mlx5_ifc_create_lag_in_bits {
8692 u8 opcode[0x10];
8693 u8 reserved_at_10[0x10];
8694
8695 u8 reserved_at_20[0x10];
8696 u8 op_mod[0x10];
8697
8698 struct mlx5_ifc_lagc_bits ctx;
8699};
8700
8701struct mlx5_ifc_modify_lag_out_bits {
8702 u8 status[0x8];
8703 u8 reserved_at_8[0x18];
8704
8705 u8 syndrome[0x20];
8706
8707 u8 reserved_at_40[0x40];
8708};
8709
8710struct mlx5_ifc_modify_lag_in_bits {
8711 u8 opcode[0x10];
8712 u8 reserved_at_10[0x10];
8713
8714 u8 reserved_at_20[0x10];
8715 u8 op_mod[0x10];
8716
8717 u8 reserved_at_40[0x20];
8718 u8 field_select[0x20];
8719
8720 struct mlx5_ifc_lagc_bits ctx;
8721};
8722
8723struct mlx5_ifc_query_lag_out_bits {
8724 u8 status[0x8];
8725 u8 reserved_at_8[0x18];
8726
8727 u8 syndrome[0x20];
8728
8729 u8 reserved_at_40[0x40];
8730
8731 struct mlx5_ifc_lagc_bits ctx;
8732};
8733
8734struct mlx5_ifc_query_lag_in_bits {
8735 u8 opcode[0x10];
8736 u8 reserved_at_10[0x10];
8737
8738 u8 reserved_at_20[0x10];
8739 u8 op_mod[0x10];
8740
8741 u8 reserved_at_40[0x40];
8742};
8743
8744struct mlx5_ifc_destroy_lag_out_bits {
8745 u8 status[0x8];
8746 u8 reserved_at_8[0x18];
8747
8748 u8 syndrome[0x20];
8749
8750 u8 reserved_at_40[0x40];
8751};
8752
8753struct mlx5_ifc_destroy_lag_in_bits {
8754 u8 opcode[0x10];
8755 u8 reserved_at_10[0x10];
8756
8757 u8 reserved_at_20[0x10];
8758 u8 op_mod[0x10];
8759
8760 u8 reserved_at_40[0x40];
8761};
8762
8763struct mlx5_ifc_create_vport_lag_out_bits {
8764 u8 status[0x8];
8765 u8 reserved_at_8[0x18];
8766
8767 u8 syndrome[0x20];
8768
8769 u8 reserved_at_40[0x40];
8770};
8771
8772struct mlx5_ifc_create_vport_lag_in_bits {
8773 u8 opcode[0x10];
8774 u8 reserved_at_10[0x10];
8775
8776 u8 reserved_at_20[0x10];
8777 u8 op_mod[0x10];
8778
8779 u8 reserved_at_40[0x40];
8780};
8781
8782struct mlx5_ifc_destroy_vport_lag_out_bits {
8783 u8 status[0x8];
8784 u8 reserved_at_8[0x18];
8785
8786 u8 syndrome[0x20];
8787
8788 u8 reserved_at_40[0x40];
8789};
8790
8791struct mlx5_ifc_destroy_vport_lag_in_bits {
8792 u8 opcode[0x10];
8793 u8 reserved_at_10[0x10];
8794
8795 u8 reserved_at_20[0x10];
8796 u8 op_mod[0x10];
8797
8798 u8 reserved_at_40[0x40];
8799};
8800
Eli Cohend29b7962014-10-02 12:19:43 +03008801#endif /* MLX5_IFC_H */