Ryder Lee | 785e5c6 | 2016-12-19 10:20:44 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Cryptographic API. |
| 3 | * |
| 4 | * Driver for EIP97 SHA1/SHA2(HMAC) acceleration. |
| 5 | * |
| 6 | * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * Some ideas are from atmel-sha.c and omap-sham.c drivers. |
| 13 | */ |
| 14 | |
| 15 | #include <crypto/sha.h> |
| 16 | #include "mtk-platform.h" |
| 17 | |
| 18 | #define SHA_ALIGN_MSK (sizeof(u32) - 1) |
| 19 | #define SHA_QUEUE_SIZE 512 |
| 20 | #define SHA_TMP_BUF_SIZE 512 |
| 21 | #define SHA_BUF_SIZE ((u32)PAGE_SIZE) |
| 22 | |
| 23 | #define SHA_OP_UPDATE 1 |
| 24 | #define SHA_OP_FINAL 2 |
| 25 | |
| 26 | #define SHA_DATA_LEN_MSK cpu_to_le32(GENMASK(16, 0)) |
| 27 | |
| 28 | /* SHA command token */ |
| 29 | #define SHA_CT_SIZE 5 |
| 30 | #define SHA_CT_CTRL_HDR cpu_to_le32(0x02220000) |
| 31 | #define SHA_COMMAND0 cpu_to_le32(0x03020000) |
| 32 | #define SHA_COMMAND1 cpu_to_le32(0x21060000) |
| 33 | #define SHA_COMMAND2 cpu_to_le32(0xe0e63802) |
| 34 | |
| 35 | /* SHA transform information */ |
| 36 | #define SHA_TFM_HASH cpu_to_le32(0x2 << 0) |
| 37 | #define SHA_TFM_INNER_DIG cpu_to_le32(0x1 << 21) |
| 38 | #define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8) |
| 39 | #define SHA_TFM_START cpu_to_le32(0x1 << 4) |
| 40 | #define SHA_TFM_CONTINUE cpu_to_le32(0x1 << 5) |
| 41 | #define SHA_TFM_HASH_STORE cpu_to_le32(0x1 << 19) |
| 42 | #define SHA_TFM_SHA1 cpu_to_le32(0x2 << 23) |
| 43 | #define SHA_TFM_SHA256 cpu_to_le32(0x3 << 23) |
| 44 | #define SHA_TFM_SHA224 cpu_to_le32(0x4 << 23) |
| 45 | #define SHA_TFM_SHA512 cpu_to_le32(0x5 << 23) |
| 46 | #define SHA_TFM_SHA384 cpu_to_le32(0x6 << 23) |
| 47 | #define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24) |
| 48 | |
| 49 | /* SHA flags */ |
| 50 | #define SHA_FLAGS_BUSY BIT(0) |
| 51 | #define SHA_FLAGS_FINAL BIT(1) |
| 52 | #define SHA_FLAGS_FINUP BIT(2) |
| 53 | #define SHA_FLAGS_SG BIT(3) |
| 54 | #define SHA_FLAGS_ALGO_MSK GENMASK(8, 4) |
| 55 | #define SHA_FLAGS_SHA1 BIT(4) |
| 56 | #define SHA_FLAGS_SHA224 BIT(5) |
| 57 | #define SHA_FLAGS_SHA256 BIT(6) |
| 58 | #define SHA_FLAGS_SHA384 BIT(7) |
| 59 | #define SHA_FLAGS_SHA512 BIT(8) |
| 60 | #define SHA_FLAGS_HMAC BIT(9) |
| 61 | #define SHA_FLAGS_PAD BIT(10) |
| 62 | |
| 63 | /** |
| 64 | * mtk_sha_ct is a set of hardware instructions(command token) |
| 65 | * that are used to control engine's processing flow of SHA, |
| 66 | * and it contains the first two words of transform state. |
| 67 | */ |
| 68 | struct mtk_sha_ct { |
| 69 | __le32 tfm_ctrl0; |
| 70 | __le32 tfm_ctrl1; |
| 71 | __le32 ct_ctrl0; |
| 72 | __le32 ct_ctrl1; |
| 73 | __le32 ct_ctrl2; |
| 74 | }; |
| 75 | |
| 76 | /** |
| 77 | * mtk_sha_tfm is used to define SHA transform state |
| 78 | * and store result digest that produced by engine. |
| 79 | */ |
| 80 | struct mtk_sha_tfm { |
| 81 | __le32 tfm_ctrl0; |
| 82 | __le32 tfm_ctrl1; |
| 83 | __le32 digest[SIZE_IN_WORDS(SHA512_DIGEST_SIZE)]; |
| 84 | }; |
| 85 | |
| 86 | /** |
| 87 | * mtk_sha_info consists of command token and transform state |
| 88 | * of SHA, its role is similar to mtk_aes_info. |
| 89 | */ |
| 90 | struct mtk_sha_info { |
| 91 | struct mtk_sha_ct ct; |
| 92 | struct mtk_sha_tfm tfm; |
| 93 | }; |
| 94 | |
| 95 | struct mtk_sha_reqctx { |
| 96 | struct mtk_sha_info info; |
| 97 | unsigned long flags; |
| 98 | unsigned long op; |
| 99 | |
| 100 | u64 digcnt; |
| 101 | bool start; |
| 102 | size_t bufcnt; |
| 103 | dma_addr_t dma_addr; |
| 104 | |
| 105 | /* Walk state */ |
| 106 | struct scatterlist *sg; |
| 107 | u32 offset; /* Offset in current sg */ |
| 108 | u32 total; /* Total request */ |
| 109 | size_t ds; |
| 110 | size_t bs; |
| 111 | |
| 112 | u8 *buffer; |
| 113 | }; |
| 114 | |
| 115 | struct mtk_sha_hmac_ctx { |
| 116 | struct crypto_shash *shash; |
| 117 | u8 ipad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32)); |
| 118 | u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32)); |
| 119 | }; |
| 120 | |
| 121 | struct mtk_sha_ctx { |
| 122 | struct mtk_cryp *cryp; |
| 123 | unsigned long flags; |
| 124 | u8 id; |
| 125 | u8 buf[SHA_BUF_SIZE] __aligned(sizeof(u32)); |
| 126 | |
| 127 | struct mtk_sha_hmac_ctx base[0]; |
| 128 | }; |
| 129 | |
| 130 | struct mtk_sha_drv { |
| 131 | struct list_head dev_list; |
| 132 | /* Device list lock */ |
| 133 | spinlock_t lock; |
| 134 | }; |
| 135 | |
| 136 | static struct mtk_sha_drv mtk_sha = { |
| 137 | .dev_list = LIST_HEAD_INIT(mtk_sha.dev_list), |
| 138 | .lock = __SPIN_LOCK_UNLOCKED(mtk_sha.lock), |
| 139 | }; |
| 140 | |
| 141 | static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id, |
| 142 | struct ahash_request *req); |
| 143 | |
| 144 | static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset) |
| 145 | { |
| 146 | return readl_relaxed(cryp->base + offset); |
| 147 | } |
| 148 | |
| 149 | static inline void mtk_sha_write(struct mtk_cryp *cryp, |
| 150 | u32 offset, u32 value) |
| 151 | { |
| 152 | writel_relaxed(value, cryp->base + offset); |
| 153 | } |
| 154 | |
| 155 | static struct mtk_cryp *mtk_sha_find_dev(struct mtk_sha_ctx *tctx) |
| 156 | { |
| 157 | struct mtk_cryp *cryp = NULL; |
| 158 | struct mtk_cryp *tmp; |
| 159 | |
| 160 | spin_lock_bh(&mtk_sha.lock); |
| 161 | if (!tctx->cryp) { |
| 162 | list_for_each_entry(tmp, &mtk_sha.dev_list, sha_list) { |
| 163 | cryp = tmp; |
| 164 | break; |
| 165 | } |
| 166 | tctx->cryp = cryp; |
| 167 | } else { |
| 168 | cryp = tctx->cryp; |
| 169 | } |
| 170 | |
| 171 | /* |
| 172 | * Assign record id to tfm in round-robin fashion, and this |
| 173 | * will help tfm to bind to corresponding descriptor rings. |
| 174 | */ |
| 175 | tctx->id = cryp->rec; |
| 176 | cryp->rec = !cryp->rec; |
| 177 | |
| 178 | spin_unlock_bh(&mtk_sha.lock); |
| 179 | |
| 180 | return cryp; |
| 181 | } |
| 182 | |
| 183 | static int mtk_sha_append_sg(struct mtk_sha_reqctx *ctx) |
| 184 | { |
| 185 | size_t count; |
| 186 | |
| 187 | while ((ctx->bufcnt < SHA_BUF_SIZE) && ctx->total) { |
| 188 | count = min(ctx->sg->length - ctx->offset, ctx->total); |
| 189 | count = min(count, SHA_BUF_SIZE - ctx->bufcnt); |
| 190 | |
| 191 | if (count <= 0) { |
| 192 | /* |
| 193 | * Check if count <= 0 because the buffer is full or |
| 194 | * because the sg length is 0. In the latest case, |
| 195 | * check if there is another sg in the list, a 0 length |
| 196 | * sg doesn't necessarily mean the end of the sg list. |
| 197 | */ |
| 198 | if ((ctx->sg->length == 0) && !sg_is_last(ctx->sg)) { |
| 199 | ctx->sg = sg_next(ctx->sg); |
| 200 | continue; |
| 201 | } else { |
| 202 | break; |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg, |
| 207 | ctx->offset, count, 0); |
| 208 | |
| 209 | ctx->bufcnt += count; |
| 210 | ctx->offset += count; |
| 211 | ctx->total -= count; |
| 212 | |
| 213 | if (ctx->offset == ctx->sg->length) { |
| 214 | ctx->sg = sg_next(ctx->sg); |
| 215 | if (ctx->sg) |
| 216 | ctx->offset = 0; |
| 217 | else |
| 218 | ctx->total = 0; |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | /* |
| 226 | * The purpose of this padding is to ensure that the padded message is a |
| 227 | * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512). |
| 228 | * The bit "1" is appended at the end of the message followed by |
| 229 | * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or |
| 230 | * 128 bits block (SHA384/SHA512) equals to the message length in bits |
| 231 | * is appended. |
| 232 | * |
| 233 | * For SHA1/SHA224/SHA256, padlen is calculated as followed: |
| 234 | * - if message length < 56 bytes then padlen = 56 - message length |
| 235 | * - else padlen = 64 + 56 - message length |
| 236 | * |
| 237 | * For SHA384/SHA512, padlen is calculated as followed: |
| 238 | * - if message length < 112 bytes then padlen = 112 - message length |
| 239 | * - else padlen = 128 + 112 - message length |
| 240 | */ |
| 241 | static void mtk_sha_fill_padding(struct mtk_sha_reqctx *ctx, u32 len) |
| 242 | { |
| 243 | u32 index, padlen; |
| 244 | u64 bits[2]; |
| 245 | u64 size = ctx->digcnt; |
| 246 | |
| 247 | size += ctx->bufcnt; |
| 248 | size += len; |
| 249 | |
| 250 | bits[1] = cpu_to_be64(size << 3); |
| 251 | bits[0] = cpu_to_be64(size >> 61); |
| 252 | |
| 253 | if (ctx->flags & (SHA_FLAGS_SHA384 | SHA_FLAGS_SHA512)) { |
| 254 | index = ctx->bufcnt & 0x7f; |
| 255 | padlen = (index < 112) ? (112 - index) : ((128 + 112) - index); |
| 256 | *(ctx->buffer + ctx->bufcnt) = 0x80; |
| 257 | memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1); |
| 258 | memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16); |
| 259 | ctx->bufcnt += padlen + 16; |
| 260 | ctx->flags |= SHA_FLAGS_PAD; |
| 261 | } else { |
| 262 | index = ctx->bufcnt & 0x3f; |
| 263 | padlen = (index < 56) ? (56 - index) : ((64 + 56) - index); |
| 264 | *(ctx->buffer + ctx->bufcnt) = 0x80; |
| 265 | memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1); |
| 266 | memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8); |
| 267 | ctx->bufcnt += padlen + 8; |
| 268 | ctx->flags |= SHA_FLAGS_PAD; |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | /* Initialize basic transform information of SHA */ |
| 273 | static void mtk_sha_info_init(struct mtk_sha_rec *sha, |
| 274 | struct mtk_sha_reqctx *ctx) |
| 275 | { |
| 276 | struct mtk_sha_info *info = sha->info; |
| 277 | struct mtk_sha_ct *ct = &info->ct; |
| 278 | struct mtk_sha_tfm *tfm = &info->tfm; |
| 279 | |
| 280 | sha->ct_hdr = SHA_CT_CTRL_HDR; |
| 281 | sha->ct_size = SHA_CT_SIZE; |
| 282 | |
| 283 | tfm->tfm_ctrl0 = SHA_TFM_HASH | SHA_TFM_INNER_DIG | |
| 284 | SHA_TFM_SIZE(SIZE_IN_WORDS(ctx->ds)); |
| 285 | |
| 286 | switch (ctx->flags & SHA_FLAGS_ALGO_MSK) { |
| 287 | case SHA_FLAGS_SHA1: |
| 288 | tfm->tfm_ctrl0 |= SHA_TFM_SHA1; |
| 289 | break; |
| 290 | case SHA_FLAGS_SHA224: |
| 291 | tfm->tfm_ctrl0 |= SHA_TFM_SHA224; |
| 292 | break; |
| 293 | case SHA_FLAGS_SHA256: |
| 294 | tfm->tfm_ctrl0 |= SHA_TFM_SHA256; |
| 295 | break; |
| 296 | case SHA_FLAGS_SHA384: |
| 297 | tfm->tfm_ctrl0 |= SHA_TFM_SHA384; |
| 298 | break; |
| 299 | case SHA_FLAGS_SHA512: |
| 300 | tfm->tfm_ctrl0 |= SHA_TFM_SHA512; |
| 301 | break; |
| 302 | |
| 303 | default: |
| 304 | /* Should not happen... */ |
| 305 | return; |
| 306 | } |
| 307 | |
| 308 | tfm->tfm_ctrl1 = SHA_TFM_HASH_STORE; |
| 309 | ct->tfm_ctrl0 = tfm->tfm_ctrl0 | SHA_TFM_CONTINUE | SHA_TFM_START; |
| 310 | ct->tfm_ctrl1 = tfm->tfm_ctrl1; |
| 311 | |
| 312 | ct->ct_ctrl0 = SHA_COMMAND0; |
| 313 | ct->ct_ctrl1 = SHA_COMMAND1; |
| 314 | ct->ct_ctrl2 = SHA_COMMAND2 | SHA_TFM_DIGEST(SIZE_IN_WORDS(ctx->ds)); |
| 315 | } |
| 316 | |
| 317 | /* |
| 318 | * Update input data length field of transform information and |
| 319 | * map it to DMA region. |
| 320 | */ |
| 321 | static int mtk_sha_info_map(struct mtk_cryp *cryp, |
| 322 | struct mtk_sha_rec *sha, |
| 323 | size_t len) |
| 324 | { |
| 325 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); |
| 326 | struct mtk_sha_info *info = sha->info; |
| 327 | struct mtk_sha_ct *ct = &info->ct; |
| 328 | |
| 329 | if (ctx->start) |
| 330 | ctx->start = false; |
| 331 | else |
| 332 | ct->tfm_ctrl0 &= ~SHA_TFM_START; |
| 333 | |
| 334 | sha->ct_hdr &= ~SHA_DATA_LEN_MSK; |
| 335 | sha->ct_hdr |= cpu_to_le32(len); |
| 336 | ct->ct_ctrl0 &= ~SHA_DATA_LEN_MSK; |
| 337 | ct->ct_ctrl0 |= cpu_to_le32(len); |
| 338 | |
| 339 | ctx->digcnt += len; |
| 340 | |
| 341 | sha->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info), |
| 342 | DMA_BIDIRECTIONAL); |
| 343 | if (unlikely(dma_mapping_error(cryp->dev, sha->ct_dma))) { |
| 344 | dev_err(cryp->dev, "dma %d bytes error\n", sizeof(*info)); |
| 345 | return -EINVAL; |
| 346 | } |
| 347 | sha->tfm_dma = sha->ct_dma + sizeof(*ct); |
| 348 | |
| 349 | return 0; |
| 350 | } |
| 351 | |
| 352 | /* |
| 353 | * Because of hardware limitation, we must pre-calculate the inner |
| 354 | * and outer digest that need to be processed firstly by engine, then |
| 355 | * apply the result digest to the input message. These complex hashing |
| 356 | * procedures limits HMAC performance, so we use fallback SW encoding. |
| 357 | */ |
| 358 | static int mtk_sha_finish_hmac(struct ahash_request *req) |
| 359 | { |
| 360 | struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm); |
| 361 | struct mtk_sha_hmac_ctx *bctx = tctx->base; |
| 362 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 363 | |
| 364 | SHASH_DESC_ON_STACK(shash, bctx->shash); |
| 365 | |
| 366 | shash->tfm = bctx->shash; |
| 367 | shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */ |
| 368 | |
| 369 | return crypto_shash_init(shash) ?: |
| 370 | crypto_shash_update(shash, bctx->opad, ctx->bs) ?: |
| 371 | crypto_shash_finup(shash, req->result, ctx->ds, req->result); |
| 372 | } |
| 373 | |
| 374 | /* Initialize request context */ |
| 375 | static int mtk_sha_init(struct ahash_request *req) |
| 376 | { |
| 377 | struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); |
| 378 | struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm); |
| 379 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 380 | |
| 381 | ctx->flags = 0; |
| 382 | ctx->ds = crypto_ahash_digestsize(tfm); |
| 383 | |
| 384 | switch (ctx->ds) { |
| 385 | case SHA1_DIGEST_SIZE: |
| 386 | ctx->flags |= SHA_FLAGS_SHA1; |
| 387 | ctx->bs = SHA1_BLOCK_SIZE; |
| 388 | break; |
| 389 | case SHA224_DIGEST_SIZE: |
| 390 | ctx->flags |= SHA_FLAGS_SHA224; |
| 391 | ctx->bs = SHA224_BLOCK_SIZE; |
| 392 | break; |
| 393 | case SHA256_DIGEST_SIZE: |
| 394 | ctx->flags |= SHA_FLAGS_SHA256; |
| 395 | ctx->bs = SHA256_BLOCK_SIZE; |
| 396 | break; |
| 397 | case SHA384_DIGEST_SIZE: |
| 398 | ctx->flags |= SHA_FLAGS_SHA384; |
| 399 | ctx->bs = SHA384_BLOCK_SIZE; |
| 400 | break; |
| 401 | case SHA512_DIGEST_SIZE: |
| 402 | ctx->flags |= SHA_FLAGS_SHA512; |
| 403 | ctx->bs = SHA512_BLOCK_SIZE; |
| 404 | break; |
| 405 | default: |
| 406 | return -EINVAL; |
| 407 | } |
| 408 | |
| 409 | ctx->bufcnt = 0; |
| 410 | ctx->digcnt = 0; |
| 411 | ctx->buffer = tctx->buf; |
| 412 | ctx->start = true; |
| 413 | |
| 414 | if (tctx->flags & SHA_FLAGS_HMAC) { |
| 415 | struct mtk_sha_hmac_ctx *bctx = tctx->base; |
| 416 | |
| 417 | memcpy(ctx->buffer, bctx->ipad, ctx->bs); |
| 418 | ctx->bufcnt = ctx->bs; |
| 419 | ctx->flags |= SHA_FLAGS_HMAC; |
| 420 | } |
| 421 | |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | static int mtk_sha_xmit(struct mtk_cryp *cryp, struct mtk_sha_rec *sha, |
| 426 | dma_addr_t addr, size_t len) |
| 427 | { |
| 428 | struct mtk_ring *ring = cryp->ring[sha->id]; |
| 429 | struct mtk_desc *cmd = ring->cmd_base + ring->pos; |
| 430 | struct mtk_desc *res = ring->res_base + ring->pos; |
| 431 | int err; |
| 432 | |
| 433 | err = mtk_sha_info_map(cryp, sha, len); |
| 434 | if (err) |
| 435 | return err; |
| 436 | |
| 437 | /* Fill in the command/result descriptors */ |
| 438 | res->hdr = MTK_DESC_FIRST | |
| 439 | MTK_DESC_LAST | |
| 440 | MTK_DESC_BUF_LEN(len); |
| 441 | |
| 442 | res->buf = cpu_to_le32(cryp->tmp_dma); |
| 443 | |
| 444 | cmd->hdr = MTK_DESC_FIRST | |
| 445 | MTK_DESC_LAST | |
| 446 | MTK_DESC_BUF_LEN(len) | |
| 447 | MTK_DESC_CT_LEN(sha->ct_size); |
| 448 | |
| 449 | cmd->buf = cpu_to_le32(addr); |
| 450 | cmd->ct = cpu_to_le32(sha->ct_dma); |
| 451 | cmd->ct_hdr = sha->ct_hdr; |
| 452 | cmd->tfm = cpu_to_le32(sha->tfm_dma); |
| 453 | |
| 454 | if (++ring->pos == MTK_DESC_NUM) |
| 455 | ring->pos = 0; |
| 456 | |
| 457 | /* |
| 458 | * Make sure that all changes to the DMA ring are done before we |
| 459 | * start engine. |
| 460 | */ |
| 461 | wmb(); |
| 462 | /* Start DMA transfer */ |
| 463 | mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(1)); |
| 464 | mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(1)); |
| 465 | |
| 466 | return -EINPROGRESS; |
| 467 | } |
| 468 | |
| 469 | static int mtk_sha_xmit2(struct mtk_cryp *cryp, |
| 470 | struct mtk_sha_rec *sha, |
| 471 | struct mtk_sha_reqctx *ctx, |
| 472 | size_t len1, size_t len2) |
| 473 | { |
| 474 | struct mtk_ring *ring = cryp->ring[sha->id]; |
| 475 | struct mtk_desc *cmd = ring->cmd_base + ring->pos; |
| 476 | struct mtk_desc *res = ring->res_base + ring->pos; |
| 477 | int err; |
| 478 | |
| 479 | err = mtk_sha_info_map(cryp, sha, len1 + len2); |
| 480 | if (err) |
| 481 | return err; |
| 482 | |
| 483 | /* Fill in the command/result descriptors */ |
| 484 | res->hdr = MTK_DESC_BUF_LEN(len1) | MTK_DESC_FIRST; |
| 485 | res->buf = cpu_to_le32(cryp->tmp_dma); |
| 486 | |
| 487 | cmd->hdr = MTK_DESC_BUF_LEN(len1) | |
| 488 | MTK_DESC_FIRST | |
| 489 | MTK_DESC_CT_LEN(sha->ct_size); |
| 490 | cmd->buf = cpu_to_le32(sg_dma_address(ctx->sg)); |
| 491 | cmd->ct = cpu_to_le32(sha->ct_dma); |
| 492 | cmd->ct_hdr = sha->ct_hdr; |
| 493 | cmd->tfm = cpu_to_le32(sha->tfm_dma); |
| 494 | |
| 495 | if (++ring->pos == MTK_DESC_NUM) |
| 496 | ring->pos = 0; |
| 497 | |
| 498 | cmd = ring->cmd_base + ring->pos; |
| 499 | res = ring->res_base + ring->pos; |
| 500 | |
| 501 | res->hdr = MTK_DESC_BUF_LEN(len2) | MTK_DESC_LAST; |
| 502 | res->buf = cpu_to_le32(cryp->tmp_dma); |
| 503 | |
| 504 | cmd->hdr = MTK_DESC_BUF_LEN(len2) | MTK_DESC_LAST; |
| 505 | cmd->buf = cpu_to_le32(ctx->dma_addr); |
| 506 | |
| 507 | if (++ring->pos == MTK_DESC_NUM) |
| 508 | ring->pos = 0; |
| 509 | |
| 510 | /* |
| 511 | * Make sure that all changes to the DMA ring are done before we |
| 512 | * start engine. |
| 513 | */ |
| 514 | wmb(); |
| 515 | /* Start DMA transfer */ |
| 516 | mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(2)); |
| 517 | mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(2)); |
| 518 | |
| 519 | return -EINPROGRESS; |
| 520 | } |
| 521 | |
| 522 | static int mtk_sha_dma_map(struct mtk_cryp *cryp, |
| 523 | struct mtk_sha_rec *sha, |
| 524 | struct mtk_sha_reqctx *ctx, |
| 525 | size_t count) |
| 526 | { |
| 527 | ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer, |
| 528 | SHA_BUF_SIZE, DMA_TO_DEVICE); |
| 529 | if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) { |
| 530 | dev_err(cryp->dev, "dma map error\n"); |
| 531 | return -EINVAL; |
| 532 | } |
| 533 | |
| 534 | ctx->flags &= ~SHA_FLAGS_SG; |
| 535 | |
| 536 | return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count); |
| 537 | } |
| 538 | |
| 539 | static int mtk_sha_update_slow(struct mtk_cryp *cryp, |
| 540 | struct mtk_sha_rec *sha) |
| 541 | { |
| 542 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); |
| 543 | size_t count; |
| 544 | u32 final; |
| 545 | |
| 546 | mtk_sha_append_sg(ctx); |
| 547 | |
| 548 | final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total; |
| 549 | |
| 550 | dev_dbg(cryp->dev, "slow: bufcnt: %u\n", ctx->bufcnt); |
| 551 | |
| 552 | if (final) { |
| 553 | sha->flags |= SHA_FLAGS_FINAL; |
| 554 | mtk_sha_fill_padding(ctx, 0); |
| 555 | } |
| 556 | |
| 557 | if (final || (ctx->bufcnt == SHA_BUF_SIZE && ctx->total)) { |
| 558 | count = ctx->bufcnt; |
| 559 | ctx->bufcnt = 0; |
| 560 | |
| 561 | return mtk_sha_dma_map(cryp, sha, ctx, count); |
| 562 | } |
| 563 | return 0; |
| 564 | } |
| 565 | |
| 566 | static int mtk_sha_update_start(struct mtk_cryp *cryp, |
| 567 | struct mtk_sha_rec *sha) |
| 568 | { |
| 569 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); |
| 570 | u32 len, final, tail; |
| 571 | struct scatterlist *sg; |
| 572 | |
| 573 | if (!ctx->total) |
| 574 | return 0; |
| 575 | |
| 576 | if (ctx->bufcnt || ctx->offset) |
| 577 | return mtk_sha_update_slow(cryp, sha); |
| 578 | |
| 579 | sg = ctx->sg; |
| 580 | |
| 581 | if (!IS_ALIGNED(sg->offset, sizeof(u32))) |
| 582 | return mtk_sha_update_slow(cryp, sha); |
| 583 | |
| 584 | if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, ctx->bs)) |
| 585 | /* size is not ctx->bs aligned */ |
| 586 | return mtk_sha_update_slow(cryp, sha); |
| 587 | |
| 588 | len = min(ctx->total, sg->length); |
| 589 | |
| 590 | if (sg_is_last(sg)) { |
| 591 | if (!(ctx->flags & SHA_FLAGS_FINUP)) { |
| 592 | /* not last sg must be ctx->bs aligned */ |
| 593 | tail = len & (ctx->bs - 1); |
| 594 | len -= tail; |
| 595 | } |
| 596 | } |
| 597 | |
| 598 | ctx->total -= len; |
| 599 | ctx->offset = len; /* offset where to start slow */ |
| 600 | |
| 601 | final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total; |
| 602 | |
| 603 | /* Add padding */ |
| 604 | if (final) { |
| 605 | size_t count; |
| 606 | |
| 607 | tail = len & (ctx->bs - 1); |
| 608 | len -= tail; |
| 609 | ctx->total += tail; |
| 610 | ctx->offset = len; /* offset where to start slow */ |
| 611 | |
| 612 | sg = ctx->sg; |
| 613 | mtk_sha_append_sg(ctx); |
| 614 | mtk_sha_fill_padding(ctx, len); |
| 615 | |
| 616 | ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer, |
| 617 | SHA_BUF_SIZE, DMA_TO_DEVICE); |
| 618 | if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) { |
| 619 | dev_err(cryp->dev, "dma map bytes error\n"); |
| 620 | return -EINVAL; |
| 621 | } |
| 622 | |
| 623 | sha->flags |= SHA_FLAGS_FINAL; |
| 624 | count = ctx->bufcnt; |
| 625 | ctx->bufcnt = 0; |
| 626 | |
| 627 | if (len == 0) { |
| 628 | ctx->flags &= ~SHA_FLAGS_SG; |
| 629 | return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count); |
| 630 | |
| 631 | } else { |
| 632 | ctx->sg = sg; |
| 633 | if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) { |
| 634 | dev_err(cryp->dev, "dma_map_sg error\n"); |
| 635 | return -EINVAL; |
| 636 | } |
| 637 | |
| 638 | ctx->flags |= SHA_FLAGS_SG; |
| 639 | return mtk_sha_xmit2(cryp, sha, ctx, len, count); |
| 640 | } |
| 641 | } |
| 642 | |
| 643 | if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) { |
| 644 | dev_err(cryp->dev, "dma_map_sg error\n"); |
| 645 | return -EINVAL; |
| 646 | } |
| 647 | |
| 648 | ctx->flags |= SHA_FLAGS_SG; |
| 649 | |
| 650 | return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg), len); |
| 651 | } |
| 652 | |
| 653 | static int mtk_sha_final_req(struct mtk_cryp *cryp, |
| 654 | struct mtk_sha_rec *sha) |
| 655 | { |
| 656 | struct ahash_request *req = sha->req; |
| 657 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 658 | size_t count; |
| 659 | |
| 660 | mtk_sha_fill_padding(ctx, 0); |
| 661 | |
| 662 | sha->flags |= SHA_FLAGS_FINAL; |
| 663 | count = ctx->bufcnt; |
| 664 | ctx->bufcnt = 0; |
| 665 | |
| 666 | return mtk_sha_dma_map(cryp, sha, ctx, count); |
| 667 | } |
| 668 | |
| 669 | /* Copy ready hash (+ finalize hmac) */ |
| 670 | static int mtk_sha_finish(struct ahash_request *req) |
| 671 | { |
| 672 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 673 | u32 *digest = ctx->info.tfm.digest; |
| 674 | u32 *result = (u32 *)req->result; |
| 675 | int i; |
| 676 | |
| 677 | /* Get the hash from the digest buffer */ |
| 678 | for (i = 0; i < SIZE_IN_WORDS(ctx->ds); i++) |
| 679 | result[i] = le32_to_cpu(digest[i]); |
| 680 | |
| 681 | if (ctx->flags & SHA_FLAGS_HMAC) |
| 682 | return mtk_sha_finish_hmac(req); |
| 683 | |
| 684 | return 0; |
| 685 | } |
| 686 | |
| 687 | static void mtk_sha_finish_req(struct mtk_cryp *cryp, |
| 688 | struct mtk_sha_rec *sha, int err) |
| 689 | { |
| 690 | if (likely(!err && (SHA_FLAGS_FINAL & sha->flags))) |
| 691 | err = mtk_sha_finish(sha->req); |
| 692 | |
| 693 | sha->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL); |
| 694 | |
| 695 | sha->req->base.complete(&sha->req->base, err); |
| 696 | |
| 697 | /* Handle new request */ |
| 698 | mtk_sha_handle_queue(cryp, sha->id - RING2, NULL); |
| 699 | } |
| 700 | |
| 701 | static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id, |
| 702 | struct ahash_request *req) |
| 703 | { |
| 704 | struct mtk_sha_rec *sha = cryp->sha[id]; |
| 705 | struct crypto_async_request *async_req, *backlog; |
| 706 | struct mtk_sha_reqctx *ctx; |
| 707 | unsigned long flags; |
| 708 | int err = 0, ret = 0; |
| 709 | |
| 710 | spin_lock_irqsave(&sha->lock, flags); |
| 711 | if (req) |
| 712 | ret = ahash_enqueue_request(&sha->queue, req); |
| 713 | |
| 714 | if (SHA_FLAGS_BUSY & sha->flags) { |
| 715 | spin_unlock_irqrestore(&sha->lock, flags); |
| 716 | return ret; |
| 717 | } |
| 718 | |
| 719 | backlog = crypto_get_backlog(&sha->queue); |
| 720 | async_req = crypto_dequeue_request(&sha->queue); |
| 721 | if (async_req) |
| 722 | sha->flags |= SHA_FLAGS_BUSY; |
| 723 | spin_unlock_irqrestore(&sha->lock, flags); |
| 724 | |
| 725 | if (!async_req) |
| 726 | return ret; |
| 727 | |
| 728 | if (backlog) |
| 729 | backlog->complete(backlog, -EINPROGRESS); |
| 730 | |
| 731 | req = ahash_request_cast(async_req); |
| 732 | ctx = ahash_request_ctx(req); |
| 733 | |
| 734 | sha->req = req; |
| 735 | sha->info = &ctx->info; |
| 736 | |
| 737 | mtk_sha_info_init(sha, ctx); |
| 738 | |
| 739 | if (ctx->op == SHA_OP_UPDATE) { |
| 740 | err = mtk_sha_update_start(cryp, sha); |
| 741 | if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP)) |
| 742 | /* No final() after finup() */ |
| 743 | err = mtk_sha_final_req(cryp, sha); |
| 744 | } else if (ctx->op == SHA_OP_FINAL) { |
| 745 | err = mtk_sha_final_req(cryp, sha); |
| 746 | } |
| 747 | |
| 748 | if (unlikely(err != -EINPROGRESS)) |
| 749 | /* Task will not finish it, so do it here */ |
| 750 | mtk_sha_finish_req(cryp, sha, err); |
| 751 | |
| 752 | return ret; |
| 753 | } |
| 754 | |
| 755 | static int mtk_sha_enqueue(struct ahash_request *req, u32 op) |
| 756 | { |
| 757 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 758 | struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm); |
| 759 | |
| 760 | ctx->op = op; |
| 761 | |
| 762 | return mtk_sha_handle_queue(tctx->cryp, tctx->id, req); |
| 763 | } |
| 764 | |
| 765 | static void mtk_sha_unmap(struct mtk_cryp *cryp, struct mtk_sha_rec *sha) |
| 766 | { |
| 767 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); |
| 768 | |
| 769 | dma_unmap_single(cryp->dev, sha->ct_dma, |
| 770 | sizeof(struct mtk_sha_info), DMA_BIDIRECTIONAL); |
| 771 | |
| 772 | if (ctx->flags & SHA_FLAGS_SG) { |
| 773 | dma_unmap_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE); |
| 774 | if (ctx->sg->length == ctx->offset) { |
| 775 | ctx->sg = sg_next(ctx->sg); |
| 776 | if (ctx->sg) |
| 777 | ctx->offset = 0; |
| 778 | } |
| 779 | if (ctx->flags & SHA_FLAGS_PAD) { |
| 780 | dma_unmap_single(cryp->dev, ctx->dma_addr, |
| 781 | SHA_BUF_SIZE, DMA_TO_DEVICE); |
| 782 | } |
| 783 | } else |
| 784 | dma_unmap_single(cryp->dev, ctx->dma_addr, |
| 785 | SHA_BUF_SIZE, DMA_TO_DEVICE); |
| 786 | } |
| 787 | |
| 788 | static void mtk_sha_complete(struct mtk_cryp *cryp, |
| 789 | struct mtk_sha_rec *sha) |
| 790 | { |
| 791 | int err = 0; |
| 792 | |
| 793 | err = mtk_sha_update_start(cryp, sha); |
| 794 | if (err != -EINPROGRESS) |
| 795 | mtk_sha_finish_req(cryp, sha, err); |
| 796 | } |
| 797 | |
| 798 | static int mtk_sha_update(struct ahash_request *req) |
| 799 | { |
| 800 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 801 | |
| 802 | ctx->total = req->nbytes; |
| 803 | ctx->sg = req->src; |
| 804 | ctx->offset = 0; |
| 805 | |
| 806 | if ((ctx->bufcnt + ctx->total < SHA_BUF_SIZE) && |
| 807 | !(ctx->flags & SHA_FLAGS_FINUP)) |
| 808 | return mtk_sha_append_sg(ctx); |
| 809 | |
| 810 | return mtk_sha_enqueue(req, SHA_OP_UPDATE); |
| 811 | } |
| 812 | |
| 813 | static int mtk_sha_final(struct ahash_request *req) |
| 814 | { |
| 815 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 816 | |
| 817 | ctx->flags |= SHA_FLAGS_FINUP; |
| 818 | |
| 819 | if (ctx->flags & SHA_FLAGS_PAD) |
| 820 | return mtk_sha_finish(req); |
| 821 | |
| 822 | return mtk_sha_enqueue(req, SHA_OP_FINAL); |
| 823 | } |
| 824 | |
| 825 | static int mtk_sha_finup(struct ahash_request *req) |
| 826 | { |
| 827 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 828 | int err1, err2; |
| 829 | |
| 830 | ctx->flags |= SHA_FLAGS_FINUP; |
| 831 | |
| 832 | err1 = mtk_sha_update(req); |
| 833 | if (err1 == -EINPROGRESS || err1 == -EBUSY) |
| 834 | return err1; |
| 835 | /* |
| 836 | * final() has to be always called to cleanup resources |
| 837 | * even if update() failed |
| 838 | */ |
| 839 | err2 = mtk_sha_final(req); |
| 840 | |
| 841 | return err1 ?: err2; |
| 842 | } |
| 843 | |
| 844 | static int mtk_sha_digest(struct ahash_request *req) |
| 845 | { |
| 846 | return mtk_sha_init(req) ?: mtk_sha_finup(req); |
| 847 | } |
| 848 | |
| 849 | static int mtk_sha_setkey(struct crypto_ahash *tfm, |
| 850 | const unsigned char *key, u32 keylen) |
| 851 | { |
| 852 | struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm); |
| 853 | struct mtk_sha_hmac_ctx *bctx = tctx->base; |
| 854 | size_t bs = crypto_shash_blocksize(bctx->shash); |
| 855 | size_t ds = crypto_shash_digestsize(bctx->shash); |
| 856 | int err, i; |
| 857 | |
| 858 | SHASH_DESC_ON_STACK(shash, bctx->shash); |
| 859 | |
| 860 | shash->tfm = bctx->shash; |
| 861 | shash->flags = crypto_shash_get_flags(bctx->shash) & |
| 862 | CRYPTO_TFM_REQ_MAY_SLEEP; |
| 863 | |
| 864 | if (keylen > bs) { |
| 865 | err = crypto_shash_digest(shash, key, keylen, bctx->ipad); |
| 866 | if (err) |
| 867 | return err; |
| 868 | keylen = ds; |
| 869 | } else { |
| 870 | memcpy(bctx->ipad, key, keylen); |
| 871 | } |
| 872 | |
| 873 | memset(bctx->ipad + keylen, 0, bs - keylen); |
| 874 | memcpy(bctx->opad, bctx->ipad, bs); |
| 875 | |
| 876 | for (i = 0; i < bs; i++) { |
| 877 | bctx->ipad[i] ^= 0x36; |
| 878 | bctx->opad[i] ^= 0x5c; |
| 879 | } |
| 880 | |
Colin Ian King | f283148 | 2017-01-03 13:21:22 +0000 | [diff] [blame] | 881 | return 0; |
Ryder Lee | 785e5c6 | 2016-12-19 10:20:44 +0800 | [diff] [blame] | 882 | } |
| 883 | |
| 884 | static int mtk_sha_export(struct ahash_request *req, void *out) |
| 885 | { |
| 886 | const struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 887 | |
| 888 | memcpy(out, ctx, sizeof(*ctx)); |
| 889 | return 0; |
| 890 | } |
| 891 | |
| 892 | static int mtk_sha_import(struct ahash_request *req, const void *in) |
| 893 | { |
| 894 | struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); |
| 895 | |
| 896 | memcpy(ctx, in, sizeof(*ctx)); |
| 897 | return 0; |
| 898 | } |
| 899 | |
| 900 | static int mtk_sha_cra_init_alg(struct crypto_tfm *tfm, |
| 901 | const char *alg_base) |
| 902 | { |
| 903 | struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm); |
| 904 | struct mtk_cryp *cryp = NULL; |
| 905 | |
| 906 | cryp = mtk_sha_find_dev(tctx); |
| 907 | if (!cryp) |
| 908 | return -ENODEV; |
| 909 | |
| 910 | crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), |
| 911 | sizeof(struct mtk_sha_reqctx)); |
| 912 | |
| 913 | if (alg_base) { |
| 914 | struct mtk_sha_hmac_ctx *bctx = tctx->base; |
| 915 | |
| 916 | tctx->flags |= SHA_FLAGS_HMAC; |
| 917 | bctx->shash = crypto_alloc_shash(alg_base, 0, |
| 918 | CRYPTO_ALG_NEED_FALLBACK); |
| 919 | if (IS_ERR(bctx->shash)) { |
| 920 | pr_err("base driver %s could not be loaded.\n", |
| 921 | alg_base); |
| 922 | |
| 923 | return PTR_ERR(bctx->shash); |
| 924 | } |
| 925 | } |
| 926 | return 0; |
| 927 | } |
| 928 | |
| 929 | static int mtk_sha_cra_init(struct crypto_tfm *tfm) |
| 930 | { |
| 931 | return mtk_sha_cra_init_alg(tfm, NULL); |
| 932 | } |
| 933 | |
| 934 | static int mtk_sha_cra_sha1_init(struct crypto_tfm *tfm) |
| 935 | { |
| 936 | return mtk_sha_cra_init_alg(tfm, "sha1"); |
| 937 | } |
| 938 | |
| 939 | static int mtk_sha_cra_sha224_init(struct crypto_tfm *tfm) |
| 940 | { |
| 941 | return mtk_sha_cra_init_alg(tfm, "sha224"); |
| 942 | } |
| 943 | |
| 944 | static int mtk_sha_cra_sha256_init(struct crypto_tfm *tfm) |
| 945 | { |
| 946 | return mtk_sha_cra_init_alg(tfm, "sha256"); |
| 947 | } |
| 948 | |
| 949 | static int mtk_sha_cra_sha384_init(struct crypto_tfm *tfm) |
| 950 | { |
| 951 | return mtk_sha_cra_init_alg(tfm, "sha384"); |
| 952 | } |
| 953 | |
| 954 | static int mtk_sha_cra_sha512_init(struct crypto_tfm *tfm) |
| 955 | { |
| 956 | return mtk_sha_cra_init_alg(tfm, "sha512"); |
| 957 | } |
| 958 | |
| 959 | static void mtk_sha_cra_exit(struct crypto_tfm *tfm) |
| 960 | { |
| 961 | struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm); |
| 962 | |
| 963 | if (tctx->flags & SHA_FLAGS_HMAC) { |
| 964 | struct mtk_sha_hmac_ctx *bctx = tctx->base; |
| 965 | |
| 966 | crypto_free_shash(bctx->shash); |
| 967 | } |
| 968 | } |
| 969 | |
| 970 | static struct ahash_alg algs_sha1_sha224_sha256[] = { |
| 971 | { |
| 972 | .init = mtk_sha_init, |
| 973 | .update = mtk_sha_update, |
| 974 | .final = mtk_sha_final, |
| 975 | .finup = mtk_sha_finup, |
| 976 | .digest = mtk_sha_digest, |
| 977 | .export = mtk_sha_export, |
| 978 | .import = mtk_sha_import, |
| 979 | .halg.digestsize = SHA1_DIGEST_SIZE, |
| 980 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 981 | .halg.base = { |
| 982 | .cra_name = "sha1", |
| 983 | .cra_driver_name = "mtk-sha1", |
| 984 | .cra_priority = 400, |
| 985 | .cra_flags = CRYPTO_ALG_ASYNC, |
| 986 | .cra_blocksize = SHA1_BLOCK_SIZE, |
| 987 | .cra_ctxsize = sizeof(struct mtk_sha_ctx), |
| 988 | .cra_alignmask = SHA_ALIGN_MSK, |
| 989 | .cra_module = THIS_MODULE, |
| 990 | .cra_init = mtk_sha_cra_init, |
| 991 | .cra_exit = mtk_sha_cra_exit, |
| 992 | } |
| 993 | }, |
| 994 | { |
| 995 | .init = mtk_sha_init, |
| 996 | .update = mtk_sha_update, |
| 997 | .final = mtk_sha_final, |
| 998 | .finup = mtk_sha_finup, |
| 999 | .digest = mtk_sha_digest, |
| 1000 | .export = mtk_sha_export, |
| 1001 | .import = mtk_sha_import, |
| 1002 | .halg.digestsize = SHA224_DIGEST_SIZE, |
| 1003 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1004 | .halg.base = { |
| 1005 | .cra_name = "sha224", |
| 1006 | .cra_driver_name = "mtk-sha224", |
| 1007 | .cra_priority = 400, |
| 1008 | .cra_flags = CRYPTO_ALG_ASYNC, |
| 1009 | .cra_blocksize = SHA224_BLOCK_SIZE, |
| 1010 | .cra_ctxsize = sizeof(struct mtk_sha_ctx), |
| 1011 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1012 | .cra_module = THIS_MODULE, |
| 1013 | .cra_init = mtk_sha_cra_init, |
| 1014 | .cra_exit = mtk_sha_cra_exit, |
| 1015 | } |
| 1016 | }, |
| 1017 | { |
| 1018 | .init = mtk_sha_init, |
| 1019 | .update = mtk_sha_update, |
| 1020 | .final = mtk_sha_final, |
| 1021 | .finup = mtk_sha_finup, |
| 1022 | .digest = mtk_sha_digest, |
| 1023 | .export = mtk_sha_export, |
| 1024 | .import = mtk_sha_import, |
| 1025 | .halg.digestsize = SHA256_DIGEST_SIZE, |
| 1026 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1027 | .halg.base = { |
| 1028 | .cra_name = "sha256", |
| 1029 | .cra_driver_name = "mtk-sha256", |
| 1030 | .cra_priority = 400, |
| 1031 | .cra_flags = CRYPTO_ALG_ASYNC, |
| 1032 | .cra_blocksize = SHA256_BLOCK_SIZE, |
| 1033 | .cra_ctxsize = sizeof(struct mtk_sha_ctx), |
| 1034 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1035 | .cra_module = THIS_MODULE, |
| 1036 | .cra_init = mtk_sha_cra_init, |
| 1037 | .cra_exit = mtk_sha_cra_exit, |
| 1038 | } |
| 1039 | }, |
| 1040 | { |
| 1041 | .init = mtk_sha_init, |
| 1042 | .update = mtk_sha_update, |
| 1043 | .final = mtk_sha_final, |
| 1044 | .finup = mtk_sha_finup, |
| 1045 | .digest = mtk_sha_digest, |
| 1046 | .export = mtk_sha_export, |
| 1047 | .import = mtk_sha_import, |
| 1048 | .setkey = mtk_sha_setkey, |
| 1049 | .halg.digestsize = SHA1_DIGEST_SIZE, |
| 1050 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1051 | .halg.base = { |
| 1052 | .cra_name = "hmac(sha1)", |
| 1053 | .cra_driver_name = "mtk-hmac-sha1", |
| 1054 | .cra_priority = 400, |
| 1055 | .cra_flags = CRYPTO_ALG_ASYNC | |
| 1056 | CRYPTO_ALG_NEED_FALLBACK, |
| 1057 | .cra_blocksize = SHA1_BLOCK_SIZE, |
| 1058 | .cra_ctxsize = sizeof(struct mtk_sha_ctx) + |
| 1059 | sizeof(struct mtk_sha_hmac_ctx), |
| 1060 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1061 | .cra_module = THIS_MODULE, |
| 1062 | .cra_init = mtk_sha_cra_sha1_init, |
| 1063 | .cra_exit = mtk_sha_cra_exit, |
| 1064 | } |
| 1065 | }, |
| 1066 | { |
| 1067 | .init = mtk_sha_init, |
| 1068 | .update = mtk_sha_update, |
| 1069 | .final = mtk_sha_final, |
| 1070 | .finup = mtk_sha_finup, |
| 1071 | .digest = mtk_sha_digest, |
| 1072 | .export = mtk_sha_export, |
| 1073 | .import = mtk_sha_import, |
| 1074 | .setkey = mtk_sha_setkey, |
| 1075 | .halg.digestsize = SHA224_DIGEST_SIZE, |
| 1076 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1077 | .halg.base = { |
| 1078 | .cra_name = "hmac(sha224)", |
| 1079 | .cra_driver_name = "mtk-hmac-sha224", |
| 1080 | .cra_priority = 400, |
| 1081 | .cra_flags = CRYPTO_ALG_ASYNC | |
| 1082 | CRYPTO_ALG_NEED_FALLBACK, |
| 1083 | .cra_blocksize = SHA224_BLOCK_SIZE, |
| 1084 | .cra_ctxsize = sizeof(struct mtk_sha_ctx) + |
| 1085 | sizeof(struct mtk_sha_hmac_ctx), |
| 1086 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1087 | .cra_module = THIS_MODULE, |
| 1088 | .cra_init = mtk_sha_cra_sha224_init, |
| 1089 | .cra_exit = mtk_sha_cra_exit, |
| 1090 | } |
| 1091 | }, |
| 1092 | { |
| 1093 | .init = mtk_sha_init, |
| 1094 | .update = mtk_sha_update, |
| 1095 | .final = mtk_sha_final, |
| 1096 | .finup = mtk_sha_finup, |
| 1097 | .digest = mtk_sha_digest, |
| 1098 | .export = mtk_sha_export, |
| 1099 | .import = mtk_sha_import, |
| 1100 | .setkey = mtk_sha_setkey, |
| 1101 | .halg.digestsize = SHA256_DIGEST_SIZE, |
| 1102 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1103 | .halg.base = { |
| 1104 | .cra_name = "hmac(sha256)", |
| 1105 | .cra_driver_name = "mtk-hmac-sha256", |
| 1106 | .cra_priority = 400, |
| 1107 | .cra_flags = CRYPTO_ALG_ASYNC | |
| 1108 | CRYPTO_ALG_NEED_FALLBACK, |
| 1109 | .cra_blocksize = SHA256_BLOCK_SIZE, |
| 1110 | .cra_ctxsize = sizeof(struct mtk_sha_ctx) + |
| 1111 | sizeof(struct mtk_sha_hmac_ctx), |
| 1112 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1113 | .cra_module = THIS_MODULE, |
| 1114 | .cra_init = mtk_sha_cra_sha256_init, |
| 1115 | .cra_exit = mtk_sha_cra_exit, |
| 1116 | } |
| 1117 | }, |
| 1118 | }; |
| 1119 | |
| 1120 | static struct ahash_alg algs_sha384_sha512[] = { |
| 1121 | { |
| 1122 | .init = mtk_sha_init, |
| 1123 | .update = mtk_sha_update, |
| 1124 | .final = mtk_sha_final, |
| 1125 | .finup = mtk_sha_finup, |
| 1126 | .digest = mtk_sha_digest, |
| 1127 | .export = mtk_sha_export, |
| 1128 | .import = mtk_sha_import, |
| 1129 | .halg.digestsize = SHA384_DIGEST_SIZE, |
| 1130 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1131 | .halg.base = { |
| 1132 | .cra_name = "sha384", |
| 1133 | .cra_driver_name = "mtk-sha384", |
| 1134 | .cra_priority = 400, |
| 1135 | .cra_flags = CRYPTO_ALG_ASYNC, |
| 1136 | .cra_blocksize = SHA384_BLOCK_SIZE, |
| 1137 | .cra_ctxsize = sizeof(struct mtk_sha_ctx), |
| 1138 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1139 | .cra_module = THIS_MODULE, |
| 1140 | .cra_init = mtk_sha_cra_init, |
| 1141 | .cra_exit = mtk_sha_cra_exit, |
| 1142 | } |
| 1143 | }, |
| 1144 | { |
| 1145 | .init = mtk_sha_init, |
| 1146 | .update = mtk_sha_update, |
| 1147 | .final = mtk_sha_final, |
| 1148 | .finup = mtk_sha_finup, |
| 1149 | .digest = mtk_sha_digest, |
| 1150 | .export = mtk_sha_export, |
| 1151 | .import = mtk_sha_import, |
| 1152 | .halg.digestsize = SHA512_DIGEST_SIZE, |
| 1153 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1154 | .halg.base = { |
| 1155 | .cra_name = "sha512", |
| 1156 | .cra_driver_name = "mtk-sha512", |
| 1157 | .cra_priority = 400, |
| 1158 | .cra_flags = CRYPTO_ALG_ASYNC, |
| 1159 | .cra_blocksize = SHA512_BLOCK_SIZE, |
| 1160 | .cra_ctxsize = sizeof(struct mtk_sha_ctx), |
| 1161 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1162 | .cra_module = THIS_MODULE, |
| 1163 | .cra_init = mtk_sha_cra_init, |
| 1164 | .cra_exit = mtk_sha_cra_exit, |
| 1165 | } |
| 1166 | }, |
| 1167 | { |
| 1168 | .init = mtk_sha_init, |
| 1169 | .update = mtk_sha_update, |
| 1170 | .final = mtk_sha_final, |
| 1171 | .finup = mtk_sha_finup, |
| 1172 | .digest = mtk_sha_digest, |
| 1173 | .export = mtk_sha_export, |
| 1174 | .import = mtk_sha_import, |
| 1175 | .setkey = mtk_sha_setkey, |
| 1176 | .halg.digestsize = SHA384_DIGEST_SIZE, |
| 1177 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1178 | .halg.base = { |
| 1179 | .cra_name = "hmac(sha384)", |
| 1180 | .cra_driver_name = "mtk-hmac-sha384", |
| 1181 | .cra_priority = 400, |
| 1182 | .cra_flags = CRYPTO_ALG_ASYNC | |
| 1183 | CRYPTO_ALG_NEED_FALLBACK, |
| 1184 | .cra_blocksize = SHA384_BLOCK_SIZE, |
| 1185 | .cra_ctxsize = sizeof(struct mtk_sha_ctx) + |
| 1186 | sizeof(struct mtk_sha_hmac_ctx), |
| 1187 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1188 | .cra_module = THIS_MODULE, |
| 1189 | .cra_init = mtk_sha_cra_sha384_init, |
| 1190 | .cra_exit = mtk_sha_cra_exit, |
| 1191 | } |
| 1192 | }, |
| 1193 | { |
| 1194 | .init = mtk_sha_init, |
| 1195 | .update = mtk_sha_update, |
| 1196 | .final = mtk_sha_final, |
| 1197 | .finup = mtk_sha_finup, |
| 1198 | .digest = mtk_sha_digest, |
| 1199 | .export = mtk_sha_export, |
| 1200 | .import = mtk_sha_import, |
| 1201 | .setkey = mtk_sha_setkey, |
| 1202 | .halg.digestsize = SHA512_DIGEST_SIZE, |
| 1203 | .halg.statesize = sizeof(struct mtk_sha_reqctx), |
| 1204 | .halg.base = { |
| 1205 | .cra_name = "hmac(sha512)", |
| 1206 | .cra_driver_name = "mtk-hmac-sha512", |
| 1207 | .cra_priority = 400, |
| 1208 | .cra_flags = CRYPTO_ALG_ASYNC | |
| 1209 | CRYPTO_ALG_NEED_FALLBACK, |
| 1210 | .cra_blocksize = SHA512_BLOCK_SIZE, |
| 1211 | .cra_ctxsize = sizeof(struct mtk_sha_ctx) + |
| 1212 | sizeof(struct mtk_sha_hmac_ctx), |
| 1213 | .cra_alignmask = SHA_ALIGN_MSK, |
| 1214 | .cra_module = THIS_MODULE, |
| 1215 | .cra_init = mtk_sha_cra_sha512_init, |
| 1216 | .cra_exit = mtk_sha_cra_exit, |
| 1217 | } |
| 1218 | }, |
| 1219 | }; |
| 1220 | |
| 1221 | static void mtk_sha_task0(unsigned long data) |
| 1222 | { |
| 1223 | struct mtk_cryp *cryp = (struct mtk_cryp *)data; |
| 1224 | struct mtk_sha_rec *sha = cryp->sha[0]; |
| 1225 | |
| 1226 | mtk_sha_unmap(cryp, sha); |
| 1227 | mtk_sha_complete(cryp, sha); |
| 1228 | } |
| 1229 | |
| 1230 | static void mtk_sha_task1(unsigned long data) |
| 1231 | { |
| 1232 | struct mtk_cryp *cryp = (struct mtk_cryp *)data; |
| 1233 | struct mtk_sha_rec *sha = cryp->sha[1]; |
| 1234 | |
| 1235 | mtk_sha_unmap(cryp, sha); |
| 1236 | mtk_sha_complete(cryp, sha); |
| 1237 | } |
| 1238 | |
| 1239 | static irqreturn_t mtk_sha_ring2_irq(int irq, void *dev_id) |
| 1240 | { |
| 1241 | struct mtk_cryp *cryp = (struct mtk_cryp *)dev_id; |
| 1242 | struct mtk_sha_rec *sha = cryp->sha[0]; |
| 1243 | u32 val = mtk_sha_read(cryp, RDR_STAT(RING2)); |
| 1244 | |
| 1245 | mtk_sha_write(cryp, RDR_STAT(RING2), val); |
| 1246 | |
| 1247 | if (likely((SHA_FLAGS_BUSY & sha->flags))) { |
| 1248 | mtk_sha_write(cryp, RDR_PROC_COUNT(RING2), MTK_CNT_RST); |
| 1249 | mtk_sha_write(cryp, RDR_THRESH(RING2), |
| 1250 | MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE); |
| 1251 | |
| 1252 | tasklet_schedule(&sha->task); |
| 1253 | } else { |
| 1254 | dev_warn(cryp->dev, "AES interrupt when no active requests.\n"); |
| 1255 | } |
| 1256 | return IRQ_HANDLED; |
| 1257 | } |
| 1258 | |
| 1259 | static irqreturn_t mtk_sha_ring3_irq(int irq, void *dev_id) |
| 1260 | { |
| 1261 | struct mtk_cryp *cryp = (struct mtk_cryp *)dev_id; |
| 1262 | struct mtk_sha_rec *sha = cryp->sha[1]; |
| 1263 | u32 val = mtk_sha_read(cryp, RDR_STAT(RING3)); |
| 1264 | |
| 1265 | mtk_sha_write(cryp, RDR_STAT(RING3), val); |
| 1266 | |
| 1267 | if (likely((SHA_FLAGS_BUSY & sha->flags))) { |
| 1268 | mtk_sha_write(cryp, RDR_PROC_COUNT(RING3), MTK_CNT_RST); |
| 1269 | mtk_sha_write(cryp, RDR_THRESH(RING3), |
| 1270 | MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE); |
| 1271 | |
| 1272 | tasklet_schedule(&sha->task); |
| 1273 | } else { |
| 1274 | dev_warn(cryp->dev, "AES interrupt when no active requests.\n"); |
| 1275 | } |
| 1276 | return IRQ_HANDLED; |
| 1277 | } |
| 1278 | |
| 1279 | /* |
| 1280 | * The purpose of two SHA records is used to get extra performance. |
| 1281 | * It is similar to mtk_aes_record_init(). |
| 1282 | */ |
| 1283 | static int mtk_sha_record_init(struct mtk_cryp *cryp) |
| 1284 | { |
| 1285 | struct mtk_sha_rec **sha = cryp->sha; |
| 1286 | int i, err = -ENOMEM; |
| 1287 | |
| 1288 | for (i = 0; i < MTK_REC_NUM; i++) { |
| 1289 | sha[i] = kzalloc(sizeof(**sha), GFP_KERNEL); |
| 1290 | if (!sha[i]) |
| 1291 | goto err_cleanup; |
| 1292 | |
| 1293 | sha[i]->id = i + RING2; |
| 1294 | |
| 1295 | spin_lock_init(&sha[i]->lock); |
| 1296 | crypto_init_queue(&sha[i]->queue, SHA_QUEUE_SIZE); |
| 1297 | } |
| 1298 | |
| 1299 | tasklet_init(&sha[0]->task, mtk_sha_task0, (unsigned long)cryp); |
| 1300 | tasklet_init(&sha[1]->task, mtk_sha_task1, (unsigned long)cryp); |
| 1301 | |
| 1302 | cryp->rec = 1; |
| 1303 | |
| 1304 | return 0; |
| 1305 | |
| 1306 | err_cleanup: |
| 1307 | for (; i--; ) |
| 1308 | kfree(sha[i]); |
| 1309 | return err; |
| 1310 | } |
| 1311 | |
| 1312 | static void mtk_sha_record_free(struct mtk_cryp *cryp) |
| 1313 | { |
| 1314 | int i; |
| 1315 | |
| 1316 | for (i = 0; i < MTK_REC_NUM; i++) { |
| 1317 | tasklet_kill(&cryp->sha[i]->task); |
| 1318 | kfree(cryp->sha[i]); |
| 1319 | } |
| 1320 | } |
| 1321 | |
| 1322 | static void mtk_sha_unregister_algs(void) |
| 1323 | { |
| 1324 | int i; |
| 1325 | |
| 1326 | for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) |
| 1327 | crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]); |
| 1328 | |
| 1329 | for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) |
| 1330 | crypto_unregister_ahash(&algs_sha384_sha512[i]); |
| 1331 | } |
| 1332 | |
| 1333 | static int mtk_sha_register_algs(void) |
| 1334 | { |
| 1335 | int err, i; |
| 1336 | |
| 1337 | for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) { |
| 1338 | err = crypto_register_ahash(&algs_sha1_sha224_sha256[i]); |
| 1339 | if (err) |
| 1340 | goto err_sha_224_256_algs; |
| 1341 | } |
| 1342 | |
| 1343 | for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) { |
| 1344 | err = crypto_register_ahash(&algs_sha384_sha512[i]); |
| 1345 | if (err) |
| 1346 | goto err_sha_384_512_algs; |
| 1347 | } |
| 1348 | |
| 1349 | return 0; |
| 1350 | |
| 1351 | err_sha_384_512_algs: |
| 1352 | for (; i--; ) |
| 1353 | crypto_unregister_ahash(&algs_sha384_sha512[i]); |
| 1354 | i = ARRAY_SIZE(algs_sha1_sha224_sha256); |
| 1355 | err_sha_224_256_algs: |
| 1356 | for (; i--; ) |
| 1357 | crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]); |
| 1358 | |
| 1359 | return err; |
| 1360 | } |
| 1361 | |
| 1362 | int mtk_hash_alg_register(struct mtk_cryp *cryp) |
| 1363 | { |
| 1364 | int err; |
| 1365 | |
| 1366 | INIT_LIST_HEAD(&cryp->sha_list); |
| 1367 | |
| 1368 | /* Initialize two hash records */ |
| 1369 | err = mtk_sha_record_init(cryp); |
| 1370 | if (err) |
| 1371 | goto err_record; |
| 1372 | |
| 1373 | /* Ring2 is use by SHA record0 */ |
| 1374 | err = devm_request_irq(cryp->dev, cryp->irq[RING2], |
| 1375 | mtk_sha_ring2_irq, IRQF_TRIGGER_LOW, |
| 1376 | "mtk-sha", cryp); |
| 1377 | if (err) { |
| 1378 | dev_err(cryp->dev, "unable to request sha irq0.\n"); |
| 1379 | goto err_res; |
| 1380 | } |
| 1381 | |
| 1382 | /* Ring3 is use by SHA record1 */ |
| 1383 | err = devm_request_irq(cryp->dev, cryp->irq[RING3], |
| 1384 | mtk_sha_ring3_irq, IRQF_TRIGGER_LOW, |
| 1385 | "mtk-sha", cryp); |
| 1386 | if (err) { |
| 1387 | dev_err(cryp->dev, "unable to request sha irq1.\n"); |
| 1388 | goto err_res; |
| 1389 | } |
| 1390 | |
| 1391 | /* Enable ring2 and ring3 interrupt for hash */ |
| 1392 | mtk_sha_write(cryp, AIC_ENABLE_SET(RING2), MTK_IRQ_RDR2); |
| 1393 | mtk_sha_write(cryp, AIC_ENABLE_SET(RING3), MTK_IRQ_RDR3); |
| 1394 | |
| 1395 | cryp->tmp = dma_alloc_coherent(cryp->dev, SHA_TMP_BUF_SIZE, |
| 1396 | &cryp->tmp_dma, GFP_KERNEL); |
| 1397 | if (!cryp->tmp) { |
| 1398 | dev_err(cryp->dev, "unable to allocate tmp buffer.\n"); |
| 1399 | err = -EINVAL; |
| 1400 | goto err_res; |
| 1401 | } |
| 1402 | |
| 1403 | spin_lock(&mtk_sha.lock); |
| 1404 | list_add_tail(&cryp->sha_list, &mtk_sha.dev_list); |
| 1405 | spin_unlock(&mtk_sha.lock); |
| 1406 | |
| 1407 | err = mtk_sha_register_algs(); |
| 1408 | if (err) |
| 1409 | goto err_algs; |
| 1410 | |
| 1411 | return 0; |
| 1412 | |
| 1413 | err_algs: |
| 1414 | spin_lock(&mtk_sha.lock); |
| 1415 | list_del(&cryp->sha_list); |
| 1416 | spin_unlock(&mtk_sha.lock); |
| 1417 | dma_free_coherent(cryp->dev, SHA_TMP_BUF_SIZE, |
| 1418 | cryp->tmp, cryp->tmp_dma); |
| 1419 | err_res: |
| 1420 | mtk_sha_record_free(cryp); |
| 1421 | err_record: |
| 1422 | |
| 1423 | dev_err(cryp->dev, "mtk-sha initialization failed.\n"); |
| 1424 | return err; |
| 1425 | } |
| 1426 | |
| 1427 | void mtk_hash_alg_release(struct mtk_cryp *cryp) |
| 1428 | { |
| 1429 | spin_lock(&mtk_sha.lock); |
| 1430 | list_del(&cryp->sha_list); |
| 1431 | spin_unlock(&mtk_sha.lock); |
| 1432 | |
| 1433 | mtk_sha_unregister_algs(); |
| 1434 | dma_free_coherent(cryp->dev, SHA_TMP_BUF_SIZE, |
| 1435 | cryp->tmp, cryp->tmp_dma); |
| 1436 | mtk_sha_record_free(cryp); |
| 1437 | } |