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Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02001/*
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +00002 * intel TCO Watchdog Driver
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02003 *
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +02004 * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02005 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
14 *
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000017 * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
18 * document number 290687-002, 298242-027: 82801BA (ICH2)
19 * document number 290733-003, 290739-013: 82801CA (ICH3-S)
20 * document number 290716-001, 290718-007: 82801CAM (ICH3-M)
21 * document number 290744-001, 290745-025: 82801DB (ICH4)
22 * document number 252337-001, 252663-008: 82801DBM (ICH4-M)
23 * document number 273599-001, 273645-002: 82801E (C-ICH)
24 * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
25 * document number 300641-004, 300884-013: 6300ESB
26 * document number 301473-002, 301474-026: 82801F (ICH6)
27 * document number 313082-001, 313075-006: 631xESB, 632xESB
28 * document number 307013-003, 307014-024: 82801G (ICH7)
Wim Van Sebroeckd38bd472010-12-31 14:10:45 +000029 * document number 322896-001, 322897-001: NM10
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000030 * document number 313056-003, 313057-017: 82801H (ICH8)
31 * document number 316972-004, 316973-012: 82801I (ICH9)
32 * document number 319973-002, 319974-002: 82801J (ICH10)
Seth Heasley3c9d8ec2010-01-14 20:58:05 +000033 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
Imre Kaloz4946f832009-12-07 20:42:26 +010034 * document number 320066-003, 320257-008: EP80597 (IICH)
Seth Heasley203f8d82011-01-07 17:11:08 -080035 * document number 324645-001, 324646-001: Cougar Point (CPT)
Seth Heasleyc54fb812010-11-17 12:15:08 -070036 * document number TBD : Patsburg (PBG)
Seth Heasley203f8d82011-01-07 17:11:08 -080037 * document number TBD : DH89xxCC
Seth Heasleyaa1f46522011-04-20 10:56:20 -070038 * document number TBD : Panther Point
Seth Heasley84e83c22012-01-23 16:40:55 -080039 * document number TBD : Lynx Point
James Ralston7fb9c1a2012-08-09 09:46:13 -070040 * document number TBD : Lynx Point-LP
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020041 */
42
43/*
44 * Includes, defines, variables, module parameters, ...
45 */
46
Joe Perches27c766a2012-02-15 15:06:19 -080047#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020049/* Module and version information */
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +000050#define DRV_NAME "iTCO_wdt"
Peter Tyser24b3a162014-03-10 16:34:55 -050051#define DRV_VERSION "1.11"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020052
53/* Includes */
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +020054#include <linux/acpi.h> /* For ACPI support */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020055#include <linux/module.h> /* For module specific items */
56#include <linux/moduleparam.h> /* For new moduleparam's */
57#include <linux/types.h> /* For standard types (like size_t) */
58#include <linux/errno.h> /* For the -ENODEV/... values */
59#include <linux/kernel.h> /* For printk/panic/... */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020060#include <linux/watchdog.h> /* For the watchdog specific items */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020061#include <linux/init.h> /* For __init/__exit/... */
62#include <linux/fs.h> /* For file operations */
63#include <linux/platform_device.h> /* For platform_driver framework */
64#include <linux/pci.h> /* For pci functions */
65#include <linux/ioport.h> /* For io-port access */
66#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010067#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
68#include <linux/io.h> /* For inb/outb/... */
Matt Fleming420b54d2015-08-06 13:46:24 +010069#include <linux/platform_data/itco_wdt.h>
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020070
Alan Cox0e6fa3f2008-05-19 14:06:25 +010071#include "iTCO_vendor.h"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020072
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020073/* Address definitions for the TCO */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010074/* TCO base address */
Guenter Roeckce1b95c2017-01-01 11:11:39 -080075#define TCOBASE(p) ((p)->tco_res->start)
Alan Cox0e6fa3f2008-05-19 14:06:25 +010076/* SMI Control and Enable Register */
Guenter Roeckce1b95c2017-01-01 11:11:39 -080077#define SMI_EN(p) ((p)->smi_res->start)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020078
Guenter Roeckce1b95c2017-01-01 11:11:39 -080079#define TCO_RLD(p) (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */
80#define TCOv1_TMR(p) (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/
81#define TCO_DAT_IN(p) (TCOBASE(p) + 0x02) /* TCO Data In Register */
82#define TCO_DAT_OUT(p) (TCOBASE(p) + 0x03) /* TCO Data Out Register */
83#define TCO1_STS(p) (TCOBASE(p) + 0x04) /* TCO1 Status Register */
84#define TCO2_STS(p) (TCOBASE(p) + 0x06) /* TCO2 Status Register */
85#define TCO1_CNT(p) (TCOBASE(p) + 0x08) /* TCO1 Control Register */
86#define TCO2_CNT(p) (TCOBASE(p) + 0x0a) /* TCO2 Control Register */
87#define TCOv2_TMR(p) (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020088
89/* internal variables */
Guenter Roeckce1b95c2017-01-01 11:11:39 -080090struct iTCO_wdt_private {
91 struct watchdog_device wddev;
92
Alan Cox0e6fa3f2008-05-19 14:06:25 +010093 /* TCO version/generation */
94 unsigned int iTCO_version;
Aaron Sierra887c8ec2012-04-20 14:14:11 -050095 struct resource *tco_res;
96 struct resource *smi_res;
Peter Tyser24b3a162014-03-10 16:34:55 -050097 /*
98 * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
99 * or memory-mapped PMC register bit 4 (TCO version 3).
100 */
101 struct resource *gcs_pmc_res;
102 unsigned long __iomem *gcs_pmc;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100103 /* the lock for io operations */
104 spinlock_t io_lock;
105 /* the PCI-device */
Guenter Roeck78e45692017-01-02 09:27:36 -0800106 struct pci_dev *pci_dev;
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200107 /* whether or not the watchdog has been suspended */
108 bool suspended;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800109};
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200110
111/* module parameters */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200112#define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */
113static int heartbeat = WATCHDOG_TIMEOUT; /* in seconds */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200114module_param(heartbeat, int, 0);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100115MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
116 "5..76 (TCO v1) or 3..614 (TCO v2), default="
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200117 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200118
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +0100119static bool nowayout = WATCHDOG_NOWAYOUT;
120module_param(nowayout, bool, 0);
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100121MODULE_PARM_DESC(nowayout,
122 "Watchdog cannot be stopped once started (default="
123 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100124
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100125static int turn_SMI_watchdog_clear_off = 1;
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200126module_param(turn_SMI_watchdog_clear_off, int, 0);
127MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100128 "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200129
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200130/*
131 * Some TCO specific functions
132 */
133
Peter Tyser24b3a162014-03-10 16:34:55 -0500134/*
135 * The iTCO v1 and v2's internal timer is stored as ticks which decrement
136 * every 0.6 seconds. v3's internal timer is stored as seconds (some
137 * datasheets incorrectly state 0.6 seconds).
138 */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800139static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private *p,
140 int secs)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200141{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800142 return p->iTCO_version == 3 ? secs : (secs * 10) / 6;
Peter Tyser24b3a162014-03-10 16:34:55 -0500143}
144
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800145static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private *p,
146 int ticks)
Peter Tyser24b3a162014-03-10 16:34:55 -0500147{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800148 return p->iTCO_version == 3 ? ticks : (ticks * 6) / 10;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200149}
150
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800151static inline u32 no_reboot_bit(struct iTCO_wdt_private *p)
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100152{
153 u32 enable_bit;
154
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800155 switch (p->iTCO_version) {
Yong, Jonathan3b3a1c82016-06-17 00:33:31 +0000156 case 5:
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100157 case 3:
158 enable_bit = 0x00000010;
159 break;
160 case 2:
161 enable_bit = 0x00000020;
162 break;
163 case 4:
164 case 1:
165 default:
166 enable_bit = 0x00000002;
167 break;
168 }
169
170 return enable_bit;
171}
172
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800173static void iTCO_wdt_set_NO_REBOOT_bit(struct iTCO_wdt_private *p)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200174{
175 u32 val32;
176
177 /* Set the NO_REBOOT bit: this disables reboots */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800178 if (p->iTCO_version >= 2) {
179 val32 = readl(p->gcs_pmc);
180 val32 |= no_reboot_bit(p);
181 writel(val32, p->gcs_pmc);
182 } else if (p->iTCO_version == 1) {
Guenter Roeck78e45692017-01-02 09:27:36 -0800183 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800184 val32 |= no_reboot_bit(p);
Guenter Roeck78e45692017-01-02 09:27:36 -0800185 pci_write_config_dword(p->pci_dev, 0xd4, val32);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200186 }
187}
188
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800189static int iTCO_wdt_unset_NO_REBOOT_bit(struct iTCO_wdt_private *p)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200190{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800191 u32 enable_bit = no_reboot_bit(p);
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100192 u32 val32 = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200193
194 /* Unset the NO_REBOOT bit: this enables reboots */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800195 if (p->iTCO_version >= 2) {
196 val32 = readl(p->gcs_pmc);
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100197 val32 &= ~enable_bit;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800198 writel(val32, p->gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200199
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800200 val32 = readl(p->gcs_pmc);
201 } else if (p->iTCO_version == 1) {
Guenter Roeck78e45692017-01-02 09:27:36 -0800202 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100203 val32 &= ~enable_bit;
Guenter Roeck78e45692017-01-02 09:27:36 -0800204 pci_write_config_dword(p->pci_dev, 0xd4, val32);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200205
Guenter Roeck78e45692017-01-02 09:27:36 -0800206 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200207 }
208
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100209 if (val32 & enable_bit)
210 return -EIO;
211
212 return 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200213}
214
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200215static int iTCO_wdt_start(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200216{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800217 struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200218 unsigned int val;
219
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800220 spin_lock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200221
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800222 iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100223
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200224 /* disable chipset's NO_REBOOT bit */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800225 if (iTCO_wdt_unset_NO_REBOOT_bit(p)) {
226 spin_unlock(&p->io_lock);
Joe Perches27c766a2012-02-15 15:06:19 -0800227 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200228 return -EIO;
229 }
230
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000231 /* Force the timer to its reload value by writing to the TCO_RLD
232 register */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800233 if (p->iTCO_version >= 2)
234 outw(0x01, TCO_RLD(p));
235 else if (p->iTCO_version == 1)
236 outb(0x01, TCO_RLD(p));
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000237
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200238 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800239 val = inw(TCO1_CNT(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200240 val &= 0xf7ff;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800241 outw(val, TCO1_CNT(p));
242 val = inw(TCO1_CNT(p));
243 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200244
245 if (val & 0x0800)
246 return -1;
247 return 0;
248}
249
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200250static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200251{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800252 struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200253 unsigned int val;
254
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800255 spin_lock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200256
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800257 iTCO_vendor_pre_stop(p->smi_res);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100258
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200259 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800260 val = inw(TCO1_CNT(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200261 val |= 0x0800;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800262 outw(val, TCO1_CNT(p));
263 val = inw(TCO1_CNT(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200264
265 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800266 iTCO_wdt_set_NO_REBOOT_bit(p);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200267
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800268 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200269
270 if ((val & 0x0800) == 0)
271 return -1;
272 return 0;
273}
274
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200275static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200276{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800277 struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200278
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800279 spin_lock(&p->io_lock);
280
281 iTCO_vendor_pre_keepalive(p->smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100282
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200283 /* Reload the timer by writing to the TCO Timer Counter register */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800284 if (p->iTCO_version >= 2) {
285 outw(0x01, TCO_RLD(p));
286 } else if (p->iTCO_version == 1) {
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100287 /* Reset the timeout status bit so that the timer
288 * needs to count down twice again before rebooting */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800289 outw(0x0008, TCO1_STS(p)); /* write 1 to clear bit */
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100290
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800291 outb(0x01, TCO_RLD(p));
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100292 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200293
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800294 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200295 return 0;
296}
297
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200298static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200299{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800300 struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200301 unsigned int val16;
302 unsigned char val8;
303 unsigned int tmrval;
304
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800305 tmrval = seconds_to_ticks(p, t);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100306
307 /* For TCO v1 the timer counts down twice before rebooting */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800308 if (p->iTCO_version == 1)
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100309 tmrval /= 2;
310
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200311 /* from the specs: */
312 /* "Values of 0h-3h are ignored and should not be attempted" */
313 if (tmrval < 0x04)
314 return -EINVAL;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800315 if ((p->iTCO_version >= 2 && tmrval > 0x3ff) ||
316 (p->iTCO_version == 1 && tmrval > 0x03f))
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200317 return -EINVAL;
318
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100319 iTCO_vendor_pre_set_heartbeat(tmrval);
320
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200321 /* Write new heartbeat to watchdog */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800322 if (p->iTCO_version >= 2) {
323 spin_lock(&p->io_lock);
324 val16 = inw(TCOv2_TMR(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200325 val16 &= 0xfc00;
326 val16 |= tmrval;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800327 outw(val16, TCOv2_TMR(p));
328 val16 = inw(TCOv2_TMR(p));
329 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200330
331 if ((val16 & 0x3ff) != tmrval)
332 return -EINVAL;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800333 } else if (p->iTCO_version == 1) {
334 spin_lock(&p->io_lock);
335 val8 = inb(TCOv1_TMR(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200336 val8 &= 0xc0;
337 val8 |= (tmrval & 0xff);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800338 outb(val8, TCOv1_TMR(p));
339 val8 = inb(TCOv1_TMR(p));
340 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200341
342 if ((val8 & 0x3f) != tmrval)
343 return -EINVAL;
344 }
345
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200346 wd_dev->timeout = t;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200347 return 0;
348}
349
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200350static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200351{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800352 struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200353 unsigned int val16;
354 unsigned char val8;
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200355 unsigned int time_left = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200356
357 /* read the TCO Timer */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800358 if (p->iTCO_version >= 2) {
359 spin_lock(&p->io_lock);
360 val16 = inw(TCO_RLD(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200361 val16 &= 0x3ff;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800362 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200363
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800364 time_left = ticks_to_seconds(p, val16);
365 } else if (p->iTCO_version == 1) {
366 spin_lock(&p->io_lock);
367 val8 = inb(TCO_RLD(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200368 val8 &= 0x3f;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800369 if (!(inw(TCO1_STS(p)) & 0x0008))
370 val8 += (inb(TCOv1_TMR(p)) & 0x3f);
371 spin_unlock(&p->io_lock);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200372
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800373 time_left = ticks_to_seconds(p, val8);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200374 }
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200375 return time_left;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200376}
377
378/*
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200379 * Kernel Interfaces
380 */
381
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200382static const struct watchdog_info ident = {
383 .options = WDIOF_SETTIMEOUT |
384 WDIOF_KEEPALIVEPING |
385 WDIOF_MAGICCLOSE,
386 .firmware_version = 0,
387 .identity = DRV_NAME,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200388};
389
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200390static const struct watchdog_ops iTCO_wdt_ops = {
391 .owner = THIS_MODULE,
392 .start = iTCO_wdt_start,
Jingoo Han5f5e1902014-02-27 14:41:42 +0900393 .stop = iTCO_wdt_stop,
394 .ping = iTCO_wdt_ping,
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200395 .set_timeout = iTCO_wdt_set_timeout,
396 .get_timeleft = iTCO_wdt_get_timeleft,
397};
398
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200399/*
400 * Init & exit routines
401 */
402
Guenter Roeck78e45692017-01-02 09:27:36 -0800403static int iTCO_wdt_probe(struct platform_device *pdev)
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500404{
Guenter Roeck78e45692017-01-02 09:27:36 -0800405 struct device *dev = &pdev->dev;
406 struct itco_wdt_platform_data *pdata = dev_get_platdata(dev);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800407 struct iTCO_wdt_private *p;
408 unsigned long val32;
409 int ret;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500410
Matt Fleming420b54d2015-08-06 13:46:24 +0100411 if (!pdata)
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800412 return -ENODEV;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500413
Guenter Roeck78e45692017-01-02 09:27:36 -0800414 p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800415 if (!p)
416 return -ENOMEM;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500417
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800418 spin_lock_init(&p->io_lock);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500419
Guenter Roeck78e45692017-01-02 09:27:36 -0800420 p->tco_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_TCO);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800421 if (!p->tco_res)
422 return -ENODEV;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500423
Guenter Roeck78e45692017-01-02 09:27:36 -0800424 p->smi_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_SMI);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800425 if (!p->smi_res)
426 return -ENODEV;
427
428 p->iTCO_version = pdata->version;
Guenter Roeck78e45692017-01-02 09:27:36 -0800429 p->pci_dev = to_pci_dev(dev->parent);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200430
431 /*
Peter Tyser24b3a162014-03-10 16:34:55 -0500432 * Get the Memory-Mapped GCS or PMC register, we need it for the
433 * NO_REBOOT flag (TCO v2 and v3).
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200434 */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800435 if (p->iTCO_version >= 2) {
Guenter Roeck78e45692017-01-02 09:27:36 -0800436 p->gcs_pmc_res = platform_get_resource(pdev,
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800437 IORESOURCE_MEM,
438 ICH_RES_MEM_GCS_PMC);
Guenter Roeck78e45692017-01-02 09:27:36 -0800439 p->gcs_pmc = devm_ioremap_resource(dev, p->gcs_pmc_res);
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800440 if (IS_ERR(p->gcs_pmc))
441 return PTR_ERR(p->gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200442 }
443
444 /* Check chipset's NO_REBOOT bit */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800445 if (iTCO_wdt_unset_NO_REBOOT_bit(p) &&
446 iTCO_vendor_check_noreboot_on()) {
Joe Perches27c766a2012-02-15 15:06:19 -0800447 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800448 return -ENODEV; /* Cannot reset NO_REBOOT bit */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200449 }
450
451 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800452 iTCO_wdt_set_NO_REBOOT_bit(p);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200453
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000454 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
Guenter Roeck78e45692017-01-02 09:27:36 -0800455 if (!devm_request_region(dev, p->smi_res->start,
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800456 resource_size(p->smi_res),
Guenter Roeck78e45692017-01-02 09:27:36 -0800457 pdev->name)) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500458 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800459 (u64)SMI_EN(p));
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800460 return -EBUSY;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200461 }
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800462 if (turn_SMI_watchdog_clear_off >= p->iTCO_version) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500463 /*
464 * Bit 13: TCO_EN -> 0
465 * Disables TCO logic generating an SMI#
466 */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800467 val32 = inl(SMI_EN(p));
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200468 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800469 outl(val32, SMI_EN(p));
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200470 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200471
Guenter Roeck78e45692017-01-02 09:27:36 -0800472 if (!devm_request_region(dev, p->tco_res->start,
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800473 resource_size(p->tco_res),
Guenter Roeck78e45692017-01-02 09:27:36 -0800474 pdev->name)) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500475 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800476 (u64)TCOBASE(p));
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800477 return -EBUSY;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200478 }
479
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500480 pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800481 pdata->name, pdata->version, (u64)TCOBASE(p));
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200482
483 /* Clear out the (probably old) status */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800484 switch (p->iTCO_version) {
Yong, Jonathan3b3a1c82016-06-17 00:33:31 +0000485 case 5:
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100486 case 4:
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800487 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
488 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100489 break;
490 case 3:
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800491 outl(0x20008, TCO1_STS(p));
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100492 break;
493 case 2:
494 case 1:
495 default:
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800496 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
497 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
498 outw(0x0004, TCO2_STS(p)); /* Clear BOOT_STS bit */
Matt Fleming2a7a0e92015-08-06 13:46:26 +0100499 break;
Peter Tyser24b3a162014-03-10 16:34:55 -0500500 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200501
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800502 p->wddev.info = &ident,
503 p->wddev.ops = &iTCO_wdt_ops,
504 p->wddev.bootstatus = 0;
505 p->wddev.timeout = WATCHDOG_TIMEOUT;
506 watchdog_set_nowayout(&p->wddev, nowayout);
Guenter Roeck78e45692017-01-02 09:27:36 -0800507 p->wddev.parent = dev;
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800508
509 watchdog_set_drvdata(&p->wddev, p);
Guenter Roeck78e45692017-01-02 09:27:36 -0800510 platform_set_drvdata(pdev, p);
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200511
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200512 /* Make sure the watchdog is not running */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800513 iTCO_wdt_stop(&p->wddev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200514
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100515 /* Check that the heartbeat value is within it's range;
516 if not reset to the default */
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800517 if (iTCO_wdt_set_timeout(&p->wddev, heartbeat)) {
518 iTCO_wdt_set_timeout(&p->wddev, WATCHDOG_TIMEOUT);
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200519 pr_info("timeout value out of range, using %d\n",
520 WATCHDOG_TIMEOUT);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200521 }
522
Guenter Roeckd3d77b52017-01-10 15:21:49 -0800523 watchdog_stop_on_reboot(&p->wddev);
Guenter Roeck78e45692017-01-02 09:27:36 -0800524 ret = devm_watchdog_register_device(dev, &p->wddev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200525 if (ret != 0) {
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200526 pr_err("cannot register watchdog device (err=%d)\n", ret);
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800527 return ret;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200528 }
529
Joe Perches27c766a2012-02-15 15:06:19 -0800530 pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
531 heartbeat, nowayout);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200532
533 return 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200534}
535
Guenter Roeck78e45692017-01-02 09:27:36 -0800536static int iTCO_wdt_remove(struct platform_device *pdev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200537{
Guenter Roeck78e45692017-01-02 09:27:36 -0800538 struct iTCO_wdt_private *p = platform_get_drvdata(pdev);
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800539
Guenter Roeckc7bbcc82017-01-01 10:39:09 -0800540 /* Stop the timer before we leave */
541 if (!nowayout)
542 iTCO_wdt_stop(&p->wddev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200543
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200544 return 0;
545}
546
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200547#ifdef CONFIG_PM_SLEEP
548/*
549 * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
550 * the watchdog cannot be pinged while in that state. In ACPI sleep states the
551 * watchdog is stopped by the platform firmware.
552 */
553
554#ifdef CONFIG_ACPI
555static inline bool need_suspend(void)
556{
557 return acpi_target_system_state() == ACPI_STATE_S0;
558}
559#else
560static inline bool need_suspend(void) { return true; }
561#endif
562
563static int iTCO_wdt_suspend_noirq(struct device *dev)
564{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800565 struct iTCO_wdt_private *p = dev_get_drvdata(dev);
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200566 int ret = 0;
567
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800568 p->suspended = false;
569 if (watchdog_active(&p->wddev) && need_suspend()) {
570 ret = iTCO_wdt_stop(&p->wddev);
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200571 if (!ret)
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800572 p->suspended = true;
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200573 }
574 return ret;
575}
576
577static int iTCO_wdt_resume_noirq(struct device *dev)
578{
Guenter Roeckce1b95c2017-01-01 11:11:39 -0800579 struct iTCO_wdt_private *p = dev_get_drvdata(dev);
580
581 if (p->suspended)
582 iTCO_wdt_start(&p->wddev);
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200583
584 return 0;
585}
586
Julia Lawall6e938f62016-08-28 22:26:26 +0200587static const struct dev_pm_ops iTCO_wdt_pm = {
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200588 .suspend_noirq = iTCO_wdt_suspend_noirq,
589 .resume_noirq = iTCO_wdt_resume_noirq,
590};
591
592#define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
593#else
594#define ITCO_WDT_PM_OPS NULL
595#endif /* CONFIG_PM_SLEEP */
596
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200597static struct platform_driver iTCO_wdt_driver = {
598 .probe = iTCO_wdt_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500599 .remove = iTCO_wdt_remove,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200600 .driver = {
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200601 .name = DRV_NAME,
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200602 .pm = ITCO_WDT_PM_OPS,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200603 },
604};
605
606static int __init iTCO_wdt_init_module(void)
607{
Joe Perches27c766a2012-02-15 15:06:19 -0800608 pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200609
Guenter Roeck9616bd22017-01-03 02:43:32 -0800610 return platform_driver_register(&iTCO_wdt_driver);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200611}
612
613static void __exit iTCO_wdt_cleanup_module(void)
614{
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200615 platform_driver_unregister(&iTCO_wdt_driver);
Joe Perches27c766a2012-02-15 15:06:19 -0800616 pr_info("Watchdog Module Unloaded\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200617}
618
619module_init(iTCO_wdt_init_module);
620module_exit(iTCO_wdt_cleanup_module);
621
622MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
623MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200624MODULE_VERSION(DRV_VERSION);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200625MODULE_LICENSE("GPL");
Jan Beuliche5de32e2012-06-22 16:41:00 +0100626MODULE_ALIAS("platform:" DRV_NAME);