Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 1 | /* |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 2 | * intel TCO Watchdog Driver |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 3 | * |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 4 | * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>. |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor |
| 12 | * provide warranty for any of this software. This material is |
| 13 | * provided "AS-IS" and at no charge. |
| 14 | * |
| 15 | * The TCO watchdog is implemented in the following I/O controller hubs: |
| 16 | * (See the intel documentation on http://developer.intel.com.) |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 17 | * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) |
| 18 | * document number 290687-002, 298242-027: 82801BA (ICH2) |
| 19 | * document number 290733-003, 290739-013: 82801CA (ICH3-S) |
| 20 | * document number 290716-001, 290718-007: 82801CAM (ICH3-M) |
| 21 | * document number 290744-001, 290745-025: 82801DB (ICH4) |
| 22 | * document number 252337-001, 252663-008: 82801DBM (ICH4-M) |
| 23 | * document number 273599-001, 273645-002: 82801E (C-ICH) |
| 24 | * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) |
| 25 | * document number 300641-004, 300884-013: 6300ESB |
| 26 | * document number 301473-002, 301474-026: 82801F (ICH6) |
| 27 | * document number 313082-001, 313075-006: 631xESB, 632xESB |
| 28 | * document number 307013-003, 307014-024: 82801G (ICH7) |
Wim Van Sebroeck | d38bd47 | 2010-12-31 14:10:45 +0000 | [diff] [blame] | 29 | * document number 322896-001, 322897-001: NM10 |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 30 | * document number 313056-003, 313057-017: 82801H (ICH8) |
| 31 | * document number 316972-004, 316973-012: 82801I (ICH9) |
| 32 | * document number 319973-002, 319974-002: 82801J (ICH10) |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 33 | * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) |
Imre Kaloz | 4946f83 | 2009-12-07 20:42:26 +0100 | [diff] [blame] | 34 | * document number 320066-003, 320257-008: EP80597 (IICH) |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 35 | * document number 324645-001, 324646-001: Cougar Point (CPT) |
Seth Heasley | c54fb81 | 2010-11-17 12:15:08 -0700 | [diff] [blame] | 36 | * document number TBD : Patsburg (PBG) |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 37 | * document number TBD : DH89xxCC |
Seth Heasley | aa1f4652 | 2011-04-20 10:56:20 -0700 | [diff] [blame] | 38 | * document number TBD : Panther Point |
Seth Heasley | 84e83c2 | 2012-01-23 16:40:55 -0800 | [diff] [blame] | 39 | * document number TBD : Lynx Point |
James Ralston | 7fb9c1a | 2012-08-09 09:46:13 -0700 | [diff] [blame] | 40 | * document number TBD : Lynx Point-LP |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 41 | */ |
| 42 | |
| 43 | /* |
| 44 | * Includes, defines, variables, module parameters, ... |
| 45 | */ |
| 46 | |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 47 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 48 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 49 | /* Module and version information */ |
Wim Van Sebroeck | 7944d3a | 2008-08-06 20:19:41 +0000 | [diff] [blame] | 50 | #define DRV_NAME "iTCO_wdt" |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 51 | #define DRV_VERSION "1.11" |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 52 | |
| 53 | /* Includes */ |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 54 | #include <linux/acpi.h> /* For ACPI support */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 55 | #include <linux/module.h> /* For module specific items */ |
| 56 | #include <linux/moduleparam.h> /* For new moduleparam's */ |
| 57 | #include <linux/types.h> /* For standard types (like size_t) */ |
| 58 | #include <linux/errno.h> /* For the -ENODEV/... values */ |
| 59 | #include <linux/kernel.h> /* For printk/panic/... */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 60 | #include <linux/watchdog.h> /* For the watchdog specific items */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 61 | #include <linux/init.h> /* For __init/__exit/... */ |
| 62 | #include <linux/fs.h> /* For file operations */ |
| 63 | #include <linux/platform_device.h> /* For platform_driver framework */ |
| 64 | #include <linux/pci.h> /* For pci functions */ |
| 65 | #include <linux/ioport.h> /* For io-port access */ |
| 66 | #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 67 | #include <linux/uaccess.h> /* For copy_to_user/put_user/... */ |
| 68 | #include <linux/io.h> /* For inb/outb/... */ |
Matt Fleming | 420b54d | 2015-08-06 13:46:24 +0100 | [diff] [blame] | 69 | #include <linux/platform_data/itco_wdt.h> |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 70 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 71 | #include "iTCO_vendor.h" |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 72 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 73 | /* Address definitions for the TCO */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 74 | /* TCO base address */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 75 | #define TCOBASE(p) ((p)->tco_res->start) |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 76 | /* SMI Control and Enable Register */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 77 | #define SMI_EN(p) ((p)->smi_res->start) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 78 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 79 | #define TCO_RLD(p) (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */ |
| 80 | #define TCOv1_TMR(p) (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/ |
| 81 | #define TCO_DAT_IN(p) (TCOBASE(p) + 0x02) /* TCO Data In Register */ |
| 82 | #define TCO_DAT_OUT(p) (TCOBASE(p) + 0x03) /* TCO Data Out Register */ |
| 83 | #define TCO1_STS(p) (TCOBASE(p) + 0x04) /* TCO1 Status Register */ |
| 84 | #define TCO2_STS(p) (TCOBASE(p) + 0x06) /* TCO2 Status Register */ |
| 85 | #define TCO1_CNT(p) (TCOBASE(p) + 0x08) /* TCO1 Control Register */ |
| 86 | #define TCO2_CNT(p) (TCOBASE(p) + 0x0a) /* TCO2 Control Register */ |
| 87 | #define TCOv2_TMR(p) (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 88 | |
| 89 | /* internal variables */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 90 | struct iTCO_wdt_private { |
| 91 | struct watchdog_device wddev; |
| 92 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 93 | /* TCO version/generation */ |
| 94 | unsigned int iTCO_version; |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 95 | struct resource *tco_res; |
| 96 | struct resource *smi_res; |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 97 | /* |
| 98 | * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2), |
| 99 | * or memory-mapped PMC register bit 4 (TCO version 3). |
| 100 | */ |
| 101 | struct resource *gcs_pmc_res; |
| 102 | unsigned long __iomem *gcs_pmc; |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 103 | /* the lock for io operations */ |
| 104 | spinlock_t io_lock; |
| 105 | /* the PCI-device */ |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 106 | struct pci_dev *pci_dev; |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 107 | /* whether or not the watchdog has been suspended */ |
| 108 | bool suspended; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 109 | }; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 110 | |
| 111 | /* module parameters */ |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 112 | #define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */ |
| 113 | static int heartbeat = WATCHDOG_TIMEOUT; /* in seconds */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 114 | module_param(heartbeat, int, 0); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 115 | MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. " |
| 116 | "5..76 (TCO v1) or 3..614 (TCO v2), default=" |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 117 | __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 118 | |
Wim Van Sebroeck | 86a1e18 | 2012-03-05 16:51:11 +0100 | [diff] [blame] | 119 | static bool nowayout = WATCHDOG_NOWAYOUT; |
| 120 | module_param(nowayout, bool, 0); |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 121 | MODULE_PARM_DESC(nowayout, |
| 122 | "Watchdog cannot be stopped once started (default=" |
| 123 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 124 | |
Wim Van Sebroeck | 0d09858 | 2011-12-26 15:23:51 +0100 | [diff] [blame] | 125 | static int turn_SMI_watchdog_clear_off = 1; |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 126 | module_param(turn_SMI_watchdog_clear_off, int, 0); |
| 127 | MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, |
Wim Van Sebroeck | 0d09858 | 2011-12-26 15:23:51 +0100 | [diff] [blame] | 128 | "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)"); |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 129 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 130 | /* |
| 131 | * Some TCO specific functions |
| 132 | */ |
| 133 | |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 134 | /* |
| 135 | * The iTCO v1 and v2's internal timer is stored as ticks which decrement |
| 136 | * every 0.6 seconds. v3's internal timer is stored as seconds (some |
| 137 | * datasheets incorrectly state 0.6 seconds). |
| 138 | */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 139 | static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private *p, |
| 140 | int secs) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 141 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 142 | return p->iTCO_version == 3 ? secs : (secs * 10) / 6; |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 143 | } |
| 144 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 145 | static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private *p, |
| 146 | int ticks) |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 147 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 148 | return p->iTCO_version == 3 ? ticks : (ticks * 6) / 10; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 149 | } |
| 150 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 151 | static inline u32 no_reboot_bit(struct iTCO_wdt_private *p) |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 152 | { |
| 153 | u32 enable_bit; |
| 154 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 155 | switch (p->iTCO_version) { |
Yong, Jonathan | 3b3a1c8 | 2016-06-17 00:33:31 +0000 | [diff] [blame] | 156 | case 5: |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 157 | case 3: |
| 158 | enable_bit = 0x00000010; |
| 159 | break; |
| 160 | case 2: |
| 161 | enable_bit = 0x00000020; |
| 162 | break; |
| 163 | case 4: |
| 164 | case 1: |
| 165 | default: |
| 166 | enable_bit = 0x00000002; |
| 167 | break; |
| 168 | } |
| 169 | |
| 170 | return enable_bit; |
| 171 | } |
| 172 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 173 | static void iTCO_wdt_set_NO_REBOOT_bit(struct iTCO_wdt_private *p) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 174 | { |
| 175 | u32 val32; |
| 176 | |
| 177 | /* Set the NO_REBOOT bit: this disables reboots */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 178 | if (p->iTCO_version >= 2) { |
| 179 | val32 = readl(p->gcs_pmc); |
| 180 | val32 |= no_reboot_bit(p); |
| 181 | writel(val32, p->gcs_pmc); |
| 182 | } else if (p->iTCO_version == 1) { |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 183 | pci_read_config_dword(p->pci_dev, 0xd4, &val32); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 184 | val32 |= no_reboot_bit(p); |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 185 | pci_write_config_dword(p->pci_dev, 0xd4, val32); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 189 | static int iTCO_wdt_unset_NO_REBOOT_bit(struct iTCO_wdt_private *p) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 190 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 191 | u32 enable_bit = no_reboot_bit(p); |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 192 | u32 val32 = 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 193 | |
| 194 | /* Unset the NO_REBOOT bit: this enables reboots */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 195 | if (p->iTCO_version >= 2) { |
| 196 | val32 = readl(p->gcs_pmc); |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 197 | val32 &= ~enable_bit; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 198 | writel(val32, p->gcs_pmc); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 199 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 200 | val32 = readl(p->gcs_pmc); |
| 201 | } else if (p->iTCO_version == 1) { |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 202 | pci_read_config_dword(p->pci_dev, 0xd4, &val32); |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 203 | val32 &= ~enable_bit; |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 204 | pci_write_config_dword(p->pci_dev, 0xd4, val32); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 205 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 206 | pci_read_config_dword(p->pci_dev, 0xd4, &val32); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 207 | } |
| 208 | |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 209 | if (val32 & enable_bit) |
| 210 | return -EIO; |
| 211 | |
| 212 | return 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 213 | } |
| 214 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 215 | static int iTCO_wdt_start(struct watchdog_device *wd_dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 216 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 217 | struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 218 | unsigned int val; |
| 219 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 220 | spin_lock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 221 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 222 | iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout); |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 223 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 224 | /* disable chipset's NO_REBOOT bit */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 225 | if (iTCO_wdt_unset_NO_REBOOT_bit(p)) { |
| 226 | spin_unlock(&p->io_lock); |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 227 | pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 228 | return -EIO; |
| 229 | } |
| 230 | |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 231 | /* Force the timer to its reload value by writing to the TCO_RLD |
| 232 | register */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 233 | if (p->iTCO_version >= 2) |
| 234 | outw(0x01, TCO_RLD(p)); |
| 235 | else if (p->iTCO_version == 1) |
| 236 | outb(0x01, TCO_RLD(p)); |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 237 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 238 | /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 239 | val = inw(TCO1_CNT(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 240 | val &= 0xf7ff; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 241 | outw(val, TCO1_CNT(p)); |
| 242 | val = inw(TCO1_CNT(p)); |
| 243 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 244 | |
| 245 | if (val & 0x0800) |
| 246 | return -1; |
| 247 | return 0; |
| 248 | } |
| 249 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 250 | static int iTCO_wdt_stop(struct watchdog_device *wd_dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 251 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 252 | struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 253 | unsigned int val; |
| 254 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 255 | spin_lock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 256 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 257 | iTCO_vendor_pre_stop(p->smi_res); |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 258 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 259 | /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 260 | val = inw(TCO1_CNT(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 261 | val |= 0x0800; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 262 | outw(val, TCO1_CNT(p)); |
| 263 | val = inw(TCO1_CNT(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 264 | |
| 265 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 266 | iTCO_wdt_set_NO_REBOOT_bit(p); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 267 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 268 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 269 | |
| 270 | if ((val & 0x0800) == 0) |
| 271 | return -1; |
| 272 | return 0; |
| 273 | } |
| 274 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 275 | static int iTCO_wdt_ping(struct watchdog_device *wd_dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 276 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 277 | struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 278 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 279 | spin_lock(&p->io_lock); |
| 280 | |
| 281 | iTCO_vendor_pre_keepalive(p->smi_res, wd_dev->timeout); |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 282 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 283 | /* Reload the timer by writing to the TCO Timer Counter register */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 284 | if (p->iTCO_version >= 2) { |
| 285 | outw(0x01, TCO_RLD(p)); |
| 286 | } else if (p->iTCO_version == 1) { |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 287 | /* Reset the timeout status bit so that the timer |
| 288 | * needs to count down twice again before rebooting */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 289 | outw(0x0008, TCO1_STS(p)); /* write 1 to clear bit */ |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 290 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 291 | outb(0x01, TCO_RLD(p)); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 292 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 293 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 294 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 295 | return 0; |
| 296 | } |
| 297 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 298 | static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 299 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 300 | struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 301 | unsigned int val16; |
| 302 | unsigned char val8; |
| 303 | unsigned int tmrval; |
| 304 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 305 | tmrval = seconds_to_ticks(p, t); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 306 | |
| 307 | /* For TCO v1 the timer counts down twice before rebooting */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 308 | if (p->iTCO_version == 1) |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 309 | tmrval /= 2; |
| 310 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 311 | /* from the specs: */ |
| 312 | /* "Values of 0h-3h are ignored and should not be attempted" */ |
| 313 | if (tmrval < 0x04) |
| 314 | return -EINVAL; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 315 | if ((p->iTCO_version >= 2 && tmrval > 0x3ff) || |
| 316 | (p->iTCO_version == 1 && tmrval > 0x03f)) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 317 | return -EINVAL; |
| 318 | |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 319 | iTCO_vendor_pre_set_heartbeat(tmrval); |
| 320 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 321 | /* Write new heartbeat to watchdog */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 322 | if (p->iTCO_version >= 2) { |
| 323 | spin_lock(&p->io_lock); |
| 324 | val16 = inw(TCOv2_TMR(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 325 | val16 &= 0xfc00; |
| 326 | val16 |= tmrval; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 327 | outw(val16, TCOv2_TMR(p)); |
| 328 | val16 = inw(TCOv2_TMR(p)); |
| 329 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 330 | |
| 331 | if ((val16 & 0x3ff) != tmrval) |
| 332 | return -EINVAL; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 333 | } else if (p->iTCO_version == 1) { |
| 334 | spin_lock(&p->io_lock); |
| 335 | val8 = inb(TCOv1_TMR(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 336 | val8 &= 0xc0; |
| 337 | val8 |= (tmrval & 0xff); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 338 | outb(val8, TCOv1_TMR(p)); |
| 339 | val8 = inb(TCOv1_TMR(p)); |
| 340 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 341 | |
| 342 | if ((val8 & 0x3f) != tmrval) |
| 343 | return -EINVAL; |
| 344 | } |
| 345 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 346 | wd_dev->timeout = t; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 347 | return 0; |
| 348 | } |
| 349 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 350 | static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 351 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 352 | struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 353 | unsigned int val16; |
| 354 | unsigned char val8; |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 355 | unsigned int time_left = 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 356 | |
| 357 | /* read the TCO Timer */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 358 | if (p->iTCO_version >= 2) { |
| 359 | spin_lock(&p->io_lock); |
| 360 | val16 = inw(TCO_RLD(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 361 | val16 &= 0x3ff; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 362 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 363 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 364 | time_left = ticks_to_seconds(p, val16); |
| 365 | } else if (p->iTCO_version == 1) { |
| 366 | spin_lock(&p->io_lock); |
| 367 | val8 = inb(TCO_RLD(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 368 | val8 &= 0x3f; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 369 | if (!(inw(TCO1_STS(p)) & 0x0008)) |
| 370 | val8 += (inb(TCOv1_TMR(p)) & 0x3f); |
| 371 | spin_unlock(&p->io_lock); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 372 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 373 | time_left = ticks_to_seconds(p, val8); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 374 | } |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 375 | return time_left; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | /* |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 379 | * Kernel Interfaces |
| 380 | */ |
| 381 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 382 | static const struct watchdog_info ident = { |
| 383 | .options = WDIOF_SETTIMEOUT | |
| 384 | WDIOF_KEEPALIVEPING | |
| 385 | WDIOF_MAGICCLOSE, |
| 386 | .firmware_version = 0, |
| 387 | .identity = DRV_NAME, |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 388 | }; |
| 389 | |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 390 | static const struct watchdog_ops iTCO_wdt_ops = { |
| 391 | .owner = THIS_MODULE, |
| 392 | .start = iTCO_wdt_start, |
Jingoo Han | 5f5e190 | 2014-02-27 14:41:42 +0900 | [diff] [blame] | 393 | .stop = iTCO_wdt_stop, |
| 394 | .ping = iTCO_wdt_ping, |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 395 | .set_timeout = iTCO_wdt_set_timeout, |
| 396 | .get_timeleft = iTCO_wdt_get_timeleft, |
| 397 | }; |
| 398 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 399 | /* |
| 400 | * Init & exit routines |
| 401 | */ |
| 402 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 403 | static int iTCO_wdt_probe(struct platform_device *pdev) |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 404 | { |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 405 | struct device *dev = &pdev->dev; |
| 406 | struct itco_wdt_platform_data *pdata = dev_get_platdata(dev); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 407 | struct iTCO_wdt_private *p; |
| 408 | unsigned long val32; |
| 409 | int ret; |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 410 | |
Matt Fleming | 420b54d | 2015-08-06 13:46:24 +0100 | [diff] [blame] | 411 | if (!pdata) |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 412 | return -ENODEV; |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 413 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 414 | p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 415 | if (!p) |
| 416 | return -ENOMEM; |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 417 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 418 | spin_lock_init(&p->io_lock); |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 419 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 420 | p->tco_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_TCO); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 421 | if (!p->tco_res) |
| 422 | return -ENODEV; |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 423 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 424 | p->smi_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_SMI); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 425 | if (!p->smi_res) |
| 426 | return -ENODEV; |
| 427 | |
| 428 | p->iTCO_version = pdata->version; |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 429 | p->pci_dev = to_pci_dev(dev->parent); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 430 | |
| 431 | /* |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 432 | * Get the Memory-Mapped GCS or PMC register, we need it for the |
| 433 | * NO_REBOOT flag (TCO v2 and v3). |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 434 | */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 435 | if (p->iTCO_version >= 2) { |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 436 | p->gcs_pmc_res = platform_get_resource(pdev, |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 437 | IORESOURCE_MEM, |
| 438 | ICH_RES_MEM_GCS_PMC); |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 439 | p->gcs_pmc = devm_ioremap_resource(dev, p->gcs_pmc_res); |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 440 | if (IS_ERR(p->gcs_pmc)) |
| 441 | return PTR_ERR(p->gcs_pmc); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 442 | } |
| 443 | |
| 444 | /* Check chipset's NO_REBOOT bit */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 445 | if (iTCO_wdt_unset_NO_REBOOT_bit(p) && |
| 446 | iTCO_vendor_check_noreboot_on()) { |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 447 | pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n"); |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 448 | return -ENODEV; /* Cannot reset NO_REBOOT bit */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 449 | } |
| 450 | |
| 451 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 452 | iTCO_wdt_set_NO_REBOOT_bit(p); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 453 | |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 454 | /* The TCO logic uses the TCO_EN bit in the SMI_EN register */ |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 455 | if (!devm_request_region(dev, p->smi_res->start, |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 456 | resource_size(p->smi_res), |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 457 | pdev->name)) { |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 458 | pr_err("I/O address 0x%04llx already in use, device disabled\n", |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 459 | (u64)SMI_EN(p)); |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 460 | return -EBUSY; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 461 | } |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 462 | if (turn_SMI_watchdog_clear_off >= p->iTCO_version) { |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 463 | /* |
| 464 | * Bit 13: TCO_EN -> 0 |
| 465 | * Disables TCO logic generating an SMI# |
| 466 | */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 467 | val32 = inl(SMI_EN(p)); |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 468 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 469 | outl(val32, SMI_EN(p)); |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 470 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 471 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 472 | if (!devm_request_region(dev, p->tco_res->start, |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 473 | resource_size(p->tco_res), |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 474 | pdev->name)) { |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 475 | pr_err("I/O address 0x%04llx already in use, device disabled\n", |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 476 | (u64)TCOBASE(p)); |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 477 | return -EBUSY; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 478 | } |
| 479 | |
Aaron Sierra | 887c8ec | 2012-04-20 14:14:11 -0500 | [diff] [blame] | 480 | pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n", |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 481 | pdata->name, pdata->version, (u64)TCOBASE(p)); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 482 | |
| 483 | /* Clear out the (probably old) status */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 484 | switch (p->iTCO_version) { |
Yong, Jonathan | 3b3a1c8 | 2016-06-17 00:33:31 +0000 | [diff] [blame] | 485 | case 5: |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 486 | case 4: |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 487 | outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */ |
| 488 | outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */ |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 489 | break; |
| 490 | case 3: |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 491 | outl(0x20008, TCO1_STS(p)); |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 492 | break; |
| 493 | case 2: |
| 494 | case 1: |
| 495 | default: |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 496 | outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */ |
| 497 | outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */ |
| 498 | outw(0x0004, TCO2_STS(p)); /* Clear BOOT_STS bit */ |
Matt Fleming | 2a7a0e9 | 2015-08-06 13:46:26 +0100 | [diff] [blame] | 499 | break; |
Peter Tyser | 24b3a16 | 2014-03-10 16:34:55 -0500 | [diff] [blame] | 500 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 501 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 502 | p->wddev.info = &ident, |
| 503 | p->wddev.ops = &iTCO_wdt_ops, |
| 504 | p->wddev.bootstatus = 0; |
| 505 | p->wddev.timeout = WATCHDOG_TIMEOUT; |
| 506 | watchdog_set_nowayout(&p->wddev, nowayout); |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 507 | p->wddev.parent = dev; |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 508 | |
| 509 | watchdog_set_drvdata(&p->wddev, p); |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 510 | platform_set_drvdata(pdev, p); |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 511 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 512 | /* Make sure the watchdog is not running */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 513 | iTCO_wdt_stop(&p->wddev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 514 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 515 | /* Check that the heartbeat value is within it's range; |
| 516 | if not reset to the default */ |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 517 | if (iTCO_wdt_set_timeout(&p->wddev, heartbeat)) { |
| 518 | iTCO_wdt_set_timeout(&p->wddev, WATCHDOG_TIMEOUT); |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 519 | pr_info("timeout value out of range, using %d\n", |
| 520 | WATCHDOG_TIMEOUT); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 521 | } |
| 522 | |
Guenter Roeck | d3d77b5 | 2017-01-10 15:21:49 -0800 | [diff] [blame] | 523 | watchdog_stop_on_reboot(&p->wddev); |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 524 | ret = devm_watchdog_register_device(dev, &p->wddev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 525 | if (ret != 0) { |
Wim Van Sebroeck | bff2343 | 2012-06-09 14:10:28 +0200 | [diff] [blame] | 526 | pr_err("cannot register watchdog device (err=%d)\n", ret); |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 527 | return ret; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 528 | } |
| 529 | |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 530 | pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n", |
| 531 | heartbeat, nowayout); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 532 | |
| 533 | return 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 534 | } |
| 535 | |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 536 | static int iTCO_wdt_remove(struct platform_device *pdev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 537 | { |
Guenter Roeck | 78e4569 | 2017-01-02 09:27:36 -0800 | [diff] [blame] | 538 | struct iTCO_wdt_private *p = platform_get_drvdata(pdev); |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 539 | |
Guenter Roeck | c7bbcc8 | 2017-01-01 10:39:09 -0800 | [diff] [blame] | 540 | /* Stop the timer before we leave */ |
| 541 | if (!nowayout) |
| 542 | iTCO_wdt_stop(&p->wddev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 543 | |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 544 | return 0; |
| 545 | } |
| 546 | |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 547 | #ifdef CONFIG_PM_SLEEP |
| 548 | /* |
| 549 | * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so |
| 550 | * the watchdog cannot be pinged while in that state. In ACPI sleep states the |
| 551 | * watchdog is stopped by the platform firmware. |
| 552 | */ |
| 553 | |
| 554 | #ifdef CONFIG_ACPI |
| 555 | static inline bool need_suspend(void) |
| 556 | { |
| 557 | return acpi_target_system_state() == ACPI_STATE_S0; |
| 558 | } |
| 559 | #else |
| 560 | static inline bool need_suspend(void) { return true; } |
| 561 | #endif |
| 562 | |
| 563 | static int iTCO_wdt_suspend_noirq(struct device *dev) |
| 564 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 565 | struct iTCO_wdt_private *p = dev_get_drvdata(dev); |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 566 | int ret = 0; |
| 567 | |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 568 | p->suspended = false; |
| 569 | if (watchdog_active(&p->wddev) && need_suspend()) { |
| 570 | ret = iTCO_wdt_stop(&p->wddev); |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 571 | if (!ret) |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 572 | p->suspended = true; |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 573 | } |
| 574 | return ret; |
| 575 | } |
| 576 | |
| 577 | static int iTCO_wdt_resume_noirq(struct device *dev) |
| 578 | { |
Guenter Roeck | ce1b95c | 2017-01-01 11:11:39 -0800 | [diff] [blame] | 579 | struct iTCO_wdt_private *p = dev_get_drvdata(dev); |
| 580 | |
| 581 | if (p->suspended) |
| 582 | iTCO_wdt_start(&p->wddev); |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 583 | |
| 584 | return 0; |
| 585 | } |
| 586 | |
Julia Lawall | 6e938f6 | 2016-08-28 22:26:26 +0200 | [diff] [blame] | 587 | static const struct dev_pm_ops iTCO_wdt_pm = { |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 588 | .suspend_noirq = iTCO_wdt_suspend_noirq, |
| 589 | .resume_noirq = iTCO_wdt_resume_noirq, |
| 590 | }; |
| 591 | |
| 592 | #define ITCO_WDT_PM_OPS (&iTCO_wdt_pm) |
| 593 | #else |
| 594 | #define ITCO_WDT_PM_OPS NULL |
| 595 | #endif /* CONFIG_PM_SLEEP */ |
| 596 | |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 597 | static struct platform_driver iTCO_wdt_driver = { |
| 598 | .probe = iTCO_wdt_probe, |
Bill Pemberton | 8226871 | 2012-11-19 13:21:12 -0500 | [diff] [blame] | 599 | .remove = iTCO_wdt_remove, |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 600 | .driver = { |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 601 | .name = DRV_NAME, |
Rafael J. Wysocki | f321c9cb | 2015-04-03 15:25:04 +0200 | [diff] [blame] | 602 | .pm = ITCO_WDT_PM_OPS, |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 603 | }, |
| 604 | }; |
| 605 | |
| 606 | static int __init iTCO_wdt_init_module(void) |
| 607 | { |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 608 | pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 609 | |
Guenter Roeck | 9616bd2 | 2017-01-03 02:43:32 -0800 | [diff] [blame] | 610 | return platform_driver_register(&iTCO_wdt_driver); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 611 | } |
| 612 | |
| 613 | static void __exit iTCO_wdt_cleanup_module(void) |
| 614 | { |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 615 | platform_driver_unregister(&iTCO_wdt_driver); |
Joe Perches | 27c766a | 2012-02-15 15:06:19 -0800 | [diff] [blame] | 616 | pr_info("Watchdog Module Unloaded\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 617 | } |
| 618 | |
| 619 | module_init(iTCO_wdt_init_module); |
| 620 | module_exit(iTCO_wdt_cleanup_module); |
| 621 | |
| 622 | MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>"); |
| 623 | MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver"); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 624 | MODULE_VERSION(DRV_VERSION); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 625 | MODULE_LICENSE("GPL"); |
Jan Beulich | e5de32e | 2012-06-22 16:41:00 +0100 | [diff] [blame] | 626 | MODULE_ALIAS("platform:" DRV_NAME); |