blob: b144d7ca7d2076d7f5a41b9bfa179f0f64d21d83 [file] [log] [blame]
Vineet Guptaf1f33472013-01-18 15:12:19 +05301/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _ASM_ARC_MMU_H
10#define _ASM_ARC_MMU_H
11
Vineet Gupta82357032013-06-01 12:55:42 +053012#if defined(CONFIG_ARC_MMU_V1)
13#define CONFIG_ARC_MMU_VER 1
14#elif defined(CONFIG_ARC_MMU_V2)
15#define CONFIG_ARC_MMU_VER 2
16#elif defined(CONFIG_ARC_MMU_V3)
17#define CONFIG_ARC_MMU_VER 3
Vineet Guptad7a512b2015-04-06 17:22:39 +053018#elif defined(CONFIG_ARC_MMU_V4)
19#define CONFIG_ARC_MMU_VER 4
Vineet Gupta82357032013-06-01 12:55:42 +053020#endif
21
Vineet Guptada1677b2013-05-14 13:28:17 +053022/* MMU Management regs */
23#define ARC_REG_MMU_BCR 0x06f
Vineet Guptad7a512b2015-04-06 17:22:39 +053024#if (CONFIG_ARC_MMU_VER < 4)
Vineet Guptada1677b2013-05-14 13:28:17 +053025#define ARC_REG_TLBPD0 0x405
26#define ARC_REG_TLBPD1 0x406
Vineet Gupta5a364c22015-02-06 18:44:57 +030027#define ARC_REG_TLBPD1HI 0 /* Dummy: allows code sharing with ARC700 */
Vineet Guptada1677b2013-05-14 13:28:17 +053028#define ARC_REG_TLBINDEX 0x407
29#define ARC_REG_TLBCOMMAND 0x408
30#define ARC_REG_PID 0x409
31#define ARC_REG_SCRATCH_DATA0 0x418
Vineet Guptad7a512b2015-04-06 17:22:39 +053032#else
33#define ARC_REG_TLBPD0 0x460
34#define ARC_REG_TLBPD1 0x461
Vineet Gupta5a364c22015-02-06 18:44:57 +030035#define ARC_REG_TLBPD1HI 0x463
Vineet Guptad7a512b2015-04-06 17:22:39 +053036#define ARC_REG_TLBINDEX 0x464
37#define ARC_REG_TLBCOMMAND 0x465
38#define ARC_REG_PID 0x468
39#define ARC_REG_SCRATCH_DATA0 0x46c
40#endif
Vineet Guptada1677b2013-05-14 13:28:17 +053041
42/* Bits in MMU PID register */
Vineet Guptad7a512b2015-04-06 17:22:39 +053043#define __TLB_ENABLE (1 << 31)
44#define __PROG_ENABLE (1 << 30)
45#define MMU_ENABLE (__TLB_ENABLE | __PROG_ENABLE)
Vineet Guptada1677b2013-05-14 13:28:17 +053046
47/* Error code if probe fails */
48#define TLB_LKUP_ERR 0x80000000
49
Vineet Guptad7a512b2015-04-06 17:22:39 +053050#if (CONFIG_ARC_MMU_VER < 4)
Vineet Gupta483e9bcb2013-07-01 18:12:28 +053051#define TLB_DUP_ERR (TLB_LKUP_ERR | 0x00000001)
Vineet Guptad7a512b2015-04-06 17:22:39 +053052#else
53#define TLB_DUP_ERR (TLB_LKUP_ERR | 0x40000000)
54#endif
Vineet Gupta483e9bcb2013-07-01 18:12:28 +053055
Vineet Guptada1677b2013-05-14 13:28:17 +053056/* TLB Commands */
57#define TLBWrite 0x1
58#define TLBRead 0x2
59#define TLBGetIndex 0x3
60#define TLBProbe 0x4
61
62#if (CONFIG_ARC_MMU_VER >= 2)
63#define TLBWriteNI 0x5 /* write JTLB without inv uTLBs */
64#define TLBIVUTLB 0x6 /* explicitly inv uTLBs */
65#endif
66
Vineet Guptad7a512b2015-04-06 17:22:39 +053067#if (CONFIG_ARC_MMU_VER >= 4)
68#define TLBInsertEntry 0x7
69#define TLBDeleteEntry 0x8
70#endif
71
Vineet Guptaf1f33472013-01-18 15:12:19 +053072#ifndef __ASSEMBLY__
73
74typedef struct {
Vineet Gupta63eca942013-08-23 19:16:34 +053075 unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */
Vineet Guptaf1f33472013-01-18 15:12:19 +053076} mm_context_t;
77
Vineet Guptada1677b2013-05-14 13:28:17 +053078#ifdef CONFIG_ARC_DBG_TLB_PARANOIA
Vineet Gupta5bd87ad2013-08-23 17:37:18 +053079void tlb_paranoid_check(unsigned int mm_asid, unsigned long address);
Vineet Guptada1677b2013-05-14 13:28:17 +053080#else
81#define tlb_paranoid_check(a, b)
Vineet Guptaf1f33472013-01-18 15:12:19 +053082#endif
83
Vineet Guptada1677b2013-05-14 13:28:17 +053084void arc_mmu_init(void);
85extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
Vineet Gupta07b9b652013-09-05 19:19:06 +053086void read_decode_mmu_bcr(void);
Vineet Guptada1677b2013-05-14 13:28:17 +053087
Vineet Gupta5a364c22015-02-06 18:44:57 +030088static inline int is_pae40_enabled(void)
89{
90 return IS_ENABLED(CONFIG_ARC_HAS_PAE40);
91}
92
Vineet Guptada1677b2013-05-14 13:28:17 +053093#endif /* !__ASSEMBLY__ */
94
Vineet Guptaf1f33472013-01-18 15:12:19 +053095#endif