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gerrit-public.fairphone.software / kernel / msm-4.19 / 436c3878418ff484ce852c82847b238ef3f73341 / . / arch / arm / plat-samsung / include / plat / clock.h
blob: 9a82b8874918d5c3fb16247d92a3cdd84623a4ad [file] [log] [blame]
Ben Dooksa5030592008-10-21 14:06:43 +0100[diff] [blame]1/* linux/arch/arm/plat-s3c/include/plat/clock.h
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Written by Ben Dooks, <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Ben Dooksc3391e32008-10-21 14:06:37 +0100[diff] [blame]12#include <linux/spinlock.h>
13
Ben Dooksb3bf41b2009-12-01 01:24:37 +0000[diff] [blame]14struct clk;
15
16/**
17 * struct clk_ops - standard clock operations
18 * @set_rate: set the clock rate, see clk_set_rate().
19 * @get_rate: get the clock rate, see clk_get_rate().
20 * @round_rate: round a given clock rate, see clk_round_rate().
21 * @set_parent: set the clock's parent, see clk_set_parent().
22 *
23 * Group the common clock implementations together so that we
24 * don't have to keep setting the same fiels again. We leave
25 * enable in struct clk.
26 *
27 * Adding an extra layer of indirection into the process should
28 * not be a problem as it is unlikely these operations are going
29 * to need to be called quickly.
30 */
31struct clk_ops {
32 int (*set_rate)(struct clk *c, unsigned long rate);
33 unsigned long (*get_rate)(struct clk *c);
34 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
35 int (*set_parent)(struct clk *c, struct clk *parent);
36};
37
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]38struct clk {
39 struct list_head list;
40 struct module *owner;
41 struct clk *parent;
42 const char *name;
43 int id;
Ben Dooks2a513ce2006-02-08 21:09:05 +0000[diff] [blame]44 int usage;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]45 unsigned long rate;
46 unsigned long ctrlbit;
Ben Dooksd3468da2006-03-20 17:10:04 +0000[diff] [blame]47
Ben Dooksb3bf41b2009-12-01 01:24:37 +0000[diff] [blame]48 struct clk_ops *ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]49 int (*enable)(struct clk *, int enable);
Amit Daniel Kachhap436c3872011-01-12 13:40:04 +0900[diff] [blame^]50#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
51 struct dentry *dent; /* For visible tree hierarchy */
52#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]53};
54
55/* other clocks which may be registered by board support */
56
57extern struct clk s3c24xx_dclk0;
58extern struct clk s3c24xx_dclk1;
59extern struct clk s3c24xx_clkout0;
60extern struct clk s3c24xx_clkout1;
61extern struct clk s3c24xx_uclk;
62
Ben Dooks36c64af2006-03-20 21:00:48 +0000[diff] [blame]63extern struct clk clk_usb_bus;
64
Ben Dooks99c13852006-06-22 22:18:20 +0100[diff] [blame]65/* core clock support */
66
67extern struct clk clk_f;
68extern struct clk clk_h;
69extern struct clk clk_p;
Ben Dooks513846f2006-06-24 21:21:29 +0100[diff] [blame]70extern struct clk clk_mpll;
Ben Dooks99c13852006-06-22 22:18:20 +0100[diff] [blame]71extern struct clk clk_upll;
Ben Dooks4b31d8b2008-10-21 14:07:00 +0100[diff] [blame]72extern struct clk clk_epll;
Ben Dooks513846f2006-06-24 21:21:29 +0100[diff] [blame]73extern struct clk clk_xtal;
Ben Dooks4b31d8b2008-10-21 14:07:00 +0100[diff] [blame]74extern struct clk clk_ext;
75
76/* S3C64XX specific clocks */
Werner Almesbergera03f7da2009-03-05 11:43:13 +0800[diff] [blame]77extern struct clk clk_h2;
Ben Dooks4b31d8b2008-10-21 14:07:00 +0100[diff] [blame]78extern struct clk clk_27m;
79extern struct clk clk_48m;
Maurus Cuelenaere05e021f2010-05-17 20:17:42 +0200[diff] [blame]80extern struct clk clk_xusbxti;
Ben Dooks99c13852006-06-22 22:18:20 +0100[diff] [blame]81
Kukjin Kimed276842010-01-14 12:50:23 +0900[diff] [blame]82extern int clk_default_setrate(struct clk *clk, unsigned long rate);
83extern struct clk_ops clk_ops_def_setrate;
84
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]85/* exports for arch/arm/mach-s3c2410
86 *
87 * Please DO NOT use these outside of arch/arm/mach-s3c2410
88*/
89
Ben Dooksc3391e32008-10-21 14:06:37 +0100[diff] [blame]90extern spinlock_t clocks_lock;
Ben Dooks36c64af2006-03-20 21:00:48 +0000[diff] [blame]91
Ben Dooks99c13852006-06-22 22:18:20 +0100[diff] [blame]92extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
93
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]94extern int s3c24xx_register_clock(struct clk *clk);
Ben Dooksce89c202007-04-20 11:15:27 +0100[diff] [blame]95extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]96
Ben Dooks1d9f13c2010-01-06 01:21:38 +0900[diff] [blame]97extern void s3c_register_clocks(struct clk *clk, int nr_clks);
Ben Dooks4e046912010-04-28 12:58:13 +0900[diff] [blame]98extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
Ben Dooks1d9f13c2010-01-06 01:21:38 +0900[diff] [blame]99
Ben Dookse4253822008-10-21 14:06:38 +0100[diff] [blame]100extern int s3c24xx_register_baseclocks(unsigned long xtal);
101
Kukjin Kim1a0e8a52010-01-14 08:13:37 +0900[diff] [blame]102extern void s5p_register_clocks(unsigned long xtal_freq);
Ben Dooks4b31d8b2008-10-21 14:07:00 +0100[diff] [blame]103
Ben Dookse4253822008-10-21 14:06:38 +0100[diff] [blame]104extern void s3c24xx_setup_clocks(unsigned long fclk,
105 unsigned long hclk,
106 unsigned long pclk);
107
108extern void s3c2410_setup_clocks(void);
109extern void s3c2412_setup_clocks(void);
110extern void s3c244x_setup_clocks(void);
111extern void s3c2443_setup_clocks(void);
112
Ben Dookscf18acf2008-10-21 14:07:02 +0100[diff] [blame]113/* S3C64XX specific functions and clocks */
114
115extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
Ben Dooks9d325f22008-11-21 10:36:05 +0000[diff] [blame]116
117/* Init for pwm clock code */
118
119extern void s3c_pwmclk_init(void);
120