blob: bb89175ca6e5dd5e9669076ee3f5ddbde05c638e [file] [log] [blame]
Sarah Sharp74c68742009-04-27 19:52:22 -07001/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include "xhci.h"
24
25#define XHCI_INIT_VALUE 0x0
26
27/* Add verbose debugging later, just print everything for now */
28
29void xhci_dbg_regs(struct xhci_hcd *xhci)
30{
31 u32 temp;
32
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070033 xhci_dbg(xhci, "// xHCI capability registers at %p:\n",
34 xhci->cap_regs);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020035 temp = readl(&xhci->cap_regs->hc_capbase);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070036 xhci_dbg(xhci, "// @%p = 0x%x (CAPLENGTH AND HCIVERSION)\n",
37 &xhci->cap_regs->hc_capbase, temp);
Sarah Sharp74c68742009-04-27 19:52:22 -070038 xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n",
39 (unsigned int) HC_LENGTH(temp));
40#if 0
41 xhci_dbg(xhci, "// HCIVERSION: 0x%x\n",
42 (unsigned int) HC_VERSION(temp));
43#endif
44
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070045 xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);
Sarah Sharp74c68742009-04-27 19:52:22 -070046
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020047 temp = readl(&xhci->cap_regs->run_regs_off);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070048 xhci_dbg(xhci, "// @%p = 0x%x RTSOFF\n",
49 &xhci->cap_regs->run_regs_off,
Sarah Sharp74c68742009-04-27 19:52:22 -070050 (unsigned int) temp & RTSOFF_MASK);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070051 xhci_dbg(xhci, "// xHCI runtime registers at %p:\n", xhci->run_regs);
Sarah Sharp74c68742009-04-27 19:52:22 -070052
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020053 temp = readl(&xhci->cap_regs->db_off);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070054 xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp);
55 xhci_dbg(xhci, "// Doorbell array at %p:\n", xhci->dba);
Sarah Sharp74c68742009-04-27 19:52:22 -070056}
57
Sarah Sharp23e3be12009-04-29 19:05:20 -070058static void xhci_print_cap_regs(struct xhci_hcd *xhci)
Sarah Sharp74c68742009-04-27 19:52:22 -070059{
60 u32 temp;
61
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -070062 xhci_dbg(xhci, "xHCI capability registers at %p:\n", xhci->cap_regs);
Sarah Sharp74c68742009-04-27 19:52:22 -070063
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020064 temp = readl(&xhci->cap_regs->hc_capbase);
Sarah Sharp74c68742009-04-27 19:52:22 -070065 xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n",
66 (unsigned int) temp);
67 xhci_dbg(xhci, "CAPLENGTH: 0x%x\n",
68 (unsigned int) HC_LENGTH(temp));
69 xhci_dbg(xhci, "HCIVERSION: 0x%x\n",
70 (unsigned int) HC_VERSION(temp));
71
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020072 temp = readl(&xhci->cap_regs->hcs_params1);
Sarah Sharp74c68742009-04-27 19:52:22 -070073 xhci_dbg(xhci, "HCSPARAMS 1: 0x%x\n",
74 (unsigned int) temp);
75 xhci_dbg(xhci, " Max device slots: %u\n",
76 (unsigned int) HCS_MAX_SLOTS(temp));
77 xhci_dbg(xhci, " Max interrupters: %u\n",
78 (unsigned int) HCS_MAX_INTRS(temp));
79 xhci_dbg(xhci, " Max ports: %u\n",
80 (unsigned int) HCS_MAX_PORTS(temp));
81
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020082 temp = readl(&xhci->cap_regs->hcs_params2);
Sarah Sharp74c68742009-04-27 19:52:22 -070083 xhci_dbg(xhci, "HCSPARAMS 2: 0x%x\n",
84 (unsigned int) temp);
85 xhci_dbg(xhci, " Isoc scheduling threshold: %u\n",
86 (unsigned int) HCS_IST(temp));
87 xhci_dbg(xhci, " Maximum allowed segments in event ring: %u\n",
88 (unsigned int) HCS_ERST_MAX(temp));
89
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020090 temp = readl(&xhci->cap_regs->hcs_params3);
Sarah Sharp74c68742009-04-27 19:52:22 -070091 xhci_dbg(xhci, "HCSPARAMS 3 0x%x:\n",
92 (unsigned int) temp);
93 xhci_dbg(xhci, " Worst case U1 device exit latency: %u\n",
94 (unsigned int) HCS_U1_LATENCY(temp));
95 xhci_dbg(xhci, " Worst case U2 device exit latency: %u\n",
96 (unsigned int) HCS_U2_LATENCY(temp));
97
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020098 temp = readl(&xhci->cap_regs->hcc_params);
Sarah Sharp74c68742009-04-27 19:52:22 -070099 xhci_dbg(xhci, "HCC PARAMS 0x%x:\n", (unsigned int) temp);
100 xhci_dbg(xhci, " HC generates %s bit addresses\n",
101 HCC_64BIT_ADDR(temp) ? "64" : "32");
102 /* FIXME */
103 xhci_dbg(xhci, " FIXME: more HCCPARAMS debugging\n");
104
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200105 temp = readl(&xhci->cap_regs->run_regs_off);
Sarah Sharp74c68742009-04-27 19:52:22 -0700106 xhci_dbg(xhci, "RTSOFF 0x%x:\n", temp & RTSOFF_MASK);
107}
108
Sarah Sharp23e3be12009-04-29 19:05:20 -0700109static void xhci_print_command_reg(struct xhci_hcd *xhci)
Sarah Sharp74c68742009-04-27 19:52:22 -0700110{
111 u32 temp;
112
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200113 temp = readl(&xhci->op_regs->command);
Sarah Sharp74c68742009-04-27 19:52:22 -0700114 xhci_dbg(xhci, "USBCMD 0x%x:\n", temp);
115 xhci_dbg(xhci, " HC is %s\n",
116 (temp & CMD_RUN) ? "running" : "being stopped");
117 xhci_dbg(xhci, " HC has %sfinished hard reset\n",
118 (temp & CMD_RESET) ? "not " : "");
119 xhci_dbg(xhci, " Event Interrupts %s\n",
120 (temp & CMD_EIE) ? "enabled " : "disabled");
121 xhci_dbg(xhci, " Host System Error Interrupts %s\n",
Alex Hebb334e92012-03-22 15:06:59 +0800122 (temp & CMD_HSEIE) ? "enabled " : "disabled");
Sarah Sharp74c68742009-04-27 19:52:22 -0700123 xhci_dbg(xhci, " HC has %sfinished light reset\n",
124 (temp & CMD_LRESET) ? "not " : "");
125}
126
Sarah Sharp23e3be12009-04-29 19:05:20 -0700127static void xhci_print_status(struct xhci_hcd *xhci)
Sarah Sharp74c68742009-04-27 19:52:22 -0700128{
129 u32 temp;
130
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200131 temp = readl(&xhci->op_regs->status);
Sarah Sharp74c68742009-04-27 19:52:22 -0700132 xhci_dbg(xhci, "USBSTS 0x%x:\n", temp);
133 xhci_dbg(xhci, " Event ring is %sempty\n",
134 (temp & STS_EINT) ? "not " : "");
135 xhci_dbg(xhci, " %sHost System Error\n",
136 (temp & STS_FATAL) ? "WARNING: " : "No ");
137 xhci_dbg(xhci, " HC is %s\n",
138 (temp & STS_HALT) ? "halted" : "running");
139}
140
Sarah Sharp23e3be12009-04-29 19:05:20 -0700141static void xhci_print_op_regs(struct xhci_hcd *xhci)
Sarah Sharp74c68742009-04-27 19:52:22 -0700142{
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700143 xhci_dbg(xhci, "xHCI operational registers at %p:\n", xhci->op_regs);
Sarah Sharp74c68742009-04-27 19:52:22 -0700144 xhci_print_command_reg(xhci);
145 xhci_print_status(xhci);
146}
147
Sarah Sharp23e3be12009-04-29 19:05:20 -0700148static void xhci_print_ports(struct xhci_hcd *xhci)
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700149{
Matt Evans28ccd292011-03-29 13:40:46 +1100150 __le32 __iomem *addr;
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700151 int i, j;
152 int ports;
153 char *names[NUM_PORT_REGS] = {
154 "status",
155 "power",
156 "link",
157 "reserved",
158 };
159
160 ports = HCS_MAX_PORTS(xhci->hcs_params1);
161 addr = &xhci->op_regs->port_status_base;
162 for (i = 0; i < ports; i++) {
163 for (j = 0; j < NUM_PORT_REGS; ++j) {
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700164 xhci_dbg(xhci, "%p port %s reg = 0x%x\n",
165 addr, names[j],
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200166 (unsigned int) readl(addr));
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700167 addr++;
168 }
169 }
170}
171
Dmitry Torokhov09ece302011-02-08 16:29:33 -0800172void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num)
Sarah Sharp74c68742009-04-27 19:52:22 -0700173{
Dmitry Torokhov09ece302011-02-08 16:29:33 -0800174 struct xhci_intr_reg __iomem *ir_set = &xhci->run_regs->ir_set[set_num];
175 void __iomem *addr;
Sarah Sharp74c68742009-04-27 19:52:22 -0700176 u32 temp;
Sarah Sharp8e595a52009-07-27 12:03:31 -0700177 u64 temp_64;
Sarah Sharp74c68742009-04-27 19:52:22 -0700178
179 addr = &ir_set->irq_pending;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200180 temp = readl(addr);
Sarah Sharp74c68742009-04-27 19:52:22 -0700181 if (temp == XHCI_INIT_VALUE)
182 return;
183
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700184 xhci_dbg(xhci, " %p: ir_set[%i]\n", ir_set, set_num);
Sarah Sharp74c68742009-04-27 19:52:22 -0700185
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700186 xhci_dbg(xhci, " %p: ir_set.pending = 0x%x\n", addr,
187 (unsigned int)temp);
Sarah Sharp74c68742009-04-27 19:52:22 -0700188
189 addr = &ir_set->irq_control;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200190 temp = readl(addr);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700191 xhci_dbg(xhci, " %p: ir_set.control = 0x%x\n", addr,
192 (unsigned int)temp);
Sarah Sharp74c68742009-04-27 19:52:22 -0700193
194 addr = &ir_set->erst_size;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200195 temp = readl(addr);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700196 xhci_dbg(xhci, " %p: ir_set.erst_size = 0x%x\n", addr,
197 (unsigned int)temp);
Sarah Sharp74c68742009-04-27 19:52:22 -0700198
199 addr = &ir_set->rsvd;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200200 temp = readl(addr);
Sarah Sharp74c68742009-04-27 19:52:22 -0700201 if (temp != XHCI_INIT_VALUE)
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700202 xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n",
203 addr, (unsigned int)temp);
Sarah Sharp74c68742009-04-27 19:52:22 -0700204
Sarah Sharp8e595a52009-07-27 12:03:31 -0700205 addr = &ir_set->erst_base;
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800206 temp_64 = xhci_read_64(xhci, addr);
Sarah Sharp8e595a52009-07-27 12:03:31 -0700207 xhci_dbg(xhci, " %p: ir_set.erst_base = @%08llx\n",
208 addr, temp_64);
Sarah Sharp74c68742009-04-27 19:52:22 -0700209
Sarah Sharp8e595a52009-07-27 12:03:31 -0700210 addr = &ir_set->erst_dequeue;
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800211 temp_64 = xhci_read_64(xhci, addr);
Sarah Sharp8e595a52009-07-27 12:03:31 -0700212 xhci_dbg(xhci, " %p: ir_set.erst_dequeue = @%08llx\n",
213 addr, temp_64);
Sarah Sharp74c68742009-04-27 19:52:22 -0700214}
215
216void xhci_print_run_regs(struct xhci_hcd *xhci)
217{
218 u32 temp;
219 int i;
220
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700221 xhci_dbg(xhci, "xHCI runtime registers at %p:\n", xhci->run_regs);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200222 temp = readl(&xhci->run_regs->microframe_index);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700223 xhci_dbg(xhci, " %p: Microframe index = 0x%x\n",
224 &xhci->run_regs->microframe_index,
Sarah Sharp74c68742009-04-27 19:52:22 -0700225 (unsigned int) temp);
226 for (i = 0; i < 7; ++i) {
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200227 temp = readl(&xhci->run_regs->rsvd[i]);
Sarah Sharp74c68742009-04-27 19:52:22 -0700228 if (temp != XHCI_INIT_VALUE)
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700229 xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n",
230 &xhci->run_regs->rsvd[i],
Sarah Sharp74c68742009-04-27 19:52:22 -0700231 i, (unsigned int) temp);
232 }
233}
234
235void xhci_print_registers(struct xhci_hcd *xhci)
236{
237 xhci_print_cap_regs(xhci);
238 xhci_print_op_regs(xhci);
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700239 xhci_print_ports(xhci);
Sarah Sharp74c68742009-04-27 19:52:22 -0700240}
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700241
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700242void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb)
243{
244 int i;
245 for (i = 0; i < 4; ++i)
246 xhci_dbg(xhci, "Offset 0x%x = 0x%x\n",
247 i*4, trb->generic.field[i]);
248}
249
250/**
251 * Debug a transfer request block (TRB).
252 */
253void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
254{
255 u64 address;
Matt Evans28ccd292011-03-29 13:40:46 +1100256 u32 type = le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK;
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700257
258 switch (type) {
259 case TRB_TYPE(TRB_LINK):
260 xhci_dbg(xhci, "Link TRB:\n");
261 xhci_print_trb_offsets(xhci, trb);
262
Matt Evans28ccd292011-03-29 13:40:46 +1100263 address = le64_to_cpu(trb->link.segment_ptr);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700264 xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
265
266 xhci_dbg(xhci, "Interrupter target = 0x%x\n",
Matt Evans28ccd292011-03-29 13:40:46 +1100267 GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target)));
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700268 xhci_dbg(xhci, "Cycle bit = %u\n",
Matt Evansf5960b62011-06-01 10:22:55 +1000269 le32_to_cpu(trb->link.control) & TRB_CYCLE);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700270 xhci_dbg(xhci, "Toggle cycle bit = %u\n",
Matt Evansf5960b62011-06-01 10:22:55 +1000271 le32_to_cpu(trb->link.control) & LINK_TOGGLE);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700272 xhci_dbg(xhci, "No Snoop bit = %u\n",
Matt Evansf5960b62011-06-01 10:22:55 +1000273 le32_to_cpu(trb->link.control) & TRB_NO_SNOOP);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700274 break;
275 case TRB_TYPE(TRB_TRANSFER):
Matt Evans28ccd292011-03-29 13:40:46 +1100276 address = le64_to_cpu(trb->trans_event.buffer);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700277 /*
278 * FIXME: look at flags to figure out if it's an address or if
279 * the data is directly in the buffer field.
280 */
281 xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
282 break;
283 case TRB_TYPE(TRB_COMPLETION):
Matt Evans28ccd292011-03-29 13:40:46 +1100284 address = le64_to_cpu(trb->event_cmd.cmd_trb);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700285 xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
286 xhci_dbg(xhci, "Completion status = %u\n",
Matt Evansf5960b62011-06-01 10:22:55 +1000287 GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status)));
Matt Evans28ccd292011-03-29 13:40:46 +1100288 xhci_dbg(xhci, "Flags = 0x%x\n",
Matt Evansf5960b62011-06-01 10:22:55 +1000289 le32_to_cpu(trb->event_cmd.flags));
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700290 break;
291 default:
292 xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n",
293 (unsigned int) type>>10);
294 xhci_print_trb_offsets(xhci, trb);
295 break;
296 }
297}
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700298
299/**
300 * Debug a segment with an xHCI ring.
301 *
302 * @return The Link TRB of the segment, or NULL if there is no Link TRB
303 * (which is a bug, since all segments must have a Link TRB).
304 *
305 * Prints out all TRBs in the segment, even those after the Link TRB.
306 *
307 * XXX: should we print out TRBs that the HC owns? As long as we don't
308 * write, that should be fine... We shouldn't expect that the memory pointed to
309 * by the TRB is valid at all. Do we care about ones the HC owns? Probably,
310 * for HC debugging.
311 */
312void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
313{
314 int i;
Matt Evans28ccd292011-03-29 13:40:46 +1100315 u64 addr = seg->dma;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700316 union xhci_trb *trb = seg->trbs;
317
318 for (i = 0; i < TRBS_PER_SEGMENT; ++i) {
319 trb = &seg->trbs[i];
Matt Evans28ccd292011-03-29 13:40:46 +1100320 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr,
Matt Evansf5960b62011-06-01 10:22:55 +1000321 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
322 upper_32_bits(le64_to_cpu(trb->link.segment_ptr)),
323 le32_to_cpu(trb->link.intr_target),
324 le32_to_cpu(trb->link.control));
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700325 addr += sizeof(*trb);
326 }
327}
328
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700329void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring)
330{
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700331 xhci_dbg(xhci, "Ring deq = %p (virt), 0x%llx (dma)\n",
332 ring->dequeue,
Sarah Sharp23e3be12009-04-29 19:05:20 -0700333 (unsigned long long)xhci_trb_virt_to_dma(ring->deq_seg,
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700334 ring->dequeue));
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700335 xhci_dbg(xhci, "Ring deq updated %u times\n",
336 ring->deq_updates);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700337 xhci_dbg(xhci, "Ring enq = %p (virt), 0x%llx (dma)\n",
338 ring->enqueue,
Sarah Sharp23e3be12009-04-29 19:05:20 -0700339 (unsigned long long)xhci_trb_virt_to_dma(ring->enq_seg,
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700340 ring->enqueue));
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700341 xhci_dbg(xhci, "Ring enq updated %u times\n",
342 ring->enq_updates);
343}
344
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700345/**
346 * Debugging for an xHCI ring, which is a queue broken into multiple segments.
347 *
348 * Print out each segment in the ring. Check that the DMA address in
349 * each link segment actually matches the segment's stored DMA address.
350 * Check that the link end bit is only set at the end of the ring.
351 * Check that the dequeue and enqueue pointers point to real data in this ring
352 * (not some other ring).
353 */
354void xhci_debug_ring(struct xhci_hcd *xhci, struct xhci_ring *ring)
355{
356 /* FIXME: Throw an error if any segment doesn't have a Link TRB */
357 struct xhci_segment *seg;
358 struct xhci_segment *first_seg = ring->first_seg;
359 xhci_debug_segment(xhci, first_seg);
360
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700361 if (!ring->enq_updates && !ring->deq_updates) {
362 xhci_dbg(xhci, " Ring has not been updated\n");
363 return;
364 }
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700365 for (seg = first_seg->next; seg != first_seg; seg = seg->next)
366 xhci_debug_segment(xhci, seg);
367}
368
Sarah Sharpe9df17e2010-04-02 15:34:43 -0700369void xhci_dbg_ep_rings(struct xhci_hcd *xhci,
370 unsigned int slot_id, unsigned int ep_index,
371 struct xhci_virt_ep *ep)
372{
373 int i;
374 struct xhci_ring *ring;
375
376 if (ep->ep_state & EP_HAS_STREAMS) {
377 for (i = 1; i < ep->stream_info->num_streams; i++) {
378 ring = ep->stream_info->stream_rings[i];
379 xhci_dbg(xhci, "Dev %d endpoint %d stream ID %d:\n",
380 slot_id, ep_index, i);
381 xhci_debug_segment(xhci, ring->deq_seg);
382 }
383 } else {
384 ring = ep->ring;
385 if (!ring)
386 return;
387 xhci_dbg(xhci, "Dev %d endpoint ring %d:\n",
388 slot_id, ep_index);
389 xhci_debug_segment(xhci, ring->deq_seg);
390 }
391}
392
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700393void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
394{
Matt Evans28ccd292011-03-29 13:40:46 +1100395 u64 addr = erst->erst_dma_addr;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700396 int i;
397 struct xhci_erst_entry *entry;
398
399 for (i = 0; i < erst->num_entries; ++i) {
400 entry = &erst->entries[i];
Matt Evans28ccd292011-03-29 13:40:46 +1100401 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n",
402 addr,
403 lower_32_bits(le64_to_cpu(entry->seg_addr)),
404 upper_32_bits(le64_to_cpu(entry->seg_addr)),
Matt Evansf5960b62011-06-01 10:22:55 +1000405 le32_to_cpu(entry->seg_size),
406 le32_to_cpu(entry->rsvd));
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700407 addr += sizeof(*entry);
408 }
409}
410
411void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci)
412{
Sarah Sharp8e595a52009-07-27 12:03:31 -0700413 u64 val;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700414
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800415 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
Sarah Sharp8e595a52009-07-27 12:03:31 -0700416 xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",
417 lower_32_bits(val));
418 xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",
419 upper_32_bits(val));
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700420}
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700421
John Yound115b042009-07-27 12:05:15 -0700422/* Print the last 32 bytes for 64-byte contexts */
423static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma)
424{
425 int i;
426 for (i = 0; i < 4; ++i) {
427 xhci_dbg(xhci, "@%p (virt) @%08llx "
428 "(dma) %#08llx - rsvd64[%d]\n",
429 &ctx[4 + i], (unsigned long long)dma,
430 ctx[4 + i], i);
431 dma += 8;
432 }
433}
434
Sarah Sharp9c9a7dbf2010-01-04 12:20:17 -0800435char *xhci_get_slot_state(struct xhci_hcd *xhci,
Sarah Sharp2a8f82c2009-12-09 15:59:13 -0800436 struct xhci_container_ctx *ctx)
437{
438 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
439
Matt Evans28ccd292011-03-29 13:40:46 +1100440 switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) {
Maarten Lankhorste2b02172011-06-01 23:27:49 +0200441 case SLOT_STATE_ENABLED:
Sarah Sharp2a8f82c2009-12-09 15:59:13 -0800442 return "enabled/disabled";
Maarten Lankhorste2b02172011-06-01 23:27:49 +0200443 case SLOT_STATE_DEFAULT:
Sarah Sharp2a8f82c2009-12-09 15:59:13 -0800444 return "default";
Maarten Lankhorste2b02172011-06-01 23:27:49 +0200445 case SLOT_STATE_ADDRESSED:
Sarah Sharp2a8f82c2009-12-09 15:59:13 -0800446 return "addressed";
Maarten Lankhorste2b02172011-06-01 23:27:49 +0200447 case SLOT_STATE_CONFIGURED:
Sarah Sharp2a8f82c2009-12-09 15:59:13 -0800448 return "configured";
449 default:
450 return "reserved";
451 }
452}
453
Dmitry Torokhov8212a492011-02-08 13:55:59 -0800454static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx)
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700455{
456 /* Fields are 32 bits wide, DMA addresses are in bytes */
457 int field_size = 32 / 8;
458 int i;
459
John Yound115b042009-07-27 12:05:15 -0700460 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
Sarah Sharp018218d2009-08-07 14:04:40 -0700461 dma_addr_t dma = ctx->dma +
462 ((unsigned long)slot_ctx - (unsigned long)ctx->bytes);
John Yound115b042009-07-27 12:05:15 -0700463 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
464
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700465 xhci_dbg(xhci, "Slot Context:\n");
466 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n",
John Yound115b042009-07-27 12:05:15 -0700467 &slot_ctx->dev_info,
468 (unsigned long long)dma, slot_ctx->dev_info);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700469 dma += field_size;
470 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n",
John Yound115b042009-07-27 12:05:15 -0700471 &slot_ctx->dev_info2,
472 (unsigned long long)dma, slot_ctx->dev_info2);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700473 dma += field_size;
474 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n",
John Yound115b042009-07-27 12:05:15 -0700475 &slot_ctx->tt_info,
476 (unsigned long long)dma, slot_ctx->tt_info);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700477 dma += field_size;
478 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n",
John Yound115b042009-07-27 12:05:15 -0700479 &slot_ctx->dev_state,
480 (unsigned long long)dma, slot_ctx->dev_state);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700481 dma += field_size;
482 for (i = 0; i < 4; ++i) {
483 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
John Yound115b042009-07-27 12:05:15 -0700484 &slot_ctx->reserved[i], (unsigned long long)dma,
485 slot_ctx->reserved[i], i);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700486 dma += field_size;
487 }
488
John Yound115b042009-07-27 12:05:15 -0700489 if (csz)
490 dbg_rsvd64(xhci, (u64 *)slot_ctx, dma);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700491}
492
Dmitry Torokhov8212a492011-02-08 13:55:59 -0800493static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci,
John Yound115b042009-07-27 12:05:15 -0700494 struct xhci_container_ctx *ctx,
495 unsigned int last_ep)
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700496{
497 int i, j;
498 int last_ep_ctx = 31;
499 /* Fields are 32 bits wide, DMA addresses are in bytes */
500 int field_size = 32 / 8;
John Yound115b042009-07-27 12:05:15 -0700501 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700502
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700503 if (last_ep < 31)
504 last_ep_ctx = last_ep + 1;
505 for (i = 0; i < last_ep_ctx; ++i) {
Julius Werner01c5f442013-04-15 15:55:04 -0700506 unsigned int epaddr = xhci_get_endpoint_address(i);
John Yound115b042009-07-27 12:05:15 -0700507 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i);
508 dma_addr_t dma = ctx->dma +
Sarah Sharp018218d2009-08-07 14:04:40 -0700509 ((unsigned long)ep_ctx - (unsigned long)ctx->bytes);
John Yound115b042009-07-27 12:05:15 -0700510
Julius Werner01c5f442013-04-15 15:55:04 -0700511 xhci_dbg(xhci, "%s Endpoint %02d Context (ep_index %02d):\n",
512 usb_endpoint_out(epaddr) ? "OUT" : "IN",
513 epaddr & USB_ENDPOINT_NUMBER_MASK, i);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700514 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n",
John Yound115b042009-07-27 12:05:15 -0700515 &ep_ctx->ep_info,
516 (unsigned long long)dma, ep_ctx->ep_info);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700517 dma += field_size;
518 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n",
John Yound115b042009-07-27 12:05:15 -0700519 &ep_ctx->ep_info2,
520 (unsigned long long)dma, ep_ctx->ep_info2);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700521 dma += field_size;
522 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08llx - deq\n",
John Yound115b042009-07-27 12:05:15 -0700523 &ep_ctx->deq,
524 (unsigned long long)dma, ep_ctx->deq);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700525 dma += 2*field_size;
526 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n",
John Yound115b042009-07-27 12:05:15 -0700527 &ep_ctx->tx_info,
528 (unsigned long long)dma, ep_ctx->tx_info);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700529 dma += field_size;
530 for (j = 0; j < 3; ++j) {
531 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
John Yound115b042009-07-27 12:05:15 -0700532 &ep_ctx->reserved[j],
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700533 (unsigned long long)dma,
John Yound115b042009-07-27 12:05:15 -0700534 ep_ctx->reserved[j], j);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700535 dma += field_size;
536 }
John Yound115b042009-07-27 12:05:15 -0700537
538 if (csz)
539 dbg_rsvd64(xhci, (u64 *)ep_ctx, dma);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700540 }
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700541}
542
John Yound115b042009-07-27 12:05:15 -0700543void xhci_dbg_ctx(struct xhci_hcd *xhci,
544 struct xhci_container_ctx *ctx,
545 unsigned int last_ep)
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700546{
547 int i;
548 /* Fields are 32 bits wide, DMA addresses are in bytes */
549 int field_size = 32 / 8;
John Yound115b042009-07-27 12:05:15 -0700550 dma_addr_t dma = ctx->dma;
551 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
Sarah Sharp28c2d2e2009-07-27 12:05:08 -0700552
John Yound115b042009-07-27 12:05:15 -0700553 if (ctx->type == XHCI_CTX_TYPE_INPUT) {
554 struct xhci_input_control_ctx *ctrl_ctx =
555 xhci_get_input_control_ctx(xhci, ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -0700556 if (!ctrl_ctx) {
557 xhci_warn(xhci, "Could not get input context, bad type.\n");
558 return;
559 }
560
John Yound115b042009-07-27 12:05:15 -0700561 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n",
562 &ctrl_ctx->drop_flags, (unsigned long long)dma,
563 ctrl_ctx->drop_flags);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700564 dma += field_size;
John Yound115b042009-07-27 12:05:15 -0700565 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n",
566 &ctrl_ctx->add_flags, (unsigned long long)dma,
567 ctrl_ctx->add_flags);
568 dma += field_size;
569 for (i = 0; i < 6; ++i) {
570 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n",
571 &ctrl_ctx->rsvd2[i], (unsigned long long)dma,
572 ctrl_ctx->rsvd2[i], i);
573 dma += field_size;
574 }
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700575
John Yound115b042009-07-27 12:05:15 -0700576 if (csz)
577 dbg_rsvd64(xhci, (u64 *)ctrl_ctx, dma);
578 }
579
John Yound115b042009-07-27 12:05:15 -0700580 xhci_dbg_slot_ctx(xhci, ctx);
581 xhci_dbg_ep_ctx(xhci, ctx, last_ep);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700582}
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +0300583
584void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *),
585 const char *fmt, ...)
586{
587 struct va_format vaf;
588 va_list args;
589
590 va_start(args, fmt);
591 vaf.fmt = fmt;
592 vaf.va = &args;
593 xhci_dbg(xhci, "%pV\n", &vaf);
594 trace(&vaf);
595 va_end(args);
596}
Andrew Bresticker436e8c72014-10-03 11:35:28 +0300597EXPORT_SYMBOL_GPL(xhci_dbg_trace);