Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. |
| 3 | * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) |
| 4 | * |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 5 | * Right now, I am very wasteful with the buffers. I allocate memory |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * pages and then divide them into 2K frame buffers. This way I know I |
| 7 | * have buffers large enough to hold one frame within one buffer descriptor. |
| 8 | * Once I get this working, I will use 64 or 128 byte CPM buffers, which |
| 9 | * will be much more memory efficient and will easily handle lots of |
| 10 | * small packets. |
| 11 | * |
| 12 | * Much better multiple PHY support by Magnus Damm. |
| 13 | * Copyright (c) 2000 Ericsson Radio Systems AB. |
| 14 | * |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 15 | * Support for FEC controller of ColdFire processors. |
| 16 | * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 17 | * |
| 18 | * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be) |
Philippe De Muyter | 677177c | 2006-06-27 13:05:33 +1000 | [diff] [blame] | 19 | * Copyright (c) 2004-2006 Macq Electronique SA. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | */ |
| 21 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/module.h> |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/string.h> |
| 25 | #include <linux/ptrace.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/ioport.h> |
| 28 | #include <linux/slab.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | #include <linux/pci.h> |
| 31 | #include <linux/init.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <linux/netdevice.h> |
| 34 | #include <linux/etherdevice.h> |
| 35 | #include <linux/skbuff.h> |
| 36 | #include <linux/spinlock.h> |
| 37 | #include <linux/workqueue.h> |
| 38 | #include <linux/bitops.h> |
Sascha Hauer | 6f501b1 | 2009-01-28 23:03:05 +0000 | [diff] [blame] | 39 | #include <linux/io.h> |
| 40 | #include <linux/irq.h> |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 41 | #include <linux/clk.h> |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 42 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
Greg Ungerer | 080853a | 2007-07-30 16:28:46 +1000 | [diff] [blame] | 44 | #include <asm/cacheflush.h> |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 45 | |
| 46 | #ifndef CONFIG_ARCH_MXC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/coldfire.h> |
| 48 | #include <asm/mcfsim.h> |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 49 | #endif |
Sascha Hauer | 6f501b1 | 2009-01-28 23:03:05 +0000 | [diff] [blame] | 50 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | #include "fec.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 53 | #ifdef CONFIG_ARCH_MXC |
| 54 | #include <mach/hardware.h> |
| 55 | #define FEC_ALIGNMENT 0xf |
| 56 | #else |
| 57 | #define FEC_ALIGNMENT 0x3 |
| 58 | #endif |
| 59 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 60 | #if defined CONFIG_M5272 || defined CONFIG_M527x || defined CONFIG_M523x \ |
| 61 | || defined CONFIG_M528x || defined CONFIG_M532x || defined CONFIG_M520x |
| 62 | #define FEC_LEGACY |
| 63 | /* |
| 64 | * Define the fixed address of the FEC hardware. |
| 65 | */ |
Greg Ungerer | 87f4abb | 2008-06-06 15:55:36 +1000 | [diff] [blame] | 66 | #if defined(CONFIG_M5272) |
Sebastian Siewior | c1d9615 | 2008-05-01 14:04:02 +1000 | [diff] [blame] | 67 | #define HAVE_mii_link_interrupt |
| 68 | #endif |
| 69 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 70 | #if defined(CONFIG_FEC2) |
| 71 | #define FEC_MAX_PORTS 2 |
| 72 | #else |
| 73 | #define FEC_MAX_PORTS 1 |
| 74 | #endif |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | static unsigned int fec_hw[] = { |
| 77 | #if defined(CONFIG_M5272) |
| 78 | (MCF_MBAR + 0x840), |
| 79 | #elif defined(CONFIG_M527x) |
| 80 | (MCF_MBAR + 0x1000), |
| 81 | (MCF_MBAR + 0x1800), |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 82 | #elif defined(CONFIG_M523x) || defined(CONFIG_M528x) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | (MCF_MBAR + 0x1000), |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 84 | #elif defined(CONFIG_M520x) |
| 85 | (MCF_MBAR+0x30000), |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 86 | #elif defined(CONFIG_M532x) |
| 87 | (MCF_MBAR+0xfc030000), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | #endif |
| 89 | }; |
| 90 | |
| 91 | static unsigned char fec_mac_default[] = { |
| 92 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 93 | }; |
| 94 | |
| 95 | /* |
| 96 | * Some hardware gets it MAC address out of local flash memory. |
| 97 | * if this is non-zero then assume it is the address to get MAC from. |
| 98 | */ |
| 99 | #if defined(CONFIG_NETtel) |
| 100 | #define FEC_FLASHMAC 0xf0006006 |
| 101 | #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES) |
| 102 | #define FEC_FLASHMAC 0xf0006000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | #elif defined(CONFIG_CANCam) |
| 104 | #define FEC_FLASHMAC 0xf0020000 |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 105 | #elif defined (CONFIG_M5272C3) |
| 106 | #define FEC_FLASHMAC (0xffe04000 + 4) |
| 107 | #elif defined(CONFIG_MOD5272) |
| 108 | #define FEC_FLASHMAC 0xffc0406b |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | #else |
| 110 | #define FEC_FLASHMAC 0 |
| 111 | #endif |
| 112 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 113 | #endif /* FEC_LEGACY */ |
| 114 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | /* Forward declarations of some structures to support different PHYs |
| 116 | */ |
| 117 | |
| 118 | typedef struct { |
| 119 | uint mii_data; |
| 120 | void (*funct)(uint mii_reg, struct net_device *dev); |
| 121 | } phy_cmd_t; |
| 122 | |
| 123 | typedef struct { |
| 124 | uint id; |
| 125 | char *name; |
| 126 | |
| 127 | const phy_cmd_t *config; |
| 128 | const phy_cmd_t *startup; |
| 129 | const phy_cmd_t *ack_int; |
| 130 | const phy_cmd_t *shutdown; |
| 131 | } phy_info_t; |
| 132 | |
| 133 | /* The number of Tx and Rx buffers. These are allocated from the page |
| 134 | * pool. The code may assume these are power of two, so it it best |
| 135 | * to keep them that size. |
| 136 | * We don't need to allocate pages for the transmitter. We just use |
| 137 | * the skbuffer directly. |
| 138 | */ |
| 139 | #define FEC_ENET_RX_PAGES 8 |
| 140 | #define FEC_ENET_RX_FRSIZE 2048 |
| 141 | #define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) |
| 142 | #define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) |
| 143 | #define FEC_ENET_TX_FRSIZE 2048 |
| 144 | #define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE) |
| 145 | #define TX_RING_SIZE 16 /* Must be power of two */ |
| 146 | #define TX_RING_MOD_MASK 15 /* for this to work */ |
| 147 | |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 148 | #if (((RX_RING_SIZE + TX_RING_SIZE) * 8) > PAGE_SIZE) |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 149 | #error "FEC: descriptor ring size constants too large" |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 150 | #endif |
| 151 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | /* Interrupt events/masks. |
| 153 | */ |
| 154 | #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */ |
| 155 | #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */ |
| 156 | #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */ |
| 157 | #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */ |
| 158 | #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */ |
| 159 | #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */ |
| 160 | #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */ |
| 161 | #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */ |
| 162 | #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ |
| 163 | #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ |
| 164 | |
| 165 | /* The FEC stores dest/src/type, data, and checksum for receive packets. |
| 166 | */ |
| 167 | #define PKT_MAXBUF_SIZE 1518 |
| 168 | #define PKT_MINBUF_SIZE 64 |
| 169 | #define PKT_MAXBLR_SIZE 1520 |
| 170 | |
| 171 | |
| 172 | /* |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 173 | * The 5270/5271/5280/5282/532x RX control register also contains maximum frame |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | * size bits. Other FEC hardware does not, so we need to take that into |
| 175 | * account when setting it. |
| 176 | */ |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 177 | #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 178 | defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARCH_MXC) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16) |
| 180 | #else |
| 181 | #define OPT_FRAME_SIZE 0 |
| 182 | #endif |
| 183 | |
| 184 | /* The FEC buffer descriptors track the ring buffers. The rx_bd_base and |
| 185 | * tx_bd_base always point to the base of the buffer descriptors. The |
| 186 | * cur_rx and cur_tx point to the currently available buffer. |
| 187 | * The dirty_tx tracks the current buffer that is being sent by the |
| 188 | * controller. The cur_tx and dirty_tx are equal under both completely |
| 189 | * empty and completely full conditions. The empty/ready indicator in |
| 190 | * the buffer descriptor determines the actual condition. |
| 191 | */ |
| 192 | struct fec_enet_private { |
| 193 | /* Hardware registers of the FEC device */ |
| 194 | volatile fec_t *hwp; |
| 195 | |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 196 | struct net_device *netdev; |
| 197 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 198 | struct clk *clk; |
| 199 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
| 201 | unsigned char *tx_bounce[TX_RING_SIZE]; |
| 202 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; |
| 203 | ushort skb_cur; |
| 204 | ushort skb_dirty; |
| 205 | |
| 206 | /* CPM dual port RAM relative addresses. |
| 207 | */ |
Sascha Hauer | 4661e75 | 2009-01-28 23:03:07 +0000 | [diff] [blame] | 208 | dma_addr_t bd_dma; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ |
| 210 | cbd_t *tx_bd_base; |
| 211 | cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ |
| 212 | cbd_t *dirty_tx; /* The ring entries to be free()ed. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | uint tx_full; |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 214 | /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */ |
| 215 | spinlock_t hw_lock; |
| 216 | /* hold while accessing the mii_list_t() elements */ |
| 217 | spinlock_t mii_lock; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | |
| 219 | uint phy_id; |
| 220 | uint phy_id_done; |
| 221 | uint phy_status; |
| 222 | uint phy_speed; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 223 | phy_info_t const *phy; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | struct work_struct phy_task; |
| 225 | |
| 226 | uint sequence_done; |
| 227 | uint mii_phy_task_queued; |
| 228 | |
| 229 | uint phy_addr; |
| 230 | |
| 231 | int index; |
| 232 | int opened; |
| 233 | int link; |
| 234 | int old_link; |
| 235 | int full_duplex; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | }; |
| 237 | |
| 238 | static int fec_enet_open(struct net_device *dev); |
| 239 | static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); |
| 240 | static void fec_enet_mii(struct net_device *dev); |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 241 | static irqreturn_t fec_enet_interrupt(int irq, void * dev_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | static void fec_enet_tx(struct net_device *dev); |
| 243 | static void fec_enet_rx(struct net_device *dev); |
| 244 | static int fec_enet_close(struct net_device *dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | static void set_multicast_list(struct net_device *dev); |
| 246 | static void fec_restart(struct net_device *dev, int duplex); |
| 247 | static void fec_stop(struct net_device *dev); |
| 248 | static void fec_set_mac_address(struct net_device *dev); |
| 249 | |
| 250 | |
| 251 | /* MII processing. We keep this as simple as possible. Requests are |
| 252 | * placed on the list (if there is room). When the request is finished |
| 253 | * by the MII, an optional function may be called. |
| 254 | */ |
| 255 | typedef struct mii_list { |
| 256 | uint mii_regval; |
| 257 | void (*mii_func)(uint val, struct net_device *dev); |
| 258 | struct mii_list *mii_next; |
| 259 | } mii_list_t; |
| 260 | |
| 261 | #define NMII 20 |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 262 | static mii_list_t mii_cmds[NMII]; |
| 263 | static mii_list_t *mii_free; |
| 264 | static mii_list_t *mii_head; |
| 265 | static mii_list_t *mii_tail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 267 | static int mii_queue(struct net_device *dev, int request, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | void (*func)(uint, struct net_device *)); |
| 269 | |
| 270 | /* Make MII read/write commands for the FEC. |
| 271 | */ |
| 272 | #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) |
| 273 | #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ |
| 274 | (VAL & 0xffff)) |
| 275 | #define mk_mii_end 0 |
| 276 | |
| 277 | /* Transmitter timeout. |
| 278 | */ |
| 279 | #define TX_TIMEOUT (2*HZ) |
| 280 | |
| 281 | /* Register definitions for the PHY. |
| 282 | */ |
| 283 | |
| 284 | #define MII_REG_CR 0 /* Control Register */ |
| 285 | #define MII_REG_SR 1 /* Status Register */ |
| 286 | #define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ |
| 287 | #define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 288 | #define MII_REG_ANAR 4 /* A-N Advertisement Register */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | #define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ |
| 290 | #define MII_REG_ANER 6 /* A-N Expansion Register */ |
| 291 | #define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ |
| 292 | #define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */ |
| 293 | |
| 294 | /* values for phy_status */ |
| 295 | |
| 296 | #define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ |
| 297 | #define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ |
| 298 | #define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ |
| 299 | #define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 300 | #define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | #define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 302 | #define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | |
| 304 | #define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ |
| 305 | #define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ |
| 306 | #define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ |
| 307 | #define PHY_STAT_SPMASK 0xf000 /* mask for speed */ |
| 308 | #define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 309 | #define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | #define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 311 | #define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | |
| 313 | |
| 314 | static int |
| 315 | fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 316 | { |
| 317 | struct fec_enet_private *fep; |
| 318 | volatile fec_t *fecp; |
| 319 | volatile cbd_t *bdp; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 320 | unsigned short status; |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 321 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | |
| 323 | fep = netdev_priv(dev); |
| 324 | fecp = (volatile fec_t*)dev->base_addr; |
| 325 | |
| 326 | if (!fep->link) { |
| 327 | /* Link is down or autonegotiation is in progress. */ |
| 328 | return 1; |
| 329 | } |
| 330 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 331 | spin_lock_irqsave(&fep->hw_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | /* Fill in a Tx ring entry */ |
| 333 | bdp = fep->cur_tx; |
| 334 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 335 | status = bdp->cbd_sc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | #ifndef final_version |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 337 | if (status & BD_ENET_TX_READY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | /* Ooops. All transmit buffers are full. Bail out. |
| 339 | * This should not happen, since dev->tbusy should be set. |
| 340 | */ |
| 341 | printk("%s: tx queue full!.\n", dev->name); |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 342 | spin_unlock_irqrestore(&fep->hw_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | return 1; |
| 344 | } |
| 345 | #endif |
| 346 | |
| 347 | /* Clear all of the status flags. |
| 348 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 349 | status &= ~BD_ENET_TX_STATS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | |
| 351 | /* Set buffer length and buffer pointer. |
| 352 | */ |
| 353 | bdp->cbd_bufaddr = __pa(skb->data); |
| 354 | bdp->cbd_datlen = skb->len; |
| 355 | |
| 356 | /* |
| 357 | * On some FEC implementations data must be aligned on |
| 358 | * 4-byte boundaries. Use bounce buffers to copy data |
| 359 | * and get it aligned. Ugh. |
| 360 | */ |
Sascha Hauer | 196719e | 2009-01-28 23:03:10 +0000 | [diff] [blame] | 361 | if (bdp->cbd_bufaddr & FEC_ALIGNMENT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | unsigned int index; |
| 363 | index = bdp - fep->tx_bd_base; |
Sascha Hauer | 6989f51 | 2009-01-28 23:03:06 +0000 | [diff] [blame] | 364 | memcpy(fep->tx_bounce[index], (void *)skb->data, skb->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]); |
| 366 | } |
| 367 | |
| 368 | /* Save skb pointer. |
| 369 | */ |
| 370 | fep->tx_skbuff[fep->skb_cur] = skb; |
| 371 | |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 372 | dev->stats.tx_bytes += skb->len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 374 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | /* Push the data cache so the CPM does not get stale memory |
| 376 | * data. |
| 377 | */ |
Sascha Hauer | ccdc4f1 | 2009-01-28 23:03:09 +0000 | [diff] [blame] | 378 | dma_sync_single(NULL, bdp->cbd_bufaddr, |
| 379 | bdp->cbd_datlen, DMA_TO_DEVICE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 381 | /* Send it on its way. Tell FEC it's ready, interrupt when done, |
| 382 | * it's the last BD of the frame, and to put the CRC on the end. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | */ |
| 384 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 385 | status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | | BD_ENET_TX_LAST | BD_ENET_TX_TC); |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 387 | bdp->cbd_sc = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | |
| 389 | dev->trans_start = jiffies; |
| 390 | |
| 391 | /* Trigger transmission start */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 392 | fecp->fec_x_des_active = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | |
| 394 | /* If this was the last BD in the ring, start at the beginning again. |
| 395 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 396 | if (status & BD_ENET_TX_WRAP) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 397 | bdp = fep->tx_bd_base; |
| 398 | } else { |
| 399 | bdp++; |
| 400 | } |
| 401 | |
| 402 | if (bdp == fep->dirty_tx) { |
| 403 | fep->tx_full = 1; |
| 404 | netif_stop_queue(dev); |
| 405 | } |
| 406 | |
| 407 | fep->cur_tx = (cbd_t *)bdp; |
| 408 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 409 | spin_unlock_irqrestore(&fep->hw_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | |
| 411 | return 0; |
| 412 | } |
| 413 | |
| 414 | static void |
| 415 | fec_timeout(struct net_device *dev) |
| 416 | { |
| 417 | struct fec_enet_private *fep = netdev_priv(dev); |
| 418 | |
| 419 | printk("%s: transmit timed out.\n", dev->name); |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 420 | dev->stats.tx_errors++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | #ifndef final_version |
| 422 | { |
| 423 | int i; |
| 424 | cbd_t *bdp; |
| 425 | |
| 426 | printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n", |
| 427 | (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "", |
| 428 | (unsigned long)fep->dirty_tx, |
| 429 | (unsigned long)fep->cur_rx); |
| 430 | |
| 431 | bdp = fep->tx_bd_base; |
| 432 | printk(" tx: %u buffers\n", TX_RING_SIZE); |
| 433 | for (i = 0 ; i < TX_RING_SIZE; i++) { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 434 | printk(" %08x: %04x %04x %08x\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 435 | (uint) bdp, |
| 436 | bdp->cbd_sc, |
| 437 | bdp->cbd_datlen, |
| 438 | (int) bdp->cbd_bufaddr); |
| 439 | bdp++; |
| 440 | } |
| 441 | |
| 442 | bdp = fep->rx_bd_base; |
| 443 | printk(" rx: %lu buffers\n", (unsigned long) RX_RING_SIZE); |
| 444 | for (i = 0 ; i < RX_RING_SIZE; i++) { |
| 445 | printk(" %08x: %04x %04x %08x\n", |
| 446 | (uint) bdp, |
| 447 | bdp->cbd_sc, |
| 448 | bdp->cbd_datlen, |
| 449 | (int) bdp->cbd_bufaddr); |
| 450 | bdp++; |
| 451 | } |
| 452 | } |
| 453 | #endif |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 454 | fec_restart(dev, fep->full_duplex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | netif_wake_queue(dev); |
| 456 | } |
| 457 | |
| 458 | /* The interrupt handler. |
| 459 | * This is called from the MPC core interrupt. |
| 460 | */ |
| 461 | static irqreturn_t |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 462 | fec_enet_interrupt(int irq, void * dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | { |
| 464 | struct net_device *dev = dev_id; |
| 465 | volatile fec_t *fecp; |
| 466 | uint int_events; |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 467 | irqreturn_t ret = IRQ_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | |
| 469 | fecp = (volatile fec_t*)dev->base_addr; |
| 470 | |
| 471 | /* Get the interrupt events that caused us to be here. |
| 472 | */ |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 473 | do { |
| 474 | int_events = fecp->fec_ievent; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | fecp->fec_ievent = int_events; |
| 476 | |
| 477 | /* Handle receive event in its own function. |
| 478 | */ |
| 479 | if (int_events & FEC_ENET_RXF) { |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 480 | ret = IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | fec_enet_rx(dev); |
| 482 | } |
| 483 | |
| 484 | /* Transmit OK, or non-fatal error. Update the buffer |
| 485 | descriptors. FEC handles all errors, we just discover |
| 486 | them as part of the transmit process. |
| 487 | */ |
| 488 | if (int_events & FEC_ENET_TXF) { |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 489 | ret = IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | fec_enet_tx(dev); |
| 491 | } |
| 492 | |
| 493 | if (int_events & FEC_ENET_MII) { |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 494 | ret = IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | fec_enet_mii(dev); |
| 496 | } |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 497 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 498 | } while (int_events); |
| 499 | |
| 500 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | |
| 504 | static void |
| 505 | fec_enet_tx(struct net_device *dev) |
| 506 | { |
| 507 | struct fec_enet_private *fep; |
| 508 | volatile cbd_t *bdp; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 509 | unsigned short status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | struct sk_buff *skb; |
| 511 | |
| 512 | fep = netdev_priv(dev); |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 513 | spin_lock_irq(&fep->hw_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | bdp = fep->dirty_tx; |
| 515 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 516 | while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | if (bdp == fep->cur_tx && fep->tx_full == 0) break; |
| 518 | |
| 519 | skb = fep->tx_skbuff[fep->skb_dirty]; |
| 520 | /* Check for errors. */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 521 | if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | BD_ENET_TX_RL | BD_ENET_TX_UN | |
| 523 | BD_ENET_TX_CSL)) { |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 524 | dev->stats.tx_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 525 | if (status & BD_ENET_TX_HB) /* No heartbeat */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 526 | dev->stats.tx_heartbeat_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 527 | if (status & BD_ENET_TX_LC) /* Late collision */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 528 | dev->stats.tx_window_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 529 | if (status & BD_ENET_TX_RL) /* Retrans limit */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 530 | dev->stats.tx_aborted_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 531 | if (status & BD_ENET_TX_UN) /* Underrun */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 532 | dev->stats.tx_fifo_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 533 | if (status & BD_ENET_TX_CSL) /* Carrier lost */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 534 | dev->stats.tx_carrier_errors++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | } else { |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 536 | dev->stats.tx_packets++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | } |
| 538 | |
| 539 | #ifndef final_version |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 540 | if (status & BD_ENET_TX_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 541 | printk("HEY! Enet xmit interrupt and TX_READY.\n"); |
| 542 | #endif |
| 543 | /* Deferred means some collisions occurred during transmit, |
| 544 | * but we eventually sent the packet OK. |
| 545 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 546 | if (status & BD_ENET_TX_DEF) |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 547 | dev->stats.collisions++; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 548 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | /* Free the sk buffer associated with this last transmit. |
| 550 | */ |
| 551 | dev_kfree_skb_any(skb); |
| 552 | fep->tx_skbuff[fep->skb_dirty] = NULL; |
| 553 | fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 554 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | /* Update pointer to next buffer descriptor to be transmitted. |
| 556 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 557 | if (status & BD_ENET_TX_WRAP) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | bdp = fep->tx_bd_base; |
| 559 | else |
| 560 | bdp++; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 561 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | /* Since we have freed up a buffer, the ring is no longer |
| 563 | * full. |
| 564 | */ |
| 565 | if (fep->tx_full) { |
| 566 | fep->tx_full = 0; |
| 567 | if (netif_queue_stopped(dev)) |
| 568 | netif_wake_queue(dev); |
| 569 | } |
| 570 | } |
| 571 | fep->dirty_tx = (cbd_t *)bdp; |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 572 | spin_unlock_irq(&fep->hw_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | } |
| 574 | |
| 575 | |
| 576 | /* During a receive, the cur_rx points to the current incoming buffer. |
| 577 | * When we update through the ring, if the next incoming buffer has |
| 578 | * not been given to the system, we just set the empty indicator, |
| 579 | * effectively tossing the packet. |
| 580 | */ |
| 581 | static void |
| 582 | fec_enet_rx(struct net_device *dev) |
| 583 | { |
| 584 | struct fec_enet_private *fep; |
| 585 | volatile fec_t *fecp; |
| 586 | volatile cbd_t *bdp; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 587 | unsigned short status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | struct sk_buff *skb; |
| 589 | ushort pkt_len; |
| 590 | __u8 *data; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 591 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 592 | #ifdef CONFIG_M532x |
| 593 | flush_cache_all(); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 594 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | |
| 596 | fep = netdev_priv(dev); |
| 597 | fecp = (volatile fec_t*)dev->base_addr; |
| 598 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 599 | spin_lock_irq(&fep->hw_lock); |
| 600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | /* First, grab all of the stats for the incoming packet. |
| 602 | * These get messed up if we get called due to a busy condition. |
| 603 | */ |
| 604 | bdp = fep->cur_rx; |
| 605 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 606 | while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | |
| 608 | #ifndef final_version |
| 609 | /* Since we have allocated space to hold a complete frame, |
| 610 | * the last indicator should be set. |
| 611 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 612 | if ((status & BD_ENET_RX_LAST) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | printk("FEC ENET: rcv is not +last\n"); |
| 614 | #endif |
| 615 | |
| 616 | if (!fep->opened) |
| 617 | goto rx_processing_done; |
| 618 | |
| 619 | /* Check for errors. */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 620 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | BD_ENET_RX_CR | BD_ENET_RX_OV)) { |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 622 | dev->stats.rx_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 623 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | /* Frame too long or too short. */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 625 | dev->stats.rx_length_errors++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | } |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 627 | if (status & BD_ENET_RX_NO) /* Frame alignment */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 628 | dev->stats.rx_frame_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 629 | if (status & BD_ENET_RX_CR) /* CRC Error */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 630 | dev->stats.rx_crc_errors++; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 631 | if (status & BD_ENET_RX_OV) /* FIFO overrun */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 632 | dev->stats.rx_fifo_errors++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | } |
| 634 | |
| 635 | /* Report late collisions as a frame error. |
| 636 | * On this error, the BD is closed, but we don't know what we |
| 637 | * have in the buffer. So, just drop this frame on the floor. |
| 638 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 639 | if (status & BD_ENET_RX_CL) { |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 640 | dev->stats.rx_errors++; |
| 641 | dev->stats.rx_frame_errors++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | goto rx_processing_done; |
| 643 | } |
| 644 | |
| 645 | /* Process the incoming frame. |
| 646 | */ |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 647 | dev->stats.rx_packets++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | pkt_len = bdp->cbd_datlen; |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 649 | dev->stats.rx_bytes += pkt_len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | data = (__u8*)__va(bdp->cbd_bufaddr); |
| 651 | |
Sascha Hauer | ccdc4f1 | 2009-01-28 23:03:09 +0000 | [diff] [blame] | 652 | dma_sync_single(NULL, (unsigned long)__pa(data), |
| 653 | pkt_len - 4, DMA_FROM_DEVICE); |
| 654 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | /* This does 16 byte alignment, exactly what we need. |
| 656 | * The packet length includes FCS, but we don't want to |
| 657 | * include that when passing upstream as it messes up |
| 658 | * bridging applications. |
| 659 | */ |
| 660 | skb = dev_alloc_skb(pkt_len-4); |
| 661 | |
| 662 | if (skb == NULL) { |
| 663 | printk("%s: Memory squeeze, dropping packet.\n", dev->name); |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 664 | dev->stats.rx_dropped++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 666 | skb_put(skb,pkt_len-4); /* Make room */ |
David S. Miller | 8c7b7fa | 2007-07-10 22:08:12 -0700 | [diff] [blame] | 667 | skb_copy_to_linear_data(skb, data, pkt_len-4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 668 | skb->protocol=eth_type_trans(skb,dev); |
| 669 | netif_rx(skb); |
| 670 | } |
| 671 | rx_processing_done: |
| 672 | |
| 673 | /* Clear the status flags for this buffer. |
| 674 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 675 | status &= ~BD_ENET_RX_STATS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | |
| 677 | /* Mark the buffer empty. |
| 678 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 679 | status |= BD_ENET_RX_EMPTY; |
| 680 | bdp->cbd_sc = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | |
| 682 | /* Update BD pointer to next entry. |
| 683 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 684 | if (status & BD_ENET_RX_WRAP) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | bdp = fep->rx_bd_base; |
| 686 | else |
| 687 | bdp++; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | #if 1 |
| 690 | /* Doing this here will keep the FEC running while we process |
| 691 | * incoming frames. On a heavily loaded network, we should be |
| 692 | * able to keep up at the expense of system resources. |
| 693 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 694 | fecp->fec_r_des_active = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | #endif |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 696 | } /* while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 697 | fep->cur_rx = (cbd_t *)bdp; |
| 698 | |
| 699 | #if 0 |
| 700 | /* Doing this here will allow us to process all frames in the |
| 701 | * ring before the FEC is allowed to put more there. On a heavily |
| 702 | * loaded network, some frames may be lost. Unfortunately, this |
| 703 | * increases the interrupt overhead since we can potentially work |
| 704 | * our way back to the interrupt return only to come right back |
| 705 | * here. |
| 706 | */ |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 707 | fecp->fec_r_des_active = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | #endif |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 709 | |
| 710 | spin_unlock_irq(&fep->hw_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | } |
| 712 | |
| 713 | |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 714 | /* called from interrupt context */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | static void |
| 716 | fec_enet_mii(struct net_device *dev) |
| 717 | { |
| 718 | struct fec_enet_private *fep; |
| 719 | volatile fec_t *ep; |
| 720 | mii_list_t *mip; |
| 721 | uint mii_reg; |
| 722 | |
| 723 | fep = netdev_priv(dev); |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 724 | spin_lock_irq(&fep->mii_lock); |
| 725 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | ep = fep->hwp; |
| 727 | mii_reg = ep->fec_mii_data; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 728 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | if ((mip = mii_head) == NULL) { |
| 730 | printk("MII and no head!\n"); |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 731 | goto unlock; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | } |
| 733 | |
| 734 | if (mip->mii_func != NULL) |
| 735 | (*(mip->mii_func))(mii_reg, dev); |
| 736 | |
| 737 | mii_head = mip->mii_next; |
| 738 | mip->mii_next = mii_free; |
| 739 | mii_free = mip; |
| 740 | |
| 741 | if ((mip = mii_head) != NULL) |
| 742 | ep->fec_mii_data = mip->mii_regval; |
Greg Ungerer | 0e702ab | 2006-06-27 13:19:33 +1000 | [diff] [blame] | 743 | |
| 744 | unlock: |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 745 | spin_unlock_irq(&fep->mii_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | } |
| 747 | |
| 748 | static int |
| 749 | mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *)) |
| 750 | { |
| 751 | struct fec_enet_private *fep; |
| 752 | unsigned long flags; |
| 753 | mii_list_t *mip; |
| 754 | int retval; |
| 755 | |
| 756 | /* Add PHY address to register command. |
| 757 | */ |
| 758 | fep = netdev_priv(dev); |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 759 | spin_lock_irqsave(&fep->mii_lock, flags); |
| 760 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | regval |= fep->phy_addr << 23; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | retval = 0; |
| 763 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | if ((mip = mii_free) != NULL) { |
| 765 | mii_free = mip->mii_next; |
| 766 | mip->mii_regval = regval; |
| 767 | mip->mii_func = func; |
| 768 | mip->mii_next = NULL; |
| 769 | if (mii_head) { |
| 770 | mii_tail->mii_next = mip; |
| 771 | mii_tail = mip; |
Philippe De Muyter | f909b1e | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 772 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | mii_head = mii_tail = mip; |
| 774 | fep->hwp->fec_mii_data = regval; |
| 775 | } |
Philippe De Muyter | f909b1e | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 776 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | retval = 1; |
| 778 | } |
| 779 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 780 | spin_unlock_irqrestore(&fep->mii_lock, flags); |
| 781 | return retval; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c) |
| 785 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | if(!c) |
| 787 | return; |
| 788 | |
Philippe De Muyter | be6cb66 | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 789 | for (; c->mii_data != mk_mii_end; c++) |
| 790 | mii_queue(dev, c->mii_data, c->funct); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | } |
| 792 | |
| 793 | static void mii_parse_sr(uint mii_reg, struct net_device *dev) |
| 794 | { |
| 795 | struct fec_enet_private *fep = netdev_priv(dev); |
| 796 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 797 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 799 | status = *s & ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | |
| 801 | if (mii_reg & 0x0004) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 802 | status |= PHY_STAT_LINK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | if (mii_reg & 0x0010) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 804 | status |= PHY_STAT_FAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | if (mii_reg & 0x0020) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 806 | status |= PHY_STAT_ANC; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 807 | *s = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | } |
| 809 | |
| 810 | static void mii_parse_cr(uint mii_reg, struct net_device *dev) |
| 811 | { |
| 812 | struct fec_enet_private *fep = netdev_priv(dev); |
| 813 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 814 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 816 | status = *s & ~(PHY_CONF_ANE | PHY_CONF_LOOP); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | |
| 818 | if (mii_reg & 0x1000) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 819 | status |= PHY_CONF_ANE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | if (mii_reg & 0x4000) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 821 | status |= PHY_CONF_LOOP; |
| 822 | *s = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | } |
| 824 | |
| 825 | static void mii_parse_anar(uint mii_reg, struct net_device *dev) |
| 826 | { |
| 827 | struct fec_enet_private *fep = netdev_priv(dev); |
| 828 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 829 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 831 | status = *s & ~(PHY_CONF_SPMASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | |
| 833 | if (mii_reg & 0x0020) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 834 | status |= PHY_CONF_10HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | if (mii_reg & 0x0040) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 836 | status |= PHY_CONF_10FDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | if (mii_reg & 0x0080) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 838 | status |= PHY_CONF_100HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | if (mii_reg & 0x00100) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 840 | status |= PHY_CONF_100FDX; |
| 841 | *s = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | } |
| 843 | |
| 844 | /* ------------------------------------------------------------------------- */ |
| 845 | /* The Level one LXT970 is used by many boards */ |
| 846 | |
| 847 | #define MII_LXT970_MIRROR 16 /* Mirror register */ |
| 848 | #define MII_LXT970_IER 17 /* Interrupt Enable Register */ |
| 849 | #define MII_LXT970_ISR 18 /* Interrupt Status Register */ |
| 850 | #define MII_LXT970_CONFIG 19 /* Configuration Register */ |
| 851 | #define MII_LXT970_CSR 20 /* Chip Status Register */ |
| 852 | |
| 853 | static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev) |
| 854 | { |
| 855 | struct fec_enet_private *fep = netdev_priv(dev); |
| 856 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 857 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 859 | status = *s & ~(PHY_STAT_SPMASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 860 | if (mii_reg & 0x0800) { |
| 861 | if (mii_reg & 0x1000) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 862 | status |= PHY_STAT_100FDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 863 | else |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 864 | status |= PHY_STAT_100HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | } else { |
| 866 | if (mii_reg & 0x1000) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 867 | status |= PHY_STAT_10FDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | else |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 869 | status |= PHY_STAT_10HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 870 | } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 871 | *s = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | } |
| 873 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 874 | static phy_cmd_t const phy_cmd_lxt970_config[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 875 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 876 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 877 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 878 | }; |
| 879 | static phy_cmd_t const phy_cmd_lxt970_startup[] = { /* enable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | { mk_mii_write(MII_LXT970_IER, 0x0002), NULL }, |
| 881 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
| 882 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 883 | }; |
| 884 | static phy_cmd_t const phy_cmd_lxt970_ack_int[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | /* read SR and ISR to acknowledge */ |
| 886 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 887 | { mk_mii_read(MII_LXT970_ISR), NULL }, |
| 888 | |
| 889 | /* find out the current status */ |
| 890 | { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr }, |
| 891 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 892 | }; |
| 893 | static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | { mk_mii_write(MII_LXT970_IER, 0x0000), NULL }, |
| 895 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 896 | }; |
| 897 | static phy_info_t const phy_info_lxt970 = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 898 | .id = 0x07810000, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 899 | .name = "LXT970", |
| 900 | .config = phy_cmd_lxt970_config, |
| 901 | .startup = phy_cmd_lxt970_startup, |
| 902 | .ack_int = phy_cmd_lxt970_ack_int, |
| 903 | .shutdown = phy_cmd_lxt970_shutdown |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 904 | }; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 905 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 906 | /* ------------------------------------------------------------------------- */ |
| 907 | /* The Level one LXT971 is used on some of my custom boards */ |
| 908 | |
| 909 | /* register definitions for the 971 */ |
| 910 | |
| 911 | #define MII_LXT971_PCR 16 /* Port Control Register */ |
| 912 | #define MII_LXT971_SR2 17 /* Status Register 2 */ |
| 913 | #define MII_LXT971_IER 18 /* Interrupt Enable Register */ |
| 914 | #define MII_LXT971_ISR 19 /* Interrupt Status Register */ |
| 915 | #define MII_LXT971_LCR 20 /* LED Control Register */ |
| 916 | #define MII_LXT971_TCR 30 /* Transmit Control Register */ |
| 917 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 918 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | * I had some nice ideas of running the MDIO faster... |
| 920 | * The 971 should support 8MHz and I tried it, but things acted really |
| 921 | * weird, so 2.5 MHz ought to be enough for anyone... |
| 922 | */ |
| 923 | |
| 924 | static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) |
| 925 | { |
| 926 | struct fec_enet_private *fep = netdev_priv(dev); |
| 927 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 928 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 929 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 930 | status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 931 | |
| 932 | if (mii_reg & 0x0400) { |
| 933 | fep->link = 1; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 934 | status |= PHY_STAT_LINK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 935 | } else { |
| 936 | fep->link = 0; |
| 937 | } |
| 938 | if (mii_reg & 0x0080) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 939 | status |= PHY_STAT_ANC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 940 | if (mii_reg & 0x4000) { |
| 941 | if (mii_reg & 0x0200) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 942 | status |= PHY_STAT_100FDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 943 | else |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 944 | status |= PHY_STAT_100HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 945 | } else { |
| 946 | if (mii_reg & 0x0200) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 947 | status |= PHY_STAT_10FDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 948 | else |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 949 | status |= PHY_STAT_10HDX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | } |
| 951 | if (mii_reg & 0x0008) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 952 | status |= PHY_STAT_FAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 953 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 954 | *s = status; |
| 955 | } |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 956 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 957 | static phy_cmd_t const phy_cmd_lxt971_config[] = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 958 | /* limit to 10MBit because my prototype board |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 959 | * doesn't work with 100. */ |
| 960 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 961 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 962 | { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, |
| 963 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 964 | }; |
| 965 | static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL }, |
| 967 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
| 968 | { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */ |
| 969 | /* Somehow does the 971 tell me that the link is down |
| 970 | * the first read after power-up. |
| 971 | * read here to get a valid value in ack_int */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 972 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 974 | }; |
| 975 | static phy_cmd_t const phy_cmd_lxt971_ack_int[] = { |
| 976 | /* acknowledge the int before reading status ! */ |
| 977 | { mk_mii_read(MII_LXT971_ISR), NULL }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 978 | /* find out the current status */ |
| 979 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 980 | { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 981 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 982 | }; |
| 983 | static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 984 | { mk_mii_write(MII_LXT971_IER, 0x0000), NULL }, |
| 985 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 986 | }; |
| 987 | static phy_info_t const phy_info_lxt971 = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 988 | .id = 0x0001378e, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 989 | .name = "LXT971", |
| 990 | .config = phy_cmd_lxt971_config, |
| 991 | .startup = phy_cmd_lxt971_startup, |
| 992 | .ack_int = phy_cmd_lxt971_ack_int, |
| 993 | .shutdown = phy_cmd_lxt971_shutdown |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 994 | }; |
| 995 | |
| 996 | /* ------------------------------------------------------------------------- */ |
| 997 | /* The Quality Semiconductor QS6612 is used on the RPX CLLF */ |
| 998 | |
| 999 | /* register definitions */ |
| 1000 | |
| 1001 | #define MII_QS6612_MCR 17 /* Mode Control Register */ |
| 1002 | #define MII_QS6612_FTR 27 /* Factory Test Register */ |
| 1003 | #define MII_QS6612_MCO 28 /* Misc. Control Register */ |
| 1004 | #define MII_QS6612_ISR 29 /* Interrupt Source Register */ |
| 1005 | #define MII_QS6612_IMR 30 /* Interrupt Mask Register */ |
| 1006 | #define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ |
| 1007 | |
| 1008 | static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) |
| 1009 | { |
| 1010 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1011 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1012 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1013 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1014 | status = *s & ~(PHY_STAT_SPMASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1015 | |
| 1016 | switch((mii_reg >> 2) & 7) { |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1017 | case 1: status |= PHY_STAT_10HDX; break; |
| 1018 | case 2: status |= PHY_STAT_100HDX; break; |
| 1019 | case 5: status |= PHY_STAT_10FDX; break; |
| 1020 | case 6: status |= PHY_STAT_100FDX; break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1021 | } |
| 1022 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1023 | *s = status; |
| 1024 | } |
| 1025 | |
| 1026 | static phy_cmd_t const phy_cmd_qs6612_config[] = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1027 | /* The PHY powers up isolated on the RPX, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1028 | * so send a command to allow operation. |
| 1029 | */ |
| 1030 | { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, |
| 1031 | |
| 1032 | /* parse cr and anar to get some info */ |
| 1033 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 1034 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 1035 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1036 | }; |
| 1037 | static phy_cmd_t const phy_cmd_qs6612_startup[] = { /* enable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL }, |
| 1039 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
| 1040 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1041 | }; |
| 1042 | static phy_cmd_t const phy_cmd_qs6612_ack_int[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1043 | /* we need to read ISR, SR and ANER to acknowledge */ |
| 1044 | { mk_mii_read(MII_QS6612_ISR), NULL }, |
| 1045 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 1046 | { mk_mii_read(MII_REG_ANER), NULL }, |
| 1047 | |
| 1048 | /* read pcr to get info */ |
| 1049 | { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr }, |
| 1050 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1051 | }; |
| 1052 | static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL }, |
| 1054 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1055 | }; |
| 1056 | static phy_info_t const phy_info_qs6612 = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1057 | .id = 0x00181440, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1058 | .name = "QS6612", |
| 1059 | .config = phy_cmd_qs6612_config, |
| 1060 | .startup = phy_cmd_qs6612_startup, |
| 1061 | .ack_int = phy_cmd_qs6612_ack_int, |
| 1062 | .shutdown = phy_cmd_qs6612_shutdown |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1063 | }; |
| 1064 | |
| 1065 | /* ------------------------------------------------------------------------- */ |
| 1066 | /* AMD AM79C874 phy */ |
| 1067 | |
| 1068 | /* register definitions for the 874 */ |
| 1069 | |
| 1070 | #define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */ |
| 1071 | #define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */ |
| 1072 | #define MII_AM79C874_DR 18 /* Diagnostic Register */ |
| 1073 | #define MII_AM79C874_PMLR 19 /* Power and Loopback Register */ |
| 1074 | #define MII_AM79C874_MCR 21 /* ModeControl Register */ |
| 1075 | #define MII_AM79C874_DC 23 /* Disconnect Counter */ |
| 1076 | #define MII_AM79C874_REC 24 /* Recieve Error Counter */ |
| 1077 | |
| 1078 | static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev) |
| 1079 | { |
| 1080 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1081 | volatile uint *s = &(fep->phy_status); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1082 | uint status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1084 | status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_ANC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1085 | |
| 1086 | if (mii_reg & 0x0080) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1087 | status |= PHY_STAT_ANC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | if (mii_reg & 0x0400) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1089 | status |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | else |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1091 | status |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX); |
| 1092 | |
| 1093 | *s = status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | } |
| 1095 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1096 | static phy_cmd_t const phy_cmd_am79c874_config[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1097 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 1098 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 1099 | { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, |
| 1100 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1101 | }; |
| 1102 | static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1103 | { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, |
| 1104 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1105 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1106 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1107 | }; |
| 1108 | static phy_cmd_t const phy_cmd_am79c874_ack_int[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1109 | /* find out the current status */ |
| 1110 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 1111 | { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, |
| 1112 | /* we only need to read ISR to acknowledge */ |
| 1113 | { mk_mii_read(MII_AM79C874_ICSR), NULL }, |
| 1114 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1115 | }; |
| 1116 | static phy_cmd_t const phy_cmd_am79c874_shutdown[] = { /* disable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1117 | { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL }, |
| 1118 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1119 | }; |
| 1120 | static phy_info_t const phy_info_am79c874 = { |
| 1121 | .id = 0x00022561, |
| 1122 | .name = "AM79C874", |
| 1123 | .config = phy_cmd_am79c874_config, |
| 1124 | .startup = phy_cmd_am79c874_startup, |
| 1125 | .ack_int = phy_cmd_am79c874_ack_int, |
| 1126 | .shutdown = phy_cmd_am79c874_shutdown |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1127 | }; |
| 1128 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1129 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | /* ------------------------------------------------------------------------- */ |
| 1131 | /* Kendin KS8721BL phy */ |
| 1132 | |
| 1133 | /* register definitions for the 8721 */ |
| 1134 | |
| 1135 | #define MII_KS8721BL_RXERCR 21 |
Sascha Hauer | 43268dc | 2009-01-28 23:03:08 +0000 | [diff] [blame] | 1136 | #define MII_KS8721BL_ICSR 27 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | #define MII_KS8721BL_PHYCR 31 |
| 1138 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1139 | static phy_cmd_t const phy_cmd_ks8721bl_config[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 1141 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 1142 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1143 | }; |
| 1144 | static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1145 | { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL }, |
| 1146 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1147 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1148 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1149 | }; |
| 1150 | static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1151 | /* find out the current status */ |
| 1152 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 1153 | /* we only need to read ISR to acknowledge */ |
| 1154 | { mk_mii_read(MII_KS8721BL_ICSR), NULL }, |
| 1155 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1156 | }; |
| 1157 | static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1158 | { mk_mii_write(MII_KS8721BL_ICSR, 0x0000), NULL }, |
| 1159 | { mk_mii_end, } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1160 | }; |
| 1161 | static phy_info_t const phy_info_ks8721bl = { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1162 | .id = 0x00022161, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1163 | .name = "KS8721BL", |
| 1164 | .config = phy_cmd_ks8721bl_config, |
| 1165 | .startup = phy_cmd_ks8721bl_startup, |
| 1166 | .ack_int = phy_cmd_ks8721bl_ack_int, |
| 1167 | .shutdown = phy_cmd_ks8721bl_shutdown |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | }; |
| 1169 | |
| 1170 | /* ------------------------------------------------------------------------- */ |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1171 | /* register definitions for the DP83848 */ |
| 1172 | |
| 1173 | #define MII_DP8384X_PHYSTST 16 /* PHY Status Register */ |
| 1174 | |
| 1175 | static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev) |
| 1176 | { |
Wang Chen | 4cf1653 | 2008-11-12 23:38:14 -0800 | [diff] [blame] | 1177 | struct fec_enet_private *fep = netdev_priv(dev); |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1178 | volatile uint *s = &(fep->phy_status); |
| 1179 | |
| 1180 | *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC); |
| 1181 | |
| 1182 | /* Link up */ |
| 1183 | if (mii_reg & 0x0001) { |
| 1184 | fep->link = 1; |
| 1185 | *s |= PHY_STAT_LINK; |
| 1186 | } else |
| 1187 | fep->link = 0; |
| 1188 | /* Status of link */ |
| 1189 | if (mii_reg & 0x0010) /* Autonegotioation complete */ |
| 1190 | *s |= PHY_STAT_ANC; |
| 1191 | if (mii_reg & 0x0002) { /* 10MBps? */ |
| 1192 | if (mii_reg & 0x0004) /* Full Duplex? */ |
| 1193 | *s |= PHY_STAT_10FDX; |
| 1194 | else |
| 1195 | *s |= PHY_STAT_10HDX; |
| 1196 | } else { /* 100 Mbps? */ |
| 1197 | if (mii_reg & 0x0004) /* Full Duplex? */ |
| 1198 | *s |= PHY_STAT_100FDX; |
| 1199 | else |
| 1200 | *s |= PHY_STAT_100HDX; |
| 1201 | } |
| 1202 | if (mii_reg & 0x0008) |
| 1203 | *s |= PHY_STAT_FAULT; |
| 1204 | } |
| 1205 | |
| 1206 | static phy_info_t phy_info_dp83848= { |
| 1207 | 0x020005c9, |
| 1208 | "DP83848", |
| 1209 | |
| 1210 | (const phy_cmd_t []) { /* config */ |
| 1211 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
| 1212 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
| 1213 | { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 }, |
| 1214 | { mk_mii_end, } |
| 1215 | }, |
| 1216 | (const phy_cmd_t []) { /* startup - enable interrupts */ |
| 1217 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
| 1218 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
| 1219 | { mk_mii_end, } |
| 1220 | }, |
| 1221 | (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */ |
| 1222 | { mk_mii_end, } |
| 1223 | }, |
| 1224 | (const phy_cmd_t []) { /* shutdown */ |
| 1225 | { mk_mii_end, } |
| 1226 | }, |
| 1227 | }; |
| 1228 | |
| 1229 | /* ------------------------------------------------------------------------- */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1231 | static phy_info_t const * const phy_info[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | &phy_info_lxt970, |
| 1233 | &phy_info_lxt971, |
| 1234 | &phy_info_qs6612, |
| 1235 | &phy_info_am79c874, |
| 1236 | &phy_info_ks8721bl, |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1237 | &phy_info_dp83848, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1238 | NULL |
| 1239 | }; |
| 1240 | |
| 1241 | /* ------------------------------------------------------------------------- */ |
Sebastian Siewior | c1d9615 | 2008-05-01 14:04:02 +1000 | [diff] [blame] | 1242 | #ifdef HAVE_mii_link_interrupt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | static irqreturn_t |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1244 | mii_link_interrupt(int irq, void * dev_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1245 | #endif |
| 1246 | |
| 1247 | #if defined(CONFIG_M5272) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1248 | /* |
| 1249 | * Code specific to Coldfire 5272 setup. |
| 1250 | */ |
| 1251 | static void __inline__ fec_request_intrs(struct net_device *dev) |
| 1252 | { |
| 1253 | volatile unsigned long *icrp; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1254 | static const struct idesc { |
| 1255 | char *name; |
| 1256 | unsigned short irq; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1257 | irq_handler_t handler; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1258 | } *idp, id[] = { |
| 1259 | { "fec(RX)", 86, fec_enet_interrupt }, |
| 1260 | { "fec(TX)", 87, fec_enet_interrupt }, |
| 1261 | { "fec(OTHER)", 88, fec_enet_interrupt }, |
| 1262 | { "fec(MII)", 66, mii_link_interrupt }, |
| 1263 | { NULL }, |
| 1264 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1265 | |
| 1266 | /* Setup interrupt handlers. */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1267 | for (idp = id; idp->name; idp++) { |
Greg Ungerer | 0a50477 | 2008-03-04 16:52:01 +1000 | [diff] [blame] | 1268 | if (request_irq(idp->irq, idp->handler, IRQF_DISABLED, idp->name, dev) != 0) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1269 | printk("FEC: Could not allocate %s IRQ(%d)!\n", idp->name, idp->irq); |
| 1270 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1271 | |
| 1272 | /* Unmask interrupt at ColdFire 5272 SIM */ |
| 1273 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR3); |
| 1274 | *icrp = 0x00000ddd; |
| 1275 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); |
Greg Ungerer | f861d62 | 2007-07-30 16:29:16 +1000 | [diff] [blame] | 1276 | *icrp = 0x0d000000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1277 | } |
| 1278 | |
| 1279 | static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) |
| 1280 | { |
| 1281 | volatile fec_t *fecp; |
| 1282 | |
| 1283 | fecp = fep->hwp; |
| 1284 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; |
| 1285 | fecp->fec_x_cntrl = 0x00; |
| 1286 | |
| 1287 | /* |
| 1288 | * Set MII speed to 2.5 MHz |
| 1289 | * See 5272 manual section 11.5.8: MSCR |
| 1290 | */ |
| 1291 | fep->phy_speed = ((((MCF_CLK / 4) / (2500000 / 10)) + 5) / 10) * 2; |
| 1292 | fecp->fec_mii_speed = fep->phy_speed; |
| 1293 | |
| 1294 | fec_restart(dev, 0); |
| 1295 | } |
| 1296 | |
| 1297 | static void __inline__ fec_get_mac(struct net_device *dev) |
| 1298 | { |
| 1299 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1300 | volatile fec_t *fecp; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1301 | unsigned char *iap, tmpaddr[ETH_ALEN]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | |
| 1303 | fecp = fep->hwp; |
| 1304 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1305 | if (FEC_FLASHMAC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1306 | /* |
| 1307 | * Get MAC address from FLASH. |
| 1308 | * If it is all 1's or 0's, use the default. |
| 1309 | */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1310 | iap = (unsigned char *)FEC_FLASHMAC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1311 | if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && |
| 1312 | (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) |
| 1313 | iap = fec_mac_default; |
| 1314 | if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && |
| 1315 | (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) |
| 1316 | iap = fec_mac_default; |
| 1317 | } else { |
| 1318 | *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; |
| 1319 | *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); |
| 1320 | iap = &tmpaddr[0]; |
| 1321 | } |
| 1322 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1323 | memcpy(dev->dev_addr, iap, ETH_ALEN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1324 | |
| 1325 | /* Adjust MAC if using default MAC address */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1326 | if (iap == fec_mac_default) |
| 1327 | dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1328 | } |
| 1329 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1330 | static void __inline__ fec_disable_phy_intr(void) |
| 1331 | { |
| 1332 | volatile unsigned long *icrp; |
| 1333 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); |
Greg Ungerer | f861d62 | 2007-07-30 16:29:16 +1000 | [diff] [blame] | 1334 | *icrp = 0x08000000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | } |
| 1336 | |
| 1337 | static void __inline__ fec_phy_ack_intr(void) |
| 1338 | { |
| 1339 | volatile unsigned long *icrp; |
| 1340 | /* Acknowledge the interrupt */ |
| 1341 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); |
Greg Ungerer | f861d62 | 2007-07-30 16:29:16 +1000 | [diff] [blame] | 1342 | *icrp = 0x0d000000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1343 | } |
| 1344 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1345 | /* ------------------------------------------------------------------------- */ |
| 1346 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1347 | #elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1348 | |
| 1349 | /* |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1350 | * Code specific to Coldfire 5230/5231/5232/5234/5235, |
| 1351 | * the 5270/5271/5274/5275 and 5280/5282 setups. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1352 | */ |
| 1353 | static void __inline__ fec_request_intrs(struct net_device *dev) |
| 1354 | { |
| 1355 | struct fec_enet_private *fep; |
| 1356 | int b; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1357 | static const struct idesc { |
| 1358 | char *name; |
| 1359 | unsigned short irq; |
| 1360 | } *idp, id[] = { |
| 1361 | { "fec(TXF)", 23 }, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1362 | { "fec(RXF)", 27 }, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1363 | { "fec(MII)", 29 }, |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1364 | { NULL }, |
| 1365 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | |
| 1367 | fep = netdev_priv(dev); |
| 1368 | b = (fep->index) ? 128 : 64; |
| 1369 | |
| 1370 | /* Setup interrupt handlers. */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1371 | for (idp = id; idp->name; idp++) { |
Greg Ungerer | 0a50477 | 2008-03-04 16:52:01 +1000 | [diff] [blame] | 1372 | if (request_irq(b+idp->irq, fec_enet_interrupt, IRQF_DISABLED, idp->name, dev) != 0) |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1373 | printk("FEC: Could not allocate %s IRQ(%d)!\n", idp->name, b+idp->irq); |
| 1374 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1375 | |
| 1376 | /* Unmask interrupts at ColdFire 5280/5282 interrupt controller */ |
| 1377 | { |
| 1378 | volatile unsigned char *icrp; |
| 1379 | volatile unsigned long *imrp; |
Willson Callan | 83901fc | 2006-06-27 13:13:44 +1000 | [diff] [blame] | 1380 | int i, ilip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1381 | |
| 1382 | b = (fep->index) ? MCFICM_INTC1 : MCFICM_INTC0; |
| 1383 | icrp = (volatile unsigned char *) (MCF_IPSBAR + b + |
| 1384 | MCFINTC_ICR0); |
Willson Callan | 83901fc | 2006-06-27 13:13:44 +1000 | [diff] [blame] | 1385 | for (i = 23, ilip = 0x28; (i < 36); i++) |
| 1386 | icrp[i] = ilip--; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1387 | |
| 1388 | imrp = (volatile unsigned long *) (MCF_IPSBAR + b + |
| 1389 | MCFINTC_IMRH); |
| 1390 | *imrp &= ~0x0000000f; |
| 1391 | imrp = (volatile unsigned long *) (MCF_IPSBAR + b + |
| 1392 | MCFINTC_IMRL); |
| 1393 | *imrp &= ~0xff800001; |
| 1394 | } |
| 1395 | |
| 1396 | #if defined(CONFIG_M528x) |
| 1397 | /* Set up gpio outputs for MII lines */ |
| 1398 | { |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1399 | volatile u16 *gpio_paspar; |
| 1400 | volatile u8 *gpio_pehlpar; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1401 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1402 | gpio_paspar = (volatile u16 *) (MCF_IPSBAR + 0x100056); |
| 1403 | gpio_pehlpar = (volatile u16 *) (MCF_IPSBAR + 0x100058); |
| 1404 | *gpio_paspar |= 0x0f00; |
| 1405 | *gpio_pehlpar = 0xc0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1406 | } |
| 1407 | #endif |
Mike Cruse | b8a94b3 | 2007-07-30 16:29:29 +1000 | [diff] [blame] | 1408 | |
| 1409 | #if defined(CONFIG_M527x) |
| 1410 | /* Set up gpio outputs for MII lines */ |
| 1411 | { |
| 1412 | volatile u8 *gpio_par_fec; |
| 1413 | volatile u16 *gpio_par_feci2c; |
| 1414 | |
| 1415 | gpio_par_feci2c = (volatile u16 *)(MCF_IPSBAR + 0x100082); |
| 1416 | /* Set up gpio outputs for FEC0 MII lines */ |
| 1417 | gpio_par_fec = (volatile u8 *)(MCF_IPSBAR + 0x100078); |
| 1418 | |
| 1419 | *gpio_par_feci2c |= 0x0f00; |
| 1420 | *gpio_par_fec |= 0xc0; |
| 1421 | |
| 1422 | #if defined(CONFIG_FEC2) |
| 1423 | /* Set up gpio outputs for FEC1 MII lines */ |
| 1424 | gpio_par_fec = (volatile u8 *)(MCF_IPSBAR + 0x100079); |
| 1425 | |
| 1426 | *gpio_par_feci2c |= 0x00a0; |
| 1427 | *gpio_par_fec |= 0xc0; |
| 1428 | #endif /* CONFIG_FEC2 */ |
| 1429 | } |
| 1430 | #endif /* CONFIG_M527x */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1431 | } |
| 1432 | |
| 1433 | static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) |
| 1434 | { |
| 1435 | volatile fec_t *fecp; |
| 1436 | |
| 1437 | fecp = fep->hwp; |
| 1438 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; |
| 1439 | fecp->fec_x_cntrl = 0x00; |
| 1440 | |
| 1441 | /* |
| 1442 | * Set MII speed to 2.5 MHz |
| 1443 | * See 5282 manual section 17.5.4.7: MSCR |
| 1444 | */ |
| 1445 | fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2; |
| 1446 | fecp->fec_mii_speed = fep->phy_speed; |
| 1447 | |
| 1448 | fec_restart(dev, 0); |
| 1449 | } |
| 1450 | |
| 1451 | static void __inline__ fec_get_mac(struct net_device *dev) |
| 1452 | { |
| 1453 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1454 | volatile fec_t *fecp; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1455 | unsigned char *iap, tmpaddr[ETH_ALEN]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1456 | |
| 1457 | fecp = fep->hwp; |
| 1458 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1459 | if (FEC_FLASHMAC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1460 | /* |
| 1461 | * Get MAC address from FLASH. |
| 1462 | * If it is all 1's or 0's, use the default. |
| 1463 | */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1464 | iap = FEC_FLASHMAC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1465 | if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && |
| 1466 | (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) |
| 1467 | iap = fec_mac_default; |
| 1468 | if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && |
| 1469 | (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) |
| 1470 | iap = fec_mac_default; |
| 1471 | } else { |
| 1472 | *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; |
| 1473 | *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); |
| 1474 | iap = &tmpaddr[0]; |
| 1475 | } |
| 1476 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1477 | memcpy(dev->dev_addr, iap, ETH_ALEN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1478 | |
| 1479 | /* Adjust MAC if using default MAC address */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1480 | if (iap == fec_mac_default) |
| 1481 | dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1482 | } |
| 1483 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1484 | static void __inline__ fec_disable_phy_intr(void) |
| 1485 | { |
| 1486 | } |
| 1487 | |
| 1488 | static void __inline__ fec_phy_ack_intr(void) |
| 1489 | { |
| 1490 | } |
| 1491 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1492 | /* ------------------------------------------------------------------------- */ |
| 1493 | |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1494 | #elif defined(CONFIG_M520x) |
| 1495 | |
| 1496 | /* |
| 1497 | * Code specific to Coldfire 520x |
| 1498 | */ |
| 1499 | static void __inline__ fec_request_intrs(struct net_device *dev) |
| 1500 | { |
| 1501 | struct fec_enet_private *fep; |
| 1502 | int b; |
| 1503 | static const struct idesc { |
| 1504 | char *name; |
| 1505 | unsigned short irq; |
| 1506 | } *idp, id[] = { |
| 1507 | { "fec(TXF)", 23 }, |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1508 | { "fec(RXF)", 27 }, |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1509 | { "fec(MII)", 29 }, |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1510 | { NULL }, |
| 1511 | }; |
| 1512 | |
| 1513 | fep = netdev_priv(dev); |
| 1514 | b = 64 + 13; |
| 1515 | |
| 1516 | /* Setup interrupt handlers. */ |
| 1517 | for (idp = id; idp->name; idp++) { |
Greg Ungerer | 0a50477 | 2008-03-04 16:52:01 +1000 | [diff] [blame] | 1518 | if (request_irq(b+idp->irq, fec_enet_interrupt, IRQF_DISABLED, idp->name,dev) != 0) |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1519 | printk("FEC: Could not allocate %s IRQ(%d)!\n", idp->name, b+idp->irq); |
| 1520 | } |
| 1521 | |
| 1522 | /* Unmask interrupts at ColdFire interrupt controller */ |
| 1523 | { |
| 1524 | volatile unsigned char *icrp; |
| 1525 | volatile unsigned long *imrp; |
| 1526 | |
| 1527 | icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 + |
| 1528 | MCFINTC_ICR0); |
| 1529 | for (b = 36; (b < 49); b++) |
| 1530 | icrp[b] = 0x04; |
| 1531 | imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + |
| 1532 | MCFINTC_IMRH); |
| 1533 | *imrp &= ~0x0001FFF0; |
| 1534 | } |
| 1535 | *(volatile unsigned char *)(MCF_IPSBAR + MCF_GPIO_PAR_FEC) |= 0xf0; |
| 1536 | *(volatile unsigned char *)(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C) |= 0x0f; |
| 1537 | } |
| 1538 | |
| 1539 | static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) |
| 1540 | { |
| 1541 | volatile fec_t *fecp; |
| 1542 | |
| 1543 | fecp = fep->hwp; |
| 1544 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; |
| 1545 | fecp->fec_x_cntrl = 0x00; |
| 1546 | |
| 1547 | /* |
| 1548 | * Set MII speed to 2.5 MHz |
| 1549 | * See 5282 manual section 17.5.4.7: MSCR |
| 1550 | */ |
| 1551 | fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2; |
| 1552 | fecp->fec_mii_speed = fep->phy_speed; |
| 1553 | |
| 1554 | fec_restart(dev, 0); |
| 1555 | } |
| 1556 | |
| 1557 | static void __inline__ fec_get_mac(struct net_device *dev) |
| 1558 | { |
| 1559 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1560 | volatile fec_t *fecp; |
| 1561 | unsigned char *iap, tmpaddr[ETH_ALEN]; |
| 1562 | |
| 1563 | fecp = fep->hwp; |
| 1564 | |
| 1565 | if (FEC_FLASHMAC) { |
| 1566 | /* |
| 1567 | * Get MAC address from FLASH. |
| 1568 | * If it is all 1's or 0's, use the default. |
| 1569 | */ |
| 1570 | iap = FEC_FLASHMAC; |
| 1571 | if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && |
| 1572 | (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) |
| 1573 | iap = fec_mac_default; |
| 1574 | if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && |
| 1575 | (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) |
| 1576 | iap = fec_mac_default; |
| 1577 | } else { |
| 1578 | *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; |
| 1579 | *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); |
| 1580 | iap = &tmpaddr[0]; |
| 1581 | } |
| 1582 | |
| 1583 | memcpy(dev->dev_addr, iap, ETH_ALEN); |
| 1584 | |
| 1585 | /* Adjust MAC if using default MAC address */ |
| 1586 | if (iap == fec_mac_default) |
| 1587 | dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; |
| 1588 | } |
| 1589 | |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1590 | static void __inline__ fec_disable_phy_intr(void) |
| 1591 | { |
| 1592 | } |
| 1593 | |
| 1594 | static void __inline__ fec_phy_ack_intr(void) |
| 1595 | { |
| 1596 | } |
| 1597 | |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 1598 | /* ------------------------------------------------------------------------- */ |
| 1599 | |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1600 | #elif defined(CONFIG_M532x) |
| 1601 | /* |
| 1602 | * Code specific for M532x |
| 1603 | */ |
| 1604 | static void __inline__ fec_request_intrs(struct net_device *dev) |
| 1605 | { |
| 1606 | struct fec_enet_private *fep; |
| 1607 | int b; |
| 1608 | static const struct idesc { |
| 1609 | char *name; |
| 1610 | unsigned short irq; |
| 1611 | } *idp, id[] = { |
| 1612 | { "fec(TXF)", 36 }, |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1613 | { "fec(RXF)", 40 }, |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1614 | { "fec(MII)", 42 }, |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1615 | { NULL }, |
| 1616 | }; |
| 1617 | |
| 1618 | fep = netdev_priv(dev); |
| 1619 | b = (fep->index) ? 128 : 64; |
| 1620 | |
| 1621 | /* Setup interrupt handlers. */ |
| 1622 | for (idp = id; idp->name; idp++) { |
Greg Ungerer | 0a50477 | 2008-03-04 16:52:01 +1000 | [diff] [blame] | 1623 | if (request_irq(b+idp->irq, fec_enet_interrupt, IRQF_DISABLED, idp->name,dev) != 0) |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1624 | printk("FEC: Could not allocate %s IRQ(%d)!\n", |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1625 | idp->name, b+idp->irq); |
| 1626 | } |
| 1627 | |
| 1628 | /* Unmask interrupts */ |
| 1629 | MCF_INTC0_ICR36 = 0x2; |
| 1630 | MCF_INTC0_ICR37 = 0x2; |
| 1631 | MCF_INTC0_ICR38 = 0x2; |
| 1632 | MCF_INTC0_ICR39 = 0x2; |
| 1633 | MCF_INTC0_ICR40 = 0x2; |
| 1634 | MCF_INTC0_ICR41 = 0x2; |
| 1635 | MCF_INTC0_ICR42 = 0x2; |
| 1636 | MCF_INTC0_ICR43 = 0x2; |
| 1637 | MCF_INTC0_ICR44 = 0x2; |
| 1638 | MCF_INTC0_ICR45 = 0x2; |
| 1639 | MCF_INTC0_ICR46 = 0x2; |
| 1640 | MCF_INTC0_ICR47 = 0x2; |
| 1641 | MCF_INTC0_ICR48 = 0x2; |
| 1642 | |
| 1643 | MCF_INTC0_IMRH &= ~( |
| 1644 | MCF_INTC_IMRH_INT_MASK36 | |
| 1645 | MCF_INTC_IMRH_INT_MASK37 | |
| 1646 | MCF_INTC_IMRH_INT_MASK38 | |
| 1647 | MCF_INTC_IMRH_INT_MASK39 | |
| 1648 | MCF_INTC_IMRH_INT_MASK40 | |
| 1649 | MCF_INTC_IMRH_INT_MASK41 | |
| 1650 | MCF_INTC_IMRH_INT_MASK42 | |
| 1651 | MCF_INTC_IMRH_INT_MASK43 | |
| 1652 | MCF_INTC_IMRH_INT_MASK44 | |
| 1653 | MCF_INTC_IMRH_INT_MASK45 | |
| 1654 | MCF_INTC_IMRH_INT_MASK46 | |
| 1655 | MCF_INTC_IMRH_INT_MASK47 | |
| 1656 | MCF_INTC_IMRH_INT_MASK48 ); |
| 1657 | |
| 1658 | /* Set up gpio outputs for MII lines */ |
| 1659 | MCF_GPIO_PAR_FECI2C |= (0 | |
| 1660 | MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC | |
| 1661 | MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO); |
| 1662 | MCF_GPIO_PAR_FEC = (0 | |
| 1663 | MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC | |
| 1664 | MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC); |
| 1665 | } |
| 1666 | |
| 1667 | static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) |
| 1668 | { |
| 1669 | volatile fec_t *fecp; |
| 1670 | |
| 1671 | fecp = fep->hwp; |
| 1672 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; |
| 1673 | fecp->fec_x_cntrl = 0x00; |
| 1674 | |
| 1675 | /* |
| 1676 | * Set MII speed to 2.5 MHz |
| 1677 | */ |
Matt Waddel | b9d57f94 | 2009-01-13 17:14:20 +1000 | [diff] [blame] | 1678 | fep->phy_speed = (MCF_CLK / 3) / (2500000 * 2 ) * 2; |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1679 | fecp->fec_mii_speed = fep->phy_speed; |
| 1680 | |
| 1681 | fec_restart(dev, 0); |
| 1682 | } |
| 1683 | |
| 1684 | static void __inline__ fec_get_mac(struct net_device *dev) |
| 1685 | { |
| 1686 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1687 | volatile fec_t *fecp; |
| 1688 | unsigned char *iap, tmpaddr[ETH_ALEN]; |
| 1689 | |
| 1690 | fecp = fep->hwp; |
| 1691 | |
| 1692 | if (FEC_FLASHMAC) { |
| 1693 | /* |
| 1694 | * Get MAC address from FLASH. |
| 1695 | * If it is all 1's or 0's, use the default. |
| 1696 | */ |
| 1697 | iap = FEC_FLASHMAC; |
| 1698 | if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && |
| 1699 | (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) |
| 1700 | iap = fec_mac_default; |
| 1701 | if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && |
| 1702 | (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) |
| 1703 | iap = fec_mac_default; |
| 1704 | } else { |
| 1705 | *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; |
| 1706 | *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); |
| 1707 | iap = &tmpaddr[0]; |
| 1708 | } |
| 1709 | |
| 1710 | memcpy(dev->dev_addr, iap, ETH_ALEN); |
| 1711 | |
| 1712 | /* Adjust MAC if using default MAC address */ |
| 1713 | if (iap == fec_mac_default) |
| 1714 | dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; |
| 1715 | } |
| 1716 | |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1717 | static void __inline__ fec_disable_phy_intr(void) |
| 1718 | { |
| 1719 | } |
| 1720 | |
| 1721 | static void __inline__ fec_phy_ack_intr(void) |
| 1722 | { |
| 1723 | } |
| 1724 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1725 | #endif |
| 1726 | |
| 1727 | /* ------------------------------------------------------------------------- */ |
| 1728 | |
| 1729 | static void mii_display_status(struct net_device *dev) |
| 1730 | { |
| 1731 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1732 | volatile uint *s = &(fep->phy_status); |
| 1733 | |
| 1734 | if (!fep->link && !fep->old_link) { |
| 1735 | /* Link is still down - don't print anything */ |
| 1736 | return; |
| 1737 | } |
| 1738 | |
| 1739 | printk("%s: status: ", dev->name); |
| 1740 | |
| 1741 | if (!fep->link) { |
| 1742 | printk("link down"); |
| 1743 | } else { |
| 1744 | printk("link up"); |
| 1745 | |
| 1746 | switch(*s & PHY_STAT_SPMASK) { |
| 1747 | case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break; |
| 1748 | case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break; |
| 1749 | case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break; |
| 1750 | case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break; |
| 1751 | default: |
| 1752 | printk(", Unknown speed/duplex"); |
| 1753 | } |
| 1754 | |
| 1755 | if (*s & PHY_STAT_ANC) |
| 1756 | printk(", auto-negotiation complete"); |
| 1757 | } |
| 1758 | |
| 1759 | if (*s & PHY_STAT_FAULT) |
| 1760 | printk(", remote fault"); |
| 1761 | |
| 1762 | printk(".\n"); |
| 1763 | } |
| 1764 | |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1765 | static void mii_display_config(struct work_struct *work) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1766 | { |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1767 | struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task); |
| 1768 | struct net_device *dev = fep->netdev; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1769 | uint status = fep->phy_status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1770 | |
| 1771 | /* |
| 1772 | ** When we get here, phy_task is already removed from |
| 1773 | ** the workqueue. It is thus safe to allow to reuse it. |
| 1774 | */ |
| 1775 | fep->mii_phy_task_queued = 0; |
| 1776 | printk("%s: config: auto-negotiation ", dev->name); |
| 1777 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1778 | if (status & PHY_CONF_ANE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | printk("on"); |
| 1780 | else |
| 1781 | printk("off"); |
| 1782 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1783 | if (status & PHY_CONF_100FDX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1784 | printk(", 100FDX"); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1785 | if (status & PHY_CONF_100HDX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1786 | printk(", 100HDX"); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1787 | if (status & PHY_CONF_10FDX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1788 | printk(", 10FDX"); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1789 | if (status & PHY_CONF_10HDX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1790 | printk(", 10HDX"); |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1791 | if (!(status & PHY_CONF_SPMASK)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1792 | printk(", No speed/duplex selected?"); |
| 1793 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1794 | if (status & PHY_CONF_LOOP) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1795 | printk(", loopback enabled"); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1796 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1797 | printk(".\n"); |
| 1798 | |
| 1799 | fep->sequence_done = 1; |
| 1800 | } |
| 1801 | |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1802 | static void mii_relink(struct work_struct *work) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1803 | { |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1804 | struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task); |
| 1805 | struct net_device *dev = fep->netdev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1806 | int duplex; |
| 1807 | |
| 1808 | /* |
| 1809 | ** When we get here, phy_task is already removed from |
| 1810 | ** the workqueue. It is thus safe to allow to reuse it. |
| 1811 | */ |
| 1812 | fep->mii_phy_task_queued = 0; |
| 1813 | fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; |
| 1814 | mii_display_status(dev); |
| 1815 | fep->old_link = fep->link; |
| 1816 | |
| 1817 | if (fep->link) { |
| 1818 | duplex = 0; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1819 | if (fep->phy_status |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1820 | & (PHY_STAT_100FDX | PHY_STAT_10FDX)) |
| 1821 | duplex = 1; |
| 1822 | fec_restart(dev, duplex); |
Philippe De Muyter | f909b1e | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 1823 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | fec_stop(dev); |
| 1825 | |
| 1826 | #if 0 |
| 1827 | enable_irq(fep->mii_irq); |
| 1828 | #endif |
| 1829 | |
| 1830 | } |
| 1831 | |
| 1832 | /* mii_queue_relink is called in interrupt context from mii_link_interrupt */ |
| 1833 | static void mii_queue_relink(uint mii_reg, struct net_device *dev) |
| 1834 | { |
| 1835 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1836 | |
| 1837 | /* |
| 1838 | ** We cannot queue phy_task twice in the workqueue. It |
| 1839 | ** would cause an endless loop in the workqueue. |
| 1840 | ** Fortunately, if the last mii_relink entry has not yet been |
| 1841 | ** executed now, it will do the job for the current interrupt, |
| 1842 | ** which is just what we want. |
| 1843 | */ |
| 1844 | if (fep->mii_phy_task_queued) |
| 1845 | return; |
| 1846 | |
| 1847 | fep->mii_phy_task_queued = 1; |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1848 | INIT_WORK(&fep->phy_task, mii_relink); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1849 | schedule_work(&fep->phy_task); |
| 1850 | } |
| 1851 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1852 | /* mii_queue_config is called in interrupt context from fec_enet_mii */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1853 | static void mii_queue_config(uint mii_reg, struct net_device *dev) |
| 1854 | { |
| 1855 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1856 | |
| 1857 | if (fep->mii_phy_task_queued) |
| 1858 | return; |
| 1859 | |
| 1860 | fep->mii_phy_task_queued = 1; |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 1861 | INIT_WORK(&fep->phy_task, mii_display_config); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1862 | schedule_work(&fep->phy_task); |
| 1863 | } |
| 1864 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 1865 | phy_cmd_t const phy_cmd_relink[] = { |
| 1866 | { mk_mii_read(MII_REG_CR), mii_queue_relink }, |
| 1867 | { mk_mii_end, } |
| 1868 | }; |
| 1869 | phy_cmd_t const phy_cmd_config[] = { |
| 1870 | { mk_mii_read(MII_REG_CR), mii_queue_config }, |
| 1871 | { mk_mii_end, } |
| 1872 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1873 | |
| 1874 | /* Read remainder of PHY ID. |
| 1875 | */ |
| 1876 | static void |
| 1877 | mii_discover_phy3(uint mii_reg, struct net_device *dev) |
| 1878 | { |
| 1879 | struct fec_enet_private *fep; |
| 1880 | int i; |
| 1881 | |
| 1882 | fep = netdev_priv(dev); |
| 1883 | fep->phy_id |= (mii_reg & 0xffff); |
| 1884 | printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id); |
| 1885 | |
| 1886 | for(i = 0; phy_info[i]; i++) { |
| 1887 | if(phy_info[i]->id == (fep->phy_id >> 4)) |
| 1888 | break; |
| 1889 | } |
| 1890 | |
| 1891 | if (phy_info[i]) |
| 1892 | printk(" -- %s\n", phy_info[i]->name); |
| 1893 | else |
| 1894 | printk(" -- unknown PHY!\n"); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1895 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1896 | fep->phy = phy_info[i]; |
| 1897 | fep->phy_id_done = 1; |
| 1898 | } |
| 1899 | |
| 1900 | /* Scan all of the MII PHY addresses looking for someone to respond |
| 1901 | * with a valid ID. This usually happens quickly. |
| 1902 | */ |
| 1903 | static void |
| 1904 | mii_discover_phy(uint mii_reg, struct net_device *dev) |
| 1905 | { |
| 1906 | struct fec_enet_private *fep; |
| 1907 | volatile fec_t *fecp; |
| 1908 | uint phytype; |
| 1909 | |
| 1910 | fep = netdev_priv(dev); |
| 1911 | fecp = fep->hwp; |
| 1912 | |
| 1913 | if (fep->phy_addr < 32) { |
| 1914 | if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1915 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1916 | /* Got first part of ID, now get remainder. |
| 1917 | */ |
| 1918 | fep->phy_id = phytype << 16; |
| 1919 | mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), |
| 1920 | mii_discover_phy3); |
Philippe De Muyter | f909b1e | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 1921 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1922 | fep->phy_addr++; |
| 1923 | mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), |
| 1924 | mii_discover_phy); |
| 1925 | } |
| 1926 | } else { |
| 1927 | printk("FEC: No PHY device found.\n"); |
| 1928 | /* Disable external MII interface */ |
| 1929 | fecp->fec_mii_speed = fep->phy_speed = 0; |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 1930 | #ifdef FREC_LEGACY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1931 | fec_disable_phy_intr(); |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 1932 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1933 | } |
| 1934 | } |
| 1935 | |
| 1936 | /* This interrupt occurs when the PHY detects a link change. |
| 1937 | */ |
Sebastian Siewior | c1d9615 | 2008-05-01 14:04:02 +1000 | [diff] [blame] | 1938 | #ifdef HAVE_mii_link_interrupt |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1939 | static irqreturn_t |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1940 | mii_link_interrupt(int irq, void * dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1941 | { |
| 1942 | struct net_device *dev = dev_id; |
| 1943 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1944 | |
| 1945 | fec_phy_ack_intr(); |
| 1946 | |
| 1947 | #if 0 |
| 1948 | disable_irq(fep->mii_irq); /* disable now, enable later */ |
| 1949 | #endif |
| 1950 | |
| 1951 | mii_do_cmd(dev, fep->phy->ack_int); |
| 1952 | mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ |
| 1953 | |
| 1954 | return IRQ_HANDLED; |
| 1955 | } |
Sebastian Siewior | c1d9615 | 2008-05-01 14:04:02 +1000 | [diff] [blame] | 1956 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1957 | |
| 1958 | static int |
| 1959 | fec_enet_open(struct net_device *dev) |
| 1960 | { |
| 1961 | struct fec_enet_private *fep = netdev_priv(dev); |
| 1962 | |
| 1963 | /* I should reset the ring buffers here, but I don't yet know |
| 1964 | * a simple way to do that. |
| 1965 | */ |
| 1966 | fec_set_mac_address(dev); |
| 1967 | |
| 1968 | fep->sequence_done = 0; |
| 1969 | fep->link = 0; |
| 1970 | |
| 1971 | if (fep->phy) { |
| 1972 | mii_do_cmd(dev, fep->phy->ack_int); |
| 1973 | mii_do_cmd(dev, fep->phy->config); |
| 1974 | mii_do_cmd(dev, phy_cmd_config); /* display configuration */ |
| 1975 | |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 1976 | /* Poll until the PHY tells us its configuration |
| 1977 | * (not link state). |
| 1978 | * Request is initiated by mii_do_cmd above, but answer |
| 1979 | * comes by interrupt. |
| 1980 | * This should take about 25 usec per register at 2.5 MHz, |
| 1981 | * and we read approximately 5 registers. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1982 | */ |
| 1983 | while(!fep->sequence_done) |
| 1984 | schedule(); |
| 1985 | |
| 1986 | mii_do_cmd(dev, fep->phy->startup); |
| 1987 | |
| 1988 | /* Set the initial link state to true. A lot of hardware |
| 1989 | * based on this device does not implement a PHY interrupt, |
| 1990 | * so we are never notified of link change. |
| 1991 | */ |
| 1992 | fep->link = 1; |
| 1993 | } else { |
| 1994 | fep->link = 1; /* lets just try it and see */ |
| 1995 | /* no phy, go full duplex, it's most likely a hub chip */ |
| 1996 | fec_restart(dev, 1); |
| 1997 | } |
| 1998 | |
| 1999 | netif_start_queue(dev); |
| 2000 | fep->opened = 1; |
| 2001 | return 0; /* Success */ |
| 2002 | } |
| 2003 | |
| 2004 | static int |
| 2005 | fec_enet_close(struct net_device *dev) |
| 2006 | { |
| 2007 | struct fec_enet_private *fep = netdev_priv(dev); |
| 2008 | |
| 2009 | /* Don't know what to do yet. |
| 2010 | */ |
| 2011 | fep->opened = 0; |
| 2012 | netif_stop_queue(dev); |
| 2013 | fec_stop(dev); |
| 2014 | |
| 2015 | return 0; |
| 2016 | } |
| 2017 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2018 | /* Set or clear the multicast filter for this adaptor. |
| 2019 | * Skeleton taken from sunlance driver. |
| 2020 | * The CPM Ethernet implementation allows Multicast as well as individual |
| 2021 | * MAC address filtering. Some of the drivers check to make sure it is |
| 2022 | * a group multicast address, and discard those that are not. I guess I |
| 2023 | * will do the same for now, but just remove the test if you want |
| 2024 | * individual filtering as well (do the upper net layers want or support |
| 2025 | * this kind of feature?). |
| 2026 | */ |
| 2027 | |
| 2028 | #define HASH_BITS 6 /* #bits in hash */ |
| 2029 | #define CRC32_POLY 0xEDB88320 |
| 2030 | |
| 2031 | static void set_multicast_list(struct net_device *dev) |
| 2032 | { |
| 2033 | struct fec_enet_private *fep; |
| 2034 | volatile fec_t *ep; |
| 2035 | struct dev_mc_list *dmi; |
| 2036 | unsigned int i, j, bit, data, crc; |
| 2037 | unsigned char hash; |
| 2038 | |
| 2039 | fep = netdev_priv(dev); |
| 2040 | ep = fep->hwp; |
| 2041 | |
| 2042 | if (dev->flags&IFF_PROMISC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2043 | ep->fec_r_cntrl |= 0x0008; |
| 2044 | } else { |
| 2045 | |
| 2046 | ep->fec_r_cntrl &= ~0x0008; |
| 2047 | |
| 2048 | if (dev->flags & IFF_ALLMULTI) { |
| 2049 | /* Catch all multicast addresses, so set the |
| 2050 | * filter to all 1's. |
| 2051 | */ |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2052 | ep->fec_grp_hash_table_high = 0xffffffff; |
| 2053 | ep->fec_grp_hash_table_low = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2054 | } else { |
| 2055 | /* Clear filter and add the addresses in hash register. |
| 2056 | */ |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2057 | ep->fec_grp_hash_table_high = 0; |
| 2058 | ep->fec_grp_hash_table_low = 0; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 2059 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2060 | dmi = dev->mc_list; |
| 2061 | |
| 2062 | for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) |
| 2063 | { |
| 2064 | /* Only support group multicast for now. |
| 2065 | */ |
| 2066 | if (!(dmi->dmi_addr[0] & 1)) |
| 2067 | continue; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 2068 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2069 | /* calculate crc32 value of mac address |
| 2070 | */ |
| 2071 | crc = 0xffffffff; |
| 2072 | |
| 2073 | for (i = 0; i < dmi->dmi_addrlen; i++) |
| 2074 | { |
| 2075 | data = dmi->dmi_addr[i]; |
| 2076 | for (bit = 0; bit < 8; bit++, data >>= 1) |
| 2077 | { |
| 2078 | crc = (crc >> 1) ^ |
| 2079 | (((crc ^ data) & 1) ? CRC32_POLY : 0); |
| 2080 | } |
| 2081 | } |
| 2082 | |
| 2083 | /* only upper 6 bits (HASH_BITS) are used |
| 2084 | which point to specific bit in he hash registers |
| 2085 | */ |
| 2086 | hash = (crc >> (32 - HASH_BITS)) & 0x3f; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 2087 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2088 | if (hash > 31) |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2089 | ep->fec_grp_hash_table_high |= 1 << (hash - 32); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2090 | else |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2091 | ep->fec_grp_hash_table_low |= 1 << hash; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2092 | } |
| 2093 | } |
| 2094 | } |
| 2095 | } |
| 2096 | |
| 2097 | /* Set a MAC change in hardware. |
| 2098 | */ |
| 2099 | static void |
| 2100 | fec_set_mac_address(struct net_device *dev) |
| 2101 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2102 | volatile fec_t *fecp; |
| 2103 | |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2104 | fecp = ((struct fec_enet_private *)netdev_priv(dev))->hwp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | |
| 2106 | /* Set station address. */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2107 | fecp->fec_addr_low = dev->dev_addr[3] | (dev->dev_addr[2] << 8) | |
| 2108 | (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24); |
| 2109 | fecp->fec_addr_high = (dev->dev_addr[5] << 16) | |
| 2110 | (dev->dev_addr[4] << 24); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2111 | |
| 2112 | } |
| 2113 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2114 | /* |
| 2115 | * XXX: We need to clean up on failure exits here. |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2116 | * |
| 2117 | * index is only used in legacy code |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2118 | */ |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2119 | int __init fec_enet_init(struct net_device *dev, int index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2120 | { |
| 2121 | struct fec_enet_private *fep = netdev_priv(dev); |
| 2122 | unsigned long mem_addr; |
| 2123 | volatile cbd_t *bdp; |
| 2124 | cbd_t *cbd_base; |
| 2125 | volatile fec_t *fecp; |
| 2126 | int i, j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2127 | |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 2128 | /* Allocate memory for buffer descriptors. |
| 2129 | */ |
Sascha Hauer | 4661e75 | 2009-01-28 23:03:07 +0000 | [diff] [blame] | 2130 | mem_addr = (unsigned long)dma_alloc_coherent(NULL, PAGE_SIZE, |
| 2131 | &fep->bd_dma, GFP_KERNEL); |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 2132 | if (mem_addr == 0) { |
| 2133 | printk("FEC: allocate descriptor memory failed?\n"); |
| 2134 | return -ENOMEM; |
| 2135 | } |
| 2136 | |
Sebastian Siewior | 3b2b74c | 2008-05-01 14:08:12 +1000 | [diff] [blame] | 2137 | spin_lock_init(&fep->hw_lock); |
| 2138 | spin_lock_init(&fep->mii_lock); |
| 2139 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2140 | /* Create an Ethernet device instance. |
| 2141 | */ |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2142 | fecp = (volatile fec_t *)dev->base_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2143 | |
| 2144 | fep->index = index; |
| 2145 | fep->hwp = fecp; |
Greg Ungerer | cb84d6e | 2007-07-30 16:29:09 +1000 | [diff] [blame] | 2146 | fep->netdev = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2147 | |
| 2148 | /* Whack a reset. We should wait for this. |
| 2149 | */ |
| 2150 | fecp->fec_ecntrl = 1; |
| 2151 | udelay(10); |
| 2152 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2153 | /* Set the Ethernet address */ |
| 2154 | #ifdef FEC_LEGACY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2155 | fec_get_mac(dev); |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2156 | #else |
| 2157 | { |
| 2158 | unsigned long l; |
| 2159 | l = fecp->fec_addr_low; |
| 2160 | dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24); |
| 2161 | dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16); |
| 2162 | dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8); |
| 2163 | dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0); |
| 2164 | l = fecp->fec_addr_high; |
| 2165 | dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24); |
| 2166 | dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16); |
| 2167 | } |
| 2168 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2169 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2170 | cbd_base = (cbd_t *)mem_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2171 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2172 | /* Set receive and transmit descriptor base. |
| 2173 | */ |
| 2174 | fep->rx_bd_base = cbd_base; |
| 2175 | fep->tx_bd_base = cbd_base + RX_RING_SIZE; |
| 2176 | |
| 2177 | fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; |
| 2178 | fep->cur_rx = fep->rx_bd_base; |
| 2179 | |
| 2180 | fep->skb_cur = fep->skb_dirty = 0; |
| 2181 | |
| 2182 | /* Initialize the receive buffer descriptors. |
| 2183 | */ |
| 2184 | bdp = fep->rx_bd_base; |
| 2185 | for (i=0; i<FEC_ENET_RX_PAGES; i++) { |
| 2186 | |
| 2187 | /* Allocate a page. |
| 2188 | */ |
| 2189 | mem_addr = __get_free_page(GFP_KERNEL); |
| 2190 | /* XXX: missing check for allocation failure */ |
| 2191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2192 | /* Initialize the BD for every fragment in the page. |
| 2193 | */ |
| 2194 | for (j=0; j<FEC_ENET_RX_FRPPG; j++) { |
| 2195 | bdp->cbd_sc = BD_ENET_RX_EMPTY; |
| 2196 | bdp->cbd_bufaddr = __pa(mem_addr); |
| 2197 | mem_addr += FEC_ENET_RX_FRSIZE; |
| 2198 | bdp++; |
| 2199 | } |
| 2200 | } |
| 2201 | |
| 2202 | /* Set the last buffer to wrap. |
| 2203 | */ |
| 2204 | bdp--; |
| 2205 | bdp->cbd_sc |= BD_SC_WRAP; |
| 2206 | |
| 2207 | /* ...and the same for transmmit. |
| 2208 | */ |
| 2209 | bdp = fep->tx_bd_base; |
| 2210 | for (i=0, j=FEC_ENET_TX_FRPPG; i<TX_RING_SIZE; i++) { |
| 2211 | if (j >= FEC_ENET_TX_FRPPG) { |
| 2212 | mem_addr = __get_free_page(GFP_KERNEL); |
| 2213 | j = 1; |
| 2214 | } else { |
| 2215 | mem_addr += FEC_ENET_TX_FRSIZE; |
| 2216 | j++; |
| 2217 | } |
| 2218 | fep->tx_bounce[i] = (unsigned char *) mem_addr; |
| 2219 | |
| 2220 | /* Initialize the BD for every fragment in the page. |
| 2221 | */ |
| 2222 | bdp->cbd_sc = 0; |
| 2223 | bdp->cbd_bufaddr = 0; |
| 2224 | bdp++; |
| 2225 | } |
| 2226 | |
| 2227 | /* Set the last buffer to wrap. |
| 2228 | */ |
| 2229 | bdp--; |
| 2230 | bdp->cbd_sc |= BD_SC_WRAP; |
| 2231 | |
| 2232 | /* Set receive and transmit descriptor base. |
| 2233 | */ |
Sascha Hauer | 4661e75 | 2009-01-28 23:03:07 +0000 | [diff] [blame] | 2234 | fecp->fec_r_des_start = fep->bd_dma; |
| 2235 | fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t) |
| 2236 | * RX_RING_SIZE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2237 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2238 | #ifdef FEC_LEGACY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2239 | /* Install our interrupt handlers. This varies depending on |
| 2240 | * the architecture. |
| 2241 | */ |
| 2242 | fec_request_intrs(dev); |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2243 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2245 | fecp->fec_grp_hash_table_high = 0; |
| 2246 | fecp->fec_grp_hash_table_low = 0; |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 2247 | fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; |
| 2248 | fecp->fec_ecntrl = 2; |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 2249 | fecp->fec_r_des_active = 0; |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2250 | #ifndef CONFIG_M5272 |
| 2251 | fecp->fec_hash_table_high = 0; |
| 2252 | fecp->fec_hash_table_low = 0; |
| 2253 | #endif |
Greg Ungerer | 562d2f8 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 2254 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2255 | /* The FEC Ethernet specific entries in the device structure. */ |
| 2256 | dev->open = fec_enet_open; |
| 2257 | dev->hard_start_xmit = fec_enet_start_xmit; |
| 2258 | dev->tx_timeout = fec_timeout; |
| 2259 | dev->watchdog_timeo = TX_TIMEOUT; |
| 2260 | dev->stop = fec_enet_close; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2261 | dev->set_multicast_list = set_multicast_list; |
| 2262 | |
| 2263 | for (i=0; i<NMII-1; i++) |
| 2264 | mii_cmds[i].mii_next = &mii_cmds[i+1]; |
| 2265 | mii_free = mii_cmds; |
| 2266 | |
| 2267 | /* setup MII interface */ |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2268 | #ifdef FEC_LEGACY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2269 | fec_set_mii(dev, fep); |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2270 | #else |
| 2271 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; |
| 2272 | fecp->fec_x_cntrl = 0x00; |
| 2273 | |
| 2274 | /* |
| 2275 | * Set MII speed to 2.5 MHz |
| 2276 | */ |
| 2277 | fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999) |
| 2278 | / 2500000) / 2) & 0x3F) << 1; |
| 2279 | fecp->fec_mii_speed = fep->phy_speed; |
| 2280 | fec_restart(dev, 0); |
| 2281 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2282 | |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 2283 | /* Clear and enable interrupts */ |
| 2284 | fecp->fec_ievent = 0xffc00000; |
Greg Ungerer | 398ec92 | 2008-05-01 13:47:09 +1000 | [diff] [blame] | 2285 | fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII); |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 2286 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2287 | /* Queue up command to detect the PHY and initialize the |
| 2288 | * remainder of the interface. |
| 2289 | */ |
| 2290 | fep->phy_id_done = 0; |
| 2291 | fep->phy_addr = 0; |
| 2292 | mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); |
| 2293 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2294 | return 0; |
| 2295 | } |
| 2296 | |
| 2297 | /* This function is called to start or restart the FEC during a link |
| 2298 | * change. This only happens when switching between half and full |
| 2299 | * duplex. |
| 2300 | */ |
| 2301 | static void |
| 2302 | fec_restart(struct net_device *dev, int duplex) |
| 2303 | { |
| 2304 | struct fec_enet_private *fep; |
| 2305 | volatile cbd_t *bdp; |
| 2306 | volatile fec_t *fecp; |
| 2307 | int i; |
| 2308 | |
| 2309 | fep = netdev_priv(dev); |
| 2310 | fecp = fep->hwp; |
| 2311 | |
| 2312 | /* Whack a reset. We should wait for this. |
| 2313 | */ |
| 2314 | fecp->fec_ecntrl = 1; |
| 2315 | udelay(10); |
| 2316 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2317 | /* Clear any outstanding interrupt. |
| 2318 | */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2319 | fecp->fec_ievent = 0xffc00000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2320 | |
| 2321 | /* Set station address. |
| 2322 | */ |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2323 | fec_set_mac_address(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2324 | |
| 2325 | /* Reset all multicast. |
| 2326 | */ |
Greg Ungerer | cc462f7 | 2008-05-01 13:35:34 +1000 | [diff] [blame] | 2327 | fecp->fec_grp_hash_table_high = 0; |
| 2328 | fecp->fec_grp_hash_table_low = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2329 | |
| 2330 | /* Set maximum receive buffer size. |
| 2331 | */ |
| 2332 | fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; |
| 2333 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2334 | /* Set receive and transmit descriptor base. |
| 2335 | */ |
Sascha Hauer | 4661e75 | 2009-01-28 23:03:07 +0000 | [diff] [blame] | 2336 | fecp->fec_r_des_start = fep->bd_dma; |
| 2337 | fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t) |
| 2338 | * RX_RING_SIZE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2339 | |
| 2340 | fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; |
| 2341 | fep->cur_rx = fep->rx_bd_base; |
| 2342 | |
| 2343 | /* Reset SKB transmit buffers. |
| 2344 | */ |
| 2345 | fep->skb_cur = fep->skb_dirty = 0; |
| 2346 | for (i=0; i<=TX_RING_MOD_MASK; i++) { |
| 2347 | if (fep->tx_skbuff[i] != NULL) { |
| 2348 | dev_kfree_skb_any(fep->tx_skbuff[i]); |
| 2349 | fep->tx_skbuff[i] = NULL; |
| 2350 | } |
| 2351 | } |
| 2352 | |
| 2353 | /* Initialize the receive buffer descriptors. |
| 2354 | */ |
| 2355 | bdp = fep->rx_bd_base; |
| 2356 | for (i=0; i<RX_RING_SIZE; i++) { |
| 2357 | |
| 2358 | /* Initialize the BD for every fragment in the page. |
| 2359 | */ |
| 2360 | bdp->cbd_sc = BD_ENET_RX_EMPTY; |
| 2361 | bdp++; |
| 2362 | } |
| 2363 | |
| 2364 | /* Set the last buffer to wrap. |
| 2365 | */ |
| 2366 | bdp--; |
| 2367 | bdp->cbd_sc |= BD_SC_WRAP; |
| 2368 | |
| 2369 | /* ...and the same for transmmit. |
| 2370 | */ |
| 2371 | bdp = fep->tx_bd_base; |
| 2372 | for (i=0; i<TX_RING_SIZE; i++) { |
| 2373 | |
| 2374 | /* Initialize the BD for every fragment in the page. |
| 2375 | */ |
| 2376 | bdp->cbd_sc = 0; |
| 2377 | bdp->cbd_bufaddr = 0; |
| 2378 | bdp++; |
| 2379 | } |
| 2380 | |
| 2381 | /* Set the last buffer to wrap. |
| 2382 | */ |
| 2383 | bdp--; |
| 2384 | bdp->cbd_sc |= BD_SC_WRAP; |
| 2385 | |
| 2386 | /* Enable MII mode. |
| 2387 | */ |
| 2388 | if (duplex) { |
| 2389 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */ |
| 2390 | fecp->fec_x_cntrl = 0x04; /* FD enable */ |
Philippe De Muyter | f909b1e | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 2391 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2392 | /* MII enable|No Rcv on Xmit */ |
| 2393 | fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06; |
| 2394 | fecp->fec_x_cntrl = 0x00; |
| 2395 | } |
| 2396 | fep->full_duplex = duplex; |
| 2397 | |
| 2398 | /* Set MII speed. |
| 2399 | */ |
| 2400 | fecp->fec_mii_speed = fep->phy_speed; |
| 2401 | |
| 2402 | /* And last, enable the transmit and receive processing. |
| 2403 | */ |
| 2404 | fecp->fec_ecntrl = 2; |
Matt Waddel | 6b26529 | 2006-06-27 13:10:56 +1000 | [diff] [blame] | 2405 | fecp->fec_r_des_active = 0; |
| 2406 | |
| 2407 | /* Enable interrupts we wish to service. |
| 2408 | */ |
Greg Ungerer | 398ec92 | 2008-05-01 13:47:09 +1000 | [diff] [blame] | 2409 | fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2410 | } |
| 2411 | |
| 2412 | static void |
| 2413 | fec_stop(struct net_device *dev) |
| 2414 | { |
| 2415 | volatile fec_t *fecp; |
| 2416 | struct fec_enet_private *fep; |
| 2417 | |
| 2418 | fep = netdev_priv(dev); |
| 2419 | fecp = fep->hwp; |
| 2420 | |
Philippe De Muyter | 677177c | 2006-06-27 13:05:33 +1000 | [diff] [blame] | 2421 | /* |
| 2422 | ** We cannot expect a graceful transmit stop without link !!! |
| 2423 | */ |
| 2424 | if (fep->link) |
| 2425 | { |
| 2426 | fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */ |
| 2427 | udelay(10); |
| 2428 | if (!(fecp->fec_ievent & FEC_ENET_GRA)) |
| 2429 | printk("fec_stop : Graceful transmit stop did not complete !\n"); |
| 2430 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2431 | |
| 2432 | /* Whack a reset. We should wait for this. |
| 2433 | */ |
| 2434 | fecp->fec_ecntrl = 1; |
| 2435 | udelay(10); |
| 2436 | |
| 2437 | /* Clear outstanding MII command interrupts. |
| 2438 | */ |
| 2439 | fecp->fec_ievent = FEC_ENET_MII; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2440 | |
| 2441 | fecp->fec_imask = FEC_ENET_MII; |
| 2442 | fecp->fec_mii_speed = fep->phy_speed; |
| 2443 | } |
| 2444 | |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2445 | #ifdef FEC_LEGACY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2446 | static int __init fec_enet_module_init(void) |
| 2447 | { |
| 2448 | struct net_device *dev; |
Sebastian Siewior | c1d9615 | 2008-05-01 14:04:02 +1000 | [diff] [blame] | 2449 | int i, err; |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2450 | |
| 2451 | printk("FEC ENET Version 0.2\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2452 | |
| 2453 | for (i = 0; (i < FEC_MAX_PORTS); i++) { |
| 2454 | dev = alloc_etherdev(sizeof(struct fec_enet_private)); |
| 2455 | if (!dev) |
| 2456 | return -ENOMEM; |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2457 | dev->base_addr = (unsigned long)fec_hw[i]; |
| 2458 | err = fec_enet_init(dev, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | if (err) { |
| 2460 | free_netdev(dev); |
| 2461 | continue; |
| 2462 | } |
| 2463 | if (register_netdev(dev) != 0) { |
| 2464 | /* XXX: missing cleanup here */ |
| 2465 | free_netdev(dev); |
| 2466 | return -EIO; |
| 2467 | } |
Greg Ungerer | 7dd6a2a | 2005-09-12 11:18:10 +1000 | [diff] [blame] | 2468 | |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 2469 | printk("%s: ethernet %pM\n", dev->name, dev->dev_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2470 | } |
| 2471 | return 0; |
| 2472 | } |
Sascha Hauer | ead7318 | 2009-01-28 23:03:11 +0000 | [diff] [blame] | 2473 | #else |
| 2474 | |
| 2475 | static int __devinit |
| 2476 | fec_probe(struct platform_device *pdev) |
| 2477 | { |
| 2478 | struct fec_enet_private *fep; |
| 2479 | struct net_device *ndev; |
| 2480 | int i, irq, ret = 0; |
| 2481 | struct resource *r; |
| 2482 | |
| 2483 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 2484 | if (!r) |
| 2485 | return -ENXIO; |
| 2486 | |
| 2487 | r = request_mem_region(r->start, resource_size(r), pdev->name); |
| 2488 | if (!r) |
| 2489 | return -EBUSY; |
| 2490 | |
| 2491 | /* Init network device */ |
| 2492 | ndev = alloc_etherdev(sizeof(struct fec_enet_private)); |
| 2493 | if (!ndev) |
| 2494 | return -ENOMEM; |
| 2495 | |
| 2496 | SET_NETDEV_DEV(ndev, &pdev->dev); |
| 2497 | |
| 2498 | /* setup board info structure */ |
| 2499 | fep = netdev_priv(ndev); |
| 2500 | memset(fep, 0, sizeof(*fep)); |
| 2501 | |
| 2502 | ndev->base_addr = (unsigned long)ioremap(r->start, resource_size(r)); |
| 2503 | |
| 2504 | if (!ndev->base_addr) { |
| 2505 | ret = -ENOMEM; |
| 2506 | goto failed_ioremap; |
| 2507 | } |
| 2508 | |
| 2509 | platform_set_drvdata(pdev, ndev); |
| 2510 | |
| 2511 | /* This device has up to three irqs on some platforms */ |
| 2512 | for (i = 0; i < 3; i++) { |
| 2513 | irq = platform_get_irq(pdev, i); |
| 2514 | if (i && irq < 0) |
| 2515 | break; |
| 2516 | ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev); |
| 2517 | if (ret) { |
| 2518 | while (i >= 0) { |
| 2519 | irq = platform_get_irq(pdev, i); |
| 2520 | free_irq(irq, ndev); |
| 2521 | i--; |
| 2522 | } |
| 2523 | goto failed_irq; |
| 2524 | } |
| 2525 | } |
| 2526 | |
| 2527 | fep->clk = clk_get(&pdev->dev, "fec_clk"); |
| 2528 | if (IS_ERR(fep->clk)) { |
| 2529 | ret = PTR_ERR(fep->clk); |
| 2530 | goto failed_clk; |
| 2531 | } |
| 2532 | clk_enable(fep->clk); |
| 2533 | |
| 2534 | ret = fec_enet_init(ndev, 0); |
| 2535 | if (ret) |
| 2536 | goto failed_init; |
| 2537 | |
| 2538 | ret = register_netdev(ndev); |
| 2539 | if (ret) |
| 2540 | goto failed_register; |
| 2541 | |
| 2542 | return 0; |
| 2543 | |
| 2544 | failed_register: |
| 2545 | failed_init: |
| 2546 | clk_disable(fep->clk); |
| 2547 | clk_put(fep->clk); |
| 2548 | failed_clk: |
| 2549 | for (i = 0; i < 3; i++) { |
| 2550 | irq = platform_get_irq(pdev, i); |
| 2551 | if (irq > 0) |
| 2552 | free_irq(irq, ndev); |
| 2553 | } |
| 2554 | failed_irq: |
| 2555 | iounmap((void __iomem *)ndev->base_addr); |
| 2556 | failed_ioremap: |
| 2557 | free_netdev(ndev); |
| 2558 | |
| 2559 | return ret; |
| 2560 | } |
| 2561 | |
| 2562 | static int __devexit |
| 2563 | fec_drv_remove(struct platform_device *pdev) |
| 2564 | { |
| 2565 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 2566 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 2567 | |
| 2568 | platform_set_drvdata(pdev, NULL); |
| 2569 | |
| 2570 | fec_stop(ndev); |
| 2571 | clk_disable(fep->clk); |
| 2572 | clk_put(fep->clk); |
| 2573 | iounmap((void __iomem *)ndev->base_addr); |
| 2574 | unregister_netdev(ndev); |
| 2575 | free_netdev(ndev); |
| 2576 | return 0; |
| 2577 | } |
| 2578 | |
| 2579 | static int |
| 2580 | fec_suspend(struct platform_device *dev, pm_message_t state) |
| 2581 | { |
| 2582 | struct net_device *ndev = platform_get_drvdata(dev); |
| 2583 | struct fec_enet_private *fep; |
| 2584 | |
| 2585 | if (ndev) { |
| 2586 | fep = netdev_priv(ndev); |
| 2587 | if (netif_running(ndev)) { |
| 2588 | netif_device_detach(ndev); |
| 2589 | fec_stop(ndev); |
| 2590 | } |
| 2591 | } |
| 2592 | return 0; |
| 2593 | } |
| 2594 | |
| 2595 | static int |
| 2596 | fec_resume(struct platform_device *dev) |
| 2597 | { |
| 2598 | struct net_device *ndev = platform_get_drvdata(dev); |
| 2599 | |
| 2600 | if (ndev) { |
| 2601 | if (netif_running(ndev)) { |
| 2602 | fec_enet_init(ndev, 0); |
| 2603 | netif_device_attach(ndev); |
| 2604 | } |
| 2605 | } |
| 2606 | return 0; |
| 2607 | } |
| 2608 | |
| 2609 | static struct platform_driver fec_driver = { |
| 2610 | .driver = { |
| 2611 | .name = "fec", |
| 2612 | .owner = THIS_MODULE, |
| 2613 | }, |
| 2614 | .probe = fec_probe, |
| 2615 | .remove = __devexit_p(fec_drv_remove), |
| 2616 | .suspend = fec_suspend, |
| 2617 | .resume = fec_resume, |
| 2618 | }; |
| 2619 | |
| 2620 | static int __init |
| 2621 | fec_enet_module_init(void) |
| 2622 | { |
| 2623 | printk(KERN_INFO "FEC Ethernet Driver\n"); |
| 2624 | |
| 2625 | return platform_driver_register(&fec_driver); |
| 2626 | } |
| 2627 | |
| 2628 | static void __exit |
| 2629 | fec_enet_cleanup(void) |
| 2630 | { |
| 2631 | platform_driver_unregister(&fec_driver); |
| 2632 | } |
| 2633 | |
| 2634 | module_exit(fec_enet_cleanup); |
| 2635 | |
| 2636 | #endif /* FEC_LEGACY */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2637 | |
| 2638 | module_init(fec_enet_module_init); |
| 2639 | |
| 2640 | MODULE_LICENSE("GPL"); |