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Sam Bradshaw88523a62011-08-30 08:34:26 -06001/*
2 * mtip32xx.h - Header file for the P320 SSD Block Driver
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MTIP32XX_H__
22#define __MTIP32XX_H__
23
24#include <linux/spinlock.h>
25#include <linux/rwsem.h>
26#include <linux/ata.h>
27#include <linux/interrupt.h>
28#include <linux/genhd.h>
Sam Bradshaw88523a62011-08-30 08:34:26 -060029
30/* Offset of Subsystem Device ID in pci confoguration space */
31#define PCI_SUBSYSTEM_DEVICEID 0x2E
32
33/* offset of Device Control register in PCIe extended capabilites space */
34#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
35
Selvan Mani4453bc82012-09-27 14:36:43 +020036/* check for erase mode support during secure erase */
37#define MTIP_SEC_ERASE_MODE 0x3
38
Asai Thambi S Pc74b0f52012-04-09 08:35:39 +020039/* # of times to retry timed out/failed IOs */
40#define MTIP_MAX_RETRIES 2
Sam Bradshaw88523a62011-08-30 08:34:26 -060041
42/* Various timeout values in ms */
43#define MTIP_NCQ_COMMAND_TIMEOUT_MS 5000
44#define MTIP_IOCTL_COMMAND_TIMEOUT_MS 5000
45#define MTIP_INTERNAL_COMMAND_TIMEOUT_MS 5000
46
47/* check for timeouts every 500ms */
48#define MTIP_TIMEOUT_CHECK_PERIOD 500
49
50/* ftl rebuild */
51#define MTIP_FTL_REBUILD_OFFSET 142
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +010052#define MTIP_FTL_REBUILD_MAGIC 0xED51
Sam Bradshaw88523a62011-08-30 08:34:26 -060053#define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
54
55/* Macro to extract the tag bit number from a tag value. */
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +010056#define MTIP_TAG_BIT(tag) (tag & 0x1F)
Sam Bradshaw88523a62011-08-30 08:34:26 -060057
58/*
59 * Macro to extract the tag index from a tag value. The index
60 * is used to access the correct s_active/Command Issue register based
61 * on the tag value.
62 */
63#define MTIP_TAG_INDEX(tag) (tag >> 5)
64
65/*
66 * Maximum number of scatter gather entries
67 * a single command may have.
68 */
69#define MTIP_MAX_SG 128
70
71/*
72 * Maximum number of slot groups (Command Issue & s_active registers)
73 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
74 */
75#define MTIP_MAX_SLOT_GROUPS 8
76
77/* Internal command tag. */
78#define MTIP_TAG_INTERNAL 0
79
80/* Micron Vendor ID & P320x SSD Device ID */
81#define PCI_VENDOR_ID_MICRON 0x1344
Asai Thambi S P1a131452012-09-05 22:00:38 +053082#define P320H_DEVICE_ID 0x5150
83#define P320M_DEVICE_ID 0x5151
84#define P320S_DEVICE_ID 0x5152
85#define P325M_DEVICE_ID 0x5153
86#define P420H_DEVICE_ID 0x5160
87#define P420M_DEVICE_ID 0x5161
88#define P425M_DEVICE_ID 0x5163
Sam Bradshaw88523a62011-08-30 08:34:26 -060089
90/* Driver name and version strings */
91#define MTIP_DRV_NAME "mtip32xx"
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +010092#define MTIP_DRV_VERSION "1.2.6os3"
Sam Bradshaw88523a62011-08-30 08:34:26 -060093
94/* Maximum number of minor device numbers per device. */
95#define MTIP_MAX_MINORS 16
96
97/* Maximum number of supported command slots. */
98#define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
99
100/*
101 * Per-tag bitfield size in longs.
102 * Linux bit manipulation functions
103 * (i.e. test_and_set_bit, find_next_zero_bit)
104 * manipulate memory in longs, so we try to make the math work.
105 * take the slot groups and find the number of longs, rounding up.
106 * Careful! i386 and x86_64 use different size longs!
107 */
108#define U32_PER_LONG (sizeof(long) / sizeof(u32))
109#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
110 (U32_PER_LONG-1))/U32_PER_LONG)
111
112/* BAR number used to access the HBA registers. */
113#define MTIP_ABAR 5
114
Sam Bradshaw88523a62011-08-30 08:34:26 -0600115#ifdef DEBUG
116 #define dbg_printk(format, arg...) \
117 printk(pr_fmt(format), ##arg);
118#else
119 #define dbg_printk(format, arg...)
120#endif
121
Asai Thambi S P7b421d22012-06-04 12:44:02 -0700122#define MTIP_DFS_MAX_BUF_SIZE 1024
123
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100124#define __force_bit2int (unsigned int __force)
125
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700126enum {
127 /* below are bit numbers in 'flags' defined in mtip_port */
128 MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
129 MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
130 MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
131 MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
132 MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | \
Asai Thambi S Pc74b0f52012-04-09 08:35:39 +0200133 (1 << MTIP_PF_EH_ACTIVE_BIT) | \
134 (1 << MTIP_PF_SE_ACTIVE_BIT) | \
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700135 (1 << MTIP_PF_DM_ACTIVE_BIT)),
Asai Thambi S Pc74b0f52012-04-09 08:35:39 +0200136
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700137 MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
138 MTIP_PF_ISSUE_CMDS_BIT = 5,
139 MTIP_PF_REBUILD_BIT = 6,
140 MTIP_PF_SVC_THD_STOP_BIT = 8,
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100141
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700142 /* below are bit numbers in 'dd_flag' defined in driver_data */
Asai Thambi S P12a166c2012-09-05 22:01:36 +0530143 MTIP_DDF_SEC_LOCK_BIT = 0,
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700144 MTIP_DDF_REMOVE_PENDING_BIT = 1,
145 MTIP_DDF_OVER_TEMP_BIT = 2,
146 MTIP_DDF_WRITE_PROTECT_BIT = 3,
147 MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | \
Asai Thambi S P12a166c2012-09-05 22:01:36 +0530148 (1 << MTIP_DDF_SEC_LOCK_BIT) | \
Asai Thambi S Pc74b0f52012-04-09 08:35:39 +0200149 (1 << MTIP_DDF_OVER_TEMP_BIT) | \
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700150 (1 << MTIP_DDF_WRITE_PROTECT_BIT)),
Asai Thambi S P45038362012-04-09 08:35:38 +0200151
Asai Thambi S P8ce80092012-05-29 18:44:27 -0700152 MTIP_DDF_CLEANUP_BIT = 5,
153 MTIP_DDF_RESUME_BIT = 6,
154 MTIP_DDF_INIT_DONE_BIT = 7,
155 MTIP_DDF_REBUILD_FAILED_BIT = 8,
156};
Asai Thambi S Pf6587212012-04-09 08:35:38 +0200157
158__packed struct smart_attr{
159 u8 attr_id;
160 u16 flags;
161 u8 cur;
162 u8 worst;
163 u32 data;
164 u8 res[3];
165};
166
Sam Bradshaw88523a62011-08-30 08:34:26 -0600167/* Register Frame Information Structure (FIS), host to device. */
168struct host_to_dev_fis {
169 /*
170 * FIS type.
171 * - 27h Register FIS, host to device.
172 * - 34h Register FIS, device to host.
173 * - 39h DMA Activate FIS, device to host.
174 * - 41h DMA Setup FIS, bi-directional.
175 * - 46h Data FIS, bi-directional.
176 * - 58h BIST Activate FIS, bi-directional.
177 * - 5Fh PIO Setup FIS, device to host.
178 * - A1h Set Device Bits FIS, device to host.
179 */
180 unsigned char type;
181 unsigned char opts;
182 unsigned char command;
183 unsigned char features;
184
185 union {
186 unsigned char lba_low;
187 unsigned char sector;
188 };
189 union {
190 unsigned char lba_mid;
191 unsigned char cyl_low;
192 };
193 union {
194 unsigned char lba_hi;
195 unsigned char cyl_hi;
196 };
197 union {
198 unsigned char device;
199 unsigned char head;
200 };
201
202 union {
203 unsigned char lba_low_ex;
204 unsigned char sector_ex;
205 };
206 union {
207 unsigned char lba_mid_ex;
208 unsigned char cyl_low_ex;
209 };
210 union {
211 unsigned char lba_hi_ex;
212 unsigned char cyl_hi_ex;
213 };
214 unsigned char features_ex;
215
216 unsigned char sect_count;
217 unsigned char sect_cnt_ex;
218 unsigned char res2;
219 unsigned char control;
220
221 unsigned int res3;
222};
223
224/* Command header structure. */
225struct mtip_cmd_hdr {
226 /*
227 * Command options.
228 * - Bits 31:16 Number of PRD entries.
229 * - Bits 15:8 Unused in this implementation.
230 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
231 * - Bit 6 Write bit, should be set when writing data to the device.
232 * - Bit 5 Unused in this implementation.
233 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
234 */
235 unsigned int opts;
236 /* This field is unsed when using NCQ. */
237 union {
238 unsigned int byte_count;
239 unsigned int status;
240 };
241 /*
242 * Lower 32 bits of the command table address associated with this
243 * header. The command table addresses must be 128 byte aligned.
244 */
245 unsigned int ctba;
246 /*
247 * If 64 bit addressing is used this field is the upper 32 bits
248 * of the command table address associated with this command.
249 */
250 unsigned int ctbau;
251 /* Reserved and unused. */
252 unsigned int res[4];
253};
254
255/* Command scatter gather structure (PRD). */
256struct mtip_cmd_sg {
257 /*
258 * Low 32 bits of the data buffer address. For P320 this
259 * address must be 8 byte aligned signified by bits 2:0 being
260 * set to 0.
261 */
262 unsigned int dba;
263 /*
264 * When 64 bit addressing is used this field is the upper
265 * 32 bits of the data buffer address.
266 */
267 unsigned int dba_upper;
268 /* Unused. */
269 unsigned int reserved;
270 /*
271 * Bit 31: interrupt when this data block has been transferred.
272 * Bits 30..22: reserved
273 * Bits 21..0: byte count (minus 1). For P320 the byte count must be
274 * 8 byte aligned signified by bits 2:0 being set to 1.
275 */
276 unsigned int info;
277};
278struct mtip_port;
279
280/* Structure used to describe a command. */
281struct mtip_cmd {
282
283 struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
284
285 dma_addr_t command_header_dma; /* corresponding physical address */
286
287 void *command; /* ptr to command table entry */
288
289 dma_addr_t command_dma; /* corresponding physical address */
290
291 void *comp_data; /* data passed to completion function comp_func() */
292 /*
293 * Completion function called by the ISR upon completion of
294 * a command.
295 */
296 void (*comp_func)(struct mtip_port *port,
297 int tag,
298 void *data,
299 int status);
300 /* Additional callback function that may be called by comp_func() */
301 void (*async_callback)(void *data, int status);
302
303 void *async_data; /* Addl. data passed to async_callback() */
304
305 int scatter_ents; /* Number of scatter list entries used */
306
307 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
308
309 int retries; /* The number of retries left for this command. */
310
311 int direction; /* Data transfer direction */
312
313 unsigned long comp_time; /* command completion time, in jiffies */
314
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100315 atomic_t active; /* declares if this command sent to the drive. */
Sam Bradshaw88523a62011-08-30 08:34:26 -0600316};
317
318/* Structure used to describe a port. */
319struct mtip_port {
320 /* Pointer back to the driver data for this port. */
321 struct driver_data *dd;
322 /*
323 * Used to determine if the data pointed to by the
324 * identify field is valid.
325 */
326 unsigned long identify_valid;
327 /* Base address of the memory mapped IO for the port. */
328 void __iomem *mmio;
329 /* Array of pointers to the memory mapped s_active registers. */
330 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100331 /* Array of pointers to the memory mapped completed registers. */
Sam Bradshaw88523a62011-08-30 08:34:26 -0600332 void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
333 /* Array of pointers to the memory mapped Command Issue registers. */
334 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
335 /*
336 * Pointer to the beginning of the command header memory as used
337 * by the driver.
338 */
339 void *command_list;
340 /*
341 * Pointer to the beginning of the command header memory as used
342 * by the DMA.
343 */
344 dma_addr_t command_list_dma;
345 /*
346 * Pointer to the beginning of the RX FIS memory as used
347 * by the driver.
348 */
349 void *rxfis;
350 /*
351 * Pointer to the beginning of the RX FIS memory as used
352 * by the DMA.
353 */
354 dma_addr_t rxfis_dma;
355 /*
356 * Pointer to the beginning of the command table memory as used
357 * by the driver.
358 */
359 void *command_table;
360 /*
361 * Pointer to the beginning of the command table memory as used
362 * by the DMA.
363 */
364 dma_addr_t command_tbl_dma;
365 /*
366 * Pointer to the beginning of the identify data memory as used
367 * by the driver.
368 */
369 u16 *identify;
370 /*
371 * Pointer to the beginning of the identify data memory as used
372 * by the DMA.
373 */
374 dma_addr_t identify_dma;
375 /*
376 * Pointer to the beginning of a sector buffer that is used
377 * by the driver when issuing internal commands.
378 */
379 u16 *sector_buffer;
380 /*
381 * Pointer to the beginning of a sector buffer that is used
382 * by the DMA when the driver issues internal commands.
383 */
384 dma_addr_t sector_buffer_dma;
385 /*
386 * Bit significant, used to determine if a command slot has
387 * been allocated. i.e. the slot is in use. Bits are cleared
388 * when the command slot and all associated data structures
389 * are no longer needed.
390 */
Asai Thambi S Pf6587212012-04-09 08:35:38 +0200391 u16 *log_buf;
392 dma_addr_t log_buf_dma;
393
394 u8 *smart_buf;
395 dma_addr_t smart_buf_dma;
396
Sam Bradshaw88523a62011-08-30 08:34:26 -0600397 unsigned long allocated[SLOTBITS_IN_LONGS];
398 /*
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100399 * used to queue commands when an internal command is in progress
400 * or error handling is active
401 */
402 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
403 /*
Sam Bradshaw88523a62011-08-30 08:34:26 -0600404 * Array of command slots. Structure includes pointers to the
405 * command header and command table, and completion function and data
406 * pointers.
407 */
408 struct mtip_cmd commands[MTIP_MAX_COMMAND_SLOTS];
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100409 /* Used by mtip_service_thread to wait for an event */
410 wait_queue_head_t svc_wait;
411 /*
412 * indicates the state of the port. Also, helps the service thread
413 * to determine its action on wake up.
414 */
415 unsigned long flags;
Sam Bradshaw88523a62011-08-30 08:34:26 -0600416 /*
417 * Timer used to complete commands that have been active for too long.
418 */
419 struct timer_list cmd_timer;
Asai Thambi S Pc74b0f52012-04-09 08:35:39 +0200420 unsigned long ic_pause_timer;
Sam Bradshaw88523a62011-08-30 08:34:26 -0600421 /*
422 * Semaphore used to block threads if there are no
423 * command slots available.
424 */
425 struct semaphore cmd_slot;
426 /* Spinlock for working around command-issue bug. */
427 spinlock_t cmd_issue_lock;
428};
429
430/*
431 * Driver private data structure.
432 *
433 * One structure is allocated per probed device.
434 */
435struct driver_data {
436 void __iomem *mmio; /* Base address of the HBA registers. */
437
438 int major; /* Major device number. */
439
440 int instance; /* Instance number. First device probed is 0, ... */
441
Sam Bradshaw88523a62011-08-30 08:34:26 -0600442 struct gendisk *disk; /* Pointer to our gendisk structure. */
443
444 struct pci_dev *pdev; /* Pointer to the PCI device structure. */
445
446 struct request_queue *queue; /* Our request queue. */
Sam Bradshaw88523a62011-08-30 08:34:26 -0600447
448 struct mtip_port *port; /* Pointer to the port data structure. */
449
450 /* Tasklet used to process the bottom half of the ISR. */
451 struct tasklet_struct tasklet;
452
453 unsigned product_type; /* magic value declaring the product type */
454
455 unsigned slot_groups; /* number of slot groups the product supports */
456
Sam Bradshaw88523a62011-08-30 08:34:26 -0600457 unsigned long index; /* Index to determine the disk name */
458
Asai Thambi S P45038362012-04-09 08:35:38 +0200459 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
Sam Bradshaw88523a62011-08-30 08:34:26 -0600460
Asai Thambi S P60ec0ee2011-11-23 08:29:24 +0100461 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
Asai Thambi S P7b421d22012-06-04 12:44:02 -0700462
463 struct dentry *dfs_node;
Sam Bradshaw88523a62011-08-30 08:34:26 -0600464};
465
Sam Bradshaw88523a62011-08-30 08:34:26 -0600466#endif