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David Brownell4c203862007-02-12 00:53:11 -08001GPIO Interfaces
2
3This provides an overview of GPIO access conventions on Linux.
4
David Brownell7560fa62008-03-04 14:28:27 -08005These calls use the gpio_* naming prefix. No other calls should use that
6prefix, or the related __gpio_* prefix.
7
David Brownell4c203862007-02-12 00:53:11 -08008
9What is a GPIO?
10===============
11A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
12digital signal. They are provided from many kinds of chip, and are familiar
13to Linux developers working with embedded and custom hardware. Each GPIO
14represents a bit connected to a particular pin, or "ball" on Ball Grid Array
15(BGA) packages. Board schematics show which external hardware connects to
16which GPIOs. Drivers can be written generically, so that board setup code
17passes such pin configuration data to drivers.
18
19System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
20non-dedicated pin can be configured as a GPIO; and most chips have at least
21several dozen of them. Programmable logic devices (like FPGAs) can easily
22provide GPIOs; multifunction chips like power managers, and audio codecs
23often have a few such pins to help with pin scarcity on SOCs; and there are
24also "GPIO Expander" chips that connect using the I2C or SPI serial busses.
25Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
26firmware knowing how they're used).
27
28The exact capabilities of GPIOs vary between systems. Common options:
29
30 - Output values are writable (high=1, low=0). Some chips also have
31 options about how that value is driven, so that for example only one
32 value might be driven ... supporting "wire-OR" and similar schemes
David Brownell1668be72007-04-11 23:28:42 -070033 for the other value (notably, "open drain" signaling).
David Brownell4c203862007-02-12 00:53:11 -080034
35 - Input values are likewise readable (1, 0). Some chips support readback
36 of pins configured as "output", which is very useful in such "wire-OR"
37 cases (to support bidirectional signaling). GPIO controllers may have
David Brownell7c2db752008-02-04 22:28:21 -080038 input de-glitch/debounce logic, sometimes with software controls.
David Brownell4c203862007-02-12 00:53:11 -080039
40 - Inputs can often be used as IRQ signals, often edge triggered but
41 sometimes level triggered. Such IRQs may be configurable as system
42 wakeup events, to wake the system from a low power state.
43
44 - Usually a GPIO will be configurable as either input or output, as needed
45 by different product boards; single direction ones exist too.
46
47 - Most GPIOs can be accessed while holding spinlocks, but those accessed
48 through a serial bus normally can't. Some systems support both types.
49
50On a given board each GPIO is used for one specific purpose like monitoring
51MMC/SD card insertion/removal, detecting card writeprotect status, driving
52a LED, configuring a transceiver, bitbanging a serial bus, poking a hardware
53watchdog, sensing a switch, and so on.
54
55
56GPIO conventions
57================
58Note that this is called a "convention" because you don't need to do it this
59way, and it's no crime if you don't. There **are** cases where portability
60is not the main issue; GPIOs are often used for the kind of board-specific
61glue logic that may even change between board revisions, and can't ever be
62used on a board that's wired differently. Only least-common-denominator
63functionality can be very portable. Other features are platform-specific,
64and that can be critical for glue logic.
65
David Brownell7c2db752008-02-04 22:28:21 -080066Plus, this doesn't require any implementation framework, just an interface.
David Brownell4c203862007-02-12 00:53:11 -080067One platform might implement it as simple inline functions accessing chip
68registers; another might implement it by delegating through abstractions
David Brownell7c2db752008-02-04 22:28:21 -080069used for several very different kinds of GPIO controller. (There is some
70optional code supporting such an implementation strategy, described later
71in this document, but drivers acting as clients to the GPIO interface must
72not care how it's implemented.)
David Brownell4c203862007-02-12 00:53:11 -080073
74That said, if the convention is supported on their platform, drivers should
David Brownell7560fa62008-03-04 14:28:27 -080075use it when possible. Platforms must declare GENERIC_GPIO support in their
76Kconfig (boolean true), and provide an <asm/gpio.h> file. Drivers that can't
77work without standard GPIO calls should have Kconfig entries which depend
78on GENERIC_GPIO. The GPIO calls are available, either as "real code" or as
79optimized-away stubs, when drivers use the include file:
David Brownell4c203862007-02-12 00:53:11 -080080
David Brownell7560fa62008-03-04 14:28:27 -080081 #include <linux/gpio.h>
David Brownell4c203862007-02-12 00:53:11 -080082
83If you stick to this convention then it'll be easier for other developers to
84see what your code is doing, and help maintain it.
85
David Brownella0a99832007-07-19 01:47:52 -070086Note that these operations include I/O barriers on platforms which need to
87use them; drivers don't need to add them explicitly.
88
David Brownell4c203862007-02-12 00:53:11 -080089
90Identifying GPIOs
91-----------------
92GPIOs are identified by unsigned integers in the range 0..MAX_INT. That
93reserves "negative" numbers for other purposes like marking signals as
David Brownellf5de6112007-02-16 01:27:14 -080094"not available on this board", or indicating faults. Code that doesn't
95touch the underlying hardware treats these integers as opaque cookies.
David Brownell4c203862007-02-12 00:53:11 -080096
97Platforms define how they use those integers, and usually #define symbols
98for the GPIO lines so that board-specific setup code directly corresponds
99to the relevant schematics. In contrast, drivers should only use GPIO
100numbers passed to them from that setup code, using platform_data to hold
101board-specific pin configuration data (along with other board specific
102data they need). That avoids portability problems.
103
104So for example one platform uses numbers 32-159 for GPIOs; while another
105uses numbers 0..63 with one set of GPIO controllers, 64-79 with another
106type of GPIO controller, and on one particular board 80-95 with an FPGA.
107The numbers need not be contiguous; either of those platforms could also
108use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders.
109
Guennadi Liakhovetskie6de1802008-04-28 02:14:46 -0700110If you want to initialize a structure with an invalid GPIO number, use
111some negative number (perhaps "-EINVAL"); that will never be valid. To
David Brownellc9561262010-09-09 16:38:03 -0700112test if such number from such a structure could reference a GPIO, you
113may use this predicate:
Guennadi Liakhovetskie6de1802008-04-28 02:14:46 -0700114
115 int gpio_is_valid(int number);
116
117A number that's not valid will be rejected by calls which may request
118or free GPIOs (see below). Other numbers may also be rejected; for
David Brownellc9561262010-09-09 16:38:03 -0700119example, a number might be valid but temporarily unused on a given board.
Guennadi Liakhovetskie6de1802008-04-28 02:14:46 -0700120
David Brownellc9561262010-09-09 16:38:03 -0700121Whether a platform supports multiple GPIO controllers is a platform-specific
122implementation issue, as are whether that support can leave "holes" in the space
123of GPIO numbers, and whether new controllers can be added at runtime. Such issues
124can affect things including whether adjacent GPIO numbers are both valid.
David Brownell4c203862007-02-12 00:53:11 -0800125
126Using GPIOs
127-----------
David Brownell8a0cecf2009-04-02 16:57:06 -0700128The first thing a system should do with a GPIO is allocate it, using
129the gpio_request() call; see later.
130
131One of the next things to do with a GPIO, often in board setup code when
David Brownell4c203862007-02-12 00:53:11 -0800132setting up a platform_device using the GPIO, is mark its direction:
133
134 /* set as input or output, returning 0 or negative errno */
135 int gpio_direction_input(unsigned gpio);
David Brownell28735a72007-03-16 13:38:14 -0800136 int gpio_direction_output(unsigned gpio, int value);
David Brownell4c203862007-02-12 00:53:11 -0800137
Linus Torvaldsd8a35152011-01-13 17:26:46 -0800138The return value is zero for success, else a negative errno. It should
David Brownell4c203862007-02-12 00:53:11 -0800139be checked, since the get/set calls don't have error returns and since
David Brownell83c65902007-05-16 22:11:13 -0700140misconfiguration is possible. You should normally issue these calls from
141a task context. However, for spinlock-safe GPIOs it's OK to use them
142before tasking is enabled, as part of early board setup.
David Brownell4c203862007-02-12 00:53:11 -0800143
David Brownell28735a72007-03-16 13:38:14 -0800144For output GPIOs, the value provided becomes the initial output value.
145This helps avoid signal glitching during system startup.
146
David Brownell7c2db752008-02-04 22:28:21 -0800147For compatibility with legacy interfaces to GPIOs, setting the direction
148of a GPIO implicitly requests that GPIO (see below) if it has not been
David Brownell8a0cecf2009-04-02 16:57:06 -0700149requested already. That compatibility is being removed from the optional
150gpiolib framework.
David Brownell7c2db752008-02-04 22:28:21 -0800151
David Brownell4c203862007-02-12 00:53:11 -0800152Setting the direction can fail if the GPIO number is invalid, or when
153that particular GPIO can't be used in that mode. It's generally a bad
154idea to rely on boot firmware to have set the direction correctly, since
155it probably wasn't validated to do more than boot Linux. (Similarly,
156that board setup code probably needs to multiplex that pin as a GPIO,
157and configure pullups/pulldowns appropriately.)
158
159
160Spinlock-Safe GPIO access
161-------------------------
162Most GPIO controllers can be accessed with memory read/write instructions.
David Brownell9c4ba942010-08-10 18:02:24 -0700163Those don't need to sleep, and can safely be done from inside hard
164(nonthreaded) IRQ handlers and similar contexts.
David Brownell4c203862007-02-12 00:53:11 -0800165
David Brownell9c4ba942010-08-10 18:02:24 -0700166Use the following calls to access such GPIOs,
167for which gpio_cansleep() will always return false (see below):
David Brownell4c203862007-02-12 00:53:11 -0800168
169 /* GPIO INPUT: return zero or nonzero */
170 int gpio_get_value(unsigned gpio);
171
172 /* GPIO OUTPUT */
173 void gpio_set_value(unsigned gpio, int value);
174
175The values are boolean, zero for low, nonzero for high. When reading the
176value of an output pin, the value returned should be what's seen on the
177pin ... that won't always match the specified output value, because of
David Brownell7c2db752008-02-04 22:28:21 -0800178issues including open-drain signaling and output latencies.
David Brownell4c203862007-02-12 00:53:11 -0800179
180The get/set calls have no error returns because "invalid GPIO" should have
David Brownellbe1ff382007-07-23 18:43:57 -0700181been reported earlier from gpio_direction_*(). However, note that not all
David Brownell4c203862007-02-12 00:53:11 -0800182platforms can read the value of output pins; those that can't should always
David Brownellf5de6112007-02-16 01:27:14 -0800183return zero. Also, using these calls for GPIOs that can't safely be accessed
184without sleeping (see below) is an error.
David Brownell4c203862007-02-12 00:53:11 -0800185
David Brownellf5de6112007-02-16 01:27:14 -0800186Platform-specific implementations are encouraged to optimize the two
David Brownell4c203862007-02-12 00:53:11 -0800187calls to access the GPIO value in cases where the GPIO number (and for
188output, value) are constant. It's normal for them to need only a couple
189of instructions in such cases (reading or writing a hardware register),
190and not to need spinlocks. Such optimized calls can make bitbanging
191applications a lot more efficient (in both space and time) than spending
192dozens of instructions on subroutine calls.
193
194
195GPIO access that may sleep
196--------------------------
197Some GPIO controllers must be accessed using message based busses like I2C
198or SPI. Commands to read or write those GPIO values require waiting to
199get to the head of a queue to transmit a command and get its response.
200This requires sleeping, which can't be done from inside IRQ handlers.
201
202Platforms that support this type of GPIO distinguish them from other GPIOs
David Brownell7c2db752008-02-04 22:28:21 -0800203by returning nonzero from this call (which requires a valid GPIO number,
David Brownell8a0cecf2009-04-02 16:57:06 -0700204which should have been previously allocated with gpio_request):
David Brownell4c203862007-02-12 00:53:11 -0800205
206 int gpio_cansleep(unsigned gpio);
207
208To access such GPIOs, a different set of accessors is defined:
209
210 /* GPIO INPUT: return zero or nonzero, might sleep */
211 int gpio_get_value_cansleep(unsigned gpio);
212
213 /* GPIO OUTPUT, might sleep */
214 void gpio_set_value_cansleep(unsigned gpio, int value);
215
David Brownell9c4ba942010-08-10 18:02:24 -0700216
217Accessing such GPIOs requires a context which may sleep, for example
218a threaded IRQ handler, and those accessors must be used instead of
219spinlock-safe accessors without the cansleep() name suffix.
220
221Other than the fact that these accessors might sleep, and will work
222on GPIOs that can't be accessed from hardIRQ handlers, these calls act
223the same as the spinlock-safe calls.
224
225 ** IN ADDITION ** calls to setup and configure such GPIOs must be made
226from contexts which may sleep, since they may need to access the GPIO
227controller chip too: (These setup calls are usually made from board
228setup or driver probe/teardown code, so this is an easy constraint.)
229
230 gpio_direction_input()
231 gpio_direction_output()
232 gpio_request()
233
234## gpio_request_one()
235## gpio_request_array()
236## gpio_free_array()
237
238 gpio_free()
239 gpio_set_debounce()
240
David Brownell4c203862007-02-12 00:53:11 -0800241
242
David Brownell8a0cecf2009-04-02 16:57:06 -0700243Claiming and Releasing GPIOs
244----------------------------
David Brownell4c203862007-02-12 00:53:11 -0800245To help catch system configuration errors, two calls are defined.
David Brownell4c203862007-02-12 00:53:11 -0800246
247 /* request GPIO, returning 0 or negative errno.
248 * non-null labels may be useful for diagnostics.
249 */
250 int gpio_request(unsigned gpio, const char *label);
251
252 /* release previously-claimed GPIO */
253 void gpio_free(unsigned gpio);
254
255Passing invalid GPIO numbers to gpio_request() will fail, as will requesting
256GPIOs that have already been claimed with that call. The return value of
David Brownell83c65902007-05-16 22:11:13 -0700257gpio_request() must be checked. You should normally issue these calls from
258a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs
259before tasking is enabled, as part of early board setup.
David Brownell4c203862007-02-12 00:53:11 -0800260
261These calls serve two basic purposes. One is marking the signals which
262are actually in use as GPIOs, for better diagnostics; systems may have
263several hundred potential GPIOs, but often only a dozen are used on any
David Brownell7c2db752008-02-04 22:28:21 -0800264given board. Another is to catch conflicts, identifying errors when
265(a) two or more drivers wrongly think they have exclusive use of that
266signal, or (b) something wrongly believes it's safe to remove drivers
267needed to manage a signal that's in active use. That is, requesting a
268GPIO can serve as a kind of lock.
David Brownell4c203862007-02-12 00:53:11 -0800269
David Brownell35e8bb52008-10-15 22:03:16 -0700270Some platforms may also use knowledge about what GPIOs are active for
271power management, such as by powering down unused chip sectors and, more
272easily, gating off unused clocks.
273
Stephen Warren0dc665d2012-03-05 17:22:14 -0700274For GPIOs that use pins known to the pinctrl subsystem, that subsystem should
275be informed of their use; a gpiolib driver's .request() operation may call
276pinctrl_request_gpio(), and a gpiolib driver's .free() operation may call
277pinctrl_free_gpio(). The pinctrl subsystem allows a pinctrl_request_gpio()
278to succeed concurrently with a pin or pingroup being "owned" by a device for
279pin multiplexing.
280
281Any programming of pin multiplexing hardware that is needed to route the
282GPIO signal to the appropriate pin should occur within a GPIO driver's
283.direction_input() or .direction_output() operations, and occur after any
284setup of an output GPIO's value. This allows a glitch-free migration from a
285pin's special function to GPIO. This is sometimes required when using a GPIO
286to implement a workaround on signals typically driven by a non-GPIO HW block.
287
288Some platforms allow some or all GPIO signals to be routed to different pins.
289Similarly, other aspects of the GPIO or pin may need to be configured, such as
290pullup/pulldown. Platform software should arrange that any such details are
291configured prior to gpio_request() being called for those GPIOs, e.g. using
292the pinctrl subsystem's mapping table, so that GPIO users need not be aware
293of these details.
David Brownell4c203862007-02-12 00:53:11 -0800294
David Brownell7c2db752008-02-04 22:28:21 -0800295Also note that it's your responsibility to have stopped using a GPIO
296before you free it.
297
Eric Miao3e45f1d2010-03-05 13:44:35 -0800298Considering in most cases GPIOs are actually configured right after they
299are claimed, three additional calls are defined:
300
301 /* request a single GPIO, with initial configuration specified by
302 * 'flags', identical to gpio_request() wrt other arguments and
303 * return value
304 */
305 int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
306
307 /* request multiple GPIOs in a single call
308 */
309 int gpio_request_array(struct gpio *array, size_t num);
310
311 /* release multiple GPIOs in a single call
312 */
313 void gpio_free_array(struct gpio *array, size_t num);
314
315where 'flags' is currently defined to specify the following properties:
316
317 * GPIOF_DIR_IN - to configure direction as input
318 * GPIOF_DIR_OUT - to configure direction as output
319
320 * GPIOF_INIT_LOW - as output, set initial level to LOW
321 * GPIOF_INIT_HIGH - as output, set initial level to HIGH
Laxman Dewangan3d2ddfd2012-02-17 20:26:20 +0530322 * GPIOF_OPEN_DRAIN - gpio pin is open drain type.
323 * GPIOF_OPEN_SOURCE - gpio pin is open source type.
Eric Miao3e45f1d2010-03-05 13:44:35 -0800324
Wolfram Sangfc3a1f02011-12-13 18:34:01 +0100325 * GPIOF_EXPORT_DIR_FIXED - export gpio to sysfs, keep direction
326 * GPIOF_EXPORT_DIR_CHANGEABLE - also export, allow changing direction
327
Eric Miao3e45f1d2010-03-05 13:44:35 -0800328since GPIOF_INIT_* are only valid when configured as output, so group valid
329combinations as:
330
331 * GPIOF_IN - configure as input
332 * GPIOF_OUT_INIT_LOW - configured as output, initial level LOW
333 * GPIOF_OUT_INIT_HIGH - configured as output, initial level HIGH
334
Laxman Dewangan3d2ddfd2012-02-17 20:26:20 +0530335When setting the flag as GPIOF_OPEN_DRAIN then it will assume that pins is
336open drain type. Such pins will not be driven to 1 in output mode. It is
337require to connect pull-up on such pins. By enabling this flag, gpio lib will
338make the direction to input when it is asked to set value of 1 in output mode
339to make the pin HIGH. The pin is make to LOW by driving value 0 in output mode.
340
341When setting the flag as GPIOF_OPEN_SOURCE then it will assume that pins is
342open source type. Such pins will not be driven to 0 in output mode. It is
343require to connect pull-down on such pin. By enabling this flag, gpio lib will
344make the direction to input when it is asked to set value of 0 in output mode
345to make the pin LOW. The pin is make to HIGH by driving value 1 in output mode.
346
347In the future, these flags can be extended to support more properties.
Eric Miao3e45f1d2010-03-05 13:44:35 -0800348
349Further more, to ease the claim/release of multiple GPIOs, 'struct gpio' is
350introduced to encapsulate all three fields as:
351
352 struct gpio {
353 unsigned gpio;
354 unsigned long flags;
355 const char *label;
356 };
357
358A typical example of usage:
359
360 static struct gpio leds_gpios[] = {
361 { 32, GPIOF_OUT_INIT_HIGH, "Power LED" }, /* default to ON */
362 { 33, GPIOF_OUT_INIT_LOW, "Green LED" }, /* default to OFF */
363 { 34, GPIOF_OUT_INIT_LOW, "Red LED" }, /* default to OFF */
364 { 35, GPIOF_OUT_INIT_LOW, "Blue LED" }, /* default to OFF */
365 { ... },
366 };
367
368 err = gpio_request_one(31, GPIOF_IN, "Reset Button");
369 if (err)
370 ...
371
372 err = gpio_request_array(leds_gpios, ARRAY_SIZE(leds_gpios));
373 if (err)
374 ...
375
376 gpio_free_array(leds_gpios, ARRAY_SIZE(leds_gpios));
377
David Brownell4c203862007-02-12 00:53:11 -0800378
379GPIOs mapped to IRQs
380--------------------
381GPIO numbers are unsigned integers; so are IRQ numbers. These make up
382two logically distinct namespaces (GPIO 0 need not use IRQ 0). You can
383map between them using calls like:
384
385 /* map GPIO numbers to IRQ numbers */
386 int gpio_to_irq(unsigned gpio);
387
David Brownell0f6d5042008-10-15 22:03:14 -0700388 /* map IRQ numbers to GPIO numbers (avoid using this) */
David Brownell4c203862007-02-12 00:53:11 -0800389 int irq_to_gpio(unsigned irq);
390
391Those return either the corresponding number in the other namespace, or
392else a negative errno code if the mapping can't be done. (For example,
David Brownell7c2db752008-02-04 22:28:21 -0800393some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO
David Brownellbe1ff382007-07-23 18:43:57 -0700394number that wasn't set up as an input using gpio_direction_input(), or
David Brownell4c203862007-02-12 00:53:11 -0800395to use an IRQ number that didn't originally come from gpio_to_irq().
396
397These two mapping calls are expected to cost on the order of a single
398addition or subtraction. They're not allowed to sleep.
399
400Non-error values returned from gpio_to_irq() can be passed to request_irq()
401or free_irq(). They will often be stored into IRQ resources for platform
402devices, by the board-specific initialization code. Note that IRQ trigger
403options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are
404system wakeup capabilities.
405
406Non-error values returned from irq_to_gpio() would most commonly be used
David Brownellf5de6112007-02-16 01:27:14 -0800407with gpio_get_value(), for example to initialize or update driver state
David Brownell0f6d5042008-10-15 22:03:14 -0700408when the IRQ is edge-triggered. Note that some platforms don't support
409this reverse mapping, so you should avoid using it.
David Brownell4c203862007-02-12 00:53:11 -0800410
411
David Brownell1668be72007-04-11 23:28:42 -0700412Emulating Open Drain Signals
413----------------------------
414Sometimes shared signals need to use "open drain" signaling, where only the
415low signal level is actually driven. (That term applies to CMOS transistors;
416"open collector" is used for TTL.) A pullup resistor causes the high signal
417level. This is sometimes called a "wire-AND"; or more practically, from the
418negative logic (low=true) perspective this is a "wire-OR".
419
420One common example of an open drain signal is a shared active-low IRQ line.
421Also, bidirectional data bus signals sometimes use open drain signals.
422
423Some GPIO controllers directly support open drain outputs; many don't. When
424you need open drain signaling but your hardware doesn't directly support it,
425there's a common idiom you can use to emulate it with any GPIO pin that can
426be used as either an input or an output:
427
428 LOW: gpio_direction_output(gpio, 0) ... this drives the signal
429 and overrides the pullup.
430
431 HIGH: gpio_direction_input(gpio) ... this turns off the output,
432 so the pullup (or some other device) controls the signal.
433
434If you are "driving" the signal high but gpio_get_value(gpio) reports a low
435value (after the appropriate rise time passes), you know some other component
436is driving the shared signal low. That's not necessarily an error. As one
437common example, that's how I2C clocks are stretched: a slave that needs a
438slower clock delays the rising edge of SCK, and the I2C master adjusts its
439signaling rate accordingly.
440
David Brownell4c203862007-02-12 00:53:11 -0800441
Shiraz Hashimf23f1512012-10-27 15:21:36 +0530442GPIO controllers and the pinctrl subsystem
443------------------------------------------
444
445A GPIO controller on a SOC might be tightly coupled with the pinctrl
446subsystem, in the sense that the pins can be used by other functions
447together with an optional gpio feature. We have already covered the
448case where e.g. a GPIO controller need to reserve a pin or set the
449direction of a pin by calling any of:
450
451pinctrl_request_gpio()
452pinctrl_free_gpio()
453pinctrl_gpio_direction_input()
454pinctrl_gpio_direction_output()
455
456But how does the pin control subsystem cross-correlate the GPIO
457numbers (which are a global business) to a certain pin on a certain
458pin controller?
459
460This is done by registering "ranges" of pins, which are essentially
461cross-reference tables. These are described in
462Documentation/pinctrl.txt
463
464While the pin allocation is totally managed by the pinctrl subsystem,
465gpio (under gpiolib) is still maintained by gpio drivers. It may happen
466that different pin ranges in a SoC is managed by different gpio drivers.
467
468This makes it logical to let gpio drivers announce their pin ranges to
469the pin ctrl subsystem before it will call 'pinctrl_request_gpio' in order
470to request the corresponding pin to be prepared by the pinctrl subsystem
471before any gpio usage.
472
473For this, the gpio controller can register its pin range with pinctrl
474subsystem. There are two ways of doing it currently: with or without DT.
475
476For with DT support refer to Documentation/devicetree/bindings/gpio/gpio.txt.
477
478For non-DT support, user can call gpiochip_add_pin_range() with appropriate
479parameters to register a range of gpio pins with a pinctrl driver. For this
480exact name string of pinctrl device has to be passed as one of the
481argument to this routine.
482
483
David Brownell4c203862007-02-12 00:53:11 -0800484What do these conventions omit?
485===============================
486One of the biggest things these conventions omit is pin multiplexing, since
487this is highly chip-specific and nonportable. One platform might not need
488explicit multiplexing; another might have just two options for use of any
489given pin; another might have eight options per pin; another might be able
490to route a given GPIO to any one of several pins. (Yes, those examples all
491come from systems that run Linux today.)
492
493Related to multiplexing is configuration and enabling of the pullups or
494pulldowns integrated on some platforms. Not all platforms support them,
495or support them in the same way; and any given board might use external
496pullups (or pulldowns) so that the on-chip ones should not be used.
David Brownell7c2db752008-02-04 22:28:21 -0800497(When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.)
David Brownell7560fa62008-03-04 14:28:27 -0800498Likewise drive strength (2 mA vs 20 mA) and voltage (1.8V vs 3.3V) is a
499platform-specific issue, as are models like (not) having a one-to-one
500correspondence between configurable pins and GPIOs.
David Brownell4c203862007-02-12 00:53:11 -0800501
502There are other system-specific mechanisms that are not specified here,
503like the aforementioned options for input de-glitching and wire-OR output.
504Hardware may support reading or writing GPIOs in gangs, but that's usually
David Brownellf5de6112007-02-16 01:27:14 -0800505configuration dependent: for GPIOs sharing the same bank. (GPIOs are
David Brownell4c203862007-02-12 00:53:11 -0800506commonly grouped in banks of 16 or 32, with a given SOC having several such
David Brownell7c2db752008-02-04 22:28:21 -0800507banks.) Some systems can trigger IRQs from output GPIOs, or read values
508from pins not managed as GPIOs. Code relying on such mechanisms will
509necessarily be nonportable.
David Brownell4c203862007-02-12 00:53:11 -0800510
David Brownell7c2db752008-02-04 22:28:21 -0800511Dynamic definition of GPIOs is not currently standard; for example, as
David Brownell4c203862007-02-12 00:53:11 -0800512a side effect of configuring an add-on board with some GPIO expanders.
513
David Brownell7c2db752008-02-04 22:28:21 -0800514
515GPIO implementor's framework (OPTIONAL)
516=======================================
517As noted earlier, there is an optional implementation framework making it
518easier for platforms to support different kinds of GPIO controller using
David Brownelld8f388d82008-07-25 01:46:07 -0700519the same programming interface. This framework is called "gpiolib".
David Brownell7c2db752008-02-04 22:28:21 -0800520
521As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file
522will be found there. That will list all the controllers registered through
523this framework, and the state of the GPIOs currently in use.
524
525
526Controller Drivers: gpio_chip
527-----------------------------
528In this framework each GPIO controller is packaged as a "struct gpio_chip"
529with information common to each controller of that type:
530
531 - methods to establish GPIO direction
532 - methods used to access GPIO values
533 - flag saying whether calls to its methods may sleep
534 - optional debugfs dump method (showing extra state like pullup config)
535 - label for diagnostics
536
537There is also per-instance data, which may come from device.platform_data:
538the number of its first GPIO, and how many GPIOs it exposes.
539
540The code implementing a gpio_chip should support multiple instances of the
541controller, possibly using the driver model. That code will configure each
542gpio_chip and issue gpiochip_add(). Removing a GPIO controller should be
543rare; use gpiochip_remove() when it is unavoidable.
544
545Most often a gpio_chip is part of an instance-specific structure with state
546not exposed by the GPIO interfaces, such as addressing, power management,
Dominik D. Geyerbfc9dca2009-12-06 18:30:44 -0800547and more. Chips such as codecs will have complex non-GPIO state.
David Brownell7c2db752008-02-04 22:28:21 -0800548
549Any debugfs dump method should normally ignore signals which haven't been
550requested as GPIOs. They can use gpiochip_is_requested(), which returns
551either NULL or the label associated with that GPIO when it was requested.
552
553
554Platform Support
555----------------
Michael Buesch7444a722008-07-25 01:46:11 -0700556To support this framework, a platform's Kconfig will "select" either
557ARCH_REQUIRE_GPIOLIB or ARCH_WANT_OPTIONAL_GPIOLIB
David Brownell7c2db752008-02-04 22:28:21 -0800558and arrange that its <asm/gpio.h> includes <asm-generic/gpio.h> and defines
559three functions: gpio_get_value(), gpio_set_value(), and gpio_cansleep().
David Brownell7c2db752008-02-04 22:28:21 -0800560
David Brownellc9561262010-09-09 16:38:03 -0700561It may also provide a custom value for ARCH_NR_GPIOS, so that it better
562reflects the number of GPIOs in actual use on that platform, without
563wasting static table space. (It should count both built-in/SoC GPIOs and
564also ones on GPIO expanders.
565
566ARCH_REQUIRE_GPIOLIB means that the gpiolib code will always get compiled
Michael Buesch7444a722008-07-25 01:46:11 -0700567into the kernel on that architecture.
568
David Brownellc9561262010-09-09 16:38:03 -0700569ARCH_WANT_OPTIONAL_GPIOLIB means the gpiolib code defaults to off and the user
Michael Buesch7444a722008-07-25 01:46:11 -0700570can enable it and build it into the kernel optionally.
571
572If neither of these options are selected, the platform does not support
573GPIOs through GPIO-lib and the code cannot be enabled by the user.
574
David Brownell7c2db752008-02-04 22:28:21 -0800575Trivial implementations of those functions can directly use framework
576code, which always dispatches through the gpio_chip:
577
578 #define gpio_get_value __gpio_get_value
579 #define gpio_set_value __gpio_set_value
580 #define gpio_cansleep __gpio_cansleep
581
582Fancier implementations could instead define those as inline functions with
583logic optimizing access to specific SOC-based GPIOs. For example, if the
584referenced GPIO is the constant "12", getting or setting its value could
585cost as little as two or three instructions, never sleeping. When such an
586optimization is not possible those calls must delegate to the framework
587code, costing at least a few dozen instructions. For bitbanged I/O, such
588instruction savings can be significant.
589
590For SOCs, platform-specific code defines and registers gpio_chip instances
591for each bank of on-chip GPIOs. Those GPIOs should be numbered/labeled to
592match chip vendor documentation, and directly match board schematics. They
593may well start at zero and go up to a platform-specific limit. Such GPIOs
594are normally integrated into platform initialization to make them always be
595available, from arch_initcall() or earlier; they can often serve as IRQs.
596
597
598Board Support
599-------------
600For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
601function devices, FPGAs or CPLDs -- most often board-specific code handles
602registering controller devices and ensures that their drivers know what GPIO
603numbers to use with gpiochip_add(). Their numbers often start right after
604platform-specific GPIOs.
605
606For example, board setup code could create structures identifying the range
607of GPIOs that chip will expose, and passes them to each GPIO expander chip
608using platform_data. Then the chip driver's probe() routine could pass that
609data to gpiochip_add().
610
611Initialization order can be important. For example, when a device relies on
612an I2C-based GPIO, its probe() routine should only be called after that GPIO
613becomes available. That may mean the device should not be registered until
614calls for that GPIO can work. One way to address such dependencies is for
615such gpio_chip controllers to provide setup() and teardown() callbacks to
616board specific code; those board specific callbacks would register devices
David Brownelld8f388d82008-07-25 01:46:07 -0700617once all the necessary resources are available, and remove them later when
618the GPIO controller device becomes unavailable.
619
620
621Sysfs Interface for Userspace (OPTIONAL)
622========================================
623Platforms which use the "gpiolib" implementors framework may choose to
624configure a sysfs user interface to GPIOs. This is different from the
625debugfs interface, since it provides control over GPIO direction and
626value instead of just showing a gpio state summary. Plus, it could be
627present on production systems without debugging support.
628
Matt LaPlante19f59462009-04-27 15:06:31 +0200629Given appropriate hardware documentation for the system, userspace could
David Brownelld8f388d82008-07-25 01:46:07 -0700630know for example that GPIO #23 controls the write protect line used to
631protect boot loader segments in flash memory. System upgrade procedures
632may need to temporarily remove that protection, first importing a GPIO,
633then changing its output state, then updating the code before re-enabling
634the write protection. In normal use, GPIO #23 would never be touched,
635and the kernel would have no need to know about it.
636
637Again depending on appropriate hardware documentation, on some systems
638userspace GPIO can be used to determine system configuration data that
639standard kernels won't know about. And for some tasks, simple userspace
640GPIO drivers could be all that the system really needs.
641
642Note that standard kernel drivers exist for common "LEDs and Buttons"
643GPIO tasks: "leds-gpio" and "gpio_keys", respectively. Use those
644instead of talking directly to the GPIOs; they integrate with kernel
645frameworks better than your userspace code could.
646
647
648Paths in Sysfs
649--------------
650There are three kinds of entry in /sys/class/gpio:
651
652 - Control interfaces used to get userspace control over GPIOs;
653
654 - GPIOs themselves; and
655
656 - GPIO controllers ("gpio_chip" instances).
657
658That's in addition to standard files including the "device" symlink.
659
660The control interfaces are write-only:
661
662 /sys/class/gpio/
663
664 "export" ... Userspace may ask the kernel to export control of
665 a GPIO to userspace by writing its number to this file.
666
667 Example: "echo 19 > export" will create a "gpio19" node
668 for GPIO #19, if that's not requested by kernel code.
669
670 "unexport" ... Reverses the effect of exporting to userspace.
671
672 Example: "echo 19 > unexport" will remove a "gpio19"
673 node exported using the "export" file.
674
675GPIO signals have paths like /sys/class/gpio/gpio42/ (for GPIO #42)
676and have the following read/write attributes:
677
678 /sys/class/gpio/gpioN/
679
680 "direction" ... reads as either "in" or "out". This value may
681 normally be written. Writing as "out" defaults to
682 initializing the value as low. To ensure glitch free
683 operation, values "low" and "high" may be written to
684 configure the GPIO as an output with that initial value.
685
686 Note that this attribute *will not exist* if the kernel
687 doesn't support changing the direction of a GPIO, or
688 it was exported by kernel code that didn't explicitly
689 allow userspace to reconfigure this GPIO's direction.
690
691 "value" ... reads as either 0 (low) or 1 (high). If the GPIO
692 is configured as an output, this value may be written;
693 any nonzero value is treated as high.
694
Bernhard Walleebde7b02010-11-18 12:27:33 -0800695 If the pin can be configured as interrupt-generating interrupt
696 and if it has been configured to generate interrupts (see the
697 description of "edge"), you can poll(2) on that file and
698 poll(2) will return whenever the interrupt was triggered. If
699 you use poll(2), set the events POLLPRI and POLLERR. If you
700 use select(2), set the file descriptor in exceptfds. After
701 poll(2) returns, either lseek(2) to the beginning of the sysfs
702 file and read the new value or close the file and re-open it
703 to read the value.
704
Daniel Glöcknerff77c352009-09-22 16:46:38 -0700705 "edge" ... reads as either "none", "rising", "falling", or
706 "both". Write these strings to select the signal edge(s)
707 that will make poll(2) on the "value" file return.
708
709 This file exists only if the pin can be configured as an
710 interrupt generating input pin.
711
Jani Nikula07697462009-12-15 16:46:20 -0800712 "active_low" ... reads as either 0 (false) or 1 (true). Write
713 any nonzero value to invert the value attribute both
714 for reading and writing. Existing and subsequent
715 poll(2) support configuration via the edge attribute
716 for "rising" and "falling" edges will follow this
717 setting.
718
Dominik D. Geyerbfc9dca2009-12-06 18:30:44 -0800719GPIO controllers have paths like /sys/class/gpio/gpiochip42/ (for the
David Brownelld8f388d82008-07-25 01:46:07 -0700720controller implementing GPIOs starting at #42) and have the following
721read-only attributes:
722
723 /sys/class/gpio/gpiochipN/
724
725 "base" ... same as N, the first GPIO managed by this chip
726
727 "label" ... provided for diagnostics (not always unique)
728
729 "ngpio" ... how many GPIOs this manges (N to N + ngpio - 1)
730
731Board documentation should in most cases cover what GPIOs are used for
732what purposes. However, those numbers are not always stable; GPIOs on
733a daughtercard might be different depending on the base board being used,
734or other cards in the stack. In such cases, you may need to use the
735gpiochip nodes (possibly in conjunction with schematics) to determine
736the correct GPIO number to use for a given signal.
737
738
739Exporting from Kernel code
740--------------------------
741Kernel code can explicitly manage exports of GPIOs which have already been
742requested using gpio_request():
743
744 /* export the GPIO to userspace */
745 int gpio_export(unsigned gpio, bool direction_may_change);
746
747 /* reverse gpio_export() */
748 void gpio_unexport();
749
Jani Nikulaa4177ee2009-09-22 16:46:33 -0700750 /* create a sysfs link to an exported GPIO node */
751 int gpio_export_link(struct device *dev, const char *name,
752 unsigned gpio)
753
Jani Nikula07697462009-12-15 16:46:20 -0800754 /* change the polarity of a GPIO node in sysfs */
755 int gpio_sysfs_set_active_low(unsigned gpio, int value);
Jani Nikulaa4177ee2009-09-22 16:46:33 -0700756
David Brownelld8f388d82008-07-25 01:46:07 -0700757After a kernel driver requests a GPIO, it may only be made available in
758the sysfs interface by gpio_export(). The driver can control whether the
759signal direction may change. This helps drivers prevent userspace code
760from accidentally clobbering important system state.
761
762This explicit exporting can help with debugging (by making some kinds
763of experiments easier), or can provide an always-there interface that's
764suitable for documenting as part of a board support package.
Jani Nikulaa4177ee2009-09-22 16:46:33 -0700765
766After the GPIO has been exported, gpio_export_link() allows creating
767symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can
768use this to provide the interface under their own device in sysfs with
769a descriptive name.
Jani Nikula07697462009-12-15 16:46:20 -0800770
771Drivers can use gpio_sysfs_set_active_low() to hide GPIO line polarity
772differences between boards from user space. This only affects the
773sysfs interface. Polarity change can be done both before and after
774gpio_export(), and previously enabled poll(2) support for either
775rising or falling edge will be reconfigured to follow this setting.