Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/pci/ats.c |
| 3 | * |
| 4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 5 | * Copyright (C) 2011 Advanced Micro Devices, |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 6 | * |
| 7 | * PCI Express I/O Virtualization (IOV) support. |
| 8 | * Address Translation Service 1.0 |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 9 | * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com> |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 10 | * PASID support added by Joerg Roedel <joerg.roedel@amd.com> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 11 | */ |
| 12 | |
Paul Gortmaker | 363c75d | 2011-05-27 09:37:25 -0400 | [diff] [blame] | 13 | #include <linux/export.h> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 14 | #include <linux/pci-ats.h> |
| 15 | #include <linux/pci.h> |
James Bottomley | 8c45194 | 2011-11-29 19:20:23 +0000 | [diff] [blame] | 16 | #include <linux/slab.h> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 17 | |
| 18 | #include "pci.h" |
| 19 | |
Bjorn Helgaas | afdd596 | 2015-07-17 15:35:18 -0500 | [diff] [blame] | 20 | void pci_ats_init(struct pci_dev *dev) |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 21 | { |
| 22 | int pos; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 23 | |
| 24 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS); |
| 25 | if (!pos) |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 26 | return; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 27 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 28 | dev->ats_cap = pos; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 29 | } |
| 30 | |
| 31 | /** |
| 32 | * pci_enable_ats - enable the ATS capability |
| 33 | * @dev: the PCI device |
| 34 | * @ps: the IOMMU page shift |
| 35 | * |
| 36 | * Returns 0 on success, or negative on failure. |
| 37 | */ |
| 38 | int pci_enable_ats(struct pci_dev *dev, int ps) |
| 39 | { |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 40 | u16 ctrl; |
Bjorn Helgaas | c39127d | 2015-07-17 15:38:13 -0500 | [diff] [blame] | 41 | struct pci_dev *pdev; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 42 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 43 | if (!dev->ats_cap) |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 44 | return -EINVAL; |
| 45 | |
Bjorn Helgaas | f7ef134 | 2015-07-20 09:23:37 -0500 | [diff] [blame] | 46 | if (WARN_ON(dev->ats_enabled)) |
Bjorn Helgaas | a021f30 | 2015-07-17 15:43:27 -0500 | [diff] [blame] | 47 | return -EBUSY; |
| 48 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 49 | if (ps < PCI_ATS_MIN_STU) |
| 50 | return -EINVAL; |
| 51 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 52 | /* |
| 53 | * Note that enabling ATS on a VF fails unless it's already enabled |
| 54 | * with the same STU on the PF. |
| 55 | */ |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 56 | ctrl = PCI_ATS_CTRL_ENABLE; |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 57 | if (dev->is_virtfn) { |
Bjorn Helgaas | c39127d | 2015-07-17 15:38:13 -0500 | [diff] [blame] | 58 | pdev = pci_physfn(dev); |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 59 | if (pdev->ats_stu != ps) |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 60 | return -EINVAL; |
| 61 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 62 | atomic_inc(&pdev->ats_ref_cnt); /* count enabled VFs */ |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 63 | } else { |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 64 | dev->ats_stu = ps; |
| 65 | ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU); |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 66 | } |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 67 | pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 68 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 69 | dev->ats_enabled = 1; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 70 | return 0; |
| 71 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 72 | EXPORT_SYMBOL_GPL(pci_enable_ats); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 73 | |
| 74 | /** |
| 75 | * pci_disable_ats - disable the ATS capability |
| 76 | * @dev: the PCI device |
| 77 | */ |
| 78 | void pci_disable_ats(struct pci_dev *dev) |
| 79 | { |
Bjorn Helgaas | c39127d | 2015-07-17 15:38:13 -0500 | [diff] [blame] | 80 | struct pci_dev *pdev; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 81 | u16 ctrl; |
| 82 | |
Bjorn Helgaas | f7ef134 | 2015-07-20 09:23:37 -0500 | [diff] [blame] | 83 | if (WARN_ON(!dev->ats_enabled)) |
Bjorn Helgaas | a021f30 | 2015-07-17 15:43:27 -0500 | [diff] [blame] | 84 | return; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 85 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 86 | if (atomic_read(&dev->ats_ref_cnt)) |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 87 | return; /* VFs still enabled */ |
| 88 | |
| 89 | if (dev->is_virtfn) { |
Bjorn Helgaas | c39127d | 2015-07-17 15:38:13 -0500 | [diff] [blame] | 90 | pdev = pci_physfn(dev); |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 91 | atomic_dec(&pdev->ats_ref_cnt); |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame] | 92 | } |
| 93 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 94 | pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 95 | ctrl &= ~PCI_ATS_CTRL_ENABLE; |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 96 | pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 97 | |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 98 | dev->ats_enabled = 0; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 99 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 100 | EXPORT_SYMBOL_GPL(pci_disable_ats); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 101 | |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 102 | void pci_restore_ats_state(struct pci_dev *dev) |
| 103 | { |
| 104 | u16 ctrl; |
| 105 | |
Bjorn Helgaas | f7ef134 | 2015-07-20 09:23:37 -0500 | [diff] [blame] | 106 | if (!dev->ats_enabled) |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 107 | return; |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 108 | |
| 109 | ctrl = PCI_ATS_CTRL_ENABLE; |
| 110 | if (!dev->is_virtfn) |
Bjorn Helgaas | d544d75 | 2015-07-17 15:15:19 -0500 | [diff] [blame] | 111 | ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU); |
| 112 | pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl); |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 113 | } |
| 114 | EXPORT_SYMBOL_GPL(pci_restore_ats_state); |
| 115 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 116 | /** |
| 117 | * pci_ats_queue_depth - query the ATS Invalidate Queue Depth |
| 118 | * @dev: the PCI device |
| 119 | * |
| 120 | * Returns the queue depth on success, or negative on failure. |
| 121 | * |
| 122 | * The ATS spec uses 0 in the Invalidate Queue Depth field to |
| 123 | * indicate that the function can accept 32 Invalidate Request. |
| 124 | * But here we use the `real' values (i.e. 1~32) for the Queue |
| 125 | * Depth; and 0 indicates the function shares the Queue with |
| 126 | * other functions (doesn't exclusively own a Queue). |
| 127 | */ |
| 128 | int pci_ats_queue_depth(struct pci_dev *dev) |
| 129 | { |
Bjorn Helgaas | a71f938 | 2015-07-20 09:24:32 -0500 | [diff] [blame] | 130 | u16 cap; |
| 131 | |
Bjorn Helgaas | 3c76539 | 2015-07-17 15:30:26 -0500 | [diff] [blame] | 132 | if (!dev->ats_cap) |
| 133 | return -EINVAL; |
| 134 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 135 | if (dev->is_virtfn) |
| 136 | return 0; |
| 137 | |
Bjorn Helgaas | a71f938 | 2015-07-20 09:24:32 -0500 | [diff] [blame] | 138 | pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap); |
| 139 | return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) : PCI_ATS_MAX_QDEP; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 140 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 141 | EXPORT_SYMBOL_GPL(pci_ats_queue_depth); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 142 | |
| 143 | #ifdef CONFIG_PCI_PRI |
| 144 | /** |
| 145 | * pci_enable_pri - Enable PRI capability |
| 146 | * @ pdev: PCI device structure |
| 147 | * |
| 148 | * Returns 0 on success, negative value on error |
| 149 | */ |
| 150 | int pci_enable_pri(struct pci_dev *pdev, u32 reqs) |
| 151 | { |
| 152 | u16 control, status; |
| 153 | u32 max_requests; |
| 154 | int pos; |
| 155 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 156 | if (WARN_ON(pdev->pri_enabled)) |
| 157 | return -EBUSY; |
| 158 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 159 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 160 | if (!pos) |
| 161 | return -EINVAL; |
| 162 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 163 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 164 | if (!(status & PCI_PRI_STATUS_STOPPED)) |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 165 | return -EBUSY; |
| 166 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 167 | pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 168 | reqs = min(max_requests, reqs); |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 169 | pdev->pri_reqs_alloc = reqs; |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 170 | pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 171 | |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 172 | control = PCI_PRI_CTRL_ENABLE; |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 173 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 174 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 175 | pdev->pri_enabled = 1; |
| 176 | |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 177 | return 0; |
| 178 | } |
| 179 | EXPORT_SYMBOL_GPL(pci_enable_pri); |
| 180 | |
| 181 | /** |
| 182 | * pci_disable_pri - Disable PRI capability |
| 183 | * @pdev: PCI device structure |
| 184 | * |
| 185 | * Only clears the enabled-bit, regardless of its former value |
| 186 | */ |
| 187 | void pci_disable_pri(struct pci_dev *pdev) |
| 188 | { |
| 189 | u16 control; |
| 190 | int pos; |
| 191 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 192 | if (WARN_ON(!pdev->pri_enabled)) |
| 193 | return; |
| 194 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 195 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 196 | if (!pos) |
| 197 | return; |
| 198 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 199 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 200 | control &= ~PCI_PRI_CTRL_ENABLE; |
| 201 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 202 | |
| 203 | pdev->pri_enabled = 0; |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 204 | } |
| 205 | EXPORT_SYMBOL_GPL(pci_disable_pri); |
| 206 | |
| 207 | /** |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 208 | * pci_restore_pri_state - Restore PRI |
| 209 | * @pdev: PCI device structure |
| 210 | */ |
| 211 | void pci_restore_pri_state(struct pci_dev *pdev) |
| 212 | { |
| 213 | u16 control = PCI_PRI_CTRL_ENABLE; |
| 214 | u32 reqs = pdev->pri_reqs_alloc; |
| 215 | int pos; |
| 216 | |
| 217 | if (!pdev->pri_enabled) |
| 218 | return; |
| 219 | |
| 220 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
| 221 | if (!pos) |
| 222 | return; |
| 223 | |
| 224 | pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs); |
| 225 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
| 226 | } |
| 227 | EXPORT_SYMBOL_GPL(pci_restore_pri_state); |
| 228 | |
| 229 | /** |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 230 | * pci_reset_pri - Resets device's PRI state |
| 231 | * @pdev: PCI device structure |
| 232 | * |
| 233 | * The PRI capability must be disabled before this function is called. |
| 234 | * Returns 0 on success, negative value on error. |
| 235 | */ |
| 236 | int pci_reset_pri(struct pci_dev *pdev) |
| 237 | { |
| 238 | u16 control; |
| 239 | int pos; |
| 240 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 241 | if (WARN_ON(pdev->pri_enabled)) |
| 242 | return -EBUSY; |
| 243 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 244 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 245 | if (!pos) |
| 246 | return -EINVAL; |
| 247 | |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 248 | control = PCI_PRI_CTRL_RESET; |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 249 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 250 | |
| 251 | return 0; |
| 252 | } |
| 253 | EXPORT_SYMBOL_GPL(pci_reset_pri); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 254 | #endif /* CONFIG_PCI_PRI */ |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 255 | |
| 256 | #ifdef CONFIG_PCI_PASID |
| 257 | /** |
| 258 | * pci_enable_pasid - Enable the PASID capability |
| 259 | * @pdev: PCI device structure |
| 260 | * @features: Features to enable |
| 261 | * |
| 262 | * Returns 0 on success, negative value on error. This function checks |
| 263 | * whether the features are actually supported by the device and returns |
| 264 | * an error if not. |
| 265 | */ |
| 266 | int pci_enable_pasid(struct pci_dev *pdev, int features) |
| 267 | { |
| 268 | u16 control, supported; |
| 269 | int pos; |
| 270 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 271 | if (WARN_ON(pdev->pasid_enabled)) |
| 272 | return -EBUSY; |
| 273 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 274 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 275 | if (!pos) |
| 276 | return -EINVAL; |
| 277 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 278 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 279 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 280 | |
| 281 | /* User wants to enable anything unsupported? */ |
| 282 | if ((supported & features) != features) |
| 283 | return -EINVAL; |
| 284 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 285 | control = PCI_PASID_CTRL_ENABLE | features; |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 286 | pdev->pasid_features = features; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 287 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 288 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 289 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 290 | pdev->pasid_enabled = 1; |
| 291 | |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 292 | return 0; |
| 293 | } |
| 294 | EXPORT_SYMBOL_GPL(pci_enable_pasid); |
| 295 | |
| 296 | /** |
| 297 | * pci_disable_pasid - Disable the PASID capability |
| 298 | * @pdev: PCI device structure |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 299 | */ |
| 300 | void pci_disable_pasid(struct pci_dev *pdev) |
| 301 | { |
| 302 | u16 control = 0; |
| 303 | int pos; |
| 304 | |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 305 | if (WARN_ON(!pdev->pasid_enabled)) |
| 306 | return; |
| 307 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 308 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 309 | if (!pos) |
| 310 | return; |
| 311 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 312 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
Jean-Philippe Brucker | a4f4fa6 | 2017-05-30 09:25:48 -0700 | [diff] [blame] | 313 | |
| 314 | pdev->pasid_enabled = 0; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 315 | } |
| 316 | EXPORT_SYMBOL_GPL(pci_disable_pasid); |
| 317 | |
| 318 | /** |
CQ Tang | 4ebeb1e | 2017-05-30 09:25:49 -0700 | [diff] [blame^] | 319 | * pci_restore_pasid_state - Restore PASID capabilities |
| 320 | * @pdev: PCI device structure |
| 321 | */ |
| 322 | void pci_restore_pasid_state(struct pci_dev *pdev) |
| 323 | { |
| 324 | u16 control; |
| 325 | int pos; |
| 326 | |
| 327 | if (!pdev->pasid_enabled) |
| 328 | return; |
| 329 | |
| 330 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
| 331 | if (!pos) |
| 332 | return; |
| 333 | |
| 334 | control = PCI_PASID_CTRL_ENABLE | pdev->pasid_features; |
| 335 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
| 336 | } |
| 337 | EXPORT_SYMBOL_GPL(pci_restore_pasid_state); |
| 338 | |
| 339 | /** |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 340 | * pci_pasid_features - Check which PASID features are supported |
| 341 | * @pdev: PCI device structure |
| 342 | * |
| 343 | * Returns a negative value when no PASI capability is present. |
| 344 | * Otherwise is returns a bitmask with supported features. Current |
| 345 | * features reported are: |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 346 | * PCI_PASID_CAP_EXEC - Execute permission supported |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 347 | * PCI_PASID_CAP_PRIV - Privileged mode supported |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 348 | */ |
| 349 | int pci_pasid_features(struct pci_dev *pdev) |
| 350 | { |
| 351 | u16 supported; |
| 352 | int pos; |
| 353 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 354 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 355 | if (!pos) |
| 356 | return -EINVAL; |
| 357 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 358 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 359 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 360 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 361 | |
| 362 | return supported; |
| 363 | } |
| 364 | EXPORT_SYMBOL_GPL(pci_pasid_features); |
| 365 | |
| 366 | #define PASID_NUMBER_SHIFT 8 |
| 367 | #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) |
| 368 | /** |
| 369 | * pci_max_pasid - Get maximum number of PASIDs supported by device |
| 370 | * @pdev: PCI device structure |
| 371 | * |
| 372 | * Returns negative value when PASID capability is not present. |
| 373 | * Otherwise it returns the numer of supported PASIDs. |
| 374 | */ |
| 375 | int pci_max_pasids(struct pci_dev *pdev) |
| 376 | { |
| 377 | u16 supported; |
| 378 | int pos; |
| 379 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 380 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 381 | if (!pos) |
| 382 | return -EINVAL; |
| 383 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 384 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 385 | |
| 386 | supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT; |
| 387 | |
| 388 | return (1 << supported); |
| 389 | } |
| 390 | EXPORT_SYMBOL_GPL(pci_max_pasids); |
| 391 | #endif /* CONFIG_PCI_PASID */ |