Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 1 | /* |
| 2 | * max98925.c -- ALSA SoC Stereo MAX98925 driver |
| 3 | * Copyright 2013-15 Maxim Integrated Products |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/i2c.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/regmap.h> |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/cdev.h> |
| 14 | #include <sound/pcm.h> |
| 15 | #include <sound/pcm_params.h> |
| 16 | #include <sound/soc.h> |
| 17 | #include <sound/tlv.h> |
| 18 | #include "max98925.h" |
| 19 | |
| 20 | static const char *const dai_text[] = { |
| 21 | "Left", "Right", "LeftRight", "LeftRightDiv2", |
| 22 | }; |
| 23 | |
| 24 | static const char * const max98925_boost_voltage_text[] = { |
| 25 | "8.5V", "8.25V", "8.0V", "7.75V", "7.5V", "7.25V", "7.0V", "6.75V", |
| 26 | "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V" |
| 27 | }; |
| 28 | |
| 29 | static SOC_ENUM_SINGLE_DECL(max98925_boost_voltage, |
| 30 | MAX98925_CONFIGURATION, M98925_BST_VOUT_SHIFT, |
| 31 | max98925_boost_voltage_text); |
| 32 | |
| 33 | static const char *const hpf_text[] = { |
| 34 | "Disable", "DC Block", "100Hz", "200Hz", "400Hz", "800Hz", |
| 35 | }; |
| 36 | |
Krzysztof Kozlowski | 9cd974b | 2015-03-20 12:35:45 +0100 | [diff] [blame^] | 37 | static const struct reg_default max98925_reg[] = { |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 38 | { 0x0B, 0x00 }, /* IRQ Enable0 */ |
| 39 | { 0x0C, 0x00 }, /* IRQ Enable1 */ |
| 40 | { 0x0D, 0x00 }, /* IRQ Enable2 */ |
| 41 | { 0x0E, 0x00 }, /* IRQ Clear0 */ |
| 42 | { 0x0F, 0x00 }, /* IRQ Clear1 */ |
| 43 | { 0x10, 0x00 }, /* IRQ Clear2 */ |
| 44 | { 0x11, 0xC0 }, /* Map0 */ |
| 45 | { 0x12, 0x00 }, /* Map1 */ |
| 46 | { 0x13, 0x00 }, /* Map2 */ |
| 47 | { 0x14, 0xF0 }, /* Map3 */ |
| 48 | { 0x15, 0x00 }, /* Map4 */ |
| 49 | { 0x16, 0xAB }, /* Map5 */ |
| 50 | { 0x17, 0x89 }, /* Map6 */ |
| 51 | { 0x18, 0x00 }, /* Map7 */ |
| 52 | { 0x19, 0x00 }, /* Map8 */ |
| 53 | { 0x1A, 0x06 }, /* DAI Clock Mode 1 */ |
| 54 | { 0x1B, 0xC0 }, /* DAI Clock Mode 2 */ |
| 55 | { 0x1C, 0x00 }, /* DAI Clock Divider Denominator MSBs */ |
| 56 | { 0x1D, 0x00 }, /* DAI Clock Divider Denominator LSBs */ |
| 57 | { 0x1E, 0xF0 }, /* DAI Clock Divider Numerator MSBs */ |
| 58 | { 0x1F, 0x00 }, /* DAI Clock Divider Numerator LSBs */ |
| 59 | { 0x20, 0x50 }, /* Format */ |
| 60 | { 0x21, 0x00 }, /* TDM Slot Select */ |
| 61 | { 0x22, 0x00 }, /* DOUT Configuration VMON */ |
| 62 | { 0x23, 0x00 }, /* DOUT Configuration IMON */ |
| 63 | { 0x24, 0x00 }, /* DOUT Configuration VBAT */ |
| 64 | { 0x25, 0x00 }, /* DOUT Configuration VBST */ |
| 65 | { 0x26, 0x00 }, /* DOUT Configuration FLAG */ |
| 66 | { 0x27, 0xFF }, /* DOUT HiZ Configuration 1 */ |
| 67 | { 0x28, 0xFF }, /* DOUT HiZ Configuration 2 */ |
| 68 | { 0x29, 0xFF }, /* DOUT HiZ Configuration 3 */ |
| 69 | { 0x2A, 0xFF }, /* DOUT HiZ Configuration 4 */ |
| 70 | { 0x2B, 0x02 }, /* DOUT Drive Strength */ |
| 71 | { 0x2C, 0x90 }, /* Filters */ |
| 72 | { 0x2D, 0x00 }, /* Gain */ |
| 73 | { 0x2E, 0x02 }, /* Gain Ramping */ |
| 74 | { 0x2F, 0x00 }, /* Speaker Amplifier */ |
| 75 | { 0x30, 0x0A }, /* Threshold */ |
| 76 | { 0x31, 0x00 }, /* ALC Attack */ |
| 77 | { 0x32, 0x80 }, /* ALC Atten and Release */ |
| 78 | { 0x33, 0x00 }, /* ALC Infinite Hold Release */ |
| 79 | { 0x34, 0x92 }, /* ALC Configuration */ |
| 80 | { 0x35, 0x01 }, /* Boost Converter */ |
| 81 | { 0x36, 0x00 }, /* Block Enable */ |
| 82 | { 0x37, 0x00 }, /* Configuration */ |
| 83 | { 0x38, 0x00 }, /* Global Enable */ |
| 84 | { 0x3A, 0x00 }, /* Boost Limiter */ |
| 85 | }; |
| 86 | |
| 87 | static const struct soc_enum max98925_dai_enum = |
| 88 | SOC_ENUM_SINGLE(MAX98925_GAIN, 5, ARRAY_SIZE(dai_text), dai_text); |
| 89 | |
| 90 | static const struct soc_enum max98925_hpf_enum = |
| 91 | SOC_ENUM_SINGLE(MAX98925_FILTERS, 0, ARRAY_SIZE(hpf_text), hpf_text); |
| 92 | |
| 93 | static const struct snd_kcontrol_new max98925_hpf_sel_mux = |
| 94 | SOC_DAPM_ENUM("Rc Filter MUX Mux", max98925_hpf_enum); |
| 95 | |
| 96 | static const struct snd_kcontrol_new max98925_dai_sel_mux = |
| 97 | SOC_DAPM_ENUM("DAI IN MUX Mux", max98925_dai_enum); |
| 98 | |
| 99 | static int max98925_dac_event(struct snd_soc_dapm_widget *w, |
| 100 | struct snd_kcontrol *kcontrol, int event) |
| 101 | { |
| 102 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
| 103 | struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec); |
| 104 | |
| 105 | switch (event) { |
| 106 | case SND_SOC_DAPM_PRE_PMU: |
| 107 | regmap_update_bits(max98925->regmap, |
| 108 | MAX98925_BLOCK_ENABLE, |
| 109 | M98925_BST_EN_MASK | |
| 110 | M98925_ADC_IMON_EN_MASK | M98925_ADC_VMON_EN_MASK, |
| 111 | M98925_BST_EN_MASK | |
| 112 | M98925_ADC_IMON_EN_MASK | M98925_ADC_VMON_EN_MASK); |
| 113 | break; |
| 114 | case SND_SOC_DAPM_POST_PMD: |
| 115 | regmap_update_bits(max98925->regmap, |
| 116 | MAX98925_BLOCK_ENABLE, M98925_BST_EN_MASK | |
| 117 | M98925_ADC_IMON_EN_MASK | M98925_ADC_VMON_EN_MASK, 0); |
| 118 | break; |
| 119 | default: |
| 120 | return 0; |
| 121 | } |
| 122 | return 0; |
| 123 | } |
| 124 | |
| 125 | static const struct snd_soc_dapm_widget max98925_dapm_widgets[] = { |
| 126 | SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0, SND_SOC_NOPM, 0, 0), |
| 127 | SND_SOC_DAPM_MUX("DAI IN MUX", SND_SOC_NOPM, 0, 0, |
| 128 | &max98925_dai_sel_mux), |
| 129 | SND_SOC_DAPM_MUX("Rc Filter MUX", SND_SOC_NOPM, 0, 0, |
| 130 | &max98925_hpf_sel_mux), |
| 131 | SND_SOC_DAPM_DAC_E("Amp Enable", NULL, MAX98925_BLOCK_ENABLE, |
| 132 | M98925_SPK_EN_SHIFT, 0, max98925_dac_event, |
| 133 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| 134 | SND_SOC_DAPM_SUPPLY("Global Enable", MAX98925_GLOBAL_ENABLE, |
| 135 | M98925_EN_SHIFT, 0, NULL, 0), |
| 136 | SND_SOC_DAPM_OUTPUT("BE_OUT"), |
| 137 | }; |
| 138 | |
| 139 | static const struct snd_soc_dapm_route max98925_audio_map[] = { |
| 140 | {"DAI IN MUX", "Left", "DAI_OUT"}, |
| 141 | {"DAI IN MUX", "Right", "DAI_OUT"}, |
| 142 | {"DAI IN MUX", "LeftRight", "DAI_OUT"}, |
| 143 | {"DAI IN MUX", "LeftRightDiv2", "DAI_OUT"}, |
| 144 | {"Rc Filter MUX", "Disable", "DAI IN MUX"}, |
| 145 | {"Rc Filter MUX", "DC Block", "DAI IN MUX"}, |
| 146 | {"Rc Filter MUX", "100Hz", "DAI IN MUX"}, |
| 147 | {"Rc Filter MUX", "200Hz", "DAI IN MUX"}, |
| 148 | {"Rc Filter MUX", "400Hz", "DAI IN MUX"}, |
| 149 | {"Rc Filter MUX", "800Hz", "DAI IN MUX"}, |
| 150 | {"Amp Enable", NULL, "Rc Filter MUX"}, |
| 151 | {"BE_OUT", NULL, "Amp Enable"}, |
| 152 | {"BE_OUT", NULL, "Global Enable"}, |
| 153 | }; |
| 154 | |
| 155 | static bool max98925_volatile_register(struct device *dev, unsigned int reg) |
| 156 | { |
| 157 | switch (reg) { |
| 158 | case MAX98925_VBAT_DATA: |
| 159 | case MAX98925_VBST_DATA: |
| 160 | case MAX98925_LIVE_STATUS0: |
| 161 | case MAX98925_LIVE_STATUS1: |
| 162 | case MAX98925_LIVE_STATUS2: |
| 163 | case MAX98925_STATE0: |
| 164 | case MAX98925_STATE1: |
| 165 | case MAX98925_STATE2: |
| 166 | case MAX98925_FLAG0: |
| 167 | case MAX98925_FLAG1: |
| 168 | case MAX98925_FLAG2: |
| 169 | case MAX98925_REV_VERSION: |
| 170 | return true; |
| 171 | default: |
| 172 | return false; |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | static bool max98925_readable_register(struct device *dev, unsigned int reg) |
| 177 | { |
| 178 | switch (reg) { |
| 179 | case MAX98925_IRQ_CLEAR0: |
| 180 | case MAX98925_IRQ_CLEAR1: |
| 181 | case MAX98925_IRQ_CLEAR2: |
| 182 | case MAX98925_ALC_HOLD_RLS: |
| 183 | return false; |
| 184 | default: |
| 185 | return true; |
| 186 | } |
| 187 | } |
| 188 | |
kbuild test robot | 10dcc44 | 2015-03-12 03:05:44 +0800 | [diff] [blame] | 189 | static DECLARE_TLV_DB_SCALE(max98925_spk_tlv, -600, 100, 0); |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 190 | |
| 191 | static const struct snd_kcontrol_new max98925_snd_controls[] = { |
| 192 | SOC_SINGLE_TLV("Speaker Volume", MAX98925_GAIN, |
| 193 | M98925_SPK_GAIN_SHIFT, (1<<M98925_SPK_GAIN_WIDTH)-1, 0, |
| 194 | max98925_spk_tlv), |
| 195 | SOC_SINGLE("Ramp Switch", MAX98925_GAIN_RAMPING, |
| 196 | M98925_SPK_RMP_EN_SHIFT, 1, 0), |
| 197 | SOC_SINGLE("ZCD Switch", MAX98925_GAIN_RAMPING, |
| 198 | M98925_SPK_ZCD_EN_SHIFT, 1, 0), |
| 199 | SOC_SINGLE("ALC Switch", MAX98925_THRESHOLD, |
| 200 | M98925_ALC_EN_SHIFT, 1, 0), |
| 201 | SOC_SINGLE("ALC Threshold", MAX98925_THRESHOLD, M98925_ALC_TH_SHIFT, |
| 202 | (1<<M98925_ALC_TH_WIDTH)-1, 0), |
| 203 | SOC_ENUM("Boost Output Voltage", max98925_boost_voltage), |
| 204 | }; |
| 205 | |
| 206 | /* codec sample rate and n/m dividers parameter table */ |
| 207 | static const struct { |
| 208 | int rate; |
| 209 | int sr; |
| 210 | int divisors[3][2]; |
| 211 | } rate_table[] = { |
| 212 | { |
| 213 | .rate = 8000, |
| 214 | .sr = 0, |
| 215 | .divisors = { {1, 375}, {5, 1764}, {1, 384} } |
| 216 | }, |
| 217 | { |
| 218 | .rate = 11025, |
| 219 | .sr = 1, |
| 220 | .divisors = { {147, 40000}, {1, 256}, {147, 40960} } |
| 221 | }, |
| 222 | { |
| 223 | .rate = 12000, |
| 224 | .sr = 2, |
| 225 | .divisors = { {1, 250}, {5, 1176}, {1, 256} } |
| 226 | }, |
| 227 | { |
| 228 | .rate = 16000, |
| 229 | .sr = 3, |
| 230 | .divisors = { {2, 375}, {5, 882}, {1, 192} } |
| 231 | }, |
| 232 | { |
| 233 | .rate = 22050, |
| 234 | .sr = 4, |
| 235 | .divisors = { {147, 20000}, {1, 128}, {147, 20480} } |
| 236 | }, |
| 237 | { |
| 238 | .rate = 24000, |
| 239 | .sr = 5, |
| 240 | .divisors = { {1, 125}, {5, 588}, {1, 128} } |
| 241 | }, |
| 242 | { |
| 243 | .rate = 32000, |
| 244 | .sr = 6, |
| 245 | .divisors = { {4, 375}, {5, 441}, {1, 96} } |
| 246 | }, |
| 247 | { |
| 248 | .rate = 44100, |
| 249 | .sr = 7, |
| 250 | .divisors = { {147, 10000}, {1, 64}, {147, 10240} } |
| 251 | }, |
| 252 | { |
| 253 | .rate = 48000, |
| 254 | .sr = 8, |
| 255 | .divisors = { {2, 125}, {5, 294}, {1, 64} } |
| 256 | }, |
| 257 | }; |
| 258 | |
| 259 | static inline int max98925_rate_value(struct snd_soc_codec *codec, |
| 260 | int rate, int clock, int *value, int *n, int *m) |
| 261 | { |
| 262 | int ret = -EINVAL; |
| 263 | int i; |
| 264 | |
| 265 | for (i = 0; i < ARRAY_SIZE(rate_table); i++) { |
| 266 | if (rate_table[i].rate >= rate) { |
| 267 | *value = rate_table[i].sr; |
| 268 | *n = rate_table[i].divisors[clock][0]; |
| 269 | *m = rate_table[i].divisors[clock][1]; |
| 270 | ret = 0; |
| 271 | break; |
| 272 | } |
| 273 | } |
| 274 | dev_dbg(codec->dev, "%s: sample rate is %d, returning %d\n", |
| 275 | __func__, rate_table[i].rate, *value); |
| 276 | return ret; |
| 277 | } |
| 278 | |
| 279 | static void max98925_set_sense_data(struct max98925_priv *max98925) |
| 280 | { |
| 281 | /* set VMON slots */ |
| 282 | regmap_update_bits(max98925->regmap, |
| 283 | MAX98925_DOUT_CFG_VMON, |
| 284 | M98925_DAI_VMON_EN_MASK, M98925_DAI_VMON_EN_MASK); |
| 285 | regmap_update_bits(max98925->regmap, |
| 286 | MAX98925_DOUT_CFG_VMON, |
| 287 | M98925_DAI_VMON_SLOT_MASK, |
| 288 | max98925->v_slot << M98925_DAI_VMON_SLOT_SHIFT); |
| 289 | /* set IMON slots */ |
| 290 | regmap_update_bits(max98925->regmap, |
| 291 | MAX98925_DOUT_CFG_IMON, |
| 292 | M98925_DAI_IMON_EN_MASK, M98925_DAI_IMON_EN_MASK); |
| 293 | regmap_update_bits(max98925->regmap, |
| 294 | MAX98925_DOUT_CFG_IMON, |
| 295 | M98925_DAI_IMON_SLOT_MASK, |
| 296 | max98925->i_slot << M98925_DAI_IMON_SLOT_SHIFT); |
| 297 | } |
| 298 | |
| 299 | static int max98925_dai_set_fmt(struct snd_soc_dai *codec_dai, |
| 300 | unsigned int fmt) |
| 301 | { |
| 302 | struct snd_soc_codec *codec = codec_dai->codec; |
| 303 | struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec); |
| 304 | unsigned int invert = 0; |
| 305 | |
| 306 | dev_dbg(codec->dev, "%s: fmt 0x%08X\n", __func__, fmt); |
| 307 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 308 | case SND_SOC_DAIFMT_CBS_CFS: |
| 309 | /* set DAI to slave mode */ |
| 310 | regmap_update_bits(max98925->regmap, |
| 311 | MAX98925_DAI_CLK_MODE2, |
| 312 | M98925_DAI_MAS_MASK, 0); |
| 313 | max98925_set_sense_data(max98925); |
| 314 | break; |
| 315 | case SND_SOC_DAIFMT_CBM_CFM: |
| 316 | /* |
| 317 | * set left channel DAI to master mode, |
| 318 | * right channel always slave |
| 319 | */ |
| 320 | regmap_update_bits(max98925->regmap, |
| 321 | MAX98925_DAI_CLK_MODE2, |
| 322 | M98925_DAI_MAS_MASK, M98925_DAI_MAS_MASK); |
| 323 | break; |
| 324 | case SND_SOC_DAIFMT_CBS_CFM: |
| 325 | case SND_SOC_DAIFMT_CBM_CFS: |
| 326 | default: |
| 327 | dev_err(codec->dev, "DAI clock mode unsupported"); |
| 328 | return -EINVAL; |
| 329 | } |
| 330 | |
| 331 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 332 | case SND_SOC_DAIFMT_NB_NF: |
| 333 | break; |
| 334 | case SND_SOC_DAIFMT_NB_IF: |
| 335 | invert = M98925_DAI_WCI_MASK; |
| 336 | break; |
| 337 | case SND_SOC_DAIFMT_IB_NF: |
| 338 | invert = M98925_DAI_BCI_MASK; |
| 339 | break; |
| 340 | case SND_SOC_DAIFMT_IB_IF: |
| 341 | invert = M98925_DAI_BCI_MASK | M98925_DAI_WCI_MASK; |
| 342 | break; |
| 343 | default: |
| 344 | dev_err(codec->dev, "DAI invert mode unsupported"); |
| 345 | return -EINVAL; |
| 346 | } |
| 347 | |
| 348 | regmap_update_bits(max98925->regmap, MAX98925_FORMAT, |
Anish Kumar | 718b25c | 2015-03-11 15:13:16 -0700 | [diff] [blame] | 349 | M98925_DAI_BCI_MASK, invert); |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 350 | return 0; |
| 351 | } |
| 352 | |
| 353 | static int max98925_set_clock(struct max98925_priv *max98925, |
| 354 | struct snd_pcm_hw_params *params) |
| 355 | { |
| 356 | unsigned int dai_sr = 0, clock, mdll, n, m; |
| 357 | struct snd_soc_codec *codec = max98925->codec; |
| 358 | int rate = params_rate(params); |
| 359 | /* BCLK/LRCLK ratio calculation */ |
| 360 | int blr_clk_ratio = params_channels(params) * max98925->ch_size; |
| 361 | |
| 362 | switch (blr_clk_ratio) { |
| 363 | case 32: |
| 364 | regmap_update_bits(max98925->regmap, |
| 365 | MAX98925_DAI_CLK_MODE2, |
| 366 | M98925_DAI_BSEL_MASK, M98925_DAI_BSEL_32); |
| 367 | break; |
| 368 | case 48: |
| 369 | regmap_update_bits(max98925->regmap, |
| 370 | MAX98925_DAI_CLK_MODE2, |
| 371 | M98925_DAI_BSEL_MASK, M98925_DAI_BSEL_48); |
| 372 | break; |
| 373 | case 64: |
| 374 | regmap_update_bits(max98925->regmap, |
| 375 | MAX98925_DAI_CLK_MODE2, |
| 376 | M98925_DAI_BSEL_MASK, M98925_DAI_BSEL_64); |
| 377 | break; |
| 378 | default: |
| 379 | return -EINVAL; |
| 380 | } |
| 381 | |
| 382 | switch (max98925->sysclk) { |
| 383 | case 6000000: |
| 384 | clock = 0; |
| 385 | mdll = M98925_MDLL_MULT_MCLKx16; |
| 386 | break; |
| 387 | case 11289600: |
| 388 | clock = 1; |
| 389 | mdll = M98925_MDLL_MULT_MCLKx8; |
| 390 | break; |
| 391 | case 12000000: |
| 392 | clock = 0; |
| 393 | mdll = M98925_MDLL_MULT_MCLKx8; |
| 394 | break; |
| 395 | case 12288000: |
| 396 | clock = 2; |
| 397 | mdll = M98925_MDLL_MULT_MCLKx8; |
| 398 | break; |
| 399 | default: |
| 400 | dev_info(max98925->codec->dev, "unsupported sysclk %d\n", |
| 401 | max98925->sysclk); |
| 402 | return -EINVAL; |
| 403 | } |
| 404 | |
| 405 | if (max98925_rate_value(codec, rate, clock, &dai_sr, &n, &m)) |
| 406 | return -EINVAL; |
| 407 | |
| 408 | /* set DAI_SR to correct LRCLK frequency */ |
| 409 | regmap_update_bits(max98925->regmap, |
| 410 | MAX98925_DAI_CLK_MODE2, |
| 411 | M98925_DAI_SR_MASK, dai_sr << M98925_DAI_SR_SHIFT); |
| 412 | /* set DAI m divider */ |
| 413 | regmap_write(max98925->regmap, |
| 414 | MAX98925_DAI_CLK_DIV_M_MSBS, m >> 8); |
| 415 | regmap_write(max98925->regmap, |
| 416 | MAX98925_DAI_CLK_DIV_M_LSBS, m & 0xFF); |
| 417 | /* set DAI n divider */ |
| 418 | regmap_write(max98925->regmap, |
| 419 | MAX98925_DAI_CLK_DIV_N_MSBS, n >> 8); |
| 420 | regmap_write(max98925->regmap, |
| 421 | MAX98925_DAI_CLK_DIV_N_LSBS, n & 0xFF); |
| 422 | /* set MDLL */ |
| 423 | regmap_update_bits(max98925->regmap, MAX98925_DAI_CLK_MODE1, |
| 424 | M98925_MDLL_MULT_MASK, mdll << M98925_MDLL_MULT_SHIFT); |
| 425 | return 0; |
| 426 | } |
| 427 | |
| 428 | static int max98925_dai_hw_params(struct snd_pcm_substream *substream, |
| 429 | struct snd_pcm_hw_params *params, |
| 430 | struct snd_soc_dai *dai) |
| 431 | { |
| 432 | struct snd_soc_codec *codec = dai->codec; |
| 433 | struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec); |
| 434 | |
| 435 | switch (snd_pcm_format_width(params_format(params))) { |
| 436 | case 16: |
| 437 | regmap_update_bits(max98925->regmap, |
| 438 | MAX98925_FORMAT, |
| 439 | M98925_DAI_CHANSZ_MASK, M98925_DAI_CHANSZ_16); |
| 440 | max98925->ch_size = 16; |
| 441 | break; |
| 442 | case 24: |
| 443 | regmap_update_bits(max98925->regmap, |
| 444 | MAX98925_FORMAT, |
| 445 | M98925_DAI_CHANSZ_MASK, M98925_DAI_CHANSZ_32); |
| 446 | max98925->ch_size = 32; |
| 447 | break; |
| 448 | case 32: |
| 449 | regmap_update_bits(max98925->regmap, |
| 450 | MAX98925_FORMAT, |
| 451 | M98925_DAI_CHANSZ_MASK, M98925_DAI_CHANSZ_32); |
| 452 | max98925->ch_size = 32; |
| 453 | break; |
| 454 | default: |
| 455 | pr_err("%s: format unsupported %d", |
| 456 | __func__, params_format(params)); |
| 457 | return -EINVAL; |
| 458 | } |
| 459 | dev_dbg(codec->dev, "%s: format supported %d", |
| 460 | __func__, params_format(params)); |
| 461 | return max98925_set_clock(max98925, params); |
| 462 | } |
| 463 | |
| 464 | static int max98925_dai_set_sysclk(struct snd_soc_dai *dai, |
| 465 | int clk_id, unsigned int freq, int dir) |
| 466 | { |
| 467 | struct snd_soc_codec *codec = dai->codec; |
| 468 | struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec); |
| 469 | |
| 470 | switch (clk_id) { |
| 471 | case 0: |
| 472 | /* use MCLK for Left channel, right channel always BCLK */ |
| 473 | regmap_update_bits(max98925->regmap, |
| 474 | MAX98925_DAI_CLK_MODE1, |
| 475 | M98925_DAI_CLK_SOURCE_MASK, 0); |
| 476 | break; |
| 477 | case 1: |
| 478 | /* configure dai clock source to BCLK instead of MCLK */ |
| 479 | regmap_update_bits(max98925->regmap, |
| 480 | MAX98925_DAI_CLK_MODE1, |
| 481 | M98925_DAI_CLK_SOURCE_MASK, |
| 482 | M98925_DAI_CLK_SOURCE_MASK); |
| 483 | break; |
| 484 | default: |
| 485 | return -EINVAL; |
| 486 | } |
| 487 | max98925->sysclk = freq; |
| 488 | return 0; |
| 489 | } |
| 490 | |
| 491 | #define MAX98925_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ |
| 492 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
| 493 | |
Krzysztof Kozlowski | 9cd974b | 2015-03-20 12:35:45 +0100 | [diff] [blame^] | 494 | static const struct snd_soc_dai_ops max98925_dai_ops = { |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 495 | .set_sysclk = max98925_dai_set_sysclk, |
| 496 | .set_fmt = max98925_dai_set_fmt, |
| 497 | .hw_params = max98925_dai_hw_params, |
| 498 | }; |
| 499 | |
| 500 | static struct snd_soc_dai_driver max98925_dai[] = { |
| 501 | { |
| 502 | .name = "max98925-aif1", |
| 503 | .playback = { |
| 504 | .stream_name = "HiFi Playback", |
| 505 | .channels_min = 1, |
| 506 | .channels_max = 2, |
| 507 | .rates = SNDRV_PCM_RATE_8000_48000, |
| 508 | .formats = MAX98925_FORMATS, |
| 509 | }, |
| 510 | .capture = { |
| 511 | .stream_name = "HiFi Capture", |
| 512 | .channels_min = 1, |
| 513 | .channels_max = 2, |
| 514 | .rates = SNDRV_PCM_RATE_8000_48000, |
| 515 | .formats = MAX98925_FORMATS, |
| 516 | }, |
| 517 | .ops = &max98925_dai_ops, |
| 518 | } |
| 519 | }; |
| 520 | |
| 521 | static int max98925_probe(struct snd_soc_codec *codec) |
| 522 | { |
| 523 | struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec); |
| 524 | |
| 525 | max98925->codec = codec; |
| 526 | codec->control_data = max98925->regmap; |
| 527 | regmap_write(max98925->regmap, MAX98925_GLOBAL_ENABLE, 0x00); |
| 528 | /* It's not the default but we need to set DAI_DLY */ |
| 529 | regmap_write(max98925->regmap, |
| 530 | MAX98925_FORMAT, M98925_DAI_DLY_MASK); |
| 531 | regmap_write(max98925->regmap, MAX98925_TDM_SLOT_SELECT, 0xC8); |
| 532 | regmap_write(max98925->regmap, MAX98925_DOUT_HIZ_CFG1, 0xFF); |
| 533 | regmap_write(max98925->regmap, MAX98925_DOUT_HIZ_CFG2, 0xFF); |
| 534 | regmap_write(max98925->regmap, MAX98925_DOUT_HIZ_CFG3, 0xFF); |
| 535 | regmap_write(max98925->regmap, MAX98925_DOUT_HIZ_CFG4, 0xF0); |
| 536 | regmap_write(max98925->regmap, MAX98925_FILTERS, 0xD8); |
| 537 | regmap_write(max98925->regmap, MAX98925_ALC_CONFIGURATION, 0xF8); |
| 538 | regmap_write(max98925->regmap, MAX98925_CONFIGURATION, 0xF0); |
| 539 | /* Disable ALC muting */ |
| 540 | regmap_write(max98925->regmap, MAX98925_BOOST_LIMITER, 0xF8); |
| 541 | return 0; |
| 542 | } |
| 543 | |
Krzysztof Kozlowski | 9cd974b | 2015-03-20 12:35:45 +0100 | [diff] [blame^] | 544 | static const struct snd_soc_codec_driver soc_codec_dev_max98925 = { |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 545 | .probe = max98925_probe, |
| 546 | .controls = max98925_snd_controls, |
| 547 | .num_controls = ARRAY_SIZE(max98925_snd_controls), |
| 548 | .dapm_routes = max98925_audio_map, |
| 549 | .num_dapm_routes = ARRAY_SIZE(max98925_audio_map), |
| 550 | .dapm_widgets = max98925_dapm_widgets, |
| 551 | .num_dapm_widgets = ARRAY_SIZE(max98925_dapm_widgets), |
| 552 | }; |
| 553 | |
Krzysztof Kozlowski | 9cd974b | 2015-03-20 12:35:45 +0100 | [diff] [blame^] | 554 | static const struct regmap_config max98925_regmap = { |
Anish Kumar | 1ff2765 | 2015-03-09 15:50:34 -0700 | [diff] [blame] | 555 | .reg_bits = 8, |
| 556 | .val_bits = 8, |
| 557 | .max_register = MAX98925_REV_VERSION, |
| 558 | .reg_defaults = max98925_reg, |
| 559 | .num_reg_defaults = ARRAY_SIZE(max98925_reg), |
| 560 | .volatile_reg = max98925_volatile_register, |
| 561 | .readable_reg = max98925_readable_register, |
| 562 | .cache_type = REGCACHE_RBTREE, |
| 563 | }; |
| 564 | |
| 565 | static int max98925_i2c_probe(struct i2c_client *i2c, |
| 566 | const struct i2c_device_id *id) |
| 567 | { |
| 568 | int ret, reg; |
| 569 | u32 value; |
| 570 | struct max98925_priv *max98925; |
| 571 | |
| 572 | max98925 = devm_kzalloc(&i2c->dev, |
| 573 | sizeof(*max98925), GFP_KERNEL); |
| 574 | if (!max98925) |
| 575 | return -ENOMEM; |
| 576 | |
| 577 | i2c_set_clientdata(i2c, max98925); |
| 578 | max98925->regmap = devm_regmap_init_i2c(i2c, &max98925_regmap); |
| 579 | if (IS_ERR(max98925->regmap)) { |
| 580 | ret = PTR_ERR(max98925->regmap); |
| 581 | dev_err(&i2c->dev, |
| 582 | "Failed to allocate regmap: %d\n", ret); |
| 583 | goto err_out; |
| 584 | } |
| 585 | |
| 586 | if (!of_property_read_u32(i2c->dev.of_node, "vmon-slot-no", &value)) { |
| 587 | if (value > M98925_DAI_VMON_SLOT_1E_1F) { |
| 588 | dev_err(&i2c->dev, "vmon slot number is wrong:\n"); |
| 589 | return -EINVAL; |
| 590 | } |
| 591 | max98925->v_slot = value; |
| 592 | } |
| 593 | if (!of_property_read_u32(i2c->dev.of_node, "imon-slot-no", &value)) { |
| 594 | if (value > M98925_DAI_IMON_SLOT_1E_1F) { |
| 595 | dev_err(&i2c->dev, "imon slot number is wrong:\n"); |
| 596 | return -EINVAL; |
| 597 | } |
| 598 | max98925->i_slot = value; |
| 599 | } |
| 600 | ret = regmap_read(max98925->regmap, |
| 601 | MAX98925_REV_VERSION, ®); |
| 602 | if ((ret < 0) || |
| 603 | ((reg != MAX98925_VERSION) && |
| 604 | (reg != MAX98925_VERSION1))) { |
| 605 | dev_err(&i2c->dev, |
| 606 | "device initialization error (%d 0x%02X)\n", |
| 607 | ret, reg); |
| 608 | goto err_out; |
| 609 | } |
| 610 | dev_info(&i2c->dev, "device version 0x%02X\n", reg); |
| 611 | |
| 612 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_max98925, |
| 613 | max98925_dai, ARRAY_SIZE(max98925_dai)); |
| 614 | if (ret < 0) |
| 615 | dev_err(&i2c->dev, |
| 616 | "Failed to register codec: %d\n", ret); |
| 617 | err_out: |
| 618 | return ret; |
| 619 | } |
| 620 | |
| 621 | static int max98925_i2c_remove(struct i2c_client *client) |
| 622 | { |
| 623 | snd_soc_unregister_codec(&client->dev); |
| 624 | return 0; |
| 625 | } |
| 626 | |
| 627 | static const struct i2c_device_id max98925_i2c_id[] = { |
| 628 | { "max98925", 0 }, |
| 629 | { } |
| 630 | }; |
| 631 | MODULE_DEVICE_TABLE(i2c, max98925_i2c_id); |
| 632 | |
| 633 | static const struct of_device_id max98925_of_match[] = { |
| 634 | { .compatible = "maxim,max98925", }, |
| 635 | { } |
| 636 | }; |
| 637 | MODULE_DEVICE_TABLE(of, max98925_of_match); |
| 638 | |
| 639 | static struct i2c_driver max98925_i2c_driver = { |
| 640 | .driver = { |
| 641 | .name = "max98925", |
| 642 | .owner = THIS_MODULE, |
| 643 | .of_match_table = of_match_ptr(max98925_of_match), |
| 644 | .pm = NULL, |
| 645 | }, |
| 646 | .probe = max98925_i2c_probe, |
| 647 | .remove = max98925_i2c_remove, |
| 648 | .id_table = max98925_i2c_id, |
| 649 | }; |
| 650 | |
| 651 | module_i2c_driver(max98925_i2c_driver) |
| 652 | |
| 653 | MODULE_DESCRIPTION("ALSA SoC MAX98925 driver"); |
| 654 | MODULE_AUTHOR("Ralph Birt <rdbirt@gmail.com>, Anish kumar <anish.kumar@maximintegrated.com>"); |
| 655 | MODULE_LICENSE("GPL"); |