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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
Jesse Barnes0a3e67a2008-09-30 12:14:26 -07002 */
3/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
Dave Airlieb5e89ed2005-09-25 14:28:13 +10005 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * The Weather Channel (TM) funded Tungsten Graphics to develop the
7 * initial release of the Radeon 8500 driver under the XFree86 license.
8 * This notice must be preserved.
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice (including the next
18 * paragraph) shall be included in all copies or substantial portions of the
19 * Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
28 *
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Eric Anholt <anholt@FreeBSD.org>
32 */
33
David Howells760285e2012-10-02 18:01:07 +010034#include <drm/drmP.h>
35#include <drm/mga_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include "mga_drv.h"
37
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070038u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
39{
40 const drm_mga_private_t *const dev_priv =
41 (drm_mga_private_t *) dev->dev_private;
42
43 if (crtc != 0)
44 return 0;
45
46 return atomic_read(&dev_priv->vbl_received);
47}
48
49
Daniel Vettere9f0d762013-12-11 11:34:42 +010050irqreturn_t mga_driver_irq_handler(int irq, void *arg)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051{
Dave Airlieeddca552007-07-11 16:09:54 +100052 struct drm_device *dev = (struct drm_device *) arg;
Dave Airlieb5e89ed2005-09-25 14:28:13 +100053 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
Linus Torvalds1da177e2005-04-16 15:20:36 -070054 int status;
Dave Airlie6795c982005-07-10 18:20:09 +100055 int handled = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
Dave Airlie6795c982005-07-10 18:20:09 +100057 status = MGA_READ(MGA_STATUS);
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 /* VBLANK interrupt */
Dave Airlieb5e89ed2005-09-25 14:28:13 +100060 if (status & MGA_VLINEPEN) {
61 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070062 atomic_inc(&dev_priv->vbl_received);
63 drm_handle_vblank(dev, 0);
Dave Airlie6795c982005-07-10 18:20:09 +100064 handled = 1;
65 }
66
67 /* SOFTRAP interrupt */
68 if (status & MGA_SOFTRAPEN) {
69 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
Dave Airlieb5e89ed2005-09-25 14:28:13 +100070 const u32 prim_end = MGA_READ(MGA_PRIMEND);
Dave Airlie6795c982005-07-10 18:20:09 +100071
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070072
Dave Airlie6795c982005-07-10 18:20:09 +100073 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
74
75 /* In addition to clearing the interrupt-pending bit, we
76 * have to write to MGA_PRIMEND to re-start the DMA operation.
77 */
Nicolas Kaiserf2b2cb72010-07-12 01:46:57 +020078 if ((prim_start & ~0x03) != (prim_end & ~0x03))
Dave Airlie6795c982005-07-10 18:20:09 +100079 MGA_WRITE(MGA_PRIMEND, prim_end);
Dave Airlie6795c982005-07-10 18:20:09 +100080
81 atomic_inc(&dev_priv->last_fence_retired);
Daniel Vetter57ed0f72013-12-11 11:34:43 +010082 wake_up(&dev_priv->fence_queue);
Dave Airlie6795c982005-07-10 18:20:09 +100083 handled = 1;
84 }
85
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070086 if (handled)
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 return IRQ_NONE;
89}
90
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070091int mga_enable_vblank(struct drm_device *dev, int crtc)
Linus Torvalds1da177e2005-04-16 15:20:36 -070092{
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070093 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070095 if (crtc != 0) {
96 DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
97 crtc);
98 return 0;
99 }
100
101 MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
102 return 0;
103}
104
105
106void mga_disable_vblank(struct drm_device *dev, int crtc)
107{
108 if (crtc != 0) {
109 DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
110 crtc);
111 }
112
113 /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
114 * a nice hardware counter that tracks the number of refreshes when
115 * the interrupt is disabled, and the kernel doesn't know the refresh
116 * rate to calculate an estimate.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 */
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700118 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119}
120
Nicolas Kaiserf2b2cb72010-07-12 01:46:57 +0200121int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
Dave Airlie6795c982005-07-10 18:20:09 +1000122{
123 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
124 unsigned int cur_fence;
125 int ret = 0;
126
127 /* Assume that the user has missed the current sequence number
128 * by about a day rather than she wants to wait for years
129 * using fences.
130 */
Daniel Vetterbfd83032013-12-11 11:34:41 +0100131 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ,
Dave Airlie6795c982005-07-10 18:20:09 +1000132 (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
133 - *sequence) <= (1 << 23)));
134
135 *sequence = cur_fence;
136
137 return ret;
138}
139
Nicolas Kaiserf2b2cb72010-07-12 01:46:57 +0200140void mga_driver_irq_preinstall(struct drm_device *dev)
Dave Airlie6795c982005-07-10 18:20:09 +1000141{
142 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
144 /* Disable *all* interrupts */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000145 MGA_WRITE(MGA_IEN, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 /* Clear bits if they're already high */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000147 MGA_WRITE(MGA_ICLEAR, ~0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148}
149
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700150int mga_driver_irq_postinstall(struct drm_device *dev)
Dave Airlie6795c982005-07-10 18:20:09 +1000151{
152 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153
Daniel Vetter57ed0f72013-12-11 11:34:43 +0100154 init_waitqueue_head(&dev_priv->fence_queue);
Dave Airlie6795c982005-07-10 18:20:09 +1000155
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700156 /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
157 * in mga_enable_vblank.
158 */
159 MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
160 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161}
162
Nicolas Kaiserf2b2cb72010-07-12 01:46:57 +0200163void mga_driver_irq_uninstall(struct drm_device *dev)
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000164{
165 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 if (!dev_priv)
167 return;
168
169 /* Disable *all* interrupts */
Dave Airlie6795c982005-07-10 18:20:09 +1000170 MGA_WRITE(MGA_IEN, 0);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000171
Ville Syrjälä44238432013-10-04 14:53:37 +0300172 dev->irq_enabled = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173}