blob: 622968161ac7c103cf6d5aa75ab6bd4cbcc9c7d5 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
Duncan Laurie8ca40132011-10-25 15:42:21 -070027#include <linux/dmi.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080028#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010030#include <drm/drmP.h>
Matt Roperc6f95f22015-01-22 16:50:32 -080031#include <drm/drm_atomic_helper.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drm_crtc.h>
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_edid.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38
Keith Packarde7dbb2f2010-11-16 16:03:53 +080039/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000047struct intel_crt {
48 struct intel_encoder base;
Adam Jackson637f44d2013-03-25 15:40:05 -040049 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector *connector;
Keith Packarde7dbb2f2010-11-16 16:03:53 +080052 bool force_hotplug_required;
Ville Syrjäläf0f59a02015-11-18 15:33:26 +020053 i915_reg_t adpa_reg;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000054};
55
Daniel Vetter540a8952012-07-11 16:27:57 +020056static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -080057{
Daniel Vetter540a8952012-07-11 16:27:57 +020058 return container_of(encoder, struct intel_crt, base);
Jesse Barnesdf0323c2012-04-17 15:06:33 -070059}
60
Daniel Vettereebe6f02013-07-21 21:37:03 +020061static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
62{
63 return intel_encoder_to_crt(intel_attached_encoder(connector));
64}
65
Daniel Vettere403fc92012-07-02 13:41:21 +020066static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
67 enum pipe *pipe)
Jesse Barnesdf0323c2012-04-17 15:06:33 -070068{
Daniel Vettere403fc92012-07-02 13:41:21 +020069 struct drm_device *dev = encoder->base.dev;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070070 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vettere403fc92012-07-02 13:41:21 +020071 struct intel_crt *crt = intel_encoder_to_crt(encoder);
Imre Deak6d129be2014-03-05 16:20:54 +020072 enum intel_display_power_domain power_domain;
Daniel Vettere403fc92012-07-02 13:41:21 +020073 u32 tmp;
Imre Deak1c8fdda2016-02-12 18:55:15 +020074 bool ret;
Zhenyu Wang2c072452009-06-05 15:38:42 +080075
Imre Deak6d129be2014-03-05 16:20:54 +020076 power_domain = intel_display_port_power_domain(encoder);
Imre Deak1c8fdda2016-02-12 18:55:15 +020077 if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
Imre Deak6d129be2014-03-05 16:20:54 +020078 return false;
79
Imre Deak1c8fdda2016-02-12 18:55:15 +020080 ret = false;
81
Daniel Vettere403fc92012-07-02 13:41:21 +020082 tmp = I915_READ(crt->adpa_reg);
Zhenyu Wang2c072452009-06-05 15:38:42 +080083
Daniel Vettere403fc92012-07-02 13:41:21 +020084 if (!(tmp & ADPA_DAC_ENABLE))
Imre Deak1c8fdda2016-02-12 18:55:15 +020085 goto out;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070086
Daniel Vettere403fc92012-07-02 13:41:21 +020087 if (HAS_PCH_CPT(dev))
88 *pipe = PORT_TO_PIPE_CPT(tmp);
89 else
90 *pipe = PORT_TO_PIPE(tmp);
91
Imre Deak1c8fdda2016-02-12 18:55:15 +020092 ret = true;
93out:
94 intel_display_power_put(dev_priv, power_domain);
95
96 return ret;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070097}
98
Ville Syrjälä6801c182013-09-24 14:24:05 +030099static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700100{
101 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
102 struct intel_crt *crt = intel_encoder_to_crt(encoder);
103 u32 tmp, flags = 0;
104
105 tmp = I915_READ(crt->adpa_reg);
106
107 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
108 flags |= DRM_MODE_FLAG_PHSYNC;
109 else
110 flags |= DRM_MODE_FLAG_NHSYNC;
111
112 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
113 flags |= DRM_MODE_FLAG_PVSYNC;
114 else
115 flags |= DRM_MODE_FLAG_NVSYNC;
116
Ville Syrjälä6801c182013-09-24 14:24:05 +0300117 return flags;
118}
119
120static void intel_crt_get_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200121 struct intel_crtc_state *pipe_config)
Ville Syrjälä6801c182013-09-24 14:24:05 +0300122{
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200123 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
Ville Syrjälä18442d02013-09-13 16:00:08 +0300124
Ville Syrjäläe3b247d2016-02-17 21:41:09 +0200125 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700126}
127
Ville Syrjälä6801c182013-09-24 14:24:05 +0300128static void hsw_crt_get_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200129 struct intel_crtc_state *pipe_config)
Ville Syrjälä6801c182013-09-24 14:24:05 +0300130{
Ville Syrjälä8802e5b2016-02-17 21:41:12 +0200131 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
132
Ville Syrjälä6801c182013-09-24 14:24:05 +0300133 intel_ddi_get_config(encoder, pipe_config);
134
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200135 pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
Ville Syrjälä6801c182013-09-24 14:24:05 +0300136 DRM_MODE_FLAG_NHSYNC |
137 DRM_MODE_FLAG_PVSYNC |
138 DRM_MODE_FLAG_NVSYNC);
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200139 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
Ville Syrjälä8802e5b2016-02-17 21:41:12 +0200140
141 pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv);
Ville Syrjälä6801c182013-09-24 14:24:05 +0300142}
143
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200144/* Note: The caller is required to filter out dpms modes not supported by the
145 * platform. */
146static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800147{
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200148 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800149 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200150 struct intel_crt *crt = intel_encoder_to_crt(encoder);
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200151 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Ville Syrjälä7c5f93b2015-09-08 13:40:49 +0300152 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200153 u32 adpa;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800154
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200155 if (INTEL_INFO(dev)->gen >= 5)
156 adpa = ADPA_HOTPLUG_BITS;
157 else
158 adpa = 0;
159
160 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
161 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
162 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
163 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
164
165 /* For CPT allow 3 pipe config, for others just use A or B */
166 if (HAS_PCH_LPT(dev))
167 ; /* Those bits don't exist here */
168 else if (HAS_PCH_CPT(dev))
169 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
170 else if (crtc->pipe == 0)
171 adpa |= ADPA_PIPE_A_SELECT;
172 else
173 adpa |= ADPA_PIPE_B_SELECT;
174
175 if (!HAS_PCH_SPLIT(dev))
176 I915_WRITE(BCLRPAT(crtc->pipe), 0);
Jesse Barnesbd9e8412012-06-15 11:55:18 -0700177
Akshay Joshi0206e352011-08-16 15:34:10 -0400178 switch (mode) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800179 case DRM_MODE_DPMS_ON:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200180 adpa |= ADPA_DAC_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800181 break;
182 case DRM_MODE_DPMS_STANDBY:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200183 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800184 break;
185 case DRM_MODE_DPMS_SUSPEND:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200186 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800187 break;
188 case DRM_MODE_DPMS_OFF:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200189 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800190 break;
191 }
192
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200193 I915_WRITE(crt->adpa_reg, adpa);
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200194}
195
Adam Jackson637f44d2013-03-25 15:40:05 -0400196static void intel_disable_crt(struct intel_encoder *encoder)
197{
198 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
199}
200
Ville Syrjälä1ea56e22015-05-05 17:17:37 +0300201static void pch_disable_crt(struct intel_encoder *encoder)
202{
203}
204
205static void pch_post_disable_crt(struct intel_encoder *encoder)
206{
207 intel_disable_crt(encoder);
208}
Daniel Vetterabfdc1e2014-06-25 22:01:52 +0300209
Adam Jackson637f44d2013-03-25 15:40:05 -0400210static void intel_enable_crt(struct intel_encoder *encoder)
211{
Maarten Lankhorst7bb4afb2016-02-17 09:18:38 +0100212 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_ON);
Adam Jackson637f44d2013-03-25 15:40:05 -0400213}
214
Damien Lespiauc19de8e2013-11-28 15:29:18 +0000215static enum drm_mode_status
216intel_crt_mode_valid(struct drm_connector *connector,
217 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800218{
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800219 struct drm_device *dev = connector->dev;
Mika Kaholaf8700b32016-02-02 15:16:42 +0200220 int max_dotclk = to_i915(dev)->max_dotclk_freq;
Ville Syrjälädebded82016-02-17 21:41:13 +0200221 int max_clock;
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800222
Jesse Barnes79e53942008-11-07 14:24:08 -0800223 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
224 return MODE_NO_DBLESCAN;
225
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800226 if (mode->clock < 25000)
227 return MODE_CLOCK_LOW;
228
Ville Syrjälädebded82016-02-17 21:41:13 +0200229 if (HAS_PCH_LPT(dev))
230 max_clock = 180000;
231 else if (IS_VALLEYVIEW(dev))
232 /*
233 * 270 MHz due to current DPLL limits,
234 * DAC limit supposedly 355 MHz.
235 */
236 max_clock = 270000;
237 else if (IS_GEN3(dev) || IS_GEN4(dev))
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800238 max_clock = 400000;
Ville Syrjälädebded82016-02-17 21:41:13 +0200239 else
240 max_clock = 350000;
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800241 if (mode->clock > max_clock)
242 return MODE_CLOCK_HIGH;
Jesse Barnes79e53942008-11-07 14:24:08 -0800243
Mika Kaholaf8700b32016-02-02 15:16:42 +0200244 if (mode->clock > max_dotclk)
245 return MODE_CLOCK_HIGH;
246
Paulo Zanonid4b19312012-11-29 11:29:32 -0200247 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
248 if (HAS_PCH_LPT(dev) &&
249 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
250 return MODE_CLOCK_HIGH;
251
Jesse Barnes79e53942008-11-07 14:24:08 -0800252 return MODE_OK;
253}
254
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100255static bool intel_crt_compute_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200256 struct intel_crtc_state *pipe_config)
Jesse Barnes79e53942008-11-07 14:24:08 -0800257{
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100258 struct drm_device *dev = encoder->base.dev;
259
260 if (HAS_PCH_SPLIT(dev))
261 pipe_config->has_pch_encoder = true;
262
Daniel Vetter2a7acee2013-04-19 11:24:39 +0200263 /* LPT FDI RX only supports 8bpc. */
Daniel Vetterf58a1ac2016-05-03 10:33:01 +0200264 if (HAS_PCH_LPT(dev)) {
265 if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
266 DRM_DEBUG_KMS("LPT only supports 24bpp\n");
267 return false;
268 }
269
Daniel Vetter2a7acee2013-04-19 11:24:39 +0200270 pipe_config->pipe_bpp = 24;
Daniel Vetterf58a1ac2016-05-03 10:33:01 +0200271 }
Daniel Vetter2a7acee2013-04-19 11:24:39 +0200272
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200273 /* FDI must always be 2.7 GHz */
Ander Conselvan de Oliveiradaedf202016-03-08 17:46:23 +0200274 if (HAS_DDI(dev))
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200275 pipe_config->port_clock = 135000 * 2;
Maarten Lankhorst00490c22015-11-16 14:42:12 +0100276
Jesse Barnes79e53942008-11-07 14:24:08 -0800277 return true;
278}
279
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500280static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800281{
282 struct drm_device *dev = connector->dev;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800283 struct intel_crt *crt = intel_attached_crt(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800284 struct drm_i915_private *dev_priv = dev->dev_private;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800285 u32 adpa;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800286 bool ret;
287
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800288 /* The first time through, trigger an explicit detection cycle */
289 if (crt->force_hotplug_required) {
290 bool turn_off_dac = HAS_PCH_SPLIT(dev);
291 u32 save_adpa;
Zhenyu Wang67941da2009-07-24 01:00:33 +0800292
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800293 crt->force_hotplug_required = 0;
Dave Airlied5dd96c2010-08-04 15:52:19 +1000294
Ville Syrjäläca54b812013-01-25 21:44:42 +0200295 save_adpa = adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800296 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
Dave Airlied5dd96c2010-08-04 15:52:19 +1000297
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800298 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
299 if (turn_off_dac)
300 adpa &= ~ADPA_DAC_ENABLE;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800301
Ville Syrjäläca54b812013-01-25 21:44:42 +0200302 I915_WRITE(crt->adpa_reg, adpa);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800303
Ville Syrjäläca54b812013-01-25 21:44:42 +0200304 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800305 1000))
306 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Zhenyu Wang2c072452009-06-05 15:38:42 +0800307
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800308 if (turn_off_dac) {
Ville Syrjäläca54b812013-01-25 21:44:42 +0200309 I915_WRITE(crt->adpa_reg, save_adpa);
310 POSTING_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800311 }
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800312 }
313
Zhenyu Wang2c072452009-06-05 15:38:42 +0800314 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200315 adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800316 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800317 ret = true;
318 else
319 ret = false;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800320 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800321
Zhenyu Wang2c072452009-06-05 15:38:42 +0800322 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800323}
324
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700325static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
326{
327 struct drm_device *dev = connector->dev;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200328 struct intel_crt *crt = intel_attached_crt(connector);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700329 struct drm_i915_private *dev_priv = dev->dev_private;
330 u32 adpa;
331 bool ret;
332 u32 save_adpa;
333
Ville Syrjäläca54b812013-01-25 21:44:42 +0200334 save_adpa = adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700335 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
336
337 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
338
Ville Syrjäläca54b812013-01-25 21:44:42 +0200339 I915_WRITE(crt->adpa_reg, adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700340
Ville Syrjäläca54b812013-01-25 21:44:42 +0200341 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700342 1000)) {
343 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Ville Syrjäläca54b812013-01-25 21:44:42 +0200344 I915_WRITE(crt->adpa_reg, save_adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700345 }
346
347 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200348 adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700349 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
350 ret = true;
351 else
352 ret = false;
353
354 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
355
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700356 return ret;
357}
358
Jesse Barnes79e53942008-11-07 14:24:08 -0800359/**
360 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
361 *
362 * Not for i915G/i915GM
363 *
364 * \return true if CRT is connected.
365 * \return false if CRT is disconnected.
366 */
367static bool intel_crt_detect_hotplug(struct drm_connector *connector)
368{
369 struct drm_device *dev = connector->dev;
370 struct drm_i915_private *dev_priv = dev->dev_private;
Egbert Eich0706f172015-09-23 16:15:27 +0200371 u32 stat;
Adam Jackson7a772c42010-05-24 16:46:29 -0400372 bool ret = false;
Zhao Yakui771cb082009-03-03 18:07:52 +0800373 int i, tries = 0;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800374
Eric Anholtbad720f2009-10-22 16:11:14 -0700375 if (HAS_PCH_SPLIT(dev))
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500376 return intel_ironlake_crt_detect_hotplug(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800377
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700378 if (IS_VALLEYVIEW(dev))
379 return valleyview_crt_detect_hotplug(connector);
380
Zhao Yakui771cb082009-03-03 18:07:52 +0800381 /*
382 * On 4 series desktop, CRT detect sequence need to be done twice
383 * to get a reliable result.
384 */
Jesse Barnes79e53942008-11-07 14:24:08 -0800385
Zhao Yakui771cb082009-03-03 18:07:52 +0800386 if (IS_G4X(dev) && !IS_GM45(dev))
387 tries = 2;
388 else
389 tries = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800390
Zhao Yakui771cb082009-03-03 18:07:52 +0800391 for (i = 0; i < tries ; i++) {
Zhao Yakui771cb082009-03-03 18:07:52 +0800392 /* turn on the FORCE_DETECT */
Egbert Eich0706f172015-09-23 16:15:27 +0200393 i915_hotplug_interrupt_update(dev_priv,
394 CRT_HOTPLUG_FORCE_DETECT,
395 CRT_HOTPLUG_FORCE_DETECT);
Zhao Yakui771cb082009-03-03 18:07:52 +0800396 /* wait for FORCE_DETECT to go off */
Chris Wilson913d8d12010-08-07 11:01:35 +0100397 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
398 CRT_HOTPLUG_FORCE_DETECT) == 0,
Chris Wilson481b6af2010-08-23 17:43:35 +0100399 1000))
Chris Wilson79077312010-09-12 19:58:04 +0100400 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
Zhao Yakui771cb082009-03-03 18:07:52 +0800401 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800402
Adam Jackson7a772c42010-05-24 16:46:29 -0400403 stat = I915_READ(PORT_HOTPLUG_STAT);
404 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
405 ret = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800406
Adam Jackson7a772c42010-05-24 16:46:29 -0400407 /* clear the interrupt we just generated, if any */
408 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
409
Egbert Eich0706f172015-09-23 16:15:27 +0200410 i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
Adam Jackson7a772c42010-05-24 16:46:29 -0400411
412 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800413}
414
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300415static struct edid *intel_crt_get_edid(struct drm_connector *connector,
416 struct i2c_adapter *i2c)
417{
418 struct edid *edid;
419
420 edid = drm_get_edid(connector, i2c);
421
422 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
423 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
424 intel_gmbus_force_bit(i2c, true);
425 edid = drm_get_edid(connector, i2c);
426 intel_gmbus_force_bit(i2c, false);
427 }
428
429 return edid;
430}
431
432/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
433static int intel_crt_ddc_get_modes(struct drm_connector *connector,
434 struct i2c_adapter *adapter)
435{
436 struct edid *edid;
Jani Nikulaebda95a2012-10-19 14:51:51 +0300437 int ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300438
439 edid = intel_crt_get_edid(connector, adapter);
440 if (!edid)
441 return 0;
442
Jani Nikulaebda95a2012-10-19 14:51:51 +0300443 ret = intel_connector_update_modes(connector, edid);
444 kfree(edid);
445
446 return ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300447}
448
David Müllerf5afcd32011-01-06 12:29:32 +0000449static bool intel_crt_detect_ddc(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800450{
David Müllerf5afcd32011-01-06 12:29:32 +0000451 struct intel_crt *crt = intel_attached_crt(connector);
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000452 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200453 struct edid *edid;
454 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800455
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200456 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
Jesse Barnes79e53942008-11-07 14:24:08 -0800457
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300458 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300459 edid = intel_crt_get_edid(connector, i2c);
David Müllerf5afcd32011-01-06 12:29:32 +0000460
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200461 if (edid) {
462 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
463
David Müllerf5afcd32011-01-06 12:29:32 +0000464 /*
465 * This may be a DVI-I connector with a shared DDC
466 * link between analog and digital outputs, so we
467 * have to check the EDID input spec of the attached device.
468 */
David Müllerf5afcd32011-01-06 12:29:32 +0000469 if (!is_digital) {
470 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
471 return true;
472 }
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200473
474 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
475 } else {
476 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100477 }
478
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200479 kfree(edid);
480
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100481 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800482}
483
Ma Linge4a5d542009-05-26 11:31:00 +0800484static enum drm_connector_status
Maarten Lankhorstc8ecb2f2016-02-17 09:18:36 +0100485intel_crt_load_detect(struct intel_crt *crt, uint32_t pipe)
Ma Linge4a5d542009-05-26 11:31:00 +0800486{
Chris Wilson71731882011-04-19 23:10:58 +0100487 struct drm_device *dev = crt->base.base.dev;
Ma Linge4a5d542009-05-26 11:31:00 +0800488 struct drm_i915_private *dev_priv = dev->dev_private;
Ma Linge4a5d542009-05-26 11:31:00 +0800489 uint32_t save_bclrpat;
490 uint32_t save_vtotal;
491 uint32_t vtotal, vactive;
492 uint32_t vsample;
493 uint32_t vblank, vblank_start, vblank_end;
494 uint32_t dsl;
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200495 i915_reg_t bclrpat_reg, vtotal_reg,
496 vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg;
Ma Linge4a5d542009-05-26 11:31:00 +0800497 uint8_t st00;
498 enum drm_connector_status status;
499
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100500 DRM_DEBUG_KMS("starting load-detect on CRT\n");
501
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800502 bclrpat_reg = BCLRPAT(pipe);
503 vtotal_reg = VTOTAL(pipe);
504 vblank_reg = VBLANK(pipe);
505 vsync_reg = VSYNC(pipe);
506 pipeconf_reg = PIPECONF(pipe);
507 pipe_dsl_reg = PIPEDSL(pipe);
Ma Linge4a5d542009-05-26 11:31:00 +0800508
509 save_bclrpat = I915_READ(bclrpat_reg);
510 save_vtotal = I915_READ(vtotal_reg);
511 vblank = I915_READ(vblank_reg);
512
513 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
514 vactive = (save_vtotal & 0x7ff) + 1;
515
516 vblank_start = (vblank & 0xfff) + 1;
517 vblank_end = ((vblank >> 16) & 0xfff) + 1;
518
519 /* Set the border color to purple. */
520 I915_WRITE(bclrpat_reg, 0x500050);
521
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100522 if (!IS_GEN2(dev)) {
Ma Linge4a5d542009-05-26 11:31:00 +0800523 uint32_t pipeconf = I915_READ(pipeconf_reg);
524 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
Chris Wilson19c55da2010-08-09 14:50:53 +0100525 POSTING_READ(pipeconf_reg);
Ma Linge4a5d542009-05-26 11:31:00 +0800526 /* Wait for next Vblank to substitue
527 * border color for Color info */
Jesse Barnes9d0498a2010-08-18 13:20:54 -0700528 intel_wait_for_vblank(dev, pipe);
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200529 st00 = I915_READ8(_VGA_MSR_WRITE);
Ma Linge4a5d542009-05-26 11:31:00 +0800530 status = ((st00 & (1 << 4)) != 0) ?
531 connector_status_connected :
532 connector_status_disconnected;
533
534 I915_WRITE(pipeconf_reg, pipeconf);
535 } else {
536 bool restore_vblank = false;
537 int count, detect;
538
539 /*
540 * If there isn't any border, add some.
541 * Yes, this will flicker
542 */
543 if (vblank_start <= vactive && vblank_end >= vtotal) {
544 uint32_t vsync = I915_READ(vsync_reg);
545 uint32_t vsync_start = (vsync & 0xffff) + 1;
546
547 vblank_start = vsync_start;
548 I915_WRITE(vblank_reg,
549 (vblank_start - 1) |
550 ((vblank_end - 1) << 16));
551 restore_vblank = true;
552 }
553 /* sample in the vertical border, selecting the larger one */
554 if (vblank_start - vactive >= vtotal - vblank_end)
555 vsample = (vblank_start + vactive) >> 1;
556 else
557 vsample = (vtotal + vblank_end) >> 1;
558
559 /*
560 * Wait for the border to be displayed
561 */
562 while (I915_READ(pipe_dsl_reg) >= vactive)
563 ;
564 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
565 ;
566 /*
567 * Watch ST00 for an entire scanline
568 */
569 detect = 0;
570 count = 0;
571 do {
572 count++;
573 /* Read the ST00 VGA status register */
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200574 st00 = I915_READ8(_VGA_MSR_WRITE);
Ma Linge4a5d542009-05-26 11:31:00 +0800575 if (st00 & (1 << 4))
576 detect++;
577 } while ((I915_READ(pipe_dsl_reg) == dsl));
578
579 /* restore vblank if necessary */
580 if (restore_vblank)
581 I915_WRITE(vblank_reg, vblank);
582 /*
583 * If more than 3/4 of the scanline detected a monitor,
584 * then it is assumed to be present. This works even on i830,
585 * where there isn't any way to force the border color across
586 * the screen
587 */
588 status = detect * 4 > count * 3 ?
589 connector_status_connected :
590 connector_status_disconnected;
591 }
592
593 /* Restore previous settings */
594 I915_WRITE(bclrpat_reg, save_bclrpat);
595
596 return status;
597}
598
Chris Wilson7b334fc2010-09-09 23:51:02 +0100599static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100600intel_crt_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800601{
602 struct drm_device *dev = connector->dev;
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300603 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000604 struct intel_crt *crt = intel_attached_crt(connector);
Imre Deak671dedd2014-03-05 16:20:53 +0200605 struct intel_encoder *intel_encoder = &crt->base;
606 enum intel_display_power_domain power_domain;
Ma Linge4a5d542009-05-26 11:31:00 +0800607 enum drm_connector_status status;
Daniel Vettere95c8432012-04-20 21:03:36 +0200608 struct intel_load_detect_pipe tmp;
Rob Clark51fd3712013-11-19 12:10:12 -0500609 struct drm_modeset_acquire_ctx ctx;
Jesse Barnes79e53942008-11-07 14:24:08 -0800610
Chris Wilson164c8592013-07-20 20:27:08 +0100611 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
Jani Nikulac23cc412014-06-03 14:56:17 +0300612 connector->base.id, connector->name,
Chris Wilson164c8592013-07-20 20:27:08 +0100613 force);
614
Imre Deak671dedd2014-03-05 16:20:53 +0200615 power_domain = intel_display_port_power_domain(intel_encoder);
616 intel_display_power_get(dev_priv, power_domain);
617
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100618 if (I915_HAS_HOTPLUG(dev)) {
Daniel Vetteraaa37732012-06-16 15:30:32 +0200619 /* We can not rely on the HPD pin always being correctly wired
620 * up, for example many KVM do not pass it through, and so
621 * only trust an assertion that the monitor is connected.
622 */
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100623 if (intel_crt_detect_hotplug(connector)) {
624 DRM_DEBUG_KMS("CRT detected via hotplug\n");
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300625 status = connector_status_connected;
626 goto out;
Daniel Vetteraaa37732012-06-16 15:30:32 +0200627 } else
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800628 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800629 }
630
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300631 if (intel_crt_detect_ddc(connector)) {
632 status = connector_status_connected;
633 goto out;
634 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
Daniel Vetteraaa37732012-06-16 15:30:32 +0200636 /* Load detection is broken on HPD capable machines. Whoever wants a
637 * broken monitor (without edid) to work behind a broken kvm (that fails
638 * to have the right resistors for HP detection) needs to fix this up.
639 * For now just bail out. */
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100640 if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300641 status = connector_status_disconnected;
642 goto out;
643 }
Daniel Vetteraaa37732012-06-16 15:30:32 +0200644
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300645 if (!force) {
646 status = connector->status;
647 goto out;
648 }
Chris Wilson7b334fc2010-09-09 23:51:02 +0100649
Ville Syrjälä208bf9f2014-08-11 13:15:35 +0300650 drm_modeset_acquire_init(&ctx, 0);
651
Ma Linge4a5d542009-05-26 11:31:00 +0800652 /* for pre-945g platforms use load detect */
Rob Clark51fd3712013-11-19 12:10:12 -0500653 if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
Daniel Vettere95c8432012-04-20 21:03:36 +0200654 if (intel_crt_detect_ddc(connector))
655 status = connector_status_connected;
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100656 else if (INTEL_INFO(dev)->gen < 4)
Maarten Lankhorstc8ecb2f2016-02-17 09:18:36 +0100657 status = intel_crt_load_detect(crt,
658 to_intel_crtc(connector->state->crtc)->pipe);
Maarten Lankhorst32fff612016-03-01 17:04:01 +0100659 else if (i915.load_detect_test)
660 status = connector_status_disconnected;
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100661 else
662 status = connector_status_unknown;
Ander Conselvan de Oliveira49172fe2015-03-20 16:18:02 +0200663 intel_release_load_detect_pipe(connector, &tmp, &ctx);
Daniel Vettere95c8432012-04-20 21:03:36 +0200664 } else
665 status = connector_status_unknown;
Ma Linge4a5d542009-05-26 11:31:00 +0800666
Ville Syrjälä208bf9f2014-08-11 13:15:35 +0300667 drm_modeset_drop_locks(&ctx);
668 drm_modeset_acquire_fini(&ctx);
669
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300670out:
Imre Deak671dedd2014-03-05 16:20:53 +0200671 intel_display_power_put(dev_priv, power_domain);
Ma Linge4a5d542009-05-26 11:31:00 +0800672 return status;
Jesse Barnes79e53942008-11-07 14:24:08 -0800673}
674
675static void intel_crt_destroy(struct drm_connector *connector)
676{
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 drm_connector_cleanup(connector);
678 kfree(connector);
679}
680
681static int intel_crt_get_modes(struct drm_connector *connector)
682{
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800683 struct drm_device *dev = connector->dev;
Chris Wilsonf899fc62010-07-20 15:44:45 -0700684 struct drm_i915_private *dev_priv = dev->dev_private;
Imre Deak671dedd2014-03-05 16:20:53 +0200685 struct intel_crt *crt = intel_attached_crt(connector);
686 struct intel_encoder *intel_encoder = &crt->base;
687 enum intel_display_power_domain power_domain;
Chris Wilson890f3352010-09-14 16:46:59 +0100688 int ret;
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800689 struct i2c_adapter *i2c;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800690
Imre Deak671dedd2014-03-05 16:20:53 +0200691 power_domain = intel_display_port_power_domain(intel_encoder);
692 intel_display_power_get(dev_priv, power_domain);
693
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300694 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300695 ret = intel_crt_ddc_get_modes(connector, i2c);
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800696 if (ret || !IS_G4X(dev))
Imre Deak671dedd2014-03-05 16:20:53 +0200697 goto out;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800698
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800699 /* Try to probe digital port for output in DVI-I -> VGA mode. */
Jani Nikula988c7012015-03-27 00:20:19 +0200700 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
Imre Deak671dedd2014-03-05 16:20:53 +0200701 ret = intel_crt_ddc_get_modes(connector, i2c);
702
703out:
704 intel_display_power_put(dev_priv, power_domain);
705
706 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800707}
708
709static int intel_crt_set_property(struct drm_connector *connector,
710 struct drm_property *property,
711 uint64_t value)
712{
Jesse Barnes79e53942008-11-07 14:24:08 -0800713 return 0;
714}
715
Chris Wilsonf3269052011-01-24 15:17:08 +0000716static void intel_crt_reset(struct drm_connector *connector)
717{
718 struct drm_device *dev = connector->dev;
Daniel Vetter2e938892012-10-11 20:08:24 +0200719 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonf3269052011-01-24 15:17:08 +0000720 struct intel_crt *crt = intel_attached_crt(connector);
721
Chris Wilson10603ca2013-08-26 19:51:06 -0300722 if (INTEL_INFO(dev)->gen >= 5) {
Daniel Vetter2e938892012-10-11 20:08:24 +0200723 u32 adpa;
724
Ville Syrjäläca54b812013-01-25 21:44:42 +0200725 adpa = I915_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200726 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
727 adpa |= ADPA_HOTPLUG_BITS;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200728 I915_WRITE(crt->adpa_reg, adpa);
729 POSTING_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200730
Ville Syrjälä0039a4b32014-10-16 20:52:30 +0300731 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
Chris Wilsonf3269052011-01-24 15:17:08 +0000732 crt->force_hotplug_required = 1;
Daniel Vetter2e938892012-10-11 20:08:24 +0200733 }
734
Chris Wilsonf3269052011-01-24 15:17:08 +0000735}
736
Jesse Barnes79e53942008-11-07 14:24:08 -0800737/*
738 * Routines for controlling stuff on the analog port
739 */
740
Jesse Barnes79e53942008-11-07 14:24:08 -0800741static const struct drm_connector_funcs intel_crt_connector_funcs = {
Chris Wilsonf3269052011-01-24 15:17:08 +0000742 .reset = intel_crt_reset,
Maarten Lankhorst4d688a22015-08-05 12:37:06 +0200743 .dpms = drm_atomic_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800744 .detect = intel_crt_detect,
745 .fill_modes = drm_helper_probe_single_connector_modes,
746 .destroy = intel_crt_destroy,
747 .set_property = intel_crt_set_property,
Matt Roperc6f95f22015-01-22 16:50:32 -0800748 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
Ander Conselvan de Oliveira98969722015-03-20 16:18:06 +0200749 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
Matt Roper2545e4a2015-01-22 16:51:27 -0800750 .atomic_get_property = intel_connector_atomic_get_property,
Jesse Barnes79e53942008-11-07 14:24:08 -0800751};
752
753static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
754 .mode_valid = intel_crt_mode_valid,
755 .get_modes = intel_crt_get_modes,
Chris Wilsondf0e9242010-09-09 16:20:55 +0100756 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800757};
758
Jesse Barnes79e53942008-11-07 14:24:08 -0800759static const struct drm_encoder_funcs intel_crt_enc_funcs = {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100760 .destroy = intel_encoder_destroy,
Jesse Barnes79e53942008-11-07 14:24:08 -0800761};
762
Mathias Krausebbe1c272014-08-27 18:41:19 +0200763static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
Duncan Laurie8ca40132011-10-25 15:42:21 -0700764{
Daniel Vetterbc0daf42012-04-01 13:16:49 +0200765 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
Duncan Laurie8ca40132011-10-25 15:42:21 -0700766 return 1;
767}
768
769static const struct dmi_system_id intel_no_crt[] = {
770 {
771 .callback = intel_no_crt_dmi_callback,
772 .ident = "ACER ZGB",
773 .matches = {
774 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
775 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
776 },
777 },
Giacomo Comes10b6ee42014-04-03 14:13:55 -0400778 {
779 .callback = intel_no_crt_dmi_callback,
780 .ident = "DELL XPS 8700",
781 .matches = {
782 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
783 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
784 },
785 },
Duncan Laurie8ca40132011-10-25 15:42:21 -0700786 { }
787};
788
Jesse Barnes79e53942008-11-07 14:24:08 -0800789void intel_crt_init(struct drm_device *dev)
790{
791 struct drm_connector *connector;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000792 struct intel_crt *crt;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800793 struct intel_connector *intel_connector;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200794 struct drm_i915_private *dev_priv = dev->dev_private;
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200795 i915_reg_t adpa_reg;
796 u32 adpa;
Jesse Barnes79e53942008-11-07 14:24:08 -0800797
Duncan Laurie8ca40132011-10-25 15:42:21 -0700798 /* Skip machines without VGA that falsely report hotplug events */
799 if (dmi_check_system(intel_no_crt))
800 return;
801
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200802 if (HAS_PCH_SPLIT(dev))
803 adpa_reg = PCH_ADPA;
804 else if (IS_VALLEYVIEW(dev))
805 adpa_reg = VLV_ADPA;
806 else
807 adpa_reg = ADPA;
808
809 adpa = I915_READ(adpa_reg);
810 if ((adpa & ADPA_DAC_ENABLE) == 0) {
811 /*
812 * On some machines (some IVB at least) CRT can be
813 * fused off, but there's no known fuse bit to
814 * indicate that. On these machine the ADPA register
815 * works normally, except the DAC enable bit won't
816 * take. So the only way to tell is attempt to enable
817 * it and see what happens.
818 */
819 I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |
820 ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
821 if ((I915_READ(adpa_reg) & ADPA_DAC_ENABLE) == 0)
822 return;
823 I915_WRITE(adpa_reg, adpa);
824 }
825
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000826 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
827 if (!crt)
Jesse Barnes79e53942008-11-07 14:24:08 -0800828 return;
829
Ander Conselvan de Oliveira9bdbd0b2015-04-10 10:59:10 +0300830 intel_connector = intel_connector_alloc();
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800831 if (!intel_connector) {
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000832 kfree(crt);
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800833 return;
834 }
835
836 connector = &intel_connector->base;
Adam Jackson637f44d2013-03-25 15:40:05 -0400837 crt->connector = intel_connector;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800838 drm_connector_init(dev, &intel_connector->base,
Jesse Barnes79e53942008-11-07 14:24:08 -0800839 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
840
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000841 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
Ville Syrjälä580d8ed2016-05-27 20:59:24 +0300842 DRM_MODE_ENCODER_DAC, "CRT");
Jesse Barnes79e53942008-11-07 14:24:08 -0800843
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000844 intel_connector_attach_encoder(intel_connector, &crt->base);
Jesse Barnes79e53942008-11-07 14:24:08 -0800845
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000846 crt->base.type = INTEL_OUTPUT_ANALOG;
Ville Syrjälä301ea742014-03-03 16:15:30 +0200847 crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
Paulo Zanonid63fa0d2012-11-20 13:27:35 -0200848 if (IS_I830(dev))
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300849 crt->base.crtc_mask = (1 << 0);
850 else
Keith Packard08268742012-08-13 21:34:45 -0700851 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300852
Daniel Vetterdbb02572012-01-28 14:49:23 +0100853 if (IS_GEN2(dev))
854 connector->interlace_allowed = 0;
855 else
856 connector->interlace_allowed = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800857 connector->doublescan_allowed = 0;
858
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200859 crt->adpa_reg = adpa_reg;
Jesse Barnesdf0323c2012-04-17 15:06:33 -0700860
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100861 crt->base.compute_config = intel_crt_compute_config;
Ville Syrjälä92966a32015-12-08 16:05:48 +0200862 if (HAS_PCH_SPLIT(dev)) {
Ville Syrjälä1ea56e22015-05-05 17:17:37 +0300863 crt->base.disable = pch_disable_crt;
864 crt->base.post_disable = pch_post_disable_crt;
865 } else {
866 crt->base.disable = intel_disable_crt;
867 }
Daniel Vetter21246042012-07-01 14:58:27 +0200868 crt->base.enable = intel_enable_crt;
Egbert Eich1d843f92013-02-25 12:06:49 -0500869 if (I915_HAS_HOTPLUG(dev))
870 crt->base.hpd_pin = HPD_CRT;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200871 if (HAS_DDI(dev)) {
872 crt->base.get_config = hsw_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200873 crt->base.get_hw_state = intel_ddi_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200874 } else {
875 crt->base.get_config = intel_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200876 crt->base.get_hw_state = intel_crt_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200877 }
Daniel Vettere403fc92012-07-02 13:41:21 +0200878 intel_connector->get_hw_state = intel_connector_get_hw_state;
Imre Deak4932e2c2014-02-11 17:12:48 +0200879 intel_connector->unregister = intel_connector_unregister;
Daniel Vetter21246042012-07-01 14:58:27 +0200880
Jesse Barnes79e53942008-11-07 14:24:08 -0800881 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
882
Thomas Wood34ea3d32014-05-29 16:57:41 +0100883 drm_connector_register(connector);
Jesse Barnesb01f2c32009-12-11 11:07:17 -0800884
Egbert Eich821450c2013-04-16 13:36:55 +0200885 if (!I915_HAS_HOTPLUG(dev))
886 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000887
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800888 /*
889 * Configure the automatic hotplug detection stuff
890 */
891 crt->force_hotplug_required = 0;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800892
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200893 /*
Damien Lespiau3e683202012-12-11 18:48:29 +0000894 * TODO: find a proper way to discover whether we need to set the the
895 * polarity and link reversal bits or not, instead of relying on the
896 * BIOS.
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200897 */
Damien Lespiau3e683202012-12-11 18:48:29 +0000898 if (HAS_PCH_LPT(dev)) {
899 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
900 FDI_RX_LINK_REVERSAL_OVERRIDE;
901
Ville Syrjäläeede3b52015-09-18 20:03:30 +0300902 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
Damien Lespiau3e683202012-12-11 18:48:29 +0000903 }
Daniel Vetter754970e2014-01-16 22:28:44 +0100904
905 intel_crt_reset(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800906}