blob: 30b95b736658b0c9154ca54c289d99e19361c16c [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.h
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP_DRV_H__
21#define __OMAP_DRV_H__
22
23#include <video/omapdss.h>
24#include <linux/module.h>
25#include <linux/types.h>
26#include <drm/drmP.h>
Rob Clarkae43d7c2012-01-16 12:51:15 -060027#include <drm/drm_crtc_helper.h>
Rob Clark8bb0daf2013-02-11 12:43:09 -050028#include <drm/omap_drm.h>
Andy Grosse2fb5052012-05-23 15:08:10 -050029#include <linux/platform_data/omap_drm.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060030
Rob Clarkf5f94542012-12-04 13:59:12 -060031
Rob Clarkcd5351f2011-11-12 12:09:40 -060032#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
33#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */
34
35#define MODULE_NAME "omapdrm"
36
37/* max # of mapper-id's that can be assigned.. todo, come up with a better
38 * (but still inexpensive) way to store/access per-buffer mapper private
39 * data..
40 */
41#define MAX_MAPPERS 2
42
Rob Clarkf5f94542012-12-04 13:59:12 -060043/* parameters which describe (unrotated) coordinates of scanout within a fb: */
44struct omap_drm_window {
45 uint32_t rotation;
46 int32_t crtc_x, crtc_y; /* signed because can be offscreen */
47 uint32_t crtc_w, crtc_h;
48 uint32_t src_x, src_y;
49 uint32_t src_w, src_h;
50};
51
52/* Once GO bit is set, we can't make further updates to shadowed registers
53 * until the GO bit is cleared. So various parts in the kms code that need
54 * to update shadowed registers queue up a pair of callbacks, pre_apply
55 * which is called before setting GO bit, and post_apply that is called
56 * after GO bit is cleared. The crtc manages the queuing, and everyone
57 * else goes thru omap_crtc_apply() using these callbacks so that the
58 * code which has to deal w/ GO bit state is centralized.
59 */
60struct omap_drm_apply {
61 struct list_head pending_node, queued_node;
62 bool queued;
63 void (*pre_apply)(struct omap_drm_apply *apply);
64 void (*post_apply)(struct omap_drm_apply *apply);
65};
66
67/* For transiently registering for different DSS irqs that various parts
68 * of the KMS code need during setup/configuration. We these are not
69 * necessarily the same as what drm_vblank_get/put() are requesting, and
70 * the hysteresis in drm_vblank_put() is not necessarily desirable for
71 * internal housekeeping related irq usage.
72 */
73struct omap_drm_irq {
74 struct list_head node;
75 uint32_t irqmask;
76 bool registered;
77 void (*irq)(struct omap_drm_irq *irq, uint32_t irqstatus);
78};
79
80/* For KMS code that needs to wait for a certain # of IRQs:
81 */
82struct omap_irq_wait;
83struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
84 uint32_t irqmask, int count);
85int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
86 unsigned long timeout);
87
Rob Clarkcd5351f2011-11-12 12:09:40 -060088struct omap_drm_private {
Rob Clark5e3b0872012-10-29 09:31:12 +010089 uint32_t omaprev;
90
Rob Clarkcd5351f2011-11-12 12:09:40 -060091 unsigned int num_crtcs;
92 struct drm_crtc *crtcs[8];
Rob Clarkf6b60362012-03-05 10:48:36 -060093
Rob Clarkbb5c2d92012-01-16 12:51:16 -060094 unsigned int num_planes;
95 struct drm_plane *planes[8];
Rob Clarkf6b60362012-03-05 10:48:36 -060096
Rob Clarkcd5351f2011-11-12 12:09:40 -060097 unsigned int num_encoders;
98 struct drm_encoder *encoders[8];
Rob Clarkf6b60362012-03-05 10:48:36 -060099
Rob Clarkcd5351f2011-11-12 12:09:40 -0600100 unsigned int num_connectors;
101 struct drm_connector *connectors[8];
102
103 struct drm_fb_helper *fbdev;
Rob Clarka6a91822011-12-09 23:26:08 -0600104
Rob Clark5609f7f2012-03-05 10:48:32 -0600105 struct workqueue_struct *wq;
106
Rob Clarkf5f94542012-12-04 13:59:12 -0600107 /* list of GEM objects: */
Rob Clarkf6b60362012-03-05 10:48:36 -0600108 struct list_head obj_list;
109
Rob Clarka6a91822011-12-09 23:26:08 -0600110 bool has_dmm;
Rob Clark3c810c62012-08-15 15:18:01 -0500111
112 /* properties: */
113 struct drm_property *rotation_prop;
Andre Renaud8451b5a2012-08-15 15:18:02 -0500114 struct drm_property *zorder_prop;
Rob Clarkf5f94542012-12-04 13:59:12 -0600115
116 /* irq handling: */
117 struct list_head irq_list; /* list of omap_drm_irq */
118 uint32_t vblank_mask; /* irq bits set for userspace vblank */
119 struct omap_drm_irq error_handler;
Rob Clark3c810c62012-08-15 15:18:01 -0500120};
121
122/* this should probably be in drm-core to standardize amongst drivers */
123#define DRM_ROTATE_0 0
124#define DRM_ROTATE_90 1
125#define DRM_ROTATE_180 2
126#define DRM_ROTATE_270 3
127#define DRM_REFLECT_X 4
128#define DRM_REFLECT_Y 5
129
Andy Gross6169a1482011-12-15 21:05:17 -0600130#ifdef CONFIG_DEBUG_FS
131int omap_debugfs_init(struct drm_minor *minor);
132void omap_debugfs_cleanup(struct drm_minor *minor);
Rob Clarkf6b60362012-03-05 10:48:36 -0600133void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
134void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
135void omap_gem_describe_objects(struct list_head *list, struct seq_file *m);
Andy Gross6169a1482011-12-15 21:05:17 -0600136#endif
137
Andy Gross4836d152012-12-19 14:53:37 -0600138#ifdef CONFIG_PM
139int omap_gem_resume(struct device *dev);
140#endif
141
Archit Taneja0d8f3712013-03-26 19:15:19 +0530142int omap_irq_enable_vblank(struct drm_device *dev, int crtc_id);
143void omap_irq_disable_vblank(struct drm_device *dev, int crtc_id);
Rob Clarkf5f94542012-12-04 13:59:12 -0600144irqreturn_t omap_irq_handler(DRM_IRQ_ARGS);
145void omap_irq_preinstall(struct drm_device *dev);
146int omap_irq_postinstall(struct drm_device *dev);
147void omap_irq_uninstall(struct drm_device *dev);
148void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq);
149void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq);
150int omap_drm_irq_uninstall(struct drm_device *dev);
151int omap_drm_irq_install(struct drm_device *dev);
152
Rob Clarkcd5351f2011-11-12 12:09:40 -0600153struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev);
154void omap_fbdev_free(struct drm_device *dev);
155
Rob Clarkf5f94542012-12-04 13:59:12 -0600156const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc);
157enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
158int omap_crtc_apply(struct drm_crtc *crtc,
159 struct omap_drm_apply *apply);
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300160void omap_crtc_pre_init(void);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600161struct drm_crtc *omap_crtc_init(struct drm_device *dev,
Rob Clarkf5f94542012-12-04 13:59:12 -0600162 struct drm_plane *plane, enum omap_channel channel, int id);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600163
164struct drm_plane *omap_plane_init(struct drm_device *dev,
Rob Clarkf5f94542012-12-04 13:59:12 -0600165 int plane_id, bool private_plane);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600166int omap_plane_dpms(struct drm_plane *plane, int mode);
Rob Clark2f537002012-01-16 12:51:18 -0600167int omap_plane_mode_set(struct drm_plane *plane,
168 struct drm_crtc *crtc, struct drm_framebuffer *fb,
169 int crtc_x, int crtc_y,
170 unsigned int crtc_w, unsigned int crtc_h,
171 uint32_t src_x, uint32_t src_y,
Rob Clarkf5f94542012-12-04 13:59:12 -0600172 uint32_t src_w, uint32_t src_h,
Rob Clark72d0c332012-03-11 21:11:21 -0500173 void (*fxn)(void *), void *arg);
Rob Clark3c810c62012-08-15 15:18:01 -0500174void omap_plane_install_properties(struct drm_plane *plane,
175 struct drm_mode_object *obj);
176int omap_plane_set_property(struct drm_plane *plane,
177 struct drm_property *property, uint64_t val);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600178
179struct drm_encoder *omap_encoder_init(struct drm_device *dev,
Rob Clarkf5f94542012-12-04 13:59:12 -0600180 struct omap_dss_device *dssdev);
181int omap_encoder_set_enabled(struct drm_encoder *encoder, bool enabled);
182int omap_encoder_update(struct drm_encoder *encoder,
183 struct omap_overlay_manager *mgr,
184 struct omap_video_timings *timings);
185
186struct drm_connector *omap_connector_init(struct drm_device *dev,
187 int connector_type, struct omap_dss_device *dssdev,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600188 struct drm_encoder *encoder);
189struct drm_encoder *omap_connector_attached_encoder(
190 struct drm_connector *connector);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600191void omap_connector_flush(struct drm_connector *connector,
192 int x, int y, int w, int h);
193
Rob Clarkf5f94542012-12-04 13:59:12 -0600194void copy_timings_omap_to_drm(struct drm_display_mode *mode,
195 struct omap_video_timings *timings);
196void copy_timings_drm_to_omap(struct omap_video_timings *timings,
197 struct drm_display_mode *mode);
198
Rob Clarka890e662012-03-05 10:48:31 -0600199uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
200 uint32_t max_formats, enum omap_color_mode supported_modes);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600201struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
Rob Clarkae43d7c2012-01-16 12:51:15 -0600202 struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600203struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
Rob Clarkae43d7c2012-01-16 12:51:15 -0600204 struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
Rob Clark9a0774e2012-01-16 12:51:17 -0600205struct drm_gem_object *omap_framebuffer_bo(struct drm_framebuffer *fb, int p);
Rob Clark5833bd22013-08-07 13:41:21 -0400206int omap_framebuffer_pin(struct drm_framebuffer *fb);
207int omap_framebuffer_unpin(struct drm_framebuffer *fb);
Rob Clark3c810c62012-08-15 15:18:01 -0500208void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
209 struct omap_drm_window *win, struct omap_overlay_info *info);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600210struct drm_connector *omap_framebuffer_get_next_connector(
211 struct drm_framebuffer *fb, struct drm_connector *from);
212void omap_framebuffer_flush(struct drm_framebuffer *fb,
213 int x, int y, int w, int h);
214
Rob Clarkf7f9f452011-12-05 19:19:22 -0600215void omap_gem_init(struct drm_device *dev);
216void omap_gem_deinit(struct drm_device *dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600217
218struct drm_gem_object *omap_gem_new(struct drm_device *dev,
219 union omap_gem_size gsize, uint32_t flags);
220int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file,
221 union omap_gem_size gsize, uint32_t flags, uint32_t *handle);
222void omap_gem_free_object(struct drm_gem_object *obj);
223int omap_gem_init_object(struct drm_gem_object *obj);
224void *omap_gem_vaddr(struct drm_gem_object *obj);
225int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
226 uint32_t handle, uint64_t *offset);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600227int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
228 struct drm_mode_create_dumb *args);
229int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma);
Rob Clark8b6b5692012-05-17 02:37:25 -0600230int omap_gem_mmap_obj(struct drm_gem_object *obj,
231 struct vm_area_struct *vma);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600232int omap_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
233int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op);
234int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op);
235int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op);
236int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
237 void (*fxn)(void *arg), void *arg);
Rob Clarka6a91822011-12-09 23:26:08 -0600238int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll);
Rob Clark8b6b5692012-05-17 02:37:25 -0600239void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff);
240void omap_gem_dma_sync(struct drm_gem_object *obj,
241 enum dma_data_direction dir);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600242int omap_gem_get_paddr(struct drm_gem_object *obj,
243 dma_addr_t *paddr, bool remap);
244int omap_gem_put_paddr(struct drm_gem_object *obj);
Rob Clark6ad11bc2012-04-10 13:19:55 -0500245int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages,
246 bool remap);
247int omap_gem_put_pages(struct drm_gem_object *obj);
248uint32_t omap_gem_flags(struct drm_gem_object *obj);
Rob Clark3c810c62012-08-15 15:18:01 -0500249int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient,
250 int x, int y, dma_addr_t *paddr);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600251uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600252size_t omap_gem_mmap_size(struct drm_gem_object *obj);
Rob Clark3c810c62012-08-15 15:18:01 -0500253int omap_gem_tiled_size(struct drm_gem_object *obj, uint16_t *w, uint16_t *h);
254int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600255
YAMANE Toshiaki7ced63c2012-11-14 19:30:52 +0900256struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
Rob Clark6ad11bc2012-04-10 13:19:55 -0500257 struct drm_gem_object *obj, int flags);
YAMANE Toshiaki7ced63c2012-11-14 19:30:52 +0900258struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
Rob Clark3080b832012-05-17 02:37:26 -0600259 struct dma_buf *buffer);
Rob Clark6ad11bc2012-04-10 13:19:55 -0500260
Rob Clarkcd5351f2011-11-12 12:09:40 -0600261static inline int align_pitch(int pitch, int width, int bpp)
262{
263 int bytespp = (bpp + 7) / 8;
264 /* in case someone tries to feed us a completely bogus stride: */
265 pitch = max(pitch, width * bytespp);
266 /* PVR needs alignment to 8 pixels.. right now that is the most
267 * restrictive stride requirement..
268 */
269 return ALIGN(pitch, 8 * bytespp);
270}
271
Rob Clarkf5f94542012-12-04 13:59:12 -0600272/* map crtc to vblank mask */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530273uint32_t pipe2vbl(struct drm_crtc *crtc);
274struct omap_dss_device *omap_encoder_get_dssdev(struct drm_encoder *encoder);
Rob Clarkf5f94542012-12-04 13:59:12 -0600275
Rob Clarkae43d7c2012-01-16 12:51:15 -0600276/* should these be made into common util helpers?
277 */
278
279static inline int objects_lookup(struct drm_device *dev,
280 struct drm_file *filp, uint32_t pixel_format,
281 struct drm_gem_object **bos, uint32_t *handles)
282{
283 int i, n = drm_format_num_planes(pixel_format);
284
285 for (i = 0; i < n; i++) {
286 bos[i] = drm_gem_object_lookup(dev, filp, handles[i]);
YAMANE Toshiakibc1e15812012-11-14 19:31:09 +0900287 if (!bos[i])
Rob Clarkae43d7c2012-01-16 12:51:15 -0600288 goto fail;
YAMANE Toshiakibc1e15812012-11-14 19:31:09 +0900289
Rob Clarkae43d7c2012-01-16 12:51:15 -0600290 }
291
292 return 0;
293
294fail:
YAMANE Toshiakibc1e15812012-11-14 19:31:09 +0900295 while (--i > 0)
Rob Clarkae43d7c2012-01-16 12:51:15 -0600296 drm_gem_object_unreference_unlocked(bos[i]);
YAMANE Toshiakibc1e15812012-11-14 19:31:09 +0900297
Rob Clarkae43d7c2012-01-16 12:51:15 -0600298 return -ENOENT;
299}
300
Rob Clarkcd5351f2011-11-12 12:09:40 -0600301#endif /* __OMAP_DRV_H__ */