blob: d34236611752d8c8c3cddc2ca868cee655051c26 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_sis.c - SiS ATA driver
3 *
Alan Coxab771632008-10-27 15:09:10 +00004 * (C) 2005 Red Hat
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +02005 * (C) 2007 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based upon linux/drivers/ide/pci/sis5513.c
8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
9 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
10 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
11 * SiS Taiwan : for direct support and hardware.
12 * Daniela Engert : for initial ATA100 advices and numerous others.
13 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
14 * for checking code correctness, providing patches.
15 * Original tests and design on the SiS620 chipset.
16 * ATA100 tests and design on the SiS735 chipset.
17 * ATA16/33 support from specs
18 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
19 *
20 *
21 * TODO
22 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
23 * More Testing
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <linux/device.h>
33#include <scsi/scsi_host.h>
34#include <linux/libata.h>
35#include <linux/ata.h>
Alan4bb64fb2007-02-16 01:40:04 -080036#include "sis.h"
Jeff Garzik669a5db2006-08-29 18:12:40 -040037
38#define DRV_NAME "pata_sis"
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +020039#define DRV_VERSION "0.5.2"
Jeff Garzik669a5db2006-08-29 18:12:40 -040040
41struct sis_chipset {
Tejun Heo1626aeb2007-05-04 12:43:58 +020042 u16 device; /* PCI host ID */
43 const struct ata_port_info *info; /* Info block */
Jeff Garzik669a5db2006-08-29 18:12:40 -040044 /* Probably add family, cable detect type etc here to clean
45 up code later */
46};
47
Jakub W. Jozwicki J7dcbc1f2007-01-09 09:01:19 +090048struct sis_laptop {
49 u16 device;
50 u16 subvendor;
51 u16 subdevice;
52};
53
54static const struct sis_laptop sis_laptop[] = {
55 /* devid, subvendor, subdev */
56 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
Alan Cox4f2d47c2007-08-22 22:56:43 +010057 { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
Gabriel C1f71d062007-11-15 13:14:00 +090058 { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
Kai Krakowedb80472008-07-06 14:22:26 +020059 { 0x5513, 0x1039, 0x5513 }, /* Targa Visionary 1000 */
Jakub W. Jozwicki J7dcbc1f2007-01-09 09:01:19 +090060 /* end marker */
61 { 0, }
62};
63
64static int sis_short_ata40(struct pci_dev *dev)
65{
66 const struct sis_laptop *lap = &sis_laptop[0];
67
68 while (lap->device) {
69 if (lap->device == dev->device &&
70 lap->subvendor == dev->subsystem_vendor &&
71 lap->subdevice == dev->subsystem_device)
72 return 1;
73 lap++;
74 }
75
76 return 0;
77}
78
Jeff Garzik669a5db2006-08-29 18:12:40 -040079/**
Alan Coxdd668d12007-05-21 15:00:53 +010080 * sis_old_port_base - return PCI configuration base for dev
Jeff Garzik669a5db2006-08-29 18:12:40 -040081 * @adev: device
82 *
83 * Returns the base of the PCI configuration registers for this port
84 * number.
85 */
86
Alan Coxdd668d12007-05-21 15:00:53 +010087static int sis_old_port_base(struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -040088{
Tejun Heo9af5c9c2007-08-06 18:36:22 +090089 return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno);
Jeff Garzik669a5db2006-08-29 18:12:40 -040090}
91
92/**
Alan Cox2e413f52007-03-07 16:54:24 +000093 * sis_133_cable_detect - check for 40/80 pin
Jeff Garzik669a5db2006-08-29 18:12:40 -040094 * @ap: Port
Tejun Heod4b2bab2007-02-02 16:50:52 +090095 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040096 *
97 * Perform cable detection for the later UDMA133 capable
98 * SiS chipset.
99 */
100
Alan Cox2e413f52007-03-07 16:54:24 +0000101static int sis_133_cable_detect(struct ata_port *ap)
102{
103 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
104 u16 tmp;
105
106 /* The top bit of this register is the cable detect bit */
107 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
108 if ((tmp & 0x8000) && !sis_short_ata40(pdev))
109 return ATA_CBL_PATA40;
110 return ATA_CBL_PATA80;
111}
112
113/**
114 * sis_66_cable_detect - check for 40/80 pin
115 * @ap: Port
Tejun Heod4b2bab2007-02-02 16:50:52 +0900116 * @deadline: deadline jiffies for the operation
Alan Cox2e413f52007-03-07 16:54:24 +0000117 *
118 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
119 * SiS IDE controllers.
120 */
121
122static int sis_66_cable_detect(struct ata_port *ap)
123{
124 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
125 u8 tmp;
126
127 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
128 pci_read_config_byte(pdev, 0x48, &tmp);
129 tmp >>= ap->port_no;
130 if ((tmp & 0x10) && !sis_short_ata40(pdev))
131 return ATA_CBL_PATA40;
132 return ATA_CBL_PATA80;
133}
134
135
136/**
137 * sis_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +0900138 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +0900139 * @deadline: deadline jiffies for the operation
Alan Cox2e413f52007-03-07 16:54:24 +0000140 *
141 * Set up cable type and use generic probe init
142 */
143
Tejun Heocc0680a2007-08-06 18:36:23 +0900144static int sis_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145{
146 static const struct pci_bits sis_enable_bits[] = {
147 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
148 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
149 };
Jeff Garzik85cd7252006-08-31 00:03:49 -0400150
Tejun Heocc0680a2007-08-06 18:36:23 +0900151 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400152 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400153
Alan Coxc9619222006-09-26 17:53:38 +0100154 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
155 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +0900156
Alan Cox15ce0942007-05-25 20:50:24 +0100157 /* Clear the FIFO settings. We can't enable the FIFO until
158 we know we are poking at a disk */
159 pci_write_config_byte(pdev, 0x4B, 0);
Tejun Heo9363c382008-04-07 22:47:16 +0900160 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400161}
162
Alan Cox2e413f52007-03-07 16:54:24 +0000163
Jeff Garzik669a5db2006-08-29 18:12:40 -0400164/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400165 * sis_set_fifo - Set RWP fifo bits for this device
166 * @ap: Port
167 * @adev: Device
168 *
169 * SIS chipsets implement prefetch/postwrite bits for each device
170 * on both channels. This functionality is not ATAPI compatible and
171 * must be configured according to the class of device present
172 */
173
174static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev)
175{
176 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
177 u8 fifoctrl;
178 u8 mask = 0x11;
179
180 mask <<= (2 * ap->port_no);
181 mask <<= adev->devno;
182
183 /* This holds various bits including the FIFO control */
184 pci_read_config_byte(pdev, 0x4B, &fifoctrl);
185 fifoctrl &= ~mask;
186
187 /* Enable for ATA (disk) only */
188 if (adev->class == ATA_DEV_ATA)
189 fifoctrl |= mask;
190 pci_write_config_byte(pdev, 0x4B, fifoctrl);
191}
192
193/**
194 * sis_old_set_piomode - Initialize host controller PATA PIO timings
195 * @ap: Port whose timings we are configuring
196 * @adev: Device we are configuring for.
197 *
198 * Set PIO mode for device, in host controller PCI config space. This
199 * function handles PIO set up for all chips that are pre ATA100 and
200 * also early ATA100 devices.
201 *
202 * LOCKING:
203 * None (inherited from caller).
204 */
205
206static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
207{
208 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Alan Coxdd668d12007-05-21 15:00:53 +0100209 int port = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400210 u8 t1, t2;
211 int speed = adev->pio_mode - XFER_PIO_0;
212
213 const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
214 const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
215
216 sis_set_fifo(ap, adev);
217
218 pci_read_config_byte(pdev, port, &t1);
219 pci_read_config_byte(pdev, port + 1, &t2);
220
221 t1 &= ~0x0F; /* Clear active/recovery timings */
222 t2 &= ~0x07;
223
224 t1 |= active[speed];
225 t2 |= recovery[speed];
226
227 pci_write_config_byte(pdev, port, t1);
228 pci_write_config_byte(pdev, port + 1, t2);
229}
230
231/**
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200232 * sis_100_set_piomode - Initialize host controller PATA PIO timings
Jeff Garzik669a5db2006-08-29 18:12:40 -0400233 * @ap: Port whose timings we are configuring
234 * @adev: Device we are configuring for.
235 *
236 * Set PIO mode for device, in host controller PCI config space. This
237 * function handles PIO set up for ATA100 devices and early ATA133.
238 *
239 * LOCKING:
240 * None (inherited from caller).
241 */
242
243static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
244{
245 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Alan Coxdd668d12007-05-21 15:00:53 +0100246 int port = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400247 int speed = adev->pio_mode - XFER_PIO_0;
248
249 const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
250
251 sis_set_fifo(ap, adev);
252
253 pci_write_config_byte(pdev, port, actrec[speed]);
254}
255
256/**
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200257 * sis_133_set_piomode - Initialize host controller PATA PIO timings
Jeff Garzik669a5db2006-08-29 18:12:40 -0400258 * @ap: Port whose timings we are configuring
259 * @adev: Device we are configuring for.
260 *
261 * Set PIO mode for device, in host controller PCI config space. This
262 * function handles PIO set up for the later ATA133 devices.
263 *
264 * LOCKING:
265 * None (inherited from caller).
266 */
267
268static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
269{
270 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
271 int port = 0x40;
272 u32 t1;
273 u32 reg54;
274 int speed = adev->pio_mode - XFER_PIO_0;
275
276 const u32 timing133[] = {
277 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
278 0x0C266000,
279 0x04263000,
280 0x0C0A3000,
281 0x05093000
282 };
283 const u32 timing100[] = {
284 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
285 0x091C4000,
286 0x031C2000,
287 0x09072000,
288 0x04062000
289 };
290
291 sis_set_fifo(ap, adev);
292
293 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
294 pci_read_config_dword(pdev, 0x54, &reg54);
295 if (reg54 & 0x40000000)
296 port = 0x70;
297 port += 8 * ap->port_no + 4 * adev->devno;
298
299 pci_read_config_dword(pdev, port, &t1);
300 t1 &= 0xC0C00FFF; /* Mask out timing */
301
302 if (t1 & 0x08) /* 100 or 133 ? */
303 t1 |= timing133[speed];
304 else
305 t1 |= timing100[speed];
306 pci_write_config_byte(pdev, port, t1);
307}
308
309/**
310 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
311 * @ap: Port whose timings we are configuring
312 * @adev: Device to program
313 *
314 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
315 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
316 * the old ide/pci driver.
317 *
318 * LOCKING:
319 * None (inherited from caller).
320 */
321
322static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
323{
324 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
325 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100326 int drive_pci = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400327 u16 timing;
328
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200329 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400330 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
331
332 pci_read_config_word(pdev, drive_pci, &timing);
333
334 if (adev->dma_mode < XFER_UDMA_0) {
335 /* bits 3-0 hold recovery timing bits 8-10 active timing and
Joe Perches1967b7f2008-02-03 17:08:11 +0200336 the higher bits are dependant on the device */
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200337 timing &= ~0x870F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400338 timing |= mwdma_bits[speed];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400339 } else {
340 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
341 speed = adev->dma_mode - XFER_UDMA_0;
342 timing &= ~0x6000;
343 timing |= udma_bits[speed];
344 }
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200345 pci_write_config_word(pdev, drive_pci, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400346}
347
348/**
349 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
350 * @ap: Port whose timings we are configuring
351 * @adev: Device to program
352 *
353 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
354 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
355 * the old ide/pci driver.
356 *
357 * LOCKING:
358 * None (inherited from caller).
359 */
360
361static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
362{
363 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
364 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100365 int drive_pci = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400366 u16 timing;
367
Tejun Heoedeb6142007-09-21 16:29:05 +0900368 /* MWDMA 0-2 and UDMA 0-5 */
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200369 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
Tejun Heoedeb6142007-09-21 16:29:05 +0900370 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371
372 pci_read_config_word(pdev, drive_pci, &timing);
373
374 if (adev->dma_mode < XFER_UDMA_0) {
375 /* bits 3-0 hold recovery timing bits 8-10 active timing and
Joe Perches1967b7f2008-02-03 17:08:11 +0200376 the higher bits are dependant on the device, bit 15 udma */
Alan Coxdd668d12007-05-21 15:00:53 +0100377 timing &= ~0x870F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400378 timing |= mwdma_bits[speed];
379 } else {
380 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
381 speed = adev->dma_mode - XFER_UDMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100382 timing &= ~0xF000;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400383 timing |= udma_bits[speed];
384 }
385 pci_write_config_word(pdev, drive_pci, timing);
386}
387
388/**
389 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
390 * @ap: Port whose timings we are configuring
391 * @adev: Device to program
392 *
393 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
394 * Handles UDMA66 and early UDMA100 devices.
395 *
396 * LOCKING:
397 * None (inherited from caller).
398 */
399
400static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
401{
402 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
403 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100404 int drive_pci = sis_old_port_base(adev);
405 u8 timing;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400406
Alan Coxdd668d12007-05-21 15:00:53 +0100407 const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400408
Alan Coxdd668d12007-05-21 15:00:53 +0100409 pci_read_config_byte(pdev, drive_pci + 1, &timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400410
411 if (adev->dma_mode < XFER_UDMA_0) {
412 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
413 } else {
Alan Coxdd668d12007-05-21 15:00:53 +0100414 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400415 speed = adev->dma_mode - XFER_UDMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100416 timing &= ~0x8F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400417 timing |= udma_bits[speed];
418 }
Alan Coxdd668d12007-05-21 15:00:53 +0100419 pci_write_config_byte(pdev, drive_pci + 1, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400420}
421
422/**
423 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
424 * @ap: Port whose timings we are configuring
425 * @adev: Device to program
426 *
427 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200428 * Handles early SiS 961 bridges.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400429 *
430 * LOCKING:
431 * None (inherited from caller).
432 */
433
434static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev)
435{
436 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
437 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100438 int drive_pci = sis_old_port_base(adev);
439 u8 timing;
440 /* Low 4 bits are timing */
441 static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400442
Alan Coxdd668d12007-05-21 15:00:53 +0100443 pci_read_config_byte(pdev, drive_pci + 1, &timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400444
445 if (adev->dma_mode < XFER_UDMA_0) {
446 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
447 } else {
Alan Coxdd668d12007-05-21 15:00:53 +0100448 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400449 speed = adev->dma_mode - XFER_UDMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100450 timing &= ~0x8F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400451 timing |= udma_bits[speed];
452 }
Alan Coxdd668d12007-05-21 15:00:53 +0100453 pci_write_config_byte(pdev, drive_pci + 1, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400454}
455
456/**
457 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
458 * @ap: Port whose timings we are configuring
459 * @adev: Device to program
460 *
461 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400462 *
463 * LOCKING:
464 * None (inherited from caller).
465 */
466
467static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
468{
469 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
470 int speed = adev->dma_mode - XFER_MW_DMA_0;
471 int port = 0x40;
472 u32 t1;
473 u32 reg54;
474
475 /* bits 4- cycle time 8 - cvs time */
Alan Cox2e413f52007-03-07 16:54:24 +0000476 static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
477 static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400478
479 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
480 pci_read_config_dword(pdev, 0x54, &reg54);
481 if (reg54 & 0x40000000)
482 port = 0x70;
483 port += (8 * ap->port_no) + (4 * adev->devno);
484
485 pci_read_config_dword(pdev, port, &t1);
486
487 if (adev->dma_mode < XFER_UDMA_0) {
488 t1 &= ~0x00000004;
489 /* FIXME: need data sheet to add MWDMA here. Also lacking on
490 ide/pci driver */
491 } else {
492 speed = adev->dma_mode - XFER_UDMA_0;
493 /* if & 8 no UDMA133 - need info for ... */
494 t1 &= ~0x00000FF0;
495 t1 |= 0x00000004;
496 if (t1 & 0x08)
497 t1 |= timing_u133[speed];
498 else
499 t1 |= timing_u100[speed];
500 }
501 pci_write_config_dword(pdev, port, t1);
502}
503
504static struct scsi_host_template sis_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900505 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400506};
507
Tejun Heo029cfd62008-03-25 12:22:49 +0900508static struct ata_port_operations sis_133_for_sata_ops = {
509 .inherits = &ata_bmdma_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400510 .set_piomode = sis_133_set_piomode,
511 .set_dmamode = sis_133_set_dmamode,
Tejun Heo029cfd62008-03-25 12:22:49 +0900512 .cable_detect = sis_133_cable_detect,
513};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400514
Tejun Heo029cfd62008-03-25 12:22:49 +0900515static struct ata_port_operations sis_base_ops = {
516 .inherits = &ata_bmdma_port_ops,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900517 .prereset = sis_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400518};
519
Tejun Heo029cfd62008-03-25 12:22:49 +0900520static struct ata_port_operations sis_133_ops = {
521 .inherits = &sis_base_ops,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200522 .set_piomode = sis_133_set_piomode,
523 .set_dmamode = sis_133_set_dmamode,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200524 .cable_detect = sis_133_cable_detect,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200525};
526
Tejun Heo029cfd62008-03-25 12:22:49 +0900527static struct ata_port_operations sis_133_early_ops = {
528 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400529 .set_piomode = sis_100_set_piomode,
530 .set_dmamode = sis_133_early_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000531 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400532};
533
Tejun Heo029cfd62008-03-25 12:22:49 +0900534static struct ata_port_operations sis_100_ops = {
535 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400536 .set_piomode = sis_100_set_piomode,
537 .set_dmamode = sis_100_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000538 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400539};
540
Tejun Heo029cfd62008-03-25 12:22:49 +0900541static struct ata_port_operations sis_66_ops = {
542 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400543 .set_piomode = sis_old_set_piomode,
544 .set_dmamode = sis_66_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000545 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400546};
547
Tejun Heo029cfd62008-03-25 12:22:49 +0900548static struct ata_port_operations sis_old_ops = {
549 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400550 .set_piomode = sis_old_set_piomode,
551 .set_dmamode = sis_old_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000552 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400553};
554
Tejun Heo1626aeb2007-05-04 12:43:58 +0200555static const struct ata_port_info sis_info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400556 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400557 .pio_mask = 0x1f, /* pio0-4 */
558 .mwdma_mask = 0x07,
559 .udma_mask = 0,
560 .port_ops = &sis_old_ops,
561};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200562static const struct ata_port_info sis_info33 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400563 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400564 .pio_mask = 0x1f, /* pio0-4 */
565 .mwdma_mask = 0x07,
566 .udma_mask = ATA_UDMA2, /* UDMA 33 */
567 .port_ops = &sis_old_ops,
568};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200569static const struct ata_port_info sis_info66 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400570 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400571 .pio_mask = 0x1f, /* pio0-4 */
572 .udma_mask = ATA_UDMA4, /* UDMA 66 */
573 .port_ops = &sis_66_ops,
574};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200575static const struct ata_port_info sis_info100 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400576 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400577 .pio_mask = 0x1f, /* pio0-4 */
578 .udma_mask = ATA_UDMA5,
579 .port_ops = &sis_100_ops,
580};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200581static const struct ata_port_info sis_info100_early = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400582 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400583 .udma_mask = ATA_UDMA5,
584 .pio_mask = 0x1f, /* pio0-4 */
585 .port_ops = &sis_66_ops,
586};
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200587static const struct ata_port_info sis_info133 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400588 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400589 .pio_mask = 0x1f, /* pio0-4 */
590 .udma_mask = ATA_UDMA6,
591 .port_ops = &sis_133_ops,
592};
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200593const struct ata_port_info sis_info133_for_sata = {
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200594 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
595 .pio_mask = 0x1f, /* pio0-4 */
596 .udma_mask = ATA_UDMA6,
597 .port_ops = &sis_133_for_sata_ops,
598};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200599static const struct ata_port_info sis_info133_early = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400600 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400601 .pio_mask = 0x1f, /* pio0-4 */
602 .udma_mask = ATA_UDMA6,
603 .port_ops = &sis_133_early_ops,
604};
605
Alan9b14dec2007-01-08 16:11:07 +0000606/* Privately shared with the SiS180 SATA driver, not for use elsewhere */
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200607EXPORT_SYMBOL_GPL(sis_info133_for_sata);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400608
609static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
610{
611 u16 regw;
612 u8 reg;
613
614 if (sis->info == &sis_info133) {
615 pci_read_config_word(pdev, 0x50, &regw);
616 if (regw & 0x08)
617 pci_write_config_word(pdev, 0x50, regw & ~0x08);
618 pci_read_config_word(pdev, 0x52, &regw);
619 if (regw & 0x08)
620 pci_write_config_word(pdev, 0x52, regw & ~0x08);
621 return;
622 }
623
624 if (sis->info == &sis_info133_early || sis->info == &sis_info100) {
625 /* Fix up latency */
626 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
627 /* Set compatibility bit */
628 pci_read_config_byte(pdev, 0x49, &reg);
629 if (!(reg & 0x01))
630 pci_write_config_byte(pdev, 0x49, reg | 0x01);
631 return;
632 }
633
634 if (sis->info == &sis_info66 || sis->info == &sis_info100_early) {
635 /* Fix up latency */
636 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
637 /* Set compatibility bit */
638 pci_read_config_byte(pdev, 0x52, &reg);
639 if (!(reg & 0x04))
640 pci_write_config_byte(pdev, 0x52, reg | 0x04);
641 return;
642 }
643
644 if (sis->info == &sis_info33) {
645 pci_read_config_byte(pdev, PCI_CLASS_PROG, &reg);
646 if (( reg & 0x0F ) != 0x00)
647 pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0);
648 /* Fall through to ATA16 fixup below */
649 }
650
651 if (sis->info == &sis_info || sis->info == &sis_info33) {
652 /* force per drive recovery and active timings
653 needed on ATA_33 and below chips */
654 pci_read_config_byte(pdev, 0x52, &reg);
655 if (!(reg & 0x08))
656 pci_write_config_byte(pdev, 0x52, reg|0x08);
657 return;
658 }
659
660 BUG();
661}
662
663/**
664 * sis_init_one - Register SiS ATA PCI device with kernel services
665 * @pdev: PCI device to register
666 * @ent: Entry in sis_pci_tbl matching with @pdev
667 *
668 * Called from kernel PCI layer. We probe for combined mode (sigh),
669 * and then hand over control to libata, for it to do the rest.
670 *
671 * LOCKING:
672 * Inherited from PCI layer (may sleep).
673 *
674 * RETURNS:
675 * Zero on success, or -ERRNO value.
676 */
677
678static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
679{
680 static int printed_version;
Tejun Heo887125e2008-03-25 12:22:49 +0900681 const struct ata_port_info *ppi[] = { NULL, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400682 struct pci_dev *host = NULL;
683 struct sis_chipset *chipset = NULL;
Alan Coxf3769e92007-04-19 11:09:52 +0100684 struct sis_chipset *sets;
Tejun Heof08048e2008-03-25 12:22:47 +0900685 int rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400686
687 static struct sis_chipset sis_chipsets[] = {
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500688
Alan Coxaf323a22006-09-12 17:15:12 +0100689 { 0x0968, &sis_info133 },
690 { 0x0966, &sis_info133 },
691 { 0x0965, &sis_info133 },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400692 { 0x0745, &sis_info100 },
693 { 0x0735, &sis_info100 },
694 { 0x0733, &sis_info100 },
695 { 0x0635, &sis_info100 },
696 { 0x0633, &sis_info100 },
697
698 { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */
699 { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */
700
701 { 0x0640, &sis_info66 },
702 { 0x0630, &sis_info66 },
703 { 0x0620, &sis_info66 },
704 { 0x0540, &sis_info66 },
705 { 0x0530, &sis_info66 },
706
707 { 0x5600, &sis_info33 },
708 { 0x5598, &sis_info33 },
709 { 0x5597, &sis_info33 },
710 { 0x5591, &sis_info33 },
711 { 0x5582, &sis_info33 },
712 { 0x5581, &sis_info33 },
713
714 { 0x5596, &sis_info },
715 { 0x5571, &sis_info },
716 { 0x5517, &sis_info },
717 { 0x5511, &sis_info },
718
719 {0}
720 };
721 static struct sis_chipset sis133_early = {
722 0x0, &sis_info133_early
723 };
724 static struct sis_chipset sis133 = {
725 0x0, &sis_info133
726 };
727 static struct sis_chipset sis100_early = {
728 0x0, &sis_info100_early
729 };
730 static struct sis_chipset sis100 = {
731 0x0, &sis_info100
732 };
733
734 if (!printed_version++)
735 dev_printk(KERN_DEBUG, &pdev->dev,
736 "version " DRV_VERSION "\n");
737
Tejun Heof08048e2008-03-25 12:22:47 +0900738 rc = pcim_enable_device(pdev);
739 if (rc)
740 return rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400741
Tejun Heof08048e2008-03-25 12:22:47 +0900742 /* We have to find the bridge first */
Alan Coxf3769e92007-04-19 11:09:52 +0100743 for (sets = &sis_chipsets[0]; sets->device; sets++) {
744 host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400745 if (host != NULL) {
Alan Coxf3769e92007-04-19 11:09:52 +0100746 chipset = sets; /* Match found */
747 if (sets->device == 0x630) { /* SIS630 */
Auke Kok44c10132007-06-08 15:46:36 -0700748 if (host->revision >= 0x30) /* 630 ET */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400749 chipset = &sis100_early;
750 }
751 break;
752 }
753 }
754
755 /* Look for concealed bridges */
Alan Coxf3769e92007-04-19 11:09:52 +0100756 if (chipset == NULL) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400757 /* Second check */
758 u32 idemisc;
759 u16 trueid;
760
761 /* Disable ID masking and register remapping then
762 see what the real ID is */
763
764 pci_read_config_dword(pdev, 0x54, &idemisc);
765 pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff);
766 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
767 pci_write_config_dword(pdev, 0x54, idemisc);
768
769 switch(trueid) {
770 case 0x5518: /* SIS 962/963 */
771 chipset = &sis133;
772 if ((idemisc & 0x40000000) == 0) {
773 pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000);
774 printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n");
775 }
776 break;
777 case 0x0180: /* SIS 965/965L */
778 chipset = &sis133;
779 break;
780 case 0x1180: /* SIS 966/966L */
781 chipset = &sis133;
782 break;
783 }
784 }
785
786 /* Further check */
787 if (chipset == NULL) {
788 struct pci_dev *lpc_bridge;
789 u16 trueid;
790 u8 prefctl;
791 u8 idecfg;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400792
793 /* Try the second unmasking technique */
794 pci_read_config_byte(pdev, 0x4a, &idecfg);
795 pci_write_config_byte(pdev, 0x4a, idecfg | 0x10);
796 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
797 pci_write_config_byte(pdev, 0x4a, idecfg);
798
799 switch(trueid) {
800 case 0x5517:
801 lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */
802 if (lpc_bridge == NULL)
803 break;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400804 pci_read_config_byte(pdev, 0x49, &prefctl);
805 pci_dev_put(lpc_bridge);
806
Auke Kok44c10132007-06-08 15:46:36 -0700807 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400808 chipset = &sis133_early;
809 break;
810 }
811 chipset = &sis100;
812 break;
813 }
814 }
815 pci_dev_put(host);
816
817 /* No chipset info, no support */
818 if (chipset == NULL)
819 return -ENODEV;
820
Tejun Heo887125e2008-03-25 12:22:49 +0900821 ppi[0] = chipset->info;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400822
823 sis_fixup(pdev, chipset);
824
Tejun Heo9363c382008-04-07 22:47:16 +0900825 return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400826}
827
828static const struct pci_device_id sis_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400829 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
830 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200831 { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400832
Jeff Garzik669a5db2006-08-29 18:12:40 -0400833 { }
834};
835
836static struct pci_driver sis_pci_driver = {
837 .name = DRV_NAME,
838 .id_table = sis_pci_tbl,
839 .probe = sis_init_one,
840 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900841#ifdef CONFIG_PM
Alan62d64ae2006-11-27 16:27:20 +0000842 .suspend = ata_pci_device_suspend,
843 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900844#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400845};
846
847static int __init sis_init(void)
848{
849 return pci_register_driver(&sis_pci_driver);
850}
851
852static void __exit sis_exit(void)
853{
854 pci_unregister_driver(&sis_pci_driver);
855}
856
Jeff Garzik669a5db2006-08-29 18:12:40 -0400857module_init(sis_init);
858module_exit(sis_exit);
859
860MODULE_AUTHOR("Alan Cox");
861MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
862MODULE_LICENSE("GPL");
863MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
864MODULE_VERSION(DRV_VERSION);
865