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Dmitry Lifshitzd234e422014-01-12 15:22:45 +02001/*
2 * Common support for CompuLab CM-T3x CoMs
3 */
4
5/ {
6
Javier Martinez Canillas81777ff2016-08-31 12:35:27 +02007 memory@80000000 {
Dmitry Lifshitzd234e422014-01-12 15:22:45 +02008 device_type = "memory";
9 reg = <0x80000000 0x10000000>; /* 256 MB */
10 };
11
12 leds {
13 compatible = "gpio-leds";
Dmitry Lifshitzdc897922014-01-12 15:22:48 +020014 pinctrl-names = "default";
15 pinctrl-0 = <&green_led_pins>;
Dmitry Lifshitzd234e422014-01-12 15:22:45 +020016 ledb {
17 label = "cm-t3x:green";
18 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
19 linux,default-trigger = "heartbeat";
20 };
21 };
Dmitry Lifshitzce5abbb2014-01-12 15:22:50 +020022
23 /* HS USB Port 1 Power */
24 hsusb1_power: hsusb1_power_reg {
25 compatible = "regulator-fixed";
26 regulator-name = "hsusb1_vbus";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 startup-delay-us = <70000>;
30 };
31
32 /* HS USB Port 2 Power */
33 hsusb2_power: hsusb2_power_reg {
34 compatible = "regulator-fixed";
35 regulator-name = "hsusb2_vbus";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 startup-delay-us = <70000>;
39 };
40
41 /* HS USB Host PHY on PORT 1 */
42 hsusb1_phy: hsusb1_phy {
43 compatible = "usb-nop-xceiv";
44 vcc-supply = <&hsusb1_power>;
45 };
46
47 /* HS USB Host PHY on PORT 2 */
48 hsusb2_phy: hsusb2_phy {
49 compatible = "usb-nop-xceiv";
50 vcc-supply = <&hsusb2_power>;
51 };
Dmitry Lifshitz299e5512014-11-18 11:13:17 +020052
53 ads7846reg: ads7846-reg {
54 compatible = "regulator-fixed";
55 regulator-name = "ads7846-reg";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
58 };
Dmitry Lifshitze6fb4272014-11-23 11:42:00 +020059
Javier Martinez Canillasbc1dcd52016-06-27 15:20:48 -040060 tv0: connector {
Dmitry Lifshitze6fb4272014-11-23 11:42:00 +020061 compatible = "svideo-connector";
62 label = "tv";
63
64 port {
65 tv_connector_in: endpoint {
66 remote-endpoint = <&venc_out>;
67 };
68 };
69 };
Dmitry Lifshitzd234e422014-01-12 15:22:45 +020070};
71
72&omap3_pmx_core {
73
74 uart3_pins: pinmux_uart3_pins {
75 pinctrl-single,pins = <
76 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
77 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
78 >;
79 };
80
81 mmc1_pins: pinmux_mmc1_pins {
82 pinctrl-single,pins = <
83 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
84 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
85 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
86 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
87 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
88 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
89 >;
90 };
Dmitry Lifshitzdc897922014-01-12 15:22:48 +020091
92 green_led_pins: pinmux_green_led_pins {
93 pinctrl-single,pins = <
94 OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
95 >;
96 };
Dmitry Lifshitze5ee0422014-11-02 13:19:58 +020097
98 dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
99 pinctrl-single,pins = <
100 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
101 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
102 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
103 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
104
105 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
106 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
107 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
108 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
109 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
110 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
111 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
112 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
113 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
114 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
115 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
116 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
117 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
118 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
119 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
120 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
121 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
122 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
123 >;
124 };
125
126 dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
127 pinctrl-single,pins = <
Dmitry Lifshitz274ac842014-11-18 11:13:16 +0200128 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
129 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
130 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
131 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
132 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
133 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
Dmitry Lifshitze5ee0422014-11-02 13:19:58 +0200134 >;
135 };
Dmitry Lifshitz299e5512014-11-18 11:13:17 +0200136
137 ads7846_pins: pinmux_ads7846_pins {
138 pinctrl-single,pins = <
139 OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
140 >;
141 };
142
143 mcspi1_pins: pinmux_mcspi1_pins {
144 pinctrl-single,pins = <
145 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk */
146 OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo */
147 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi */
148 OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
149 >;
150 };
Dmitry Lifshitzb0f9ce42014-11-23 11:41:59 +0200151
152 i2c1_pins: pinmux_i2c1_pins {
153 pinctrl-single,pins = <
154 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
155 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
156 >;
157 };
Dmitry Lifshitz01e9ef62014-11-23 11:42:02 +0200158
159 mcbsp2_pins: pinmux_mcbsp2_pins {
160 pinctrl-single,pins = <
161 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
162 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
163 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
164 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
165 >;
166 };
Dmitry Lifshitzd234e422014-01-12 15:22:45 +0200167};
168
169&uart3 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&uart3_pins>;
172};
173
174&mmc1 {
175 pinctrl-names = "default";
176 pinctrl-0 = <&mmc1_pins>;
177 bus-width = <4>;
178};
179
Dmitry Lifshitz4ceb3932014-01-12 15:22:46 +0200180&mmc3 {
181 status = "disabled";
182};
183
Dmitry Lifshitzd234e422014-01-12 15:22:45 +0200184&i2c1 {
Dmitry Lifshitzb0f9ce42014-11-23 11:41:59 +0200185 pinctrl-names = "default";
186 pinctrl-0 = <&i2c1_pins>;
187
Dmitry Lifshitzd234e422014-01-12 15:22:45 +0200188 clock-frequency = <400000>;
Dmitry Lifshitz0cdb8252014-11-18 11:13:19 +0200189
190 at24@50 {
191 compatible = "at24,24c02";
192 pagesize = <16>;
193 reg = <0x50>;
194 };
Dmitry Lifshitzd234e422014-01-12 15:22:45 +0200195};
196
197&i2c3 {
198 clock-frequency = <400000>;
199};
Dmitry Lifshitz0cdb8252014-11-18 11:13:19 +0200200
Dmitry Lifshitzce5abbb2014-01-12 15:22:50 +0200201&usbhshost {
202 port1-mode = "ehci-phy";
203 port2-mode = "ehci-phy";
204};
205
206&usbhsehci {
207 phys = <&hsusb1_phy &hsusb2_phy>;
208};
Dmitry Lifshitz299e5512014-11-18 11:13:17 +0200209
210&mcspi1 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&mcspi1_pins>;
213
214 /* touch controller */
215 ads7846@0 {
216 pinctrl-names = "default";
217 pinctrl-0 = <&ads7846_pins>;
218
219 compatible = "ti,ads7846";
220 vcc-supply = <&ads7846reg>;
221
222 reg = <0>; /* CS0 */
223 spi-max-frequency = <1500000>;
224
225 interrupt-parent = <&gpio2>;
226 interrupts = <25 0>; /* gpio_57 */
Javier Martinez Canillas3a637e02015-10-06 11:03:39 +0200227 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
Dmitry Lifshitz299e5512014-11-18 11:13:17 +0200228
229 ti,x-min = /bits/ 16 <0x0>;
230 ti,x-max = /bits/ 16 <0x0fff>;
231 ti,y-min = /bits/ 16 <0x0>;
232 ti,y-max = /bits/ 16 <0x0fff>;
233
234 ti,x-plate-ohms = /bits/ 16 <180>;
235 ti,pressure-max = /bits/ 16 <255>;
236
237 ti,debounce-max = /bits/ 16 <30>;
238 ti,debounce-tol = /bits/ 16 <10>;
239 ti,debounce-rep = /bits/ 16 <1>;
240
Sudeep Holla0c4d63b2015-10-21 11:10:12 +0100241 wakeup-source;
Dmitry Lifshitz299e5512014-11-18 11:13:17 +0200242 };
243};
Dmitry Lifshitze6fb4272014-11-23 11:42:00 +0200244
245&venc {
246 status = "ok";
247
248 port {
249 venc_out: endpoint {
250 remote-endpoint = <&tv_connector_in>;
251 ti,channels = <2>;
252 };
253 };
254};
Dmitry Lifshitz01e9ef62014-11-23 11:42:02 +0200255
256&mcbsp2 {
257 status = "ok";
258
259 pinctrl-names = "default";
260 pinctrl-0 = <&mcbsp2_pins>;
261};
Dmitry Lifshitzdf73b7f2014-12-28 16:30:49 +0200262
263&gpmc {
Roger Quadros44e47162016-02-23 18:37:25 +0200264 ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
Dmitry Lifshitzdf73b7f2014-12-28 16:30:49 +0200265
266 nand@0,0 {
Roger Quadros44e47162016-02-23 18:37:25 +0200267 compatible = "ti,omap2-nand";
Dmitry Lifshitzdf73b7f2014-12-28 16:30:49 +0200268 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
Roger Quadros44e47162016-02-23 18:37:25 +0200269 interrupt-parent = <&gpmc>;
270 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
271 <1 IRQ_TYPE_NONE>; /* termcount */
Dmitry Lifshitzdf73b7f2014-12-28 16:30:49 +0200272 nand-bus-width = <8>;
273 gpmc,device-width = <1>;
274 ti,nand-ecc-opt = "sw";
275
276 gpmc,cs-on-ns = <0>;
277 gpmc,cs-rd-off-ns = <120>;
278 gpmc,cs-wr-off-ns = <120>;
279
280 gpmc,adv-on-ns = <0>;
281 gpmc,adv-rd-off-ns = <120>;
282 gpmc,adv-wr-off-ns = <120>;
283
284 gpmc,we-on-ns = <6>;
285 gpmc,we-off-ns = <90>;
286
287 gpmc,oe-on-ns = <6>;
288 gpmc,oe-off-ns = <90>;
289
290 gpmc,page-burst-access-ns = <6>;
291 gpmc,access-ns = <72>;
292 gpmc,cycle2cycle-delay-ns = <60>;
293
294 gpmc,rd-cycle-ns = <120>;
295 gpmc,wr-cycle-ns = <120>;
296 gpmc,wr-access-ns = <186>;
297 gpmc,wr-data-mux-bus-ns = <90>;
298
299 #address-cells = <1>;
300 #size-cells = <1>;
301
302 partition@0 {
303 label = "xloader";
304 reg = <0 0x80000>;
305 };
306 partition@0x80000 {
307 label = "uboot";
308 reg = <0x80000 0x1e0000>;
309 };
310 partition@0x260000 {
311 label = "uboot environment";
312 reg = <0x260000 0x40000>;
313 };
314 partition@0x2a0000 {
315 label = "linux";
316 reg = <0x2a0000 0x400000>;
317 };
318 partition@0x6a0000 {
319 label = "rootfs";
320 reg = <0x6a0000 0x1f880000>;
321 };
322 };
323};