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gerrit-public.fairphone.software / kernel / msm-4.19 / 5b9bd1784088f5407424d43f63ef777bb898d2d5 / . / arch / x86 / kvm / lapic.h
blob: 9d28383fc1e70cc3437ae2eb062ff9433c659f96 [file] [log] [blame]
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]1#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
Andre Przywaraaf669ac2015-03-26 14:39:29 +0000[diff] [blame]4#include <kvm/iodev.h>
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]5
6#include <linux/kvm_host.h>
7
Jan Kiszka66450a22013-03-13 12:42:34 +0100[diff] [blame]8#define KVM_APIC_INIT 0
9#define KVM_APIC_SIPI 1
10
Avi Kivitye9d90d42012-07-26 18:01:50 +0300[diff] [blame]11struct kvm_timer {
12 struct hrtimer timer;
13 s64 period; /* unit: ns */
Radim Krčmářa323b402014-10-30 15:06:46 +0100[diff] [blame]14 u32 timer_mode;
Avi Kivitye9d90d42012-07-26 18:01:50 +0300[diff] [blame]15 u32 timer_mode_mask;
16 u64 tscdeadline;
Marcelo Tosattid0659d92014-12-16 09:08:15 -0500[diff] [blame]17 u64 expired_tscdeadline;
Avi Kivitye9d90d42012-07-26 18:01:50 +0300[diff] [blame]18 atomic_t pending; /* accumulated triggered timers */
Avi Kivitye9d90d42012-07-26 18:01:50 +0300[diff] [blame]19};
20
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]21struct kvm_lapic {
22 unsigned long base_address;
23 struct kvm_io_device dev;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300[diff] [blame]24 struct kvm_timer lapic_timer;
25 u32 divide_count;
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]26 struct kvm_vcpu *vcpu;
Radim Krčmáře4627552014-10-30 15:06:45 +0100[diff] [blame]27 bool sw_enabled;
Gleb Natapov33e4c682009-06-11 11:06:51 +0300[diff] [blame]28 bool irr_pending;
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300[diff] [blame]29 /* Number of bits set in ISR. */
30 s16 isr_count;
31 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
32 int highest_isr_cache;
Michael S. Tsirkin5eadf912012-06-24 19:24:19 +0300[diff] [blame]33 /**
34 * APIC register page. The layout matches the register layout seen by
35 * the guest 1:1, because it is accessed by the vmx microcode.
36 * Note: Only one register, the TPR, is used by the microcode.
37 */
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]38 void *regs;
Avi Kivityb93463a2007-10-25 16:52:32 +0200[diff] [blame]39 gpa_t vapic_addr;
Andy Honigfda4e2e2013-11-20 10:23:22 -0800[diff] [blame]40 struct gfn_to_hva_cache vapic_cache;
Jan Kiszka66450a22013-03-13 12:42:34 +0100[diff] [blame]41 unsigned long pending_events;
42 unsigned int sipi_vector;
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]43};
44int kvm_create_lapic(struct kvm_vcpu *vcpu);
45void kvm_free_lapic(struct kvm_vcpu *vcpu);
46
47int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
48int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
49int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
Jan Kiszka66450a22013-03-13 12:42:34 +0100[diff] [blame]50void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]51void kvm_lapic_reset(struct kvm_vcpu *vcpu);
52u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
53void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
Kevin Tian58fbbf22011-08-30 13:56:17 +0300[diff] [blame]54void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]55void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
Harvey Harrison8b2cf732008-04-27 12:14:13 -0700[diff] [blame]56u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
Gleb Natapovfc61b802009-07-05 17:39:35 +0300[diff] [blame]57void kvm_apic_set_version(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]58
Yang Zhangcf9e65b2013-04-11 19:25:14 +0800[diff] [blame]59void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr);
Wincy Van705699a2015-02-03 23:58:17 +0800[diff] [blame]60void __kvm_apic_update_irr(u32 *pir, void *regs);
Yang Zhanga20ed542013-04-11 19:25:15 +0800[diff] [blame]61void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
Yang Zhangb4f22252013-04-11 19:21:37 +0800[diff] [blame]62int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
63 unsigned long *dest_map);
Avi Kivity89342082011-11-10 14:57:21 +0200[diff] [blame]64int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]65
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300[diff] [blame]66bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
Yang Zhangb4f22252013-04-11 19:21:37 +0800[diff] [blame]67 struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map);
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300[diff] [blame]68
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]69u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
Jan Kiszka58cb6282014-01-24 16:48:44 +0100[diff] [blame]70int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
Gleb Natapov64eb0622012-08-08 15:24:36 +0300[diff] [blame]71void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
72 struct kvm_lapic_state *s);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]73int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]74
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800[diff] [blame]75u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
76void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
77
Yang Zhang83d4c282013-01-25 10:18:49 +0800[diff] [blame]78void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
Yang Zhangc7c9c562013-01-25 10:18:51 +0800[diff] [blame]79void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
Yang Zhang83d4c282013-01-25 10:18:49 +0800[diff] [blame]80
Andy Honigfda4e2e2013-11-20 10:23:22 -0800[diff] [blame]81int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
Avi Kivityb93463a2007-10-25 16:52:32 +0200[diff] [blame]82void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
83void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
84
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300[diff] [blame]85int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
86int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
Gleb Natapov10388a02010-01-17 15:51:23 +0200[diff] [blame]87
88int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
89int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
90
91static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
92{
93 return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
94}
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300[diff] [blame]95
96int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
Gleb Natapovc5cc4212012-08-05 15:58:30 +0300[diff] [blame]97void kvm_lapic_init(void);
Gleb Natapovc48f1492012-08-05 15:58:33 +0300[diff] [blame]98
99static inline u32 kvm_apic_get_reg(struct kvm_lapic *apic, int reg_off)
100{
101 return *((u32 *) (apic->regs + reg_off));
102}
103
104extern struct static_key kvm_no_apic_vcpu;
105
106static inline bool kvm_vcpu_has_lapic(struct kvm_vcpu *vcpu)
107{
108 if (static_key_false(&kvm_no_apic_vcpu))
109 return vcpu->arch.apic;
110 return true;
111}
112
113extern struct static_key_deferred apic_hw_disabled;
114
115static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
116{
117 if (static_key_false(&apic_hw_disabled.key))
118 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
119 return MSR_IA32_APICBASE_ENABLE;
120}
121
122extern struct static_key_deferred apic_sw_disabled;
123
Radim Krčmářf30ebc32014-10-30 15:06:47 +0100[diff] [blame]124static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
Gleb Natapovc48f1492012-08-05 15:58:33 +0300[diff] [blame]125{
126 if (static_key_false(&apic_sw_disabled.key))
Radim Krčmářf30ebc32014-10-30 15:06:47 +0100[diff] [blame]127 return apic->sw_enabled;
128 return true;
Gleb Natapovc48f1492012-08-05 15:58:33 +0300[diff] [blame]129}
130
131static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
132{
133 return kvm_vcpu_has_lapic(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
134}
135
136static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
137{
138 return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
139}
140
Yang Zhang8d146952013-01-25 10:18:50 +0800[diff] [blame]141static inline int apic_x2apic_mode(struct kvm_lapic *apic)
142{
143 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
144}
145
Yang Zhangc7c9c562013-01-25 10:18:51 +0800[diff] [blame]146static inline bool kvm_apic_vid_enabled(struct kvm *kvm)
147{
148 return kvm_x86_ops->vm_has_apicv(kvm);
149}
150
Jan Kiszka66450a22013-03-13 12:42:34 +0100[diff] [blame]151static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
152{
153 return vcpu->arch.apic->pending_events;
154}
155
Yang Zhang10606912013-04-11 19:21:38 +0800[diff] [blame]156bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
157
Marcelo Tosattid0659d92014-12-16 09:08:15 -0500[diff] [blame]158void wait_lapic_expire(struct kvm_vcpu *vcpu);
159
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]160#endif