| Zhangfei Gao | bfed345 | 2011-06-20 22:11:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * include/linux/platform_data/pxa_sdhci.h |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 3 | * |
| 4 | * Copyright 2010 Marvell |
| 5 | * Zhangfei Gao <zhangfei.gao@marvell.com> |
| 6 | * |
| 7 | * PXA Platform - SDHCI platform data definitions |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| Zhangfei Gao | bfed345 | 2011-06-20 22:11:52 +0800 | [diff] [blame] | 14 | #ifndef _PXA_SDHCI_H_ |
| 15 | #define _PXA_SDHCI_H_ |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 16 | |
| 17 | /* pxa specific flag */ |
| 18 | /* Require clock free running */ |
| Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 19 | #define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0) |
| 20 | /* card always wired to host, like on-chip emmc */ |
| 21 | #define PXA_FLAG_CARD_PERMANENT (1<<1) |
| Philip Rakity | 15ec446 | 2010-11-19 16:48:39 -0500 | [diff] [blame] | 22 | /* Board design supports 8-bit data on SD/SDIO BUS */ |
| 23 | #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) |
| 24 | |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 25 | /* |
| 26 | * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 27 | * @flags: flags for platform requirement |
| Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 28 | * @clk_delay_cycles: |
| 29 | * mmp2: each step is roughly 100ps, 5bits width |
| 30 | * pxa910: each step is 1ns, 4bits width |
| 31 | * @clk_delay_sel: select clk_delay, used on pxa910 |
| 32 | * 0: choose feedback clk |
| 33 | * 1: choose feedback clk + delay value |
| 34 | * 2: choose internal clk |
| 35 | * @clk_delay_enable: enable clk_delay or not, used on pxa910 |
| 36 | * @ext_cd_gpio: gpio pin used for external CD line |
| 37 | * @ext_cd_gpio_invert: invert values for external CD gpio line |
| 38 | * @max_speed: the maximum speed supported |
| 39 | * @host_caps: Standard MMC host capabilities bit field. |
| 40 | * @quirks: quirks of platfrom |
| 41 | * @pm_caps: pm_caps of platfrom |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 42 | */ |
| 43 | struct sdhci_pxa_platdata { |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 44 | unsigned int flags; |
| Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 45 | unsigned int clk_delay_cycles; |
| 46 | unsigned int clk_delay_sel; |
| 47 | bool clk_delay_enable; |
| 48 | unsigned int ext_cd_gpio; |
| 49 | bool ext_cd_gpio_invert; |
| 50 | unsigned int max_speed; |
| 51 | unsigned int host_caps; |
| Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 52 | unsigned int host_caps2; |
| Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 53 | unsigned int quirks; |
| 54 | unsigned int pm_caps; |
| 55 | }; |
| 56 | |
| 57 | struct sdhci_pxa { |
| 58 | u8 clk_enable; |
| 59 | u8 power_mode; |
| Zhangfei Gao | 536ac99 | 2010-09-20 10:51:28 -0400 | [diff] [blame] | 60 | }; |
| Zhangfei Gao | bfed345 | 2011-06-20 22:11:52 +0800 | [diff] [blame] | 61 | #endif /* _PXA_SDHCI_H_ */ |