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Magnus Damm0468b2d2013-03-28 00:49:34 +09001/*
2 * r8a7790 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/irq.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090022#include <linux/kernel.h>
23#include <linux/of_platform.h>
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020024#include <linux/platform_data/gpio-rcar.h>
Magnus Damm8f5ec0a2013-03-28 00:49:54 +090025#include <linux/platform_data/irq-renesas-irqc.h>
Magnus Damm99ade1a2013-06-28 20:27:04 +090026#include <linux/serial_sci.h>
Kuninori Morimoto2c578a12014-01-06 00:32:54 -080027#include <linux/sh_dma.h>
Magnus Damm99ade1a2013-06-28 20:27:04 +090028#include <linux/sh_timer.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090029#include <mach/r8a7790.h>
30#include <asm/mach/arch.h>
Magnus Dammfd44aa52014-06-17 16:47:37 +090031#include "common.h"
Magnus Damm74ac0de2014-06-17 16:47:13 +090032#include "dma-register.h"
Magnus Dammb6bab122014-06-17 16:47:29 +090033#include "irqs.h"
Magnus Damm62872982014-06-17 16:48:01 +090034#include "rcar-gen2.h"
Magnus Damm0468b2d2013-03-28 00:49:34 +090035
Kuninori Morimoto2c578a12014-01-06 00:32:54 -080036/* Audio-DMAC */
37#define AUDIO_DMAC_SLAVE(_id, _addr, t, r) \
38{ \
39 .slave_id = AUDIO_DMAC_SLAVE_## _id ##_TX, \
40 .addr = _addr + 0x8, \
41 .chcr = CHCR_TX(XMIT_SZ_32BIT), \
42 .mid_rid = t, \
43}, { \
44 .slave_id = AUDIO_DMAC_SLAVE_## _id ##_RX, \
45 .addr = _addr + 0xc, \
46 .chcr = CHCR_RX(XMIT_SZ_32BIT), \
47 .mid_rid = r, \
48}
49
50static const struct sh_dmae_slave_config r8a7790_audio_dmac_slaves[] = {
51 AUDIO_DMAC_SLAVE(SSI0, 0xec241000, 0x01, 0x02),
52 AUDIO_DMAC_SLAVE(SSI1, 0xec241040, 0x03, 0x04),
53 AUDIO_DMAC_SLAVE(SSI2, 0xec241080, 0x05, 0x06),
54 AUDIO_DMAC_SLAVE(SSI3, 0xec2410c0, 0x07, 0x08),
55 AUDIO_DMAC_SLAVE(SSI4, 0xec241100, 0x09, 0x0a),
56 AUDIO_DMAC_SLAVE(SSI5, 0xec241140, 0x0b, 0x0c),
57 AUDIO_DMAC_SLAVE(SSI6, 0xec241180, 0x0d, 0x0e),
58 AUDIO_DMAC_SLAVE(SSI7, 0xec2411c0, 0x0f, 0x10),
59 AUDIO_DMAC_SLAVE(SSI8, 0xec241200, 0x11, 0x12),
60 AUDIO_DMAC_SLAVE(SSI9, 0xec241240, 0x13, 0x14),
61};
62
63#define DMAE_CHANNEL(a, b) \
64{ \
65 .offset = (a) - 0x20, \
66 .dmars = (a) - 0x20 + 0x40, \
67 .chclr_bit = (b), \
68 .chclr_offset = 0x80 - 0x20, \
69}
70
71static const struct sh_dmae_channel r8a7790_audio_dmac_channels[] = {
72 DMAE_CHANNEL(0x8000, 0),
73 DMAE_CHANNEL(0x8080, 1),
74 DMAE_CHANNEL(0x8100, 2),
75 DMAE_CHANNEL(0x8180, 3),
76 DMAE_CHANNEL(0x8200, 4),
77 DMAE_CHANNEL(0x8280, 5),
78 DMAE_CHANNEL(0x8300, 6),
79 DMAE_CHANNEL(0x8380, 7),
80 DMAE_CHANNEL(0x8400, 8),
81 DMAE_CHANNEL(0x8480, 9),
82 DMAE_CHANNEL(0x8500, 10),
83 DMAE_CHANNEL(0x8580, 11),
84 DMAE_CHANNEL(0x8600, 12),
85};
86
87static struct sh_dmae_pdata r8a7790_audio_dmac_platform_data = {
88 .slave = r8a7790_audio_dmac_slaves,
89 .slave_num = ARRAY_SIZE(r8a7790_audio_dmac_slaves),
90 .channel = r8a7790_audio_dmac_channels,
91 .channel_num = ARRAY_SIZE(r8a7790_audio_dmac_channels),
92 .ts_low_shift = TS_LOW_SHIFT,
93 .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
94 .ts_high_shift = TS_HI_SHIFT,
95 .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
96 .ts_shift = dma_ts_shift,
97 .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
98 .dmaor_init = DMAOR_DME,
99 .chclr_present = 1,
100 .chclr_bitwise = 1,
101};
102
103static struct resource r8a7790_audio_dmac_resources[] = {
104 /* Channel registers and DMAOR for low */
105 DEFINE_RES_MEM(0xec700020, 0x8663 - 0x20),
106 DEFINE_RES_IRQ(gic_spi(346)),
107 DEFINE_RES_NAMED(gic_spi(320), 13, NULL, IORESOURCE_IRQ),
108
109 /* Channel registers and DMAOR for hi */
110 DEFINE_RES_MEM(0xec720020, 0x8663 - 0x20), /* hi */
111 DEFINE_RES_IRQ(gic_spi(347)),
112 DEFINE_RES_NAMED(gic_spi(333), 13, NULL, IORESOURCE_IRQ),
113};
114
115#define r8a7790_register_audio_dmac(id) \
116 platform_device_register_resndata( \
117 &platform_bus, "sh-dma-engine", id, \
118 &r8a7790_audio_dmac_resources[id * 3], 3, \
119 &r8a7790_audio_dmac_platform_data, \
120 sizeof(r8a7790_audio_dmac_platform_data))
121
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200122static const struct resource pfc_resources[] __initconst = {
Magnus Damm69e351d2013-03-28 00:50:03 +0900123 DEFINE_RES_MEM(0xe6060000, 0x250),
124};
125
Magnus Damm8d0b3bf2013-10-17 06:51:46 +0900126#define r8a7790_register_pfc() \
127 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \
128 ARRAY_SIZE(pfc_resources))
129
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +0200130#define R8A7790_GPIO(idx) \
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200131static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +0200132 DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
133 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
134}; \
135 \
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200136static const struct gpio_rcar_config \
137r8a7790_gpio##idx##_platform_data __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +0200138 .gpio_base = 32 * (idx), \
139 .irq_base = 0, \
140 .number_of_pins = 32, \
141 .pctl_name = "pfc-r8a7790", \
Simon Hormand93906b82013-05-13 17:53:52 +0900142 .has_both_edge_trigger = 1, \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +0200143}; \
144
145R8A7790_GPIO(0);
146R8A7790_GPIO(1);
147R8A7790_GPIO(2);
148R8A7790_GPIO(3);
149R8A7790_GPIO(4);
150R8A7790_GPIO(5);
151
152#define r8a7790_register_gpio(idx) \
153 platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
154 r8a7790_gpio##idx##_resources, \
155 ARRAY_SIZE(r8a7790_gpio##idx##_resources), \
156 &r8a7790_gpio##idx##_platform_data, \
157 sizeof(r8a7790_gpio##idx##_platform_data))
158
Kuninori Morimotob448c902013-11-28 19:02:12 -0800159static struct resource i2c_resources[] __initdata = {
160 /* I2C0 */
161 DEFINE_RES_MEM(0xE6508000, 0x40),
162 DEFINE_RES_IRQ(gic_spi(287)),
163 /* I2C1 */
164 DEFINE_RES_MEM(0xE6518000, 0x40),
165 DEFINE_RES_IRQ(gic_spi(288)),
166 /* I2C2 */
167 DEFINE_RES_MEM(0xE6530000, 0x40),
168 DEFINE_RES_IRQ(gic_spi(286)),
169 /* I2C3 */
170 DEFINE_RES_MEM(0xE6540000, 0x40),
171 DEFINE_RES_IRQ(gic_spi(290)),
172
173};
174
175#define r8a7790_register_i2c(idx) \
176 platform_device_register_simple( \
Valentine Barshakdb455c72013-12-27 14:58:08 +0400177 "i2c-rcar_gen2", idx, \
Kuninori Morimotob448c902013-11-28 19:02:12 -0800178 i2c_resources + (2 * idx), 2); \
179
Magnus Damm69e351d2013-03-28 00:50:03 +0900180void __init r8a7790_pinmux_init(void)
181{
Magnus Damm8d0b3bf2013-10-17 06:51:46 +0900182 r8a7790_register_pfc();
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +0200183 r8a7790_register_gpio(0);
184 r8a7790_register_gpio(1);
185 r8a7790_register_gpio(2);
186 r8a7790_register_gpio(3);
187 r8a7790_register_gpio(4);
188 r8a7790_register_gpio(5);
Magnus Damm69e351d2013-03-28 00:50:03 +0900189}
190
Laurent Pinchart6319ea52013-12-06 10:59:46 +0100191#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
Laurent Pinchart302d8892013-11-03 13:50:31 +0100192static struct plat_sci_port scif##index##_platform_data = { \
193 .type = scif_type, \
Laurent Pinchart302d8892013-11-03 13:50:31 +0100194 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
Laurent Pinchart302d8892013-11-03 13:50:31 +0100195 .scscr = _scscr, \
Laurent Pinchartc0a384f2013-11-01 01:44:07 +0100196}; \
197 \
198static struct resource scif##index##_resources[] = { \
199 DEFINE_RES_MEM(baseaddr, 0x100), \
200 DEFINE_RES_IRQ(irq), \
Magnus Damm55d9fab2013-03-28 00:49:44 +0900201}
202
Laurent Pinchart302d8892013-11-03 13:50:31 +0100203#define R8A7790_SCIF(index, baseaddr, irq) \
204 __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
Laurent Pinchart6319ea52013-12-06 10:59:46 +0100205 index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900206
Laurent Pinchart302d8892013-11-03 13:50:31 +0100207#define R8A7790_SCIFA(index, baseaddr, irq) \
208 __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
Laurent Pinchart6319ea52013-12-06 10:59:46 +0100209 index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900210
Laurent Pinchart302d8892013-11-03 13:50:31 +0100211#define R8A7790_SCIFB(index, baseaddr, irq) \
212 __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
Laurent Pinchart6319ea52013-12-06 10:59:46 +0100213 index, baseaddr, irq)
Ulrich Hechtd44f8302013-05-31 17:57:02 +0200214
Laurent Pinchart302d8892013-11-03 13:50:31 +0100215#define R8A7790_HSCIF(index, baseaddr, irq) \
216 __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
Laurent Pinchart6319ea52013-12-06 10:59:46 +0100217 index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900218
Laurent Pinchart302d8892013-11-03 13:50:31 +0100219R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
220R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
221R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
222R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
223R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
224R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
225R8A7790_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
226R8A7790_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
227R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
228R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
Magnus Damm55d9fab2013-03-28 00:49:44 +0900229
Laurent Pinchart302d8892013-11-03 13:50:31 +0100230#define r8a7790_register_scif(index) \
Laurent Pinchartc0a384f2013-11-01 01:44:07 +0100231 platform_device_register_resndata(&platform_bus, "sh-sci", index, \
232 scif##index##_resources, \
233 ARRAY_SIZE(scif##index##_resources), \
234 &scif##index##_platform_data, \
235 sizeof(scif##index##_platform_data))
Magnus Damm55d9fab2013-03-28 00:49:44 +0900236
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200237static const struct renesas_irqc_config irqc0_data __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900238 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
239};
240
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200241static const struct resource irqc0_resources[] __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900242 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
243 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
244 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
245 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
246 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
247};
248
249#define r8a7790_register_irqc(idx) \
250 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
251 idx, irqc##idx##_resources, \
252 ARRAY_SIZE(irqc##idx##_resources), \
253 &irqc##idx##_data, \
254 sizeof(struct renesas_irqc_config))
255
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200256static const struct resource thermal_resources[] __initconst = {
Simon Horman0b8eeba2013-06-26 16:22:21 +0900257 DEFINE_RES_MEM(0xe61f0000, 0x14),
258 DEFINE_RES_MEM(0xe61f0100, 0x38),
259 DEFINE_RES_IRQ(gic_spi(69)),
260};
261
262#define r8a7790_register_thermal() \
263 platform_device_register_simple("rcar_thermal", -1, \
264 thermal_resources, \
265 ARRAY_SIZE(thermal_resources))
266
Laurent Pinchart711ee6c2014-04-23 13:15:13 +0200267static struct sh_timer_config cmt0_platform_data = {
268 .channels_mask = 0x60,
Magnus Damm99ade1a2013-06-28 20:27:04 +0900269};
270
Laurent Pinchart711ee6c2014-04-23 13:15:13 +0200271static struct resource cmt0_resources[] = {
272 DEFINE_RES_MEM(0xffca0000, 0x1004),
273 DEFINE_RES_IRQ(gic_spi(142)),
Magnus Damm99ade1a2013-06-28 20:27:04 +0900274};
275
276#define r8a7790_register_cmt(idx) \
Laurent Pinchart711ee6c2014-04-23 13:15:13 +0200277 platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
Magnus Damm99ade1a2013-06-28 20:27:04 +0900278 idx, cmt##idx##_resources, \
279 ARRAY_SIZE(cmt##idx##_resources), \
280 &cmt##idx##_platform_data, \
281 sizeof(struct sh_timer_config))
282
Simon Horman6dace672013-06-28 13:42:16 +0900283void __init r8a7790_add_dt_devices(void)
Magnus Damm0468b2d2013-03-28 00:49:34 +0900284{
Laurent Pinchart4e9c4872014-04-30 02:31:45 +0200285 r8a7790_register_cmt(0);
286}
287
288void __init r8a7790_add_standard_devices(void)
289{
Laurent Pinchart302d8892013-11-03 13:50:31 +0100290 r8a7790_register_scif(0);
291 r8a7790_register_scif(1);
292 r8a7790_register_scif(2);
293 r8a7790_register_scif(3);
294 r8a7790_register_scif(4);
295 r8a7790_register_scif(5);
296 r8a7790_register_scif(6);
297 r8a7790_register_scif(7);
298 r8a7790_register_scif(8);
299 r8a7790_register_scif(9);
Simon Horman6dace672013-06-28 13:42:16 +0900300 r8a7790_add_dt_devices();
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900301 r8a7790_register_irqc(0);
Simon Horman0b8eeba2013-06-26 16:22:21 +0900302 r8a7790_register_thermal();
Magnus Dammf05b4b52014-02-24 14:49:07 +0900303 r8a7790_register_i2c(0);
304 r8a7790_register_i2c(1);
305 r8a7790_register_i2c(2);
306 r8a7790_register_i2c(3);
307 r8a7790_register_audio_dmac(0);
308 r8a7790_register_audio_dmac(1);
Magnus Damm0468b2d2013-03-28 00:49:34 +0900309}
310
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900311void __init r8a7790_init_early(void)
Magnus Damm8333d8c2013-06-28 20:27:13 +0900312{
313#ifndef CONFIG_ARM_ARCH_TIMER
314 shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
315#endif
316}
317
Magnus Damm0468b2d2013-03-28 00:49:34 +0900318#ifdef CONFIG_USE_OF
Magnus Damm0468b2d2013-03-28 00:49:34 +0900319
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200320static const char * const r8a7790_boards_compat_dt[] __initconst = {
Magnus Damm0468b2d2013-03-28 00:49:34 +0900321 "renesas,r8a7790",
322 NULL,
323};
324
325DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
Magnus Dammad09cb82013-08-29 08:22:07 +0900326 .smp = smp_ops(r8a7790_smp_ops),
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900327 .init_early = r8a7790_init_early,
Magnus Damm50c517d2013-09-12 09:32:49 +0900328 .init_time = rcar_gen2_timer_init,
Magnus Damm0468b2d2013-03-28 00:49:34 +0900329 .dt_compat = r8a7790_boards_compat_dt,
330MACHINE_END
331#endif /* CONFIG_USE_OF */