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gerrit-public.fairphone.software / kernel / msm-4.19 / 62e7bec49479e0c61e8cfd914f722a9ca6fd52e5 / . / arch / x86 / include / asm / inst.h
blob: 280bf7fb6aba5c0e1976c852a71692d1d3f888b2 [file] [log] [blame]
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]1/*
2 * Generate .byte code for some instructions not supported by old
3 * binutils.
4 */
5#ifndef X86_ASM_INST_H
6#define X86_ASM_INST_H
7
8#ifdef __ASSEMBLY__
9
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]10#define REG_NUM_INVALID 100
11
12#define REG_TYPE_R64 0
13#define REG_TYPE_XMM 1
14#define REG_TYPE_INVALID 100
15
16 .macro R64_NUM opd r64
17 \opd = REG_NUM_INVALID
18 .ifc \r64,%rax
19 \opd = 0
20 .endif
21 .ifc \r64,%rcx
22 \opd = 1
23 .endif
24 .ifc \r64,%rdx
25 \opd = 2
26 .endif
27 .ifc \r64,%rbx
28 \opd = 3
29 .endif
30 .ifc \r64,%rsp
31 \opd = 4
32 .endif
33 .ifc \r64,%rbp
34 \opd = 5
35 .endif
36 .ifc \r64,%rsi
37 \opd = 6
38 .endif
39 .ifc \r64,%rdi
40 \opd = 7
41 .endif
42 .ifc \r64,%r8
43 \opd = 8
44 .endif
45 .ifc \r64,%r9
46 \opd = 9
47 .endif
48 .ifc \r64,%r10
49 \opd = 10
50 .endif
51 .ifc \r64,%r11
52 \opd = 11
53 .endif
54 .ifc \r64,%r12
55 \opd = 12
56 .endif
57 .ifc \r64,%r13
58 \opd = 13
59 .endif
60 .ifc \r64,%r14
61 \opd = 14
62 .endif
63 .ifc \r64,%r15
64 \opd = 15
65 .endif
66 .endm
67
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]68 .macro XMM_NUM opd xmm
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]69 \opd = REG_NUM_INVALID
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]70 .ifc \xmm,%xmm0
71 \opd = 0
72 .endif
73 .ifc \xmm,%xmm1
74 \opd = 1
75 .endif
76 .ifc \xmm,%xmm2
77 \opd = 2
78 .endif
79 .ifc \xmm,%xmm3
80 \opd = 3
81 .endif
82 .ifc \xmm,%xmm4
83 \opd = 4
84 .endif
85 .ifc \xmm,%xmm5
86 \opd = 5
87 .endif
88 .ifc \xmm,%xmm6
89 \opd = 6
90 .endif
91 .ifc \xmm,%xmm7
92 \opd = 7
93 .endif
94 .ifc \xmm,%xmm8
95 \opd = 8
96 .endif
97 .ifc \xmm,%xmm9
98 \opd = 9
99 .endif
100 .ifc \xmm,%xmm10
101 \opd = 10
102 .endif
103 .ifc \xmm,%xmm11
104 \opd = 11
105 .endif
106 .ifc \xmm,%xmm12
107 \opd = 12
108 .endif
109 .ifc \xmm,%xmm13
110 \opd = 13
111 .endif
112 .ifc \xmm,%xmm14
113 \opd = 14
114 .endif
115 .ifc \xmm,%xmm15
116 \opd = 15
117 .endif
118 .endm
119
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]120 .macro REG_TYPE type reg
121 R64_NUM reg_type_r64 \reg
122 XMM_NUM reg_type_xmm \reg
Huang Ying62e7bec2010-03-24 21:37:57 +0800[diff] [blame^]123 .if reg_type_r64 <> REG_NUM_INVALID
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]124 \type = REG_TYPE_R64
Huang Ying62e7bec2010-03-24 21:37:57 +0800[diff] [blame^]125 .elseif reg_type_xmm <> REG_NUM_INVALID
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]126 \type = REG_TYPE_XMM
127 .else
128 \type = REG_TYPE_INVALID
129 .endif
130 .endm
131
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]132 .macro PFX_OPD_SIZE
133 .byte 0x66
134 .endm
135
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]136 .macro PFX_REX opd1 opd2 W=0
137 .if ((\opd1 | \opd2) & 8) || \W
138 .byte 0x40 | ((\opd1 & 8) >> 3) | ((\opd2 & 8) >> 1) | (\W << 3)
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]139 .endif
140 .endm
141
142 .macro MODRM mod opd1 opd2
143 .byte \mod | (\opd1 & 7) | ((\opd2 & 7) << 3)
144 .endm
145
146 .macro PSHUFB_XMM xmm1 xmm2
147 XMM_NUM pshufb_opd1 \xmm1
148 XMM_NUM pshufb_opd2 \xmm2
149 PFX_OPD_SIZE
150 PFX_REX pshufb_opd1 pshufb_opd2
151 .byte 0x0f, 0x38, 0x00
152 MODRM 0xc0 pshufb_opd1 pshufb_opd2
153 .endm
154
155 .macro PCLMULQDQ imm8 xmm1 xmm2
156 XMM_NUM clmul_opd1 \xmm1
157 XMM_NUM clmul_opd2 \xmm2
158 PFX_OPD_SIZE
159 PFX_REX clmul_opd1 clmul_opd2
160 .byte 0x0f, 0x3a, 0x44
161 MODRM 0xc0 clmul_opd1 clmul_opd2
162 .byte \imm8
163 .endm
164
165 .macro AESKEYGENASSIST rcon xmm1 xmm2
166 XMM_NUM aeskeygen_opd1 \xmm1
167 XMM_NUM aeskeygen_opd2 \xmm2
168 PFX_OPD_SIZE
169 PFX_REX aeskeygen_opd1 aeskeygen_opd2
170 .byte 0x0f, 0x3a, 0xdf
171 MODRM 0xc0 aeskeygen_opd1 aeskeygen_opd2
172 .byte \rcon
173 .endm
174
175 .macro AESIMC xmm1 xmm2
176 XMM_NUM aesimc_opd1 \xmm1
177 XMM_NUM aesimc_opd2 \xmm2
178 PFX_OPD_SIZE
179 PFX_REX aesimc_opd1 aesimc_opd2
180 .byte 0x0f, 0x38, 0xdb
181 MODRM 0xc0 aesimc_opd1 aesimc_opd2
182 .endm
183
184 .macro AESENC xmm1 xmm2
185 XMM_NUM aesenc_opd1 \xmm1
186 XMM_NUM aesenc_opd2 \xmm2
187 PFX_OPD_SIZE
188 PFX_REX aesenc_opd1 aesenc_opd2
189 .byte 0x0f, 0x38, 0xdc
190 MODRM 0xc0 aesenc_opd1 aesenc_opd2
191 .endm
192
193 .macro AESENCLAST xmm1 xmm2
194 XMM_NUM aesenclast_opd1 \xmm1
195 XMM_NUM aesenclast_opd2 \xmm2
196 PFX_OPD_SIZE
197 PFX_REX aesenclast_opd1 aesenclast_opd2
198 .byte 0x0f, 0x38, 0xdd
199 MODRM 0xc0 aesenclast_opd1 aesenclast_opd2
200 .endm
201
202 .macro AESDEC xmm1 xmm2
203 XMM_NUM aesdec_opd1 \xmm1
204 XMM_NUM aesdec_opd2 \xmm2
205 PFX_OPD_SIZE
206 PFX_REX aesdec_opd1 aesdec_opd2
207 .byte 0x0f, 0x38, 0xde
208 MODRM 0xc0 aesdec_opd1 aesdec_opd2
209 .endm
210
211 .macro AESDECLAST xmm1 xmm2
212 XMM_NUM aesdeclast_opd1 \xmm1
213 XMM_NUM aesdeclast_opd2 \xmm2
214 PFX_OPD_SIZE
215 PFX_REX aesdeclast_opd1 aesdeclast_opd2
216 .byte 0x0f, 0x38, 0xdf
217 MODRM 0xc0 aesdeclast_opd1 aesdeclast_opd2
218 .endm
Huang Ying32cbd7d2010-03-13 16:28:42 +0800[diff] [blame]219
220 .macro MOVQ_R64_XMM opd1 opd2
221 REG_TYPE movq_r64_xmm_opd1_type \opd1
222 .if movq_r64_xmm_opd1_type == REG_TYPE_XMM
223 XMM_NUM movq_r64_xmm_opd1 \opd1
224 R64_NUM movq_r64_xmm_opd2 \opd2
225 .else
226 R64_NUM movq_r64_xmm_opd1 \opd1
227 XMM_NUM movq_r64_xmm_opd2 \opd2
228 .endif
229 PFX_OPD_SIZE
230 PFX_REX movq_r64_xmm_opd1 movq_r64_xmm_opd2 1
231 .if movq_r64_xmm_opd1_type == REG_TYPE_XMM
232 .byte 0x0f, 0x7e
233 .else
234 .byte 0x0f, 0x6e
235 .endif
236 MODRM 0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2
237 .endm
Huang Yingfd650a62009-11-09 13:52:26 -0500[diff] [blame]238#endif
239
240#endif