Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $ |
| 2 | * |
| 3 | * low level stuff for Gazel isdn cards |
| 4 | * |
| 5 | * Author BeWan Systems |
| 6 | * based on source code from Karsten Keil |
| 7 | * Copyright by BeWan Systems |
| 8 | * |
| 9 | * This software may be used and distributed according to the terms |
| 10 | * of the GNU General Public License, incorporated herein by reference. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/config.h> |
| 15 | #include <linux/init.h> |
| 16 | #include "hisax.h" |
| 17 | #include "isac.h" |
| 18 | #include "hscx.h" |
| 19 | #include "isdnl1.h" |
| 20 | #include "ipac.h" |
| 21 | #include <linux/pci.h> |
| 22 | |
| 23 | extern const char *CardType[]; |
Adrian Bunk | 672c3fd | 2005-06-25 14:59:18 -0700 | [diff] [blame^] | 24 | static const char *gazel_revision = "$Revision: 2.19.2.4 $"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
| 26 | #define R647 1 |
| 27 | #define R685 2 |
| 28 | #define R753 3 |
| 29 | #define R742 4 |
| 30 | |
| 31 | #define PLX_CNTRL 0x50 /* registre de controle PLX */ |
| 32 | #define RESET_GAZEL 0x4 |
| 33 | #define RESET_9050 0x40000000 |
| 34 | #define PLX_INCSR 0x4C /* registre d'IT du 9050 */ |
| 35 | #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */ |
| 36 | #define INT_ISAC 0x20 /* 1 = IT isac en cours */ |
| 37 | #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */ |
| 38 | #define INT_HSCX 0x4 /* 1 = IT hscx en cours */ |
| 39 | #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */ |
| 40 | #define INT_IPAC_EN 0x3 /* enable IT ipac */ |
| 41 | |
| 42 | |
| 43 | #define byteout(addr,val) outb(val,addr) |
| 44 | #define bytein(addr) inb(addr) |
| 45 | |
| 46 | static inline u_char |
| 47 | readreg(unsigned int adr, u_short off) |
| 48 | { |
| 49 | return bytein(adr + off); |
| 50 | } |
| 51 | |
| 52 | static inline void |
| 53 | writereg(unsigned int adr, u_short off, u_char data) |
| 54 | { |
| 55 | byteout(adr + off, data); |
| 56 | } |
| 57 | |
| 58 | |
| 59 | static inline void |
| 60 | read_fifo(unsigned int adr, u_char * data, int size) |
| 61 | { |
| 62 | insb(adr, data, size); |
| 63 | } |
| 64 | |
| 65 | static void |
| 66 | write_fifo(unsigned int adr, u_char * data, int size) |
| 67 | { |
| 68 | outsb(adr, data, size); |
| 69 | } |
| 70 | |
| 71 | static inline u_char |
| 72 | readreg_ipac(unsigned int adr, u_short off) |
| 73 | { |
| 74 | register u_char ret; |
| 75 | |
| 76 | byteout(adr, off); |
| 77 | ret = bytein(adr + 4); |
| 78 | return ret; |
| 79 | } |
| 80 | |
| 81 | static inline void |
| 82 | writereg_ipac(unsigned int adr, u_short off, u_char data) |
| 83 | { |
| 84 | byteout(adr, off); |
| 85 | byteout(adr + 4, data); |
| 86 | } |
| 87 | |
| 88 | |
| 89 | static inline void |
| 90 | read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) |
| 91 | { |
| 92 | byteout(adr, off); |
| 93 | insb(adr + 4, data, size); |
| 94 | } |
| 95 | |
| 96 | static void |
| 97 | write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) |
| 98 | { |
| 99 | byteout(adr, off); |
| 100 | outsb(adr + 4, data, size); |
| 101 | } |
| 102 | |
| 103 | /* Interface functions */ |
| 104 | |
| 105 | static u_char |
| 106 | ReadISAC(struct IsdnCardState *cs, u_char offset) |
| 107 | { |
| 108 | u_short off2 = offset; |
| 109 | |
| 110 | switch (cs->subtyp) { |
| 111 | case R647: |
| 112 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); |
| 113 | case R685: |
| 114 | return (readreg(cs->hw.gazel.isac, off2)); |
| 115 | case R753: |
| 116 | case R742: |
| 117 | return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); |
| 118 | } |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static void |
| 123 | WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) |
| 124 | { |
| 125 | u_short off2 = offset; |
| 126 | |
| 127 | switch (cs->subtyp) { |
| 128 | case R647: |
| 129 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); |
| 130 | case R685: |
| 131 | writereg(cs->hw.gazel.isac, off2, value); |
| 132 | break; |
| 133 | case R753: |
| 134 | case R742: |
| 135 | writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); |
| 136 | break; |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | static void |
| 141 | ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) |
| 142 | { |
| 143 | switch (cs->subtyp) { |
| 144 | case R647: |
| 145 | case R685: |
| 146 | read_fifo(cs->hw.gazel.isacfifo, data, size); |
| 147 | break; |
| 148 | case R753: |
| 149 | case R742: |
| 150 | read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); |
| 151 | break; |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | static void |
| 156 | WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) |
| 157 | { |
| 158 | switch (cs->subtyp) { |
| 159 | case R647: |
| 160 | case R685: |
| 161 | write_fifo(cs->hw.gazel.isacfifo, data, size); |
| 162 | break; |
| 163 | case R753: |
| 164 | case R742: |
| 165 | write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); |
| 166 | break; |
| 167 | } |
| 168 | } |
| 169 | |
| 170 | static void |
| 171 | ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) |
| 172 | { |
| 173 | switch (cs->subtyp) { |
| 174 | case R647: |
| 175 | case R685: |
| 176 | read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); |
| 177 | break; |
| 178 | case R753: |
| 179 | case R742: |
| 180 | read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); |
| 181 | break; |
| 182 | } |
| 183 | } |
| 184 | |
| 185 | static void |
| 186 | WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) |
| 187 | { |
| 188 | switch (cs->subtyp) { |
| 189 | case R647: |
| 190 | case R685: |
| 191 | write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); |
| 192 | break; |
| 193 | case R753: |
| 194 | case R742: |
| 195 | write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); |
| 196 | break; |
| 197 | } |
| 198 | } |
| 199 | |
| 200 | static u_char |
| 201 | ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) |
| 202 | { |
| 203 | u_short off2 = offset; |
| 204 | |
| 205 | switch (cs->subtyp) { |
| 206 | case R647: |
| 207 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); |
| 208 | case R685: |
| 209 | return (readreg(cs->hw.gazel.hscx[hscx], off2)); |
| 210 | case R753: |
| 211 | case R742: |
| 212 | return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); |
| 213 | } |
| 214 | return 0; |
| 215 | } |
| 216 | |
| 217 | static void |
| 218 | WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) |
| 219 | { |
| 220 | u_short off2 = offset; |
| 221 | |
| 222 | switch (cs->subtyp) { |
| 223 | case R647: |
| 224 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); |
| 225 | case R685: |
| 226 | writereg(cs->hw.gazel.hscx[hscx], off2, value); |
| 227 | break; |
| 228 | case R753: |
| 229 | case R742: |
| 230 | writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); |
| 231 | break; |
| 232 | } |
| 233 | } |
| 234 | |
| 235 | /* |
| 236 | * fast interrupt HSCX stuff goes here |
| 237 | */ |
| 238 | |
| 239 | #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg) |
| 240 | #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data) |
| 241 | #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt) |
| 242 | #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt) |
| 243 | |
| 244 | #include "hscx_irq.c" |
| 245 | |
| 246 | static irqreturn_t |
| 247 | gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs) |
| 248 | { |
| 249 | #define MAXCOUNT 5 |
| 250 | struct IsdnCardState *cs = dev_id; |
| 251 | u_char valisac, valhscx; |
| 252 | int count = 0; |
| 253 | u_long flags; |
| 254 | |
| 255 | spin_lock_irqsave(&cs->lock, flags); |
| 256 | do { |
| 257 | valhscx = ReadHSCX(cs, 1, HSCX_ISTA); |
| 258 | if (valhscx) |
| 259 | hscx_int_main(cs, valhscx); |
| 260 | valisac = ReadISAC(cs, ISAC_ISTA); |
| 261 | if (valisac) |
| 262 | isac_interrupt(cs, valisac); |
| 263 | count++; |
| 264 | } while ((valhscx || valisac) && (count < MAXCOUNT)); |
| 265 | |
| 266 | WriteHSCX(cs, 0, HSCX_MASK, 0xFF); |
| 267 | WriteHSCX(cs, 1, HSCX_MASK, 0xFF); |
| 268 | WriteISAC(cs, ISAC_MASK, 0xFF); |
| 269 | WriteISAC(cs, ISAC_MASK, 0x0); |
| 270 | WriteHSCX(cs, 0, HSCX_MASK, 0x0); |
| 271 | WriteHSCX(cs, 1, HSCX_MASK, 0x0); |
| 272 | spin_unlock_irqrestore(&cs->lock, flags); |
| 273 | return IRQ_HANDLED; |
| 274 | } |
| 275 | |
| 276 | |
| 277 | static irqreturn_t |
| 278 | gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs) |
| 279 | { |
| 280 | struct IsdnCardState *cs = dev_id; |
| 281 | u_char ista, val; |
| 282 | int count = 0; |
| 283 | u_long flags; |
| 284 | |
| 285 | spin_lock_irqsave(&cs->lock, flags); |
| 286 | ista = ReadISAC(cs, IPAC_ISTA - 0x80); |
| 287 | do { |
| 288 | if (ista & 0x0f) { |
| 289 | val = ReadHSCX(cs, 1, HSCX_ISTA); |
| 290 | if (ista & 0x01) |
| 291 | val |= 0x01; |
| 292 | if (ista & 0x04) |
| 293 | val |= 0x02; |
| 294 | if (ista & 0x08) |
| 295 | val |= 0x04; |
| 296 | if (val) { |
| 297 | hscx_int_main(cs, val); |
| 298 | } |
| 299 | } |
| 300 | if (ista & 0x20) { |
| 301 | val = 0xfe & ReadISAC(cs, ISAC_ISTA); |
| 302 | if (val) { |
| 303 | isac_interrupt(cs, val); |
| 304 | } |
| 305 | } |
| 306 | if (ista & 0x10) { |
| 307 | val = 0x01; |
| 308 | isac_interrupt(cs, val); |
| 309 | } |
| 310 | ista = ReadISAC(cs, IPAC_ISTA - 0x80); |
| 311 | count++; |
| 312 | } |
| 313 | while ((ista & 0x3f) && (count < MAXCOUNT)); |
| 314 | |
| 315 | WriteISAC(cs, IPAC_MASK - 0x80, 0xFF); |
| 316 | WriteISAC(cs, IPAC_MASK - 0x80, 0xC0); |
| 317 | spin_unlock_irqrestore(&cs->lock, flags); |
| 318 | return IRQ_HANDLED; |
| 319 | } |
Adrian Bunk | 672c3fd | 2005-06-25 14:59:18 -0700 | [diff] [blame^] | 320 | |
| 321 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | release_io_gazel(struct IsdnCardState *cs) |
| 323 | { |
| 324 | unsigned int i; |
| 325 | |
| 326 | switch (cs->subtyp) { |
| 327 | case R647: |
| 328 | for (i = 0x0000; i < 0xC000; i += 0x1000) |
| 329 | release_region(i + cs->hw.gazel.hscx[0], 16); |
| 330 | release_region(0xC000 + cs->hw.gazel.hscx[0], 1); |
| 331 | break; |
| 332 | |
| 333 | case R685: |
| 334 | release_region(cs->hw.gazel.hscx[0], 0x100); |
| 335 | release_region(cs->hw.gazel.cfg_reg, 0x80); |
| 336 | break; |
| 337 | |
| 338 | case R753: |
| 339 | release_region(cs->hw.gazel.ipac, 0x8); |
| 340 | release_region(cs->hw.gazel.cfg_reg, 0x80); |
| 341 | break; |
| 342 | |
| 343 | case R742: |
| 344 | release_region(cs->hw.gazel.ipac, 8); |
| 345 | break; |
| 346 | } |
| 347 | } |
| 348 | |
| 349 | static int |
| 350 | reset_gazel(struct IsdnCardState *cs) |
| 351 | { |
| 352 | unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; |
| 353 | |
| 354 | switch (cs->subtyp) { |
| 355 | case R647: |
| 356 | writereg(addr, 0, 0); |
| 357 | HZDELAY(10); |
| 358 | writereg(addr, 0, 1); |
| 359 | HZDELAY(2); |
| 360 | break; |
| 361 | case R685: |
| 362 | plxcntrl = inl(addr + PLX_CNTRL); |
| 363 | plxcntrl |= (RESET_9050 + RESET_GAZEL); |
| 364 | outl(plxcntrl, addr + PLX_CNTRL); |
| 365 | plxcntrl &= ~(RESET_9050 + RESET_GAZEL); |
| 366 | HZDELAY(4); |
| 367 | outl(plxcntrl, addr + PLX_CNTRL); |
| 368 | HZDELAY(10); |
| 369 | outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR); |
| 370 | break; |
| 371 | case R753: |
| 372 | plxcntrl = inl(addr + PLX_CNTRL); |
| 373 | plxcntrl |= (RESET_9050 + RESET_GAZEL); |
| 374 | outl(plxcntrl, addr + PLX_CNTRL); |
| 375 | plxcntrl &= ~(RESET_9050 + RESET_GAZEL); |
| 376 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); |
| 377 | HZDELAY(4); |
| 378 | outl(plxcntrl, addr + PLX_CNTRL); |
| 379 | HZDELAY(10); |
| 380 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); |
| 381 | WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); |
| 382 | WriteISAC(cs, IPAC_AOE - 0x80, 0x0); |
| 383 | WriteISAC(cs, IPAC_MASK - 0x80, 0xff); |
| 384 | WriteISAC(cs, IPAC_CONF - 0x80, 0x1); |
| 385 | outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR); |
| 386 | WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); |
| 387 | break; |
| 388 | case R742: |
| 389 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); |
| 390 | HZDELAY(4); |
| 391 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); |
| 392 | WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); |
| 393 | WriteISAC(cs, IPAC_AOE - 0x80, 0x0); |
| 394 | WriteISAC(cs, IPAC_MASK - 0x80, 0xff); |
| 395 | WriteISAC(cs, IPAC_CONF - 0x80, 0x1); |
| 396 | WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); |
| 397 | break; |
| 398 | } |
| 399 | return (0); |
| 400 | } |
| 401 | |
| 402 | static int |
| 403 | Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg) |
| 404 | { |
| 405 | u_long flags; |
| 406 | |
| 407 | switch (mt) { |
| 408 | case CARD_RESET: |
| 409 | spin_lock_irqsave(&cs->lock, flags); |
| 410 | reset_gazel(cs); |
| 411 | spin_unlock_irqrestore(&cs->lock, flags); |
| 412 | return (0); |
| 413 | case CARD_RELEASE: |
| 414 | release_io_gazel(cs); |
| 415 | return (0); |
| 416 | case CARD_INIT: |
| 417 | spin_lock_irqsave(&cs->lock, flags); |
| 418 | inithscxisac(cs, 1); |
| 419 | if ((cs->subtyp==R647)||(cs->subtyp==R685)) { |
| 420 | int i; |
| 421 | for (i=0;i<(2+MAX_WAITING_CALLS);i++) { |
| 422 | cs->bcs[i].hw.hscx.tsaxr0 = 0x1f; |
| 423 | cs->bcs[i].hw.hscx.tsaxr1 = 0x23; |
| 424 | } |
| 425 | } |
| 426 | spin_unlock_irqrestore(&cs->lock, flags); |
| 427 | return (0); |
| 428 | case CARD_TEST: |
| 429 | return (0); |
| 430 | } |
| 431 | return (0); |
| 432 | } |
| 433 | |
| 434 | static int |
| 435 | reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs) |
| 436 | { |
| 437 | unsigned int i, j, base = 0, adr = 0, len = 0; |
| 438 | |
| 439 | switch (cs->subtyp) { |
| 440 | case R647: |
| 441 | base = cs->hw.gazel.hscx[0]; |
| 442 | if (!request_region(adr = (0xC000 + base), len = 1, "gazel")) |
| 443 | goto error; |
| 444 | for (i = 0x0000; i < 0xC000; i += 0x1000) { |
| 445 | if (!request_region(adr = (i + base), len = 16, "gazel")) |
| 446 | goto error; |
| 447 | } |
| 448 | if (i != 0xC000) { |
| 449 | for (j = 0; j < i; j+= 0x1000) |
| 450 | release_region(j + base, 16); |
| 451 | release_region(0xC000 + base, 1); |
| 452 | goto error; |
| 453 | } |
| 454 | break; |
| 455 | |
| 456 | case R685: |
| 457 | if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel")) |
| 458 | goto error; |
| 459 | if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { |
| 460 | release_region(cs->hw.gazel.hscx[0],0x100); |
| 461 | goto error; |
| 462 | } |
| 463 | break; |
| 464 | |
| 465 | case R753: |
| 466 | if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) |
| 467 | goto error; |
| 468 | if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { |
| 469 | release_region(cs->hw.gazel.ipac, 8); |
| 470 | goto error; |
| 471 | } |
| 472 | break; |
| 473 | |
| 474 | case R742: |
| 475 | if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) |
| 476 | goto error; |
| 477 | break; |
| 478 | } |
| 479 | |
| 480 | return 0; |
| 481 | |
| 482 | error: |
| 483 | printk(KERN_WARNING "Gazel: %s io ports 0x%x-0x%x already in use\n", |
| 484 | CardType[cs->typ], adr, adr + len); |
| 485 | return 1; |
| 486 | } |
| 487 | |
| 488 | static int __init |
| 489 | setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs) |
| 490 | { |
| 491 | printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n"); |
| 492 | // we got an irq parameter, assume it is an ISA card |
| 493 | // R742 decodes address even in not started... |
| 494 | // R647 returns FF if not present or not started |
| 495 | // eventually needs improvment |
| 496 | if (readreg_ipac(card->para[1], IPAC_ID) == 1) |
| 497 | cs->subtyp = R742; |
| 498 | else |
| 499 | cs->subtyp = R647; |
| 500 | |
| 501 | setup_isac(cs); |
| 502 | cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; |
| 503 | cs->hw.gazel.ipac = card->para[1]; |
| 504 | cs->hw.gazel.isac = card->para[1] + 0x8000; |
| 505 | cs->hw.gazel.hscx[0] = card->para[1]; |
| 506 | cs->hw.gazel.hscx[1] = card->para[1] + 0x4000; |
| 507 | cs->irq = card->para[0]; |
| 508 | cs->hw.gazel.isacfifo = cs->hw.gazel.isac; |
| 509 | cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; |
| 510 | cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; |
| 511 | |
| 512 | switch (cs->subtyp) { |
| 513 | case R647: |
| 514 | printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n"); |
| 515 | cs->dc.isac.adf2 = 0x87; |
| 516 | printk(KERN_INFO |
| 517 | "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", |
| 518 | cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); |
| 519 | printk(KERN_INFO |
| 520 | "Gazel: hscx A:0x%X hscx B:0x%X\n", |
| 521 | cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); |
| 522 | |
| 523 | break; |
| 524 | case R742: |
| 525 | printk(KERN_INFO "Gazel: Card ISA R742 found\n"); |
| 526 | test_and_set_bit(HW_IPAC, &cs->HW_Flags); |
| 527 | printk(KERN_INFO |
| 528 | "Gazel: config irq:%d ipac:0x%X\n", |
| 529 | cs->irq, cs->hw.gazel.ipac); |
| 530 | break; |
| 531 | } |
| 532 | |
| 533 | return (0); |
| 534 | } |
| 535 | |
| 536 | static struct pci_dev *dev_tel __initdata = NULL; |
| 537 | |
| 538 | static int __init |
| 539 | setup_gazelpci(struct IsdnCardState *cs) |
| 540 | { |
| 541 | u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0; |
| 542 | u_char pci_irq = 0, found; |
| 543 | u_int nbseek, seekcard; |
| 544 | |
| 545 | printk(KERN_WARNING "Gazel: PCI card automatic recognition\n"); |
| 546 | |
| 547 | found = 0; |
| 548 | seekcard = PCI_DEVICE_ID_PLX_R685; |
| 549 | for (nbseek = 0; nbseek < 3; nbseek++) { |
| 550 | if ((dev_tel = pci_find_device(PCI_VENDOR_ID_PLX, seekcard, dev_tel))) { |
| 551 | if (pci_enable_device(dev_tel)) |
| 552 | return 1; |
| 553 | pci_irq = dev_tel->irq; |
| 554 | pci_ioaddr0 = pci_resource_start(dev_tel, 1); |
| 555 | pci_ioaddr1 = pci_resource_start(dev_tel, 2); |
| 556 | found = 1; |
| 557 | } |
| 558 | if (found) |
| 559 | break; |
| 560 | else { |
| 561 | switch (seekcard) { |
| 562 | case PCI_DEVICE_ID_PLX_R685: |
| 563 | seekcard = PCI_DEVICE_ID_PLX_R753; |
| 564 | break; |
| 565 | case PCI_DEVICE_ID_PLX_R753: |
| 566 | seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO; |
| 567 | break; |
| 568 | } |
| 569 | } |
| 570 | } |
| 571 | if (!found) { |
| 572 | printk(KERN_WARNING "Gazel: No PCI card found\n"); |
| 573 | return (1); |
| 574 | } |
| 575 | if (!pci_irq) { |
| 576 | printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n"); |
| 577 | return 1; |
| 578 | } |
| 579 | cs->hw.gazel.pciaddr[0] = pci_ioaddr0; |
| 580 | cs->hw.gazel.pciaddr[1] = pci_ioaddr1; |
| 581 | setup_isac(cs); |
| 582 | pci_ioaddr1 &= 0xfffe; |
| 583 | cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; |
| 584 | cs->hw.gazel.ipac = pci_ioaddr1; |
| 585 | cs->hw.gazel.isac = pci_ioaddr1 + 0x80; |
| 586 | cs->hw.gazel.hscx[0] = pci_ioaddr1; |
| 587 | cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40; |
| 588 | cs->hw.gazel.isacfifo = cs->hw.gazel.isac; |
| 589 | cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; |
| 590 | cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; |
| 591 | cs->irq = pci_irq; |
| 592 | cs->irq_flags |= SA_SHIRQ; |
| 593 | |
| 594 | switch (seekcard) { |
| 595 | case PCI_DEVICE_ID_PLX_R685: |
| 596 | printk(KERN_INFO "Gazel: Card PCI R685 found\n"); |
| 597 | cs->subtyp = R685; |
| 598 | cs->dc.isac.adf2 = 0x87; |
| 599 | printk(KERN_INFO |
| 600 | "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", |
| 601 | cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); |
| 602 | printk(KERN_INFO |
| 603 | "Gazel: hscx A:0x%X hscx B:0x%X\n", |
| 604 | cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); |
| 605 | break; |
| 606 | case PCI_DEVICE_ID_PLX_R753: |
| 607 | case PCI_DEVICE_ID_PLX_DJINN_ITOO: |
| 608 | printk(KERN_INFO "Gazel: Card PCI R753 found\n"); |
| 609 | cs->subtyp = R753; |
| 610 | test_and_set_bit(HW_IPAC, &cs->HW_Flags); |
| 611 | printk(KERN_INFO |
| 612 | "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n", |
| 613 | cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); |
| 614 | break; |
| 615 | } |
| 616 | |
| 617 | return (0); |
| 618 | } |
| 619 | |
| 620 | int __init |
| 621 | setup_gazel(struct IsdnCard *card) |
| 622 | { |
| 623 | struct IsdnCardState *cs = card->cs; |
| 624 | char tmp[64]; |
| 625 | u_char val; |
| 626 | |
| 627 | strcpy(tmp, gazel_revision); |
| 628 | printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp)); |
| 629 | |
| 630 | if (cs->typ != ISDN_CTYPE_GAZEL) |
| 631 | return (0); |
| 632 | |
| 633 | if (card->para[0]) { |
| 634 | if (setup_gazelisa(card, cs)) |
| 635 | return (0); |
| 636 | } else { |
| 637 | |
| 638 | #ifdef CONFIG_PCI |
| 639 | if (setup_gazelpci(cs)) |
| 640 | return (0); |
| 641 | #else |
| 642 | printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n"); |
| 643 | return (0); |
| 644 | #endif /* CONFIG_PCI */ |
| 645 | } |
| 646 | |
| 647 | if (reserve_regions(card, cs)) { |
| 648 | return (0); |
| 649 | } |
| 650 | if (reset_gazel(cs)) { |
| 651 | printk(KERN_WARNING "Gazel: wrong IRQ\n"); |
| 652 | release_io_gazel(cs); |
| 653 | return (0); |
| 654 | } |
| 655 | cs->readisac = &ReadISAC; |
| 656 | cs->writeisac = &WriteISAC; |
| 657 | cs->readisacfifo = &ReadISACfifo; |
| 658 | cs->writeisacfifo = &WriteISACfifo; |
| 659 | cs->BC_Read_Reg = &ReadHSCX; |
| 660 | cs->BC_Write_Reg = &WriteHSCX; |
| 661 | cs->BC_Send_Data = &hscx_fill_fifo; |
| 662 | cs->cardmsg = &Gazel_card_msg; |
| 663 | |
| 664 | switch (cs->subtyp) { |
| 665 | case R647: |
| 666 | case R685: |
| 667 | cs->irq_func = &gazel_interrupt; |
| 668 | ISACVersion(cs, "Gazel:"); |
| 669 | if (HscxVersion(cs, "Gazel:")) { |
| 670 | printk(KERN_WARNING |
| 671 | "Gazel: wrong HSCX versions check IO address\n"); |
| 672 | release_io_gazel(cs); |
| 673 | return (0); |
| 674 | } |
| 675 | break; |
| 676 | case R742: |
| 677 | case R753: |
| 678 | cs->irq_func = &gazel_interrupt_ipac; |
| 679 | val = ReadISAC(cs, IPAC_ID - 0x80); |
| 680 | printk(KERN_INFO "Gazel: IPAC version %x\n", val); |
| 681 | break; |
| 682 | } |
| 683 | |
| 684 | return (1); |
| 685 | } |