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Rob Clarkc8afe682013-06-26 12:44:06 -04001/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __MSM_DRV_H__
19#define __MSM_DRV_H__
20
21#include <linux/kernel.h>
22#include <linux/clk.h>
23#include <linux/cpufreq.h>
24#include <linux/module.h>
Rob Clark060530f2014-03-03 14:19:12 -050025#include <linux/component.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040026#include <linux/platform_device.h>
27#include <linux/pm.h>
28#include <linux/pm_runtime.h>
29#include <linux/slab.h>
30#include <linux/list.h>
31#include <linux/iommu.h>
32#include <linux/types.h>
Archit Taneja3d6df062015-06-09 14:17:22 +053033#include <linux/of_graph.h>
Archit Tanejae9fbdaf2015-11-18 12:15:14 +053034#include <linux/of_device.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040035#include <asm/sizes.h>
36
Rob Clarkc8afe682013-06-26 12:44:06 -040037#include <drm/drmP.h>
Rob Clarkcf3a7e42014-11-08 13:21:06 -050038#include <drm/drm_atomic.h>
39#include <drm/drm_atomic_helper.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040040#include <drm/drm_crtc_helper.h>
Rob Clarkcf3a7e42014-11-08 13:21:06 -050041#include <drm/drm_plane_helper.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040042#include <drm/drm_fb_helper.h>
Rob Clark7198e6b2013-07-19 12:59:32 -040043#include <drm/msm_drm.h>
Daniel Vetterd9fc9412014-09-23 15:46:53 +020044#include <drm/drm_gem.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040045
46struct msm_kms;
Rob Clark7198e6b2013-07-19 12:59:32 -040047struct msm_gpu;
Rob Clark871d8122013-11-16 12:56:06 -050048struct msm_mmu;
Archit Taneja990a4002016-05-07 23:11:25 +053049struct msm_mdss;
Rob Clarka7d3c952014-05-30 14:47:38 -040050struct msm_rd_state;
Rob Clark70c70f02014-05-30 14:49:43 -040051struct msm_perf_state;
Rob Clarka7d3c952014-05-30 14:47:38 -040052struct msm_gem_submit;
Rob Clarkca762a82016-03-15 17:22:13 -040053struct msm_fence_context;
Rob Clarkfde5de62016-03-15 15:35:08 -040054struct msm_fence_cb;
Rob Clarkc8afe682013-06-26 12:44:06 -040055
Rob Clark7198e6b2013-07-19 12:59:32 -040056#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */
57
58struct msm_file_private {
59 /* currently we don't do anything useful with this.. but when
60 * per-context address spaces are supported we'd keep track of
61 * the context's page-tables here.
62 */
63 int dummy;
64};
Rob Clarkc8afe682013-06-26 12:44:06 -040065
jilai wang12987782015-06-25 17:37:42 -040066enum msm_mdp_plane_property {
67 PLANE_PROP_ZPOS,
68 PLANE_PROP_ALPHA,
69 PLANE_PROP_PREMULTIPLIED,
70 PLANE_PROP_MAX_NUM
71};
72
Hai Li78b1d472015-07-27 13:49:45 -040073struct msm_vblank_ctrl {
74 struct work_struct work;
75 struct list_head event_list;
76 spinlock_t lock;
77};
78
Rob Clarkc8afe682013-06-26 12:44:06 -040079struct msm_drm_private {
80
Rob Clark68209392016-05-17 16:19:32 -040081 struct drm_device *dev;
82
Rob Clarkc8afe682013-06-26 12:44:06 -040083 struct msm_kms *kms;
84
Rob Clark060530f2014-03-03 14:19:12 -050085 /* subordinate devices, if present: */
Rob Clark067fef32014-11-04 13:33:14 -050086 struct platform_device *gpu_pdev;
87
Archit Taneja990a4002016-05-07 23:11:25 +053088 /* top level MDSS wrapper device (for MDP5 only) */
89 struct msm_mdss *mdss;
90
Rob Clark067fef32014-11-04 13:33:14 -050091 /* possibly this should be in the kms component, but it is
92 * shared by both mdp4 and mdp5..
93 */
94 struct hdmi *hdmi;
Rob Clark060530f2014-03-03 14:19:12 -050095
Hai Liab5b0102015-01-07 18:47:44 -050096 /* eDP is for mdp5 only, but kms has not been created
97 * when edp_bind() and edp_init() are called. Here is the only
98 * place to keep the edp instance.
99 */
100 struct msm_edp *edp;
101
Hai Lia6895542015-03-31 14:36:33 -0400102 /* DSI is shared by mdp4 and mdp5 */
103 struct msm_dsi *dsi[2];
104
Rob Clark7198e6b2013-07-19 12:59:32 -0400105 /* when we have more than one 'msm_gpu' these need to be an array: */
106 struct msm_gpu *gpu;
107 struct msm_file_private *lastctx;
108
Rob Clarkc8afe682013-06-26 12:44:06 -0400109 struct drm_fb_helper *fbdev;
110
Rob Clarka7d3c952014-05-30 14:47:38 -0400111 struct msm_rd_state *rd;
Rob Clark70c70f02014-05-30 14:49:43 -0400112 struct msm_perf_state *perf;
Rob Clarka7d3c952014-05-30 14:47:38 -0400113
Rob Clarkc8afe682013-06-26 12:44:06 -0400114 /* list of GEM objects: */
115 struct list_head inactive_list;
116
117 struct workqueue_struct *wq;
Rob Clarkba00c3f2016-03-16 18:18:17 -0400118 struct workqueue_struct *atomic_wq;
Rob Clarkc8afe682013-06-26 12:44:06 -0400119
Rob Clarkf86afec2014-11-25 12:41:18 -0500120 /* crtcs pending async atomic updates: */
121 uint32_t pending_crtcs;
122 wait_queue_head_t pending_crtcs_event;
123
Rob Clark871d8122013-11-16 12:56:06 -0500124 /* registered MMUs: */
125 unsigned int num_mmus;
126 struct msm_mmu *mmus[NUM_DOMAINS];
Rob Clarkc8afe682013-06-26 12:44:06 -0400127
Rob Clarka8623912013-10-08 12:57:48 -0400128 unsigned int num_planes;
129 struct drm_plane *planes[8];
130
Rob Clarkc8afe682013-06-26 12:44:06 -0400131 unsigned int num_crtcs;
132 struct drm_crtc *crtcs[8];
133
134 unsigned int num_encoders;
135 struct drm_encoder *encoders[8];
136
Rob Clarka3376e32013-08-30 13:02:15 -0400137 unsigned int num_bridges;
138 struct drm_bridge *bridges[8];
139
Rob Clarkc8afe682013-06-26 12:44:06 -0400140 unsigned int num_connectors;
141 struct drm_connector *connectors[8];
Rob Clark871d8122013-11-16 12:56:06 -0500142
jilai wang12987782015-06-25 17:37:42 -0400143 /* Properties */
144 struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
145
Rob Clark871d8122013-11-16 12:56:06 -0500146 /* VRAM carveout, used when no IOMMU: */
147 struct {
148 unsigned long size;
149 dma_addr_t paddr;
150 /* NOTE: mm managed at the page level, size is in # of pages
151 * and position mm_node->start is in # of pages:
152 */
153 struct drm_mm mm;
154 } vram;
Hai Li78b1d472015-07-27 13:49:45 -0400155
Rob Clark68209392016-05-17 16:19:32 -0400156 struct shrinker shrinker;
157
Hai Li78b1d472015-07-27 13:49:45 -0400158 struct msm_vblank_ctrl vblank_ctrl;
Rob Clarkc8afe682013-06-26 12:44:06 -0400159};
160
161struct msm_format {
162 uint32_t pixel_format;
163};
164
Daniel Vetterb4274fb2014-11-26 17:02:18 +0100165int msm_atomic_check(struct drm_device *dev,
166 struct drm_atomic_state *state);
Rob Clarkcf3a7e42014-11-08 13:21:06 -0500167int msm_atomic_commit(struct drm_device *dev,
Maarten Lankhorsta3ccfb92016-04-26 16:11:38 +0200168 struct drm_atomic_state *state, bool nonblock);
Rob Clarkcf3a7e42014-11-08 13:21:06 -0500169
Rob Clark871d8122013-11-16 12:56:06 -0500170int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
Rob Clarkc8afe682013-06-26 12:44:06 -0400171
Rob Clark40e68152016-05-03 09:50:26 -0400172void msm_gem_submit_free(struct msm_gem_submit *submit);
Rob Clark7198e6b2013-07-19 12:59:32 -0400173int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
174 struct drm_file *file);
175
Rob Clark68209392016-05-17 16:19:32 -0400176void msm_gem_shrinker_init(struct drm_device *dev);
177void msm_gem_shrinker_cleanup(struct drm_device *dev);
178
Daniel Thompson77a147e2014-11-12 11:38:14 +0000179int msm_gem_mmap_obj(struct drm_gem_object *obj,
180 struct vm_area_struct *vma);
Rob Clarkc8afe682013-06-26 12:44:06 -0400181int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
182int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
183uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
184int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
185 uint32_t *iova);
186int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
Rob Clark2638d902014-11-08 09:13:37 -0500187uint32_t msm_gem_iova(struct drm_gem_object *obj, int id);
Rob Clark05b84912013-09-28 11:28:35 -0400188struct page **msm_gem_get_pages(struct drm_gem_object *obj);
189void msm_gem_put_pages(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400190void msm_gem_put_iova(struct drm_gem_object *obj, int id);
191int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
192 struct drm_mode_create_dumb *args);
Rob Clarkc8afe682013-06-26 12:44:06 -0400193int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
194 uint32_t handle, uint64_t *offset);
Rob Clark05b84912013-09-28 11:28:35 -0400195struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
196void *msm_gem_prime_vmap(struct drm_gem_object *obj);
197void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Daniel Thompson77a147e2014-11-12 11:38:14 +0000198int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
Rob Clark05b84912013-09-28 11:28:35 -0400199struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
Maarten Lankhorstb5e9c1a2014-01-09 11:03:14 +0100200 struct dma_buf_attachment *attach, struct sg_table *sg);
Rob Clark05b84912013-09-28 11:28:35 -0400201int msm_gem_prime_pin(struct drm_gem_object *obj);
202void msm_gem_prime_unpin(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400203void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
204void *msm_gem_vaddr(struct drm_gem_object *obj);
Rob Clark4cd33c42016-05-17 15:44:49 -0400205int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
Rob Clark68209392016-05-17 16:19:32 -0400206void msm_gem_purge(struct drm_gem_object *obj);
Rob Clarkb6295f92016-03-15 18:26:28 -0400207int msm_gem_sync_object(struct drm_gem_object *obj,
208 struct msm_fence_context *fctx, bool exclusive);
Rob Clark7198e6b2013-07-19 12:59:32 -0400209void msm_gem_move_to_active(struct drm_gem_object *obj,
Rob Clarkb6295f92016-03-15 18:26:28 -0400210 struct msm_gpu *gpu, bool exclusive, struct fence *fence);
Rob Clark7198e6b2013-07-19 12:59:32 -0400211void msm_gem_move_to_inactive(struct drm_gem_object *obj);
Rob Clarkba00c3f2016-03-16 18:18:17 -0400212int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
Rob Clark7198e6b2013-07-19 12:59:32 -0400213int msm_gem_cpu_fini(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400214void msm_gem_free_object(struct drm_gem_object *obj);
215int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
216 uint32_t size, uint32_t flags, uint32_t *handle);
217struct drm_gem_object *msm_gem_new(struct drm_device *dev,
218 uint32_t size, uint32_t flags);
Rob Clark05b84912013-09-28 11:28:35 -0400219struct drm_gem_object *msm_gem_import(struct drm_device *dev,
Rob Clark79f0e202016-03-16 12:40:35 -0400220 struct dma_buf *dmabuf, struct sg_table *sgt);
Rob Clarkc8afe682013-06-26 12:44:06 -0400221
Rob Clark2638d902014-11-08 09:13:37 -0500222int msm_framebuffer_prepare(struct drm_framebuffer *fb, int id);
223void msm_framebuffer_cleanup(struct drm_framebuffer *fb, int id);
224uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int id, int plane);
Rob Clarkc8afe682013-06-26 12:44:06 -0400225struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
226const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
227struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
Ville Syrjälä1eb83452015-11-11 19:11:29 +0200228 const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
Rob Clarkc8afe682013-06-26 12:44:06 -0400229struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
Ville Syrjälä1eb83452015-11-11 19:11:29 +0200230 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
Rob Clarkc8afe682013-06-26 12:44:06 -0400231
232struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
Archit Taneja1aaa57f2016-02-25 11:19:45 +0530233void msm_fbdev_free(struct drm_device *dev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400234
Rob Clarkdada25b2013-12-01 12:12:54 -0500235struct hdmi;
Arnd Bergmannfcda50c2016-02-22 22:08:35 +0100236int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
Rob Clark067fef32014-11-04 13:33:14 -0500237 struct drm_encoder *encoder);
Arnd Bergmannfcda50c2016-02-22 22:08:35 +0100238void __init msm_hdmi_register(void);
239void __exit msm_hdmi_unregister(void);
Rob Clarkc8afe682013-06-26 12:44:06 -0400240
Hai Li00453982014-12-12 14:41:17 -0500241struct msm_edp;
242void __init msm_edp_register(void);
243void __exit msm_edp_unregister(void);
244int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
245 struct drm_encoder *encoder);
246
Hai Lia6895542015-03-31 14:36:33 -0400247struct msm_dsi;
248enum msm_dsi_encoder_id {
249 MSM_DSI_VIDEO_ENCODER_ID = 0,
250 MSM_DSI_CMD_ENCODER_ID = 1,
251 MSM_DSI_ENCODER_NUM = 2
252};
253#ifdef CONFIG_DRM_MSM_DSI
254void __init msm_dsi_register(void);
255void __exit msm_dsi_unregister(void);
256int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
257 struct drm_encoder *encoders[MSM_DSI_ENCODER_NUM]);
258#else
259static inline void __init msm_dsi_register(void)
260{
261}
262static inline void __exit msm_dsi_unregister(void)
263{
264}
265static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
266 struct drm_device *dev,
267 struct drm_encoder *encoders[MSM_DSI_ENCODER_NUM])
268{
269 return -EINVAL;
270}
271#endif
272
Archit Taneja1dd0a0b2016-05-30 16:36:50 +0530273void __init msm_mdp_register(void);
274void __exit msm_mdp_unregister(void);
275
Rob Clarkc8afe682013-06-26 12:44:06 -0400276#ifdef CONFIG_DEBUG_FS
277void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
278void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
279void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
Rob Clarka7d3c952014-05-30 14:47:38 -0400280int msm_debugfs_late_init(struct drm_device *dev);
281int msm_rd_debugfs_init(struct drm_minor *minor);
282void msm_rd_debugfs_cleanup(struct drm_minor *minor);
283void msm_rd_dump_submit(struct msm_gem_submit *submit);
Rob Clark70c70f02014-05-30 14:49:43 -0400284int msm_perf_debugfs_init(struct drm_minor *minor);
285void msm_perf_debugfs_cleanup(struct drm_minor *minor);
Rob Clarka7d3c952014-05-30 14:47:38 -0400286#else
287static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
288static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
Rob Clarkc8afe682013-06-26 12:44:06 -0400289#endif
290
291void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
292 const char *dbgname);
293void msm_writel(u32 data, void __iomem *addr);
294u32 msm_readl(const void __iomem *addr);
295
296#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
297#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
298
299static inline int align_pitch(int width, int bpp)
300{
301 int bytespp = (bpp + 7) / 8;
302 /* adreno needs pitch aligned to 32 pixels: */
303 return bytespp * ALIGN(width, 32);
304}
305
306/* for the generated headers: */
307#define INVALID_IDX(idx) ({BUG(); 0;})
Rob Clark7198e6b2013-07-19 12:59:32 -0400308#define fui(x) ({BUG(); 0;})
309#define util_float_to_half(x) ({BUG(); 0;})
310
Rob Clarkc8afe682013-06-26 12:44:06 -0400311
312#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
313
314/* for conditionally setting boolean flag(s): */
315#define COND(bool, val) ((bool) ? (val) : 0)
316
Rob Clark340ff412016-03-16 14:57:22 -0400317static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
318{
319 ktime_t now = ktime_get();
320 unsigned long remaining_jiffies;
321
322 if (ktime_compare(*timeout, now) < 0) {
323 remaining_jiffies = 0;
324 } else {
325 ktime_t rem = ktime_sub(*timeout, now);
326 struct timespec ts = ktime_to_timespec(rem);
327 remaining_jiffies = timespec_to_jiffies(&ts);
328 }
329
330 return remaining_jiffies;
331}
Rob Clarkc8afe682013-06-26 12:44:06 -0400332
333#endif /* __MSM_DRV_H__ */