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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
Uwe Zeisbergerf30c2262006-10-03 23:01:26 +02002 * arch/arm/mach-omap2/serial.c
Tony Lindgren1dbae812005-11-10 14:26:51 +00003 *
4 * OMAP2 serial support.
5 *
Jouni Hogander6e811762008-10-06 15:49:15 +03006 * Copyright (C) 2005-2008 Nokia Corporation
Tony Lindgren1dbae812005-11-10 14:26:51 +00007 * Author: Paul Mundt <paul.mundt@nokia.com>
8 *
9 * Based off of arch/arm/mach-omap/omap1/serial.c
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/serial_8250.h>
18#include <linux/serial_reg.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000019#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010020#include <linux/io.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000021
Russell Kinga09e64f2008-08-05 16:14:15 +010022#include <mach/common.h>
23#include <mach/board.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000024
Jouni Hogander6e811762008-10-06 15:49:15 +030025static struct clk *uart_ick[OMAP_MAX_NR_PORTS];
26static struct clk *uart_fck[OMAP_MAX_NR_PORTS];
Tony Lindgren1dbae812005-11-10 14:26:51 +000027
28static struct plat_serial8250_port serial_platform_data[] = {
29 {
Russell Kinge8a91c92008-09-01 22:07:37 +010030 .membase = IO_ADDRESS(OMAP_UART1_BASE),
31 .mapbase = OMAP_UART1_BASE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000032 .irq = 72,
33 .flags = UPF_BOOT_AUTOCONF,
34 .iotype = UPIO_MEM,
35 .regshift = 2,
Jouni Hogander6e811762008-10-06 15:49:15 +030036 .uartclk = OMAP24XX_BASE_BAUD * 16,
Tony Lindgren1dbae812005-11-10 14:26:51 +000037 }, {
Russell Kinge8a91c92008-09-01 22:07:37 +010038 .membase = IO_ADDRESS(OMAP_UART2_BASE),
39 .mapbase = OMAP_UART2_BASE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000040 .irq = 73,
41 .flags = UPF_BOOT_AUTOCONF,
42 .iotype = UPIO_MEM,
43 .regshift = 2,
Jouni Hogander6e811762008-10-06 15:49:15 +030044 .uartclk = OMAP24XX_BASE_BAUD * 16,
Tony Lindgren1dbae812005-11-10 14:26:51 +000045 }, {
Russell Kinge8a91c92008-09-01 22:07:37 +010046 .membase = IO_ADDRESS(OMAP_UART3_BASE),
47 .mapbase = OMAP_UART3_BASE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000048 .irq = 74,
49 .flags = UPF_BOOT_AUTOCONF,
50 .iotype = UPIO_MEM,
51 .regshift = 2,
Jouni Hogander6e811762008-10-06 15:49:15 +030052 .uartclk = OMAP24XX_BASE_BAUD * 16,
Tony Lindgren1dbae812005-11-10 14:26:51 +000053 }, {
54 .flags = 0
55 }
56};
57
58static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
59 int offset)
60{
61 offset <<= up->regshift;
62 return (unsigned int)__raw_readb(up->membase + offset);
63}
64
65static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
66 int value)
67{
68 offset <<= p->regshift;
Russell Kinge8a91c92008-09-01 22:07:37 +010069 __raw_writeb(value, p->membase + offset);
Tony Lindgren1dbae812005-11-10 14:26:51 +000070}
71
72/*
73 * Internal UARTs need to be initialized for the 8250 autoconfig to work
74 * properly. Note that the TX watermark initialization may not be needed
75 * once the 8250.c watermark handling code is merged.
76 */
77static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
78{
79 serial_write_reg(p, UART_OMAP_MDR1, 0x07);
80 serial_write_reg(p, UART_OMAP_SCR, 0x08);
81 serial_write_reg(p, UART_OMAP_MDR1, 0x00);
Juha Yrjola671c7232006-12-06 17:13:49 -080082 serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
Tony Lindgren1dbae812005-11-10 14:26:51 +000083}
84
Jouni Hogander6e811762008-10-06 15:49:15 +030085void omap_serial_enable_clocks(int enable)
86{
87 int i;
88 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
89 if (uart_ick[i] && uart_fck[i]) {
90 if (enable) {
91 clk_enable(uart_ick[i]);
92 clk_enable(uart_fck[i]);
93 } else {
94 clk_disable(uart_ick[i]);
95 clk_disable(uart_fck[i]);
96 }
97 }
98 }
99}
100
101void __init omap_serial_init(void)
Tony Lindgren1dbae812005-11-10 14:26:51 +0000102{
103 int i;
104 const struct omap_uart_config *info;
Jouni Hogander6e811762008-10-06 15:49:15 +0300105 char name[16];
Tony Lindgren1dbae812005-11-10 14:26:51 +0000106
107 /*
108 * Make sure the serial ports are muxed on at this point.
109 * You have to mux them off in device drivers later on
110 * if not needed.
111 */
112
Jouni Hogander6e811762008-10-06 15:49:15 +0300113 info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000114
115 if (info == NULL)
116 return;
117
118 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
119 struct plat_serial8250_port *p = serial_platform_data + i;
120
121 if (!(info->enabled_uarts & (1 << i))) {
Russell Kingc0fc18c52008-09-05 15:10:27 +0100122 p->membase = NULL;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000123 p->mapbase = 0;
124 continue;
125 }
126
Jouni Hogander6e811762008-10-06 15:49:15 +0300127 sprintf(name, "uart%d_ick", i+1);
128 uart_ick[i] = clk_get(NULL, name);
129 if (IS_ERR(uart_ick[i])) {
130 printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
131 uart_ick[i] = NULL;
132 } else
133 clk_enable(uart_ick[i]);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000134
Jouni Hogander6e811762008-10-06 15:49:15 +0300135 sprintf(name, "uart%d_fck", i+1);
136 uart_fck[i] = clk_get(NULL, name);
137 if (IS_ERR(uart_fck[i])) {
138 printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
139 uart_fck[i] = NULL;
140 } else
141 clk_enable(uart_fck[i]);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000142
143 omap_serial_reset(p);
144 }
145}
146
147static struct platform_device serial_device = {
148 .name = "serial8250",
Lennert Buytenhek7d420892006-03-23 12:59:08 +0000149 .id = PLAT8250_DEV_PLATFORM,
Tony Lindgren1dbae812005-11-10 14:26:51 +0000150 .dev = {
151 .platform_data = serial_platform_data,
152 },
153};
154
155static int __init omap_init(void)
156{
157 return platform_device_register(&serial_device);
158}
159arch_initcall(omap_init);