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Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -03001===============================================
2The irq_domain interrupt number mapping library
3===============================================
Grant Likely7ab3a832012-02-14 14:06:47 -07004
5The current design of the Linux kernel uses a single large number
6space where each separate IRQ source is assigned a different number.
7This is simple when there is only one interrupt controller, but in
8systems with multiple interrupt controllers the kernel must ensure
9that each one gets assigned non-overlapping allocations of Linux
10IRQ numbers.
11
Linus Walleij023bba32012-12-01 19:05:16 +010012The number of interrupt controllers registered as unique irqchips
13show a rising tendency: for example subdrivers of different kinds
14such as GPIO controllers avoid reimplementing identical callback
15mechanisms as the IRQ core system by modelling their interrupt
16handlers as irqchips, i.e. in effect cascading interrupt controllers.
17
18Here the interrupt number loose all kind of correspondence to
19hardware interrupt numbers: whereas in the past, IRQ numbers could
20be chosen so they matched the hardware IRQ line into the root
21interrupt controller (i.e. the component actually fireing the
22interrupt line to the CPU) nowadays this number is just a number.
23
24For this reason we need a mechanism to separate controller-local
25interrupt numbers, called hardware irq's, from Linux IRQ numbers.
26
Grant Likely7ab3a832012-02-14 14:06:47 -070027The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of
28irq numbers, but they don't provide any support for reverse mapping of
29the controller-local IRQ (hwirq) number into the Linux IRQ number
30space.
31
32The irq_domain library adds mapping between hwirq and IRQ numbers on
33top of the irq_alloc_desc*() API. An irq_domain to manage mapping is
34preferred over interrupt controller drivers open coding their own
35reverse mapping scheme.
36
Marc Zyngiere7a46c82015-10-13 12:51:45 +010037irq_domain also implements translation from an abstract irq_fwspec
38structure to hwirq numbers (Device Tree and ACPI GSI so far), and can
39be easily extended to support other IRQ topology data sources.
Grant Likely7ab3a832012-02-14 14:06:47 -070040
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -030041irq_domain usage
42================
43
Grant Likely7ab3a832012-02-14 14:06:47 -070044An interrupt controller driver creates and registers an irq_domain by
45calling one of the irq_domain_add_*() functions (each mapping method
46has a different allocator function, more on that later). The function
47will return a pointer to the irq_domain on success. The caller must
Jiang Liua2579542014-05-27 16:07:37 +080048provide the allocator function with an irq_domain_ops structure.
Grant Likely7ab3a832012-02-14 14:06:47 -070049
50In most cases, the irq_domain will begin empty without any mappings
51between hwirq and IRQ numbers. Mappings are added to the irq_domain
52by calling irq_create_mapping() which accepts the irq_domain and a
53hwirq number as arguments. If a mapping for the hwirq doesn't already
54exist then it will allocate a new Linux irq_desc, associate it with
55the hwirq, and call the .map() callback so the driver can perform any
56required hardware setup.
57
58When an interrupt is received, irq_find_mapping() function should
59be used to find the Linux IRQ number from the hwirq number.
60
Linus Walleij023bba32012-12-01 19:05:16 +010061The irq_create_mapping() function must be called *atleast once*
62before any call to irq_find_mapping(), lest the descriptor will not
63be allocated.
64
Grant Likely7ab3a832012-02-14 14:06:47 -070065If the driver has the Linux IRQ number or the irq_data pointer, and
66needs to know the associated hwirq number (such as in the irq_chip
67callbacks) then it can be directly obtained from irq_data->hwirq.
68
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -030069Types of irq_domain mappings
70============================
71
Grant Likely7ab3a832012-02-14 14:06:47 -070072There are several mechanisms available for reverse mapping from hwirq
73to Linux irq, and each mechanism uses a different allocation function.
74Which reverse map type should be used depends on the use case. Each
75of the reverse map types are described below:
76
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -030077Linear
78------
79
80::
81
82 irq_domain_add_linear()
83 irq_domain_create_linear()
Grant Likely7ab3a832012-02-14 14:06:47 -070084
85The linear reverse map maintains a fixed size table indexed by the
86hwirq number. When a hwirq is mapped, an irq_desc is allocated for
87the hwirq, and the IRQ number is stored in the table.
88
89The Linear map is a good choice when the maximum number of hwirqs is
90fixed and a relatively small number (~ < 256). The advantages of this
91map are fixed time lookup for IRQ numbers, and irq_descs are only
92allocated for in-use IRQs. The disadvantage is that the table must be
93as large as the largest possible hwirq number.
94
Jianyu Zhandbe7fcd2016-03-27 11:51:20 +080095irq_domain_add_linear() and irq_domain_create_linear() are functionally
96equivalent, except for the first argument is different - the former
97accepts an Open Firmware specific 'struct device_node', while the latter
98accepts a more general abstraction 'struct fwnode_handle'.
99
Grant Likely7ab3a832012-02-14 14:06:47 -0700100The majority of drivers should use the linear map.
101
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300102Tree
103----
104
105::
106
107 irq_domain_add_tree()
108 irq_domain_create_tree()
Grant Likely7ab3a832012-02-14 14:06:47 -0700109
110The irq_domain maintains a radix tree map from hwirq numbers to Linux
111IRQs. When an hwirq is mapped, an irq_desc is allocated and the
112hwirq is used as the lookup key for the radix tree.
113
114The tree map is a good choice if the hwirq number can be very large
115since it doesn't need to allocate a table as large as the largest
116hwirq number. The disadvantage is that hwirq to IRQ number lookup is
117dependent on how many entries are in the table.
118
Jianyu Zhandbe7fcd2016-03-27 11:51:20 +0800119irq_domain_add_tree() and irq_domain_create_tree() are functionally
120equivalent, except for the first argument is different - the former
121accepts an Open Firmware specific 'struct device_node', while the latter
122accepts a more general abstraction 'struct fwnode_handle'.
123
Kevin Cernekee7e229fa2014-12-25 09:49:01 -0800124Very few drivers should need this mapping.
Grant Likely7ab3a832012-02-14 14:06:47 -0700125
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300126No Map
127------
128
129::
130
131 irq_domain_add_nomap()
Grant Likely7ab3a832012-02-14 14:06:47 -0700132
133The No Map mapping is to be used when the hwirq number is
134programmable in the hardware. In this case it is best to program the
135Linux IRQ number into the hardware itself so that no mapping is
136required. Calling irq_create_direct_mapping() will allocate a Linux
137IRQ number and call the .map() callback so that driver can program the
138Linux IRQ number into the hardware.
139
140Most drivers cannot use this mapping.
141
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300142Legacy
143------
144
145::
146
147 irq_domain_add_simple()
148 irq_domain_add_legacy()
149 irq_domain_add_legacy_isa()
Grant Likely7ab3a832012-02-14 14:06:47 -0700150
151The Legacy mapping is a special case for drivers that already have a
152range of irq_descs allocated for the hwirqs. It is used when the
153driver cannot be immediately converted to use the linear mapping. For
154example, many embedded system board support files use a set of #defines
155for IRQ numbers that are passed to struct device registrations. In that
156case the Linux IRQ numbers cannot be dynamically assigned and the legacy
157mapping should be used.
158
159The legacy map assumes a contiguous range of IRQ numbers has already
160been allocated for the controller and that the IRQ number can be
161calculated by adding a fixed offset to the hwirq number, and
162visa-versa. The disadvantage is that it requires the interrupt
163controller to manage IRQ allocations and it requires an irq_desc to be
164allocated for every hwirq, even if it is unused.
165
166The legacy map should only be used if fixed IRQ mappings must be
167supported. For example, ISA controllers would use the legacy map for
168mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ
169numbers.
Mark Brown781d0f42012-07-05 12:19:19 +0100170
171Most users of legacy mappings should use irq_domain_add_simple() which
172will use a legacy domain only if an IRQ range is supplied by the
Linus Walleij023bba32012-12-01 19:05:16 +0100173system and will otherwise use a linear domain mapping. The semantics
174of this call are such that if an IRQ range is specified then
175descriptors will be allocated on-the-fly for it, and if no range is
Xishi Qiud9a6ed12013-11-06 13:18:19 -0800176specified it will fall through to irq_domain_add_linear() which means
Linus Walleij023bba32012-12-01 19:05:16 +0100177*no* irq descriptors will be allocated.
178
179A typical use case for simple domains is where an irqchip provider
180is supporting both dynamic and static IRQ assignments.
181
182In order to avoid ending up in a situation where a linear domain is
183used and no descriptor gets allocated it is very important to make sure
184that the driver using the simple domain call irq_create_mapping()
185before any irq_find_mapping() since the latter will actually work
186for the static IRQ assignment case.
Jiang Liuf8264e32014-11-06 22:20:14 +0800187
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300188Hierarchy IRQ domain
189--------------------
190
Jiang Liuf8264e32014-11-06 22:20:14 +0800191On some architectures, there may be multiple interrupt controllers
192involved in delivering an interrupt from the device to the target CPU.
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300193Let's look at a typical interrupt delivering path on x86 platforms::
Jiang Liuf8264e32014-11-06 22:20:14 +0800194
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300195 Device --> IOAPIC -> Interrupt remapping Controller -> Local APIC -> CPU
Jiang Liuf8264e32014-11-06 22:20:14 +0800196
197There are three interrupt controllers involved:
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300198
Jiang Liuf8264e32014-11-06 22:20:14 +08001991) IOAPIC controller
2002) Interrupt remapping controller
2013) Local APIC controller
202
203To support such a hardware topology and make software architecture match
204hardware architecture, an irq_domain data structure is built for each
205interrupt controller and those irq_domains are organized into hierarchy.
206When building irq_domain hierarchy, the irq_domain near to the device is
207child and the irq_domain near to CPU is parent. So a hierarchy structure
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300208as below will be built for the example above::
209
Jiang Liuf8264e32014-11-06 22:20:14 +0800210 CPU Vector irq_domain (root irq_domain to manage CPU vectors)
211 ^
212 |
213 Interrupt Remapping irq_domain (manage irq_remapping entries)
214 ^
215 |
216 IOAPIC irq_domain (manage IOAPIC delivery entries/pins)
217
218There are four major interfaces to use hierarchy irq_domain:
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300219
Jiang Liuf8264e32014-11-06 22:20:14 +08002201) irq_domain_alloc_irqs(): allocate IRQ descriptors and interrupt
221 controller related resources to deliver these interrupts.
2222) irq_domain_free_irqs(): free IRQ descriptors and interrupt controller
223 related resources associated with these interrupts.
2243) irq_domain_activate_irq(): activate interrupt controller hardware to
225 deliver the interrupt.
Marc Zyngiere7a46c82015-10-13 12:51:45 +01002264) irq_domain_deactivate_irq(): deactivate interrupt controller hardware
Jiang Liuf8264e32014-11-06 22:20:14 +0800227 to stop delivering the interrupt.
228
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300229Following changes are needed to support hierarchy irq_domain:
230
Jiang Liuf8264e32014-11-06 22:20:14 +08002311) a new field 'parent' is added to struct irq_domain; it's used to
232 maintain irq_domain hierarchy information.
2332) a new field 'parent_data' is added to struct irq_data; it's used to
234 build hierarchy irq_data to match hierarchy irq_domains. The irq_data
235 is used to store irq_domain pointer and hardware irq number.
2363) new callbacks are added to struct irq_domain_ops to support hierarchy
237 irq_domain operations.
238
239With support of hierarchy irq_domain and hierarchy irq_data ready, an
240irq_domain structure is built for each interrupt controller, and an
241irq_data structure is allocated for each irq_domain associated with an
242IRQ. Now we could go one step further to support stacked(hierarchy)
243irq_chip. That is, an irq_chip is associated with each irq_data along
244the hierarchy. A child irq_chip may implement a required action by
245itself or by cooperating with its parent irq_chip.
246
247With stacked irq_chip, interrupt controller driver only needs to deal
248with the hardware managed by itself and may ask for services from its
249parent irq_chip when needed. So we could achieve a much cleaner
250software architecture.
251
252For an interrupt controller driver to support hierarchy irq_domain, it
253needs to:
Mauro Carvalho Chehab1642a1e2017-05-14 15:29:55 -0300254
Jiang Liuf8264e32014-11-06 22:20:14 +08002551) Implement irq_domain_ops.alloc and irq_domain_ops.free
2562) Optionally implement irq_domain_ops.activate and
257 irq_domain_ops.deactivate.
2583) Optionally implement an irq_chip to manage the interrupt controller
259 hardware.
2604) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,
261 they are unused with hierarchy irq_domain.
262
Marc Zyngier53286662017-05-12 12:55:38 +0100263Hierarchy irq_domain is in no way x86 specific, and is heavily used to
264support other architectures, such as ARM, ARM64 etc.
265
266=== Debugging ===
267
268If you switch on CONFIG_IRQ_DOMAIN_DEBUG (which depends on
269CONFIG_IRQ_DOMAIN and CONFIG_DEBUG_FS), you will find a new file in
270your debugfs mount point, called irq_domain_mapping. This file
271contains a live snapshot of all the IRQ domains in the system:
272
273 name mapped linear-max direct-max devtree-node
274 pl061 8 8 0 /smb/gpio@e0080000
275 pl061 8 8 0 /smb/gpio@e1050000
276 pMSI 0 0 0 /interrupt-controller@e1101000/v2m@e0080000
277 MSI 37 0 0 /interrupt-controller@e1101000/v2m@e0080000
278 GICv2m 37 0 0 /interrupt-controller@e1101000/v2m@e0080000
279 GICv2 448 448 0 /interrupt-controller@e1101000
280
281it also iterates over the interrupts to display their mapping in the
282domains, and makes the domain stacking visible:
283
284
285irq hwirq chip name chip data active type domain
286 1 0x00019 GICv2 0xffff00000916bfd8 * LINEAR GICv2
287 2 0x0001d GICv2 0xffff00000916bfd8 LINEAR GICv2
288 3 0x0001e GICv2 0xffff00000916bfd8 * LINEAR GICv2
289 4 0x0001b GICv2 0xffff00000916bfd8 * LINEAR GICv2
290 5 0x0001a GICv2 0xffff00000916bfd8 LINEAR GICv2
291[...]
292 96 0x81808 MSI 0x (null) RADIX MSI
293 96+ 0x00063 GICv2m 0xffff8003ee116980 RADIX GICv2m
294 96+ 0x00063 GICv2 0xffff00000916bfd8 LINEAR GICv2
295 97 0x08800 MSI 0x (null) * RADIX MSI
296 97+ 0x00064 GICv2m 0xffff8003ee116980 * RADIX GICv2m
297 97+ 0x00064 GICv2 0xffff00000916bfd8 * LINEAR GICv2
298
299Here, interrupts 1-5 are only using a single domain, while 96 and 97
300are build out of a stack of three domain, each level performing a
301particular function.