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Eric Miao14c6b5e2009-03-20 12:50:22 +08001/*
2 * linux/arch/arm/mach-mmp/pxa910.c
3 *
4 * Code specific to PXA910
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Eric Miao14c6b5e2009-03-20 12:50:22 +080010#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/list.h>
14#include <linux/io.h>
Haojian Zhuang157d2642011-10-17 20:37:52 +080015#include <linux/platform_device.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080016
Haojian Zhuanga03d8b12012-08-04 23:57:38 +080017#include <asm/hardware/cache-tauros2.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080018#include <asm/mach/time.h>
19#include <mach/addr-map.h>
20#include <mach/regs-apbc.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080021#include <mach/cputype.h>
22#include <mach/irqs.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080023#include <mach/dma.h>
24#include <mach/mfp.h>
25#include <mach/devices.h>
26
27#include "common.h"
Eric Miao14c6b5e2009-03-20 12:50:22 +080028
29#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
30
31static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
32{
33 MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
34 MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
35 MFP_ADDR_X(GPIO100, GPIO109, 0x238),
36
37 MFP_ADDR(GPIO123, 0xcc),
38 MFP_ADDR(GPIO124, 0xd0),
39
40 MFP_ADDR(DF_IO0, 0x40),
41 MFP_ADDR(DF_IO1, 0x3c),
42 MFP_ADDR(DF_IO2, 0x38),
43 MFP_ADDR(DF_IO3, 0x34),
44 MFP_ADDR(DF_IO4, 0x30),
45 MFP_ADDR(DF_IO5, 0x2c),
46 MFP_ADDR(DF_IO6, 0x28),
47 MFP_ADDR(DF_IO7, 0x24),
48 MFP_ADDR(DF_IO8, 0x20),
49 MFP_ADDR(DF_IO9, 0x1c),
50 MFP_ADDR(DF_IO10, 0x18),
51 MFP_ADDR(DF_IO11, 0x14),
52 MFP_ADDR(DF_IO12, 0x10),
53 MFP_ADDR(DF_IO13, 0xc),
54 MFP_ADDR(DF_IO14, 0x8),
55 MFP_ADDR(DF_IO15, 0x4),
56
57 MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
58 MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
59 MFP_ADDR(SM_nCS0, 0x4c),
60 MFP_ADDR(SM_nCS1, 0x50),
61 MFP_ADDR(DF_WEn, 0x54),
62 MFP_ADDR(DF_REn, 0x58),
63 MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
64 MFP_ADDR(DF_ALE_SM_WEn, 0x60),
65 MFP_ADDR(SM_SCLK, 0x64),
66 MFP_ADDR(DF_RDY0, 0x68),
67 MFP_ADDR(SM_BE0, 0x6c),
68 MFP_ADDR(SM_BE1, 0x70),
69 MFP_ADDR(SM_ADV, 0x74),
70 MFP_ADDR(DF_RDY1, 0x78),
71 MFP_ADDR(SM_ADVMUX, 0x7c),
72 MFP_ADDR(SM_RDY, 0x80),
73
74 MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
75
76 MFP_ADDR_END,
77};
78
Eric Miao14c6b5e2009-03-20 12:50:22 +080079void __init pxa910_init_irq(void)
80{
81 icu_init_irq();
Eric Miao14c6b5e2009-03-20 12:50:22 +080082}
83
Eric Miao14c6b5e2009-03-20 12:50:22 +080084static int __init pxa910_init(void)
85{
86 if (cpu_is_pxa910()) {
Haojian Zhuanga03d8b12012-08-04 23:57:38 +080087#ifdef CONFIG_CACHE_TAUROS2
88 tauros2_init(0);
89#endif
Eric Miao14c6b5e2009-03-20 12:50:22 +080090 mfp_init_base(MFPR_VIRT_BASE);
91 mfp_init_addr(pxa910_mfp_addr_map);
92 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
Chao Xie9e73d692012-08-27 10:54:01 +080093 pxa910_clk_init();
Eric Miao14c6b5e2009-03-20 12:50:22 +080094 }
95
96 return 0;
97}
98postcore_initcall(pxa910_init);
99
100/* system timer - clock enabled, 3.25MHz */
101#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
Chao Xie9e73d692012-08-27 10:54:01 +0800102#define APBC_TIMERS APBC_REG(0x34)
Eric Miao14c6b5e2009-03-20 12:50:22 +0800103
Stephen Warren6bb27d72012-11-08 12:40:59 -0700104void __init pxa910_timer_init(void)
Eric Miao14c6b5e2009-03-20 12:50:22 +0800105{
106 /* reset and configure */
Chao Xie9e73d692012-08-27 10:54:01 +0800107 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
108 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
Eric Miao14c6b5e2009-03-20 12:50:22 +0800109
110 timer_init(IRQ_PXA910_AP1_TIMER1);
111}
112
Eric Miao14c6b5e2009-03-20 12:50:22 +0800113/* on-chip devices */
114
115/* NOTE: there are totally 3 UARTs on PXA910:
116 *
117 * UART1 - Slow UART (can be used both by AP and CP)
118 * UART2/3 - Fast UART
119 *
120 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
121 * they are re-ordered as:
122 *
123 * pxa910_device_uart1 - UART2 as FFUART
124 * pxa910_device_uart2 - UART3 as BTUART
125 *
126 * UART1 is not used by AP for the moment.
127 */
128PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
129PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
Eric Miao1a779202009-04-13 15:34:54 +0800130PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
131PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
Eric Miaoa27ba762009-04-13 18:29:52 +0800132PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
133PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
134PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
135PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
Haojian Zhuanga0f266c2009-10-13 15:24:55 +0800136PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
Haojian Zhuang157d2642011-10-17 20:37:52 +0800137
138struct resource pxa910_resource_gpio[] = {
139 {
140 .start = 0xd4019000,
141 .end = 0xd4019fff,
142 .flags = IORESOURCE_MEM,
143 }, {
144 .start = IRQ_PXA910_AP_GPIO,
145 .end = IRQ_PXA910_AP_GPIO,
Haojian Zhuang93413c32012-02-27 10:37:02 +0800146 .name = "gpio_mux",
Haojian Zhuang157d2642011-10-17 20:37:52 +0800147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device pxa910_device_gpio = {
152 .name = "pxa-gpio",
153 .id = -1,
154 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
155 .resource = pxa910_resource_gpio,
156};
Haojian Zhuang4128e272012-02-23 23:37:33 +0800157
158static struct resource pxa910_resource_rtc[] = {
159 {
160 .start = 0xd4010000,
161 .end = 0xd401003f,
162 .flags = IORESOURCE_MEM,
163 }, {
164 .start = IRQ_PXA910_RTC_INT,
165 .end = IRQ_PXA910_RTC_INT,
166 .name = "rtc 1Hz",
167 .flags = IORESOURCE_IRQ,
168 }, {
169 .start = IRQ_PXA910_RTC_ALARM,
170 .end = IRQ_PXA910_RTC_ALARM,
171 .name = "rtc alarm",
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176struct platform_device pxa910_device_rtc = {
177 .name = "sa1100-rtc",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
180 .resource = pxa910_resource_rtc,
181};