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Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +11001/*
2 * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
3 * <benh@kernel.crashing.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
13 * the GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _ASM_POWERPC_DCR_NATIVE_H
21#define _ASM_POWERPC_DCR_NATIVE_H
22#ifdef __KERNEL__
Kumar Gala45d8e7a2006-12-10 23:15:47 -060023#ifndef __ASSEMBLY__
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +110024
Benjamin Herrenschmidt0e6140a2007-12-21 15:39:22 +110025#include <linux/spinlock.h>
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000026#include <asm/cputable.h>
Benjamin Herrenschmidt0e6140a2007-12-21 15:39:22 +110027
Michael Ellerman0b94a1e2007-09-17 16:05:00 +100028typedef struct {
29 unsigned int base;
Stephen Neuendorfferb786af12008-05-07 04:29:17 +100030} dcr_host_native_t;
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +110031
Stephen Neuendorfferb786af12008-05-07 04:29:17 +100032static inline bool dcr_map_ok_native(dcr_host_native_t host)
33{
34 return 1;
35}
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +110036
Stephen Neuendorfferb786af12008-05-07 04:29:17 +100037#define dcr_map_native(dev, dcr_n, dcr_c) \
38 ((dcr_host_native_t){ .base = (dcr_n) })
39#define dcr_unmap_native(host, dcr_c) do {} while (0)
40#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
41#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +110042
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000043/* Table based DCR accessors */
44extern void __mtdcr(unsigned int reg, unsigned int val);
45extern unsigned int __mfdcr(unsigned int reg);
46
47/* mfdcrx/mtdcrx instruction based accessors. We hand code
48 * the opcodes in order not to depend on newer binutils
49 */
50static inline unsigned int mfdcrx(unsigned int reg)
51{
52 unsigned int ret;
53 asm volatile(".long 0x7c000206 | (%0 << 21) | (%1 << 16)"
54 : "=r" (ret) : "r" (reg));
55 return ret;
56}
57
58static inline void mtdcrx(unsigned int reg, unsigned int val)
59{
60 asm volatile(".long 0x7c000306 | (%0 << 21) | (%1 << 16)"
61 : : "r" (val), "r" (reg));
62}
63
Kumar Gala45d8e7a2006-12-10 23:15:47 -060064#define mfdcr(rn) \
65 ({unsigned int rval; \
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000066 if (__builtin_constant_p(rn) && rn < 1024) \
Kumar Gala45d8e7a2006-12-10 23:15:47 -060067 asm volatile("mfdcr %0," __stringify(rn) \
68 : "=r" (rval)); \
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000069 else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
70 rval = mfdcrx(rn); \
Kumar Gala45d8e7a2006-12-10 23:15:47 -060071 else \
72 rval = __mfdcr(rn); \
73 rval;})
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +110074
Kumar Gala45d8e7a2006-12-10 23:15:47 -060075#define mtdcr(rn, v) \
76do { \
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000077 if (__builtin_constant_p(rn) && rn < 1024) \
Kumar Gala45d8e7a2006-12-10 23:15:47 -060078 asm volatile("mtdcr " __stringify(rn) ",%0" \
79 : : "r" (v)); \
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000080 else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
81 mtdcrx(rn, v); \
Kumar Gala45d8e7a2006-12-10 23:15:47 -060082 else \
83 __mtdcr(rn, v); \
84} while (0)
85
86/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
Benjamin Herrenschmidt0e6140a2007-12-21 15:39:22 +110087extern spinlock_t dcr_ind_lock;
88
Valentine Barshake8318d92008-02-06 05:36:49 +110089static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
90{
91 unsigned long flags;
92 unsigned int val;
Kumar Gala45d8e7a2006-12-10 23:15:47 -060093
Valentine Barshake8318d92008-02-06 05:36:49 +110094 spin_lock_irqsave(&dcr_ind_lock, flags);
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +000095 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
96 mtdcrx(base_addr, reg);
97 val = mfdcrx(base_data);
98 } else {
99 __mtdcr(base_addr, reg);
100 val = __mfdcr(base_data);
101 }
Valentine Barshake8318d92008-02-06 05:36:49 +1100102 spin_unlock_irqrestore(&dcr_ind_lock, flags);
103 return val;
104}
105
106static inline void __mtdcri(int base_addr, int base_data, int reg,
107 unsigned val)
108{
109 unsigned long flags;
110
111 spin_lock_irqsave(&dcr_ind_lock, flags);
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +0000112 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
113 mtdcrx(base_addr, reg);
114 mtdcrx(base_data, val);
115 } else {
116 __mtdcr(base_addr, reg);
117 __mtdcr(base_data, val);
118 }
Valentine Barshake8318d92008-02-06 05:36:49 +1100119 spin_unlock_irqrestore(&dcr_ind_lock, flags);
120}
121
Valentine Barshak266d0282008-03-06 05:38:04 +1100122static inline void __dcri_clrset(int base_addr, int base_data, int reg,
123 unsigned clr, unsigned set)
124{
125 unsigned long flags;
126 unsigned int val;
127
128 spin_lock_irqsave(&dcr_ind_lock, flags);
Benjamin Herrenschmidt6d2170b2008-12-18 19:13:22 +0000129 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
130 mtdcrx(base_addr, reg);
131 val = (mfdcrx(base_data) & ~clr) | set;
132 mtdcrx(base_data, val);
133 } else {
134 __mtdcr(base_addr, reg);
135 val = (__mfdcr(base_data) & ~clr) | set;
136 __mtdcr(base_data, val);
137 }
Valentine Barshak266d0282008-03-06 05:38:04 +1100138 spin_unlock_irqrestore(&dcr_ind_lock, flags);
139}
140
Valentine Barshake8318d92008-02-06 05:36:49 +1100141#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
142 DCRN_ ## base ## _CONFIG_DATA, \
143 reg)
144
145#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
146 DCRN_ ## base ## _CONFIG_DATA, \
147 reg, data)
Kumar Gala45d8e7a2006-12-10 23:15:47 -0600148
Valentine Barshak266d0282008-03-06 05:38:04 +1100149#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
150 DCRN_ ## base ## _CONFIG_DATA, \
151 reg, clr, set)
152
Kumar Gala45d8e7a2006-12-10 23:15:47 -0600153#endif /* __ASSEMBLY__ */
Benjamin Herrenschmidt4c75a6f2006-11-11 17:24:53 +1100154#endif /* __KERNEL__ */
155#endif /* _ASM_POWERPC_DCR_NATIVE_H */