Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #ifndef __AMDGPU_IH_H__ |
| 25 | #define __AMDGPU_IH_H__ |
| 26 | |
| 27 | struct amdgpu_device; |
| 28 | |
Alex Deucher | d766e6a | 2016-03-29 18:28:50 -0400 | [diff] [blame] | 29 | #define AMDGPU_IH_CLIENTID_LEGACY 0 |
| 30 | |
| 31 | #define AMDGPU_IH_CLIENTID_MAX 0x1f |
| 32 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 33 | /* |
| 34 | * R6xx+ IH ring |
| 35 | */ |
| 36 | struct amdgpu_ih_ring { |
| 37 | struct amdgpu_bo *ring_obj; |
| 38 | volatile uint32_t *ring; |
| 39 | unsigned rptr; |
| 40 | unsigned ring_size; |
| 41 | uint64_t gpu_addr; |
| 42 | uint32_t ptr_mask; |
| 43 | atomic_t lock; |
| 44 | bool enabled; |
| 45 | unsigned wptr_offs; |
| 46 | unsigned rptr_offs; |
| 47 | u32 doorbell_index; |
| 48 | bool use_doorbell; |
| 49 | bool use_bus_addr; |
| 50 | dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ |
| 51 | }; |
| 52 | |
Alex Deucher | 7ccf5aa | 2016-11-29 18:02:12 -0500 | [diff] [blame] | 53 | #define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4 |
| 54 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 55 | struct amdgpu_iv_entry { |
Alex Deucher | d766e6a | 2016-03-29 18:28:50 -0400 | [diff] [blame] | 56 | unsigned client_id; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 57 | unsigned src_id; |
Alex Deucher | 7ccf5aa | 2016-11-29 18:02:12 -0500 | [diff] [blame] | 58 | unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW]; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 59 | unsigned ring_id; |
| 60 | unsigned vm_id; |
Alex Deucher | d766e6a | 2016-03-29 18:28:50 -0400 | [diff] [blame] | 61 | unsigned vm_id_src; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 62 | unsigned pas_id; |
Alex Deucher | 0cf3be2 | 2015-07-28 14:24:53 -0400 | [diff] [blame] | 63 | const uint32_t *iv_entry; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 64 | }; |
| 65 | |
| 66 | int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, |
| 67 | bool use_bus_addr); |
| 68 | void amdgpu_ih_ring_fini(struct amdgpu_device *adev); |
| 69 | int amdgpu_ih_process(struct amdgpu_device *adev); |
| 70 | |
| 71 | #endif |