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Jouni Malinenff1d2762005-05-12 22:54:16 -04001#ifndef HOSTAP_WLAN_H
2#define HOSTAP_WLAN_H
3
4#include "hostap_config.h"
5#include "hostap_crypt.h"
6#include "hostap_common.h"
7
8#define MAX_PARM_DEVICES 8
9#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
10#define DEF_INTS -1, -1, -1, -1, -1, -1, -1
11#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
12
13
14/* Specific skb->protocol value that indicates that the packet already contains
15 * txdesc header.
16 * FIX: This might need own value that would be allocated especially for Prism2
17 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
18 * However, these skb's should have only minimal path in the kernel side since
19 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
20#define ETH_P_HOSTAP ETH_P_CONTROL
21
22#ifndef ARPHRD_IEEE80211
23#define ARPHRD_IEEE80211 801
24#endif
25#ifndef ARPHRD_IEEE80211_PRISM
26#define ARPHRD_IEEE80211_PRISM 802
27#endif
28
29/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
30 * (from linux-wlan-ng) */
31struct linux_wlan_ng_val {
32 u32 did;
33 u16 status, len;
34 u32 data;
35} __attribute__ ((packed));
36
37struct linux_wlan_ng_prism_hdr {
38 u32 msgcode, msglen;
39 char devname[16];
40 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal,
41 noise, rate, istx, frmlen;
42} __attribute__ ((packed));
43
44struct linux_wlan_ng_cap_hdr {
45 u32 version;
46 u32 length;
47 u64 mactime;
48 u64 hosttime;
49 u32 phytype;
50 u32 channel;
51 u32 datarate;
52 u32 antenna;
53 u32 priority;
54 u32 ssi_type;
55 s32 ssi_signal;
56 s32 ssi_noise;
57 u32 preamble;
58 u32 encoding;
59} __attribute__ ((packed));
60
61#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */
62#define LWNG_CAPHDR_VERSION 0x80211001
63
64struct hfa384x_rx_frame {
65 /* HFA384X RX frame descriptor */
66 u16 status; /* HFA384X_RX_STATUS_ flags */
67 u32 time; /* timestamp, 1 microsecond resolution */
68 u8 silence; /* 27 .. 154; seems to be 0 */
69 u8 signal; /* 27 .. 154 */
70 u8 rate; /* 10, 20, 55, or 110 */
71 u8 rxflow;
72 u32 reserved;
73
74 /* 802.11 */
75 u16 frame_control;
76 u16 duration_id;
77 u8 addr1[6];
78 u8 addr2[6];
79 u8 addr3[6];
80 u16 seq_ctrl;
81 u8 addr4[6];
82 u16 data_len;
83
84 /* 802.3 */
85 u8 dst_addr[6];
86 u8 src_addr[6];
87 u16 len;
88
89 /* followed by frame data; max 2304 bytes */
90} __attribute__ ((packed));
91
92
93struct hfa384x_tx_frame {
94 /* HFA384X TX frame descriptor */
95 u16 status; /* HFA384X_TX_STATUS_ flags */
96 u16 reserved1;
97 u16 reserved2;
98 u32 sw_support;
99 u8 retry_count; /* not yet implemented */
100 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
101 u16 tx_control; /* HFA384X_TX_CTRL_ flags */
102
103 /* 802.11 */
104 u16 frame_control; /* parts not used */
105 u16 duration_id;
106 u8 addr1[6];
107 u8 addr2[6]; /* filled by firmware */
108 u8 addr3[6];
109 u16 seq_ctrl; /* filled by firmware */
110 u8 addr4[6];
111 u16 data_len;
112
113 /* 802.3 */
114 u8 dst_addr[6];
115 u8 src_addr[6];
116 u16 len;
117
118 /* followed by frame data; max 2304 bytes */
119} __attribute__ ((packed));
120
121
122struct hfa384x_rid_hdr
123{
124 u16 len;
125 u16 rid;
126} __attribute__ ((packed));
127
128
129/* Macro for converting signal levels (range 27 .. 154) to wireless ext
130 * dBm value with some accuracy */
131#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
132
133#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
134
135struct hfa384x_scan_request {
136 u16 channel_list;
137 u16 txrate; /* HFA384X_RATES_* */
138} __attribute__ ((packed));
139
140struct hfa384x_hostscan_request {
141 u16 channel_list;
142 u16 txrate;
143 u16 target_ssid_len;
144 u8 target_ssid[32];
145} __attribute__ ((packed));
146
147struct hfa384x_join_request {
148 u8 bssid[6];
149 u16 channel;
150} __attribute__ ((packed));
151
152struct hfa384x_info_frame {
153 u16 len;
154 u16 type;
155} __attribute__ ((packed));
156
157struct hfa384x_comm_tallies {
158 u16 tx_unicast_frames;
159 u16 tx_multicast_frames;
160 u16 tx_fragments;
161 u16 tx_unicast_octets;
162 u16 tx_multicast_octets;
163 u16 tx_deferred_transmissions;
164 u16 tx_single_retry_frames;
165 u16 tx_multiple_retry_frames;
166 u16 tx_retry_limit_exceeded;
167 u16 tx_discards;
168 u16 rx_unicast_frames;
169 u16 rx_multicast_frames;
170 u16 rx_fragments;
171 u16 rx_unicast_octets;
172 u16 rx_multicast_octets;
173 u16 rx_fcs_errors;
174 u16 rx_discards_no_buffer;
175 u16 tx_discards_wrong_sa;
176 u16 rx_discards_wep_undecryptable;
177 u16 rx_message_in_msg_fragments;
178 u16 rx_message_in_bad_msg_fragments;
179} __attribute__ ((packed));
180
181struct hfa384x_comm_tallies32 {
182 u32 tx_unicast_frames;
183 u32 tx_multicast_frames;
184 u32 tx_fragments;
185 u32 tx_unicast_octets;
186 u32 tx_multicast_octets;
187 u32 tx_deferred_transmissions;
188 u32 tx_single_retry_frames;
189 u32 tx_multiple_retry_frames;
190 u32 tx_retry_limit_exceeded;
191 u32 tx_discards;
192 u32 rx_unicast_frames;
193 u32 rx_multicast_frames;
194 u32 rx_fragments;
195 u32 rx_unicast_octets;
196 u32 rx_multicast_octets;
197 u32 rx_fcs_errors;
198 u32 rx_discards_no_buffer;
199 u32 tx_discards_wrong_sa;
200 u32 rx_discards_wep_undecryptable;
201 u32 rx_message_in_msg_fragments;
202 u32 rx_message_in_bad_msg_fragments;
203} __attribute__ ((packed));
204
205struct hfa384x_scan_result_hdr {
206 u16 reserved;
207 u16 scan_reason;
208#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
209#define HFA384X_SCAN_HOST_INITIATED 1
210#define HFA384X_SCAN_FIRMWARE_INITIATED 2
211#define HFA384X_SCAN_INQUIRY_FROM_HOST 3
212} __attribute__ ((packed));
213
214#define HFA384X_SCAN_MAX_RESULTS 32
215
216struct hfa384x_scan_result {
217 u16 chid;
218 u16 anl;
219 u16 sl;
220 u8 bssid[6];
221 u16 beacon_interval;
222 u16 capability;
223 u16 ssid_len;
224 u8 ssid[32];
225 u8 sup_rates[10];
226 u16 rate;
227} __attribute__ ((packed));
228
229struct hfa384x_hostscan_result {
230 u16 chid;
231 u16 anl;
232 u16 sl;
233 u8 bssid[6];
234 u16 beacon_interval;
235 u16 capability;
236 u16 ssid_len;
237 u8 ssid[32];
238 u8 sup_rates[10];
239 u16 rate;
240 u16 atim;
241} __attribute__ ((packed));
242
243struct comm_tallies_sums {
244 unsigned int tx_unicast_frames;
245 unsigned int tx_multicast_frames;
246 unsigned int tx_fragments;
247 unsigned int tx_unicast_octets;
248 unsigned int tx_multicast_octets;
249 unsigned int tx_deferred_transmissions;
250 unsigned int tx_single_retry_frames;
251 unsigned int tx_multiple_retry_frames;
252 unsigned int tx_retry_limit_exceeded;
253 unsigned int tx_discards;
254 unsigned int rx_unicast_frames;
255 unsigned int rx_multicast_frames;
256 unsigned int rx_fragments;
257 unsigned int rx_unicast_octets;
258 unsigned int rx_multicast_octets;
259 unsigned int rx_fcs_errors;
260 unsigned int rx_discards_no_buffer;
261 unsigned int tx_discards_wrong_sa;
262 unsigned int rx_discards_wep_undecryptable;
263 unsigned int rx_message_in_msg_fragments;
264 unsigned int rx_message_in_bad_msg_fragments;
265};
266
267
268struct hfa384x_regs {
269 u16 cmd;
270 u16 evstat;
271 u16 offset0;
272 u16 offset1;
273 u16 swsupport0;
274};
275
276
277#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
278/* I/O ports for HFA384X Controller access */
279#define HFA384X_CMD_OFF 0x00
280#define HFA384X_PARAM0_OFF 0x02
281#define HFA384X_PARAM1_OFF 0x04
282#define HFA384X_PARAM2_OFF 0x06
283#define HFA384X_STATUS_OFF 0x08
284#define HFA384X_RESP0_OFF 0x0A
285#define HFA384X_RESP1_OFF 0x0C
286#define HFA384X_RESP2_OFF 0x0E
287#define HFA384X_INFOFID_OFF 0x10
288#define HFA384X_CONTROL_OFF 0x14
289#define HFA384X_SELECT0_OFF 0x18
290#define HFA384X_SELECT1_OFF 0x1A
291#define HFA384X_OFFSET0_OFF 0x1C
292#define HFA384X_OFFSET1_OFF 0x1E
293#define HFA384X_RXFID_OFF 0x20
294#define HFA384X_ALLOCFID_OFF 0x22
295#define HFA384X_TXCOMPLFID_OFF 0x24
296#define HFA384X_SWSUPPORT0_OFF 0x28
297#define HFA384X_SWSUPPORT1_OFF 0x2A
298#define HFA384X_SWSUPPORT2_OFF 0x2C
299#define HFA384X_EVSTAT_OFF 0x30
300#define HFA384X_INTEN_OFF 0x32
301#define HFA384X_EVACK_OFF 0x34
302#define HFA384X_DATA0_OFF 0x36
303#define HFA384X_DATA1_OFF 0x38
304#define HFA384X_AUXPAGE_OFF 0x3A
305#define HFA384X_AUXOFFSET_OFF 0x3C
306#define HFA384X_AUXDATA_OFF 0x3E
307#endif /* PRISM2_PCCARD || PRISM2_PLX */
308
309#ifdef PRISM2_PCI
310/* Memory addresses for ISL3874 controller access */
311#define HFA384X_CMD_OFF 0x00
312#define HFA384X_PARAM0_OFF 0x04
313#define HFA384X_PARAM1_OFF 0x08
314#define HFA384X_PARAM2_OFF 0x0C
315#define HFA384X_STATUS_OFF 0x10
316#define HFA384X_RESP0_OFF 0x14
317#define HFA384X_RESP1_OFF 0x18
318#define HFA384X_RESP2_OFF 0x1C
319#define HFA384X_INFOFID_OFF 0x20
320#define HFA384X_CONTROL_OFF 0x28
321#define HFA384X_SELECT0_OFF 0x30
322#define HFA384X_SELECT1_OFF 0x34
323#define HFA384X_OFFSET0_OFF 0x38
324#define HFA384X_OFFSET1_OFF 0x3C
325#define HFA384X_RXFID_OFF 0x40
326#define HFA384X_ALLOCFID_OFF 0x44
327#define HFA384X_TXCOMPLFID_OFF 0x48
328#define HFA384X_PCICOR_OFF 0x4C
329#define HFA384X_SWSUPPORT0_OFF 0x50
330#define HFA384X_SWSUPPORT1_OFF 0x54
331#define HFA384X_SWSUPPORT2_OFF 0x58
332#define HFA384X_PCIHCR_OFF 0x5C
333#define HFA384X_EVSTAT_OFF 0x60
334#define HFA384X_INTEN_OFF 0x64
335#define HFA384X_EVACK_OFF 0x68
336#define HFA384X_DATA0_OFF 0x6C
337#define HFA384X_DATA1_OFF 0x70
338#define HFA384X_AUXPAGE_OFF 0x74
339#define HFA384X_AUXOFFSET_OFF 0x78
340#define HFA384X_AUXDATA_OFF 0x7C
341#define HFA384X_PCI_M0_ADDRH_OFF 0x80
342#define HFA384X_PCI_M0_ADDRL_OFF 0x84
343#define HFA384X_PCI_M0_LEN_OFF 0x88
344#define HFA384X_PCI_M0_CTL_OFF 0x8C
345#define HFA384X_PCI_STATUS_OFF 0x98
346#define HFA384X_PCI_M1_ADDRH_OFF 0xA0
347#define HFA384X_PCI_M1_ADDRL_OFF 0xA4
348#define HFA384X_PCI_M1_LEN_OFF 0xA8
349#define HFA384X_PCI_M1_CTL_OFF 0xAC
350
351/* PCI bus master control bits (these are undocumented; based on guessing and
352 * experimenting..) */
353#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
354#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
355
356#endif /* PRISM2_PCI */
357
358
359/* Command codes for CMD reg. */
360#define HFA384X_CMDCODE_INIT 0x00
361#define HFA384X_CMDCODE_ENABLE 0x01
362#define HFA384X_CMDCODE_DISABLE 0x02
363#define HFA384X_CMDCODE_ALLOC 0x0A
364#define HFA384X_CMDCODE_TRANSMIT 0x0B
365#define HFA384X_CMDCODE_INQUIRE 0x11
366#define HFA384X_CMDCODE_ACCESS 0x21
367#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
368#define HFA384X_CMDCODE_DOWNLOAD 0x22
369#define HFA384X_CMDCODE_READMIF 0x30
370#define HFA384X_CMDCODE_WRITEMIF 0x31
371#define HFA384X_CMDCODE_TEST 0x38
372
373#define HFA384X_CMDCODE_MASK 0x3F
374
375/* Test mode operations */
376#define HFA384X_TEST_CHANGE_CHANNEL 0x08
377#define HFA384X_TEST_MONITOR 0x0B
378#define HFA384X_TEST_STOP 0x0F
379#define HFA384X_TEST_CFG_BITS 0x15
380#define HFA384X_TEST_CFG_BIT_ALC BIT(3)
381
382#define HFA384X_CMD_BUSY BIT(15)
383
384#define HFA384X_CMD_TX_RECLAIM BIT(8)
385
386#define HFA384X_OFFSET_ERR BIT(14)
387#define HFA384X_OFFSET_BUSY BIT(15)
388
389
390/* ProgMode for download command */
391#define HFA384X_PROGMODE_DISABLE 0
392#define HFA384X_PROGMODE_ENABLE_VOLATILE 1
393#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
394#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
395
396#define HFA384X_AUX_MAGIC0 0xfe01
397#define HFA384X_AUX_MAGIC1 0xdc23
398#define HFA384X_AUX_MAGIC2 0xba45
399
400#define HFA384X_AUX_PORT_DISABLED 0
401#define HFA384X_AUX_PORT_DISABLE BIT(14)
402#define HFA384X_AUX_PORT_ENABLE BIT(15)
403#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
404#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
405
406#define PRISM2_PDA_SIZE 1024
407
408
409/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
410#define HFA384X_EV_TICK BIT(15)
411#define HFA384X_EV_WTERR BIT(14)
412#define HFA384X_EV_INFDROP BIT(13)
413#ifdef PRISM2_PCI
414#define HFA384X_EV_PCI_M1 BIT(9)
415#define HFA384X_EV_PCI_M0 BIT(8)
416#endif /* PRISM2_PCI */
417#define HFA384X_EV_INFO BIT(7)
418#define HFA384X_EV_DTIM BIT(5)
419#define HFA384X_EV_CMD BIT(4)
420#define HFA384X_EV_ALLOC BIT(3)
421#define HFA384X_EV_TXEXC BIT(2)
422#define HFA384X_EV_TX BIT(1)
423#define HFA384X_EV_RX BIT(0)
424
425
426/* HFA384X Information frames */
427#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
428#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
429#define HFA384X_INFO_COMMTALLIES 0xF100
430#define HFA384X_INFO_SCANRESULTS 0xF101
431#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
432#define HFA384X_INFO_HOSTSCANRESULTS 0xF103
433#define HFA384X_INFO_LINKSTATUS 0xF200
434#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
435#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
436#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
437#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
438
439enum { HFA384X_LINKSTATUS_CONNECTED = 1,
440 HFA384X_LINKSTATUS_DISCONNECTED = 2,
441 HFA384X_LINKSTATUS_AP_CHANGE = 3,
442 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
443 HFA384X_LINKSTATUS_AP_IN_RANGE = 5,
444 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 };
445
446enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2,
447 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
448 HFA384X_PORTTYPE_HOSTAP = 6 };
449
450#define HFA384X_RATES_1MBPS BIT(0)
451#define HFA384X_RATES_2MBPS BIT(1)
452#define HFA384X_RATES_5MBPS BIT(2)
453#define HFA384X_RATES_11MBPS BIT(3)
454
455#define HFA384X_ROAMING_FIRMWARE 1
456#define HFA384X_ROAMING_HOST 2
457#define HFA384X_ROAMING_DISABLED 3
458
459#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
460#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
461#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
462#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
463
464#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
465#define HFA384X_RX_STATUS_PCF BIT(12)
466#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
467#define HFA384X_RX_STATUS_UNDECR BIT(1)
468#define HFA384X_RX_STATUS_FCSERR BIT(0)
469
470#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
471(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
472#define HFA384X_RX_STATUS_GET_MACPORT(s) \
473(((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
474
475enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
476 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 };
477
478
479#define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
480#define HFA384X_TX_CTRL_802_11 BIT(3)
481#define HFA384X_TX_CTRL_802_3 0
482#define HFA384X_TX_CTRL_TX_EX BIT(2)
483#define HFA384X_TX_CTRL_TX_OK BIT(1)
484
485#define HFA384X_TX_STATUS_RETRYERR BIT(0)
486#define HFA384X_TX_STATUS_AGEDERR BIT(1)
487#define HFA384X_TX_STATUS_DISCON BIT(2)
488#define HFA384X_TX_STATUS_FORMERR BIT(3)
489
490/* HFA3861/3863 (BBP) Control Registers */
491#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
492#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
493#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
494#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
495#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
496
497
498#ifdef __KERNEL__
499
500#define PRISM2_TXFID_COUNT 8
501#define PRISM2_DATA_MAXLEN 2304
502#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
503#define PRISM2_TXFID_EMPTY 0xffff
504#define PRISM2_TXFID_RESERVED 0xfffe
505#define PRISM2_DUMMY_FID 0xffff
506#define MAX_SSID_LEN 32
507#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
508
509#define PRISM2_DUMP_RX_HDR BIT(0)
510#define PRISM2_DUMP_TX_HDR BIT(1)
511#define PRISM2_DUMP_TXEXC_HDR BIT(2)
512
513struct hostap_tx_callback_info {
514 u16 idx;
515 void (*func)(struct sk_buff *, int ok, void *);
516 void *data;
517 struct hostap_tx_callback_info *next;
518};
519
520
521/* IEEE 802.11 requires that STA supports concurrent reception of at least
522 * three fragmented frames. This define can be increased to support more
523 * concurrent frames, but it should be noted that each entry can consume about
524 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
525#define PRISM2_FRAG_CACHE_LEN 4
526
527struct prism2_frag_entry {
528 unsigned long first_frag_time;
529 unsigned int seq;
530 unsigned int last_frag;
531 struct sk_buff *skb;
532 u8 src_addr[ETH_ALEN];
533 u8 dst_addr[ETH_ALEN];
534};
535
536
537struct prism2_crypt_data {
538 struct list_head list; /* delayed deletion list */
539 struct hostap_crypto_ops *ops;
540 void *priv;
541 atomic_t refcnt;
542};
543
544struct hostap_cmd_queue {
545 struct list_head list;
546 wait_queue_head_t compl;
547 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type;
548 void (*callback)(struct net_device *dev, void *context, u16 resp0,
549 u16 res);
550 void *context;
551 u16 cmd, param0, param1;
552 u16 resp0, res;
553 volatile int issued, issuing;
554
555 atomic_t usecnt;
556 int del_req;
557};
558
559/* options for hw_shutdown */
560#define HOSTAP_HW_NO_DISABLE BIT(0)
561#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
562
563typedef struct local_info local_info_t;
564
565struct prism2_helper_functions {
566 /* these functions are defined in hardware model specific files
567 * (hostap_{cs,plx,pci}.c */
568 int (*card_present)(local_info_t *local);
569 void (*cor_sreset)(local_info_t *local);
570 int (*dev_open)(local_info_t *local);
571 int (*dev_close)(local_info_t *local);
572 void (*genesis_reset)(local_info_t *local, int hcr);
573
574 /* the following functions are from hostap_hw.c, but they may have some
575 * hardware model specific code */
576
577 /* FIX: low-level commands like cmd might disappear at some point to
578 * make it easier to change them if needed (e.g., cmd would be replaced
579 * with write_mif/read_mif/testcmd/inquire); at least get_rid and
580 * set_rid might move to hostap_{cs,plx,pci}.c */
581 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1,
582 u16 *resp0);
583 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs);
584 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len,
585 int exact_len);
586 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len);
587 int (*hw_enable)(struct net_device *dev, int initial);
588 int (*hw_config)(struct net_device *dev, int initial);
589 void (*hw_reset)(struct net_device *dev);
590 void (*hw_shutdown)(struct net_device *dev, int no_disable);
591 int (*reset_port)(struct net_device *dev);
592 void (*schedule_reset)(local_info_t *local);
593 int (*download)(local_info_t *local,
594 struct prism2_download_param *param);
595 int (*tx)(struct sk_buff *skb, struct net_device *dev);
596 int (*set_tim)(struct net_device *dev, int aid, int set);
597 int (*read_aux)(struct net_device *dev, unsigned addr, int len,
598 u8 *buf);
599
600 int need_tx_headroom; /* number of bytes of headroom needed before
601 * IEEE 802.11 header */
602 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type;
603};
604
605
606struct prism2_download_data {
607 u32 dl_cmd;
608 u32 start_addr;
609 u32 num_areas;
610 struct prism2_download_data_area {
611 u32 addr; /* wlan card address */
612 u32 len;
613 u8 *data; /* allocated data */
614 } data[0];
615};
616
617
618#define HOSTAP_MAX_BSS_COUNT 64
619#define MAX_WPA_IE_LEN 64
620
621struct hostap_bss_info {
622 struct list_head list;
623 unsigned long last_update;
624 unsigned int count;
625 u8 bssid[ETH_ALEN];
626 u16 capab_info;
627 u8 ssid[32];
628 size_t ssid_len;
629 u8 wpa_ie[MAX_WPA_IE_LEN];
630 size_t wpa_ie_len;
631 u8 rsn_ie[MAX_WPA_IE_LEN];
632 size_t rsn_ie_len;
633 int chan;
634 int included;
635};
636
637
638/* Per radio private Host AP data - shared by all net devices interfaces used
639 * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
640 * ((struct hostap_interface *) netdev_priv(dev))->local points to this
641 * structure. */
642struct local_info {
643 struct module *hw_module;
644 int card_idx;
645 int dev_enabled;
646 int master_dev_auto_open; /* was master device opened automatically */
647 int num_dev_open; /* number of open devices */
648 struct net_device *dev; /* master radio device */
649 struct net_device *ddev; /* main data device */
650 struct list_head hostap_interfaces; /* Host AP interface list (contains
651 * struct hostap_interface entries)
652 */
653 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
654 * when removing entries from the list.
655 * TX and RX paths can use read lock. */
656 spinlock_t cmdlock, baplock, lock;
657 struct semaphore rid_bap_sem;
658 u16 infofid; /* MAC buffer id for info frame */
659 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
660 * txfidlock */
661 spinlock_t txfidlock;
662 int txfid_len; /* length of allocated TX buffers */
663 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */
664 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
665 * corresponding txfid is free for next TX frame */
666 u16 intransmitfid[PRISM2_TXFID_COUNT];
667 int next_txfid; /* index to the next txfid to be checked for
668 * availability */
669 int next_alloc; /* index to the next intransmitfid to be checked for
670 * allocation events */
671
672 /* bitfield for atomic bitops */
673#define HOSTAP_BITS_TRANSMIT 0
674#define HOSTAP_BITS_BAP_TASKLET 1
675#define HOSTAP_BITS_BAP_TASKLET2 2
676 long bits;
677
678 struct ap_data *ap;
679
680 char essid[MAX_SSID_LEN + 1];
681 char name[MAX_NAME_LEN + 1];
682 int name_set;
Jouni Malinen72ca9c62005-07-30 12:50:01 -0700683 u16 channel_mask; /* mask of allowed channels */
684 u16 scan_channel_mask; /* mask of channels to be scanned */
Jouni Malinenff1d2762005-05-12 22:54:16 -0400685 struct comm_tallies_sums comm_tallies;
686 struct net_device_stats stats;
687 struct proc_dir_entry *proc;
688 int iw_mode; /* operating mode (IW_MODE_*) */
689 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
690 * 1: IW_MODE_ADHOC is "pseudo IBSS" */
691 char bssid[ETH_ALEN];
692 int channel;
693 int beacon_int;
694 int dtim_period;
695 int mtu;
696 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
697 int fw_tx_rate_control;
698 u16 tx_rate_control;
699 u16 basic_rates;
700 int hw_resetting;
701 int hw_ready;
702 int hw_reset_tries; /* how many times reset has been tried */
703 int hw_downloading;
704 int shutdown;
705 int pri_only;
706 int no_pri; /* no PRI f/w present */
707 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
708
709 enum {
710 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
711 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN
712 } txpower_type;
713 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */
714
715 /* command queue for hfa384x_cmd(); protected with cmdlock */
716 struct list_head cmd_queue;
717 /* max_len for cmd_queue; in addition, cmd_callback can use two
718 * additional entries to prevent sleeping commands from stopping
719 * transmits */
720#define HOSTAP_CMD_QUEUE_MAX_LEN 16
721 int cmd_queue_len; /* number of entries in cmd_queue */
722
723 /* if card timeout is detected in interrupt context, reset_queue is
724 * used to schedule card reseting to be done in user context */
725 struct work_struct reset_queue;
726
727 /* For scheduling a change of the promiscuous mode RID */
728 int is_promisc;
729 struct work_struct set_multicast_list_queue;
730
731 struct work_struct set_tim_queue;
732 struct list_head set_tim_list;
733 spinlock_t set_tim_lock;
734
735 int wds_max_connections;
736 int wds_connections;
737#define HOSTAP_WDS_BROADCAST_RA BIT(0)
738#define HOSTAP_WDS_AP_CLIENT BIT(1)
739#define HOSTAP_WDS_STANDARD_FRAME BIT(2)
740 u32 wds_type;
741 u16 tx_control; /* flags to be used in TX description */
742 int manual_retry_count; /* -1 = use f/w default; otherwise retry count
743 * to be used with all frames */
744
745 struct iw_statistics wstats;
746 unsigned long scan_timestamp; /* Time started to scan */
747 enum {
748 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
749 PRISM2_MONITOR_CAPHDR = 2
750 } monitor_type;
751 int (*saved_eth_header_parse)(struct sk_buff *skb,
752 unsigned char *haddr);
753 int monitor_allow_fcserr;
754
755 int hostapd; /* whether user space daemon, hostapd, is used for AP
756 * management */
757 int hostapd_sta; /* whether hostapd is used with an extra STA interface
758 */
759 struct net_device *apdev;
760 struct net_device_stats apdevstats;
761
762 char assoc_ap_addr[ETH_ALEN];
763 struct net_device *stadev;
764 struct net_device_stats stadevstats;
765
766#define WEP_KEYS 4
767#define WEP_KEY_LEN 13
768 struct prism2_crypt_data *crypt[WEP_KEYS];
769 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
770 struct timer_list crypt_deinit_timer;
771 struct list_head crypt_deinit_list;
772
773 int open_wep; /* allow unencrypted frames */
774 int host_encrypt;
775 int host_decrypt;
776 int privacy_invoked; /* force privacy invoked flag even if no keys are
777 * configured */
778 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working
779 * in Host AP mode (STA f/w 1.4.9 or newer) */
780 int bcrx_sta_key; /* use individual keys to override default keys even
781 * with RX of broad/multicast frames */
782
783 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN];
784 unsigned int frag_next_idx;
785
786 int ieee_802_1x; /* is IEEE 802.1X used */
787
788 int antsel_tx, antsel_rx;
789 int rts_threshold; /* dot11RTSThreshold */
790 int fragm_threshold; /* dot11FragmentationThreshold */
791 int auth_algs; /* PRISM2_AUTH_ flags */
792
793 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
794 int tallies32; /* 32-bit tallies in use */
795
796 struct prism2_helper_functions *func;
797
798 int bus_master_threshold_tx;
799 int bus_master_threshold_rx;
800 u8 *bus_m1_buf;
801
802 u8 *pda;
803 int fw_ap;
804#define PRISM2_FW_VER(major, minor, variant) \
805(((major) << 16) | ((minor) << 8) | variant)
806 u32 sta_fw_ver;
807
808 /* Tasklets for handling hardware IRQ related operations outside hw IRQ
809 * handler */
810 struct tasklet_struct bap_tasklet;
811
812 struct tasklet_struct info_tasklet;
813 struct sk_buff_head info_list; /* info frames as skb's for
814 * info_tasklet */
815
816 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks
817 */
818
819 struct tasklet_struct rx_tasklet;
820 struct sk_buff_head rx_list;
821
822 struct tasklet_struct sta_tx_exc_tasklet;
823 struct sk_buff_head sta_tx_exc_list;
824
825 int host_roaming;
826 unsigned long last_join_time; /* time of last JoinRequest */
827 struct hfa384x_scan_result *last_scan_results;
828 int last_scan_results_count;
829 struct hfa384x_hostscan_result *last_hostscan_results;
830 int last_hostscan_results_count;
831 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type;
832 struct work_struct info_queue;
833 long pending_info; /* bit field of pending info_queue items */
834#define PRISM2_INFO_PENDING_LINKSTATUS 0
835#define PRISM2_INFO_PENDING_SCANRESULTS 1
836 int prev_link_status; /* previous received LinkStatus info */
837 int prev_linkstatus_connected;
838 u8 preferred_ap[6]; /* use this AP if possible */
839
840#ifdef PRISM2_CALLBACK
841 void *callback_data; /* Can be used in callbacks; e.g., allocate
842 * on enable event and free on disable event.
843 * Host AP driver code does not touch this. */
844#endif /* PRISM2_CALLBACK */
845
846 wait_queue_head_t hostscan_wq;
847
848 /* Passive scan in Host AP mode */
849 struct timer_list passive_scan_timer;
850 int passive_scan_interval; /* in seconds, 0 = disabled */
851 int passive_scan_channel;
852 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state;
853
854 struct timer_list tick_timer;
855 unsigned long last_tick_timer;
856 unsigned int sw_tick_stuck;
857
858 /* commsQuality / dBmCommsQuality data from periodic polling; only
859 * valid for Managed and Ad-hoc modes */
860 unsigned long last_comms_qual_update;
861 int comms_qual; /* in some odd unit.. */
862 int avg_signal; /* in dB (note: negative) */
863 int avg_noise; /* in dB (note: negative) */
864 struct work_struct comms_qual_update;
865
866 /* RSSI to dBm adjustment (for RX descriptor fields) */
867 int rssi_to_dBm; /* substract from RSSI to get approximate dBm value */
868
869 /* BSS list / protected by local->lock */
870 struct list_head bss_list;
871 int num_bss_info;
872 int wpa; /* WPA support enabled */
873 int tkip_countermeasures;
874 int drop_unencrypted;
875 /* Generic IEEE 802.11 info element to be added to
876 * ProbeResp/Beacon/(Re)AssocReq */
877 u8 *generic_elem;
878 size_t generic_elem_len;
879
880#ifdef PRISM2_DOWNLOAD_SUPPORT
881 /* Persistent volatile download data */
882 struct prism2_download_data *dl_pri;
883 struct prism2_download_data *dl_sec;
884#endif /* PRISM2_DOWNLOAD_SUPPORT */
885
886#ifdef PRISM2_IO_DEBUG
887#define PRISM2_IO_DEBUG_SIZE 10000
888 u32 io_debug[PRISM2_IO_DEBUG_SIZE];
889 int io_debug_head;
890 int io_debug_enabled;
891#endif /* PRISM2_IO_DEBUG */
892
893 /* struct local_info is used also in hostap.o that does not define
894 * any PRISM2_{PCCARD,PLX,PCI}. Make sure that the hardware version
895 * specific fields are in the end of the struct (these could also be
896 * moved to void *priv or something like that). */
897#ifdef PRISM2_PCCARD
898 dev_node_t node;
899 dev_link_t *link;
900 int sandisk_connectplus;
901#endif /* PRISM2_PCCARD */
902
903#ifdef PRISM2_PLX
904 void __iomem *attr_mem;
905 unsigned int cor_offset;
906#endif /* PRISM2_PLX */
907
908#ifdef PRISM2_PCI
909 void __iomem *mem_start;
910#ifdef PRISM2_BUS_MASTER
911 /* bus master for BAP0 (TX) */
912 int bus_m0_tx_idx;
913 u8 *bus_m0_buf;
914
915 /* bus master for BAP1 (RX) */
916 struct sk_buff *rx_skb;
917#endif /* PRISM2_BUS_MASTER */
918#endif /* PRISM2_PCI */
919
920 /* NOTE! Do not add common entries here after hardware version
921 * specific blocks. */
922};
923
924
925/* Per interface private Host AP data
926 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
927 * WDS) and netdev_priv(dev) points to this structure. */
928struct hostap_interface {
929 struct list_head list; /* list entry in Host AP interface list */
930 struct net_device *dev; /* pointer to this device */
931 struct local_info *local; /* pointer to shared private data */
932 struct net_device_stats stats;
933 struct iw_spy_data spy_data; /* iwspy support */
934 struct iw_public_data wireless_data;
935
936 enum {
937 HOSTAP_INTERFACE_MASTER,
938 HOSTAP_INTERFACE_MAIN,
939 HOSTAP_INTERFACE_AP,
940 HOSTAP_INTERFACE_STA,
941 HOSTAP_INTERFACE_WDS,
942 } type;
943
944 union {
945 struct hostap_interface_wds {
946 u8 remote_addr[ETH_ALEN];
947 } wds;
948 } u;
949};
950
951
952#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
953
954/* TX meta data - stored in skb->cb buffer, so this must be not increase over
955 * 48-byte limit */
956struct hostap_skb_tx_data {
957 unsigned int magic; /* HOSTAP_SKB_TX_DATA_MAGIC */
958 int rate; /* transmit rate */
959 struct hostap_interface *iface;
960 unsigned long jiffies; /* queueing timestamp */
961 int wds;
962 unsigned short ethertype;
963 int tx_cb_idx;
964};
965
966
967#ifndef PRISM2_NO_DEBUG
968
969#define DEBUG_FID BIT(0)
970#define DEBUG_PS BIT(1)
971#define DEBUG_FLOW BIT(2)
972#define DEBUG_AP BIT(3)
973#define DEBUG_HW BIT(4)
974#define DEBUG_EXTRA BIT(5)
975#define DEBUG_EXTRA2 BIT(6)
976#define DEBUG_PS2 BIT(7)
977#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
978#define PDEBUG(n, args...) \
979do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
980#define PDEBUG2(n, args...) \
981do { if ((n) & DEBUG_MASK) printk(args); } while (0)
982
983#else /* PRISM2_NO_DEBUG */
984
985#define PDEBUG(n, args...)
986#define PDEBUG2(n, args...)
987
988#endif /* PRISM2_NO_DEBUG */
989
990enum { BAP0 = 0, BAP1 = 1 };
991
992#define PRISM2_IO_DEBUG_CMD_INB 0
993#define PRISM2_IO_DEBUG_CMD_INW 1
994#define PRISM2_IO_DEBUG_CMD_INSW 2
995#define PRISM2_IO_DEBUG_CMD_OUTB 3
996#define PRISM2_IO_DEBUG_CMD_OUTW 4
997#define PRISM2_IO_DEBUG_CMD_OUTSW 5
998#define PRISM2_IO_DEBUG_CMD_ERROR 6
999#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
1000
1001#ifdef PRISM2_IO_DEBUG
1002
1003#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
1004(((cmd) << 24) | ((reg) << 16) | value)
1005
1006static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1007 int reg, int value)
1008{
1009 struct hostap_interface *iface = netdev_priv(dev);
1010 local_info_t *local = iface->local;
1011
1012 if (!local->io_debug_enabled)
1013 return;
1014
1015 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff;
1016 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
1017 local->io_debug_head = 0;
1018 local->io_debug[local->io_debug_head] =
1019 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value);
1020 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
1021 local->io_debug_head = 0;
1022}
1023
1024
1025static inline void prism2_io_debug_error(struct net_device *dev, int err)
1026{
1027 struct hostap_interface *iface = netdev_priv(dev);
1028 local_info_t *local = iface->local;
1029 unsigned long flags;
1030
1031 if (!local->io_debug_enabled)
1032 return;
1033
1034 spin_lock_irqsave(&local->lock, flags);
1035 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err);
1036 if (local->io_debug_enabled == 1) {
1037 local->io_debug_enabled = 0;
1038 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name);
1039 }
1040 spin_unlock_irqrestore(&local->lock, flags);
1041}
1042
1043#else /* PRISM2_IO_DEBUG */
1044
1045static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1046 int reg, int value)
1047{
1048}
1049
1050static inline void prism2_io_debug_error(struct net_device *dev, int err)
1051{
1052}
1053
1054#endif /* PRISM2_IO_DEBUG */
1055
1056
1057#ifdef PRISM2_CALLBACK
1058enum {
1059 /* Called when card is enabled */
1060 PRISM2_CALLBACK_ENABLE,
1061
1062 /* Called when card is disabled */
1063 PRISM2_CALLBACK_DISABLE,
1064
1065 /* Called when RX/TX starts/ends */
1066 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END,
1067 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END
1068};
1069void prism2_callback(local_info_t *local, int event);
1070#else /* PRISM2_CALLBACK */
1071#define prism2_callback(d, e) do { } while (0)
1072#endif /* PRISM2_CALLBACK */
1073
1074#endif /* __KERNEL__ */
1075
1076#endif /* HOSTAP_WLAN_H */