| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | # |
| 2 | # PCI Express Port Bus Configuration |
| 3 | # |
| 4 | config PCIEPORTBUS |
| Ezequiel Garcia | d47af0b | 2013-07-04 17:45:20 -0300 | [diff] [blame] | 5 | bool "PCI Express Port Bus support" |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | depends on PCI |
| 7 | help |
| 8 | This automatically enables PCI Express Port Bus support. Users can |
| 9 | choose Native Hot-Plug support, Advanced Error Reporting support, |
| 10 | Power Management Event support and Virtual Channel support to run |
| 11 | on PCI Express Ports (Root or Switch). |
| 12 | |
| 13 | # |
| 14 | # Include service Kconfig here |
| 15 | # |
| 16 | config HOTPLUG_PCI_PCIE |
| Bjorn Helgaas | c10cc48 | 2013-07-23 10:55:56 -0600 | [diff] [blame] | 17 | bool "PCI Express Hotplug driver" |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | depends on HOTPLUG_PCI && PCIEPORTBUS |
| 19 | help |
| 20 | Say Y here if you have a motherboard that supports PCI Express Native |
| 21 | Hotplug |
| 22 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | When in doubt, say N. |
| 24 | |
| Zhang, Yanmin | 6c2b374 | 2006-07-31 15:21:33 +0800 | [diff] [blame] | 25 | source "drivers/pci/pcie/aer/Kconfig" |
| Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 26 | |
| 27 | # |
| 28 | # PCI Express ASPM |
| 29 | # |
| 30 | config PCIEASPM |
| David Rientjes | 6a108a1 | 2011-01-20 14:44:16 -0800 | [diff] [blame] | 31 | bool "PCI Express ASPM control" if EXPERT |
| Matthew Garrett | ea5f9fc | 2010-06-22 17:03:03 -0400 | [diff] [blame] | 32 | depends on PCI && PCIEPORTBUS |
| 33 | default y |
| Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 34 | help |
| Matthew Garrett | ea5f9fc | 2010-06-22 17:03:03 -0400 | [diff] [blame] | 35 | This enables OS control over PCI Express ASPM (Active State |
| 36 | Power Management) and Clock Power Management. ASPM supports |
| 37 | state L0/L0s/L1. |
| Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 38 | |
| P. Christeas | d56641c | 2011-12-06 20:48:35 +0200 | [diff] [blame] | 39 | ASPM is initially set up by the firmware. With this option enabled, |
| Matthew Garrett | ea5f9fc | 2010-06-22 17:03:03 -0400 | [diff] [blame] | 40 | Linux can modify this state in order to disable ASPM on known-bad |
| 41 | hardware or configurations and enable it when known-safe. |
| 42 | |
| 43 | ASPM can be disabled or enabled at runtime via |
| 44 | /sys/module/pcie_aspm/parameters/policy |
| 45 | |
| 46 | When in doubt, say Y. |
| Andreas Ziegler | cc73176 | 2016-03-15 12:28:32 +0100 | [diff] [blame] | 47 | |
| Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 48 | config PCIEASPM_DEBUG |
| 49 | bool "Debug PCI Express ASPM" |
| 50 | depends on PCIEASPM |
| 51 | default n |
| 52 | help |
| 53 | This enables PCI Express ASPM debug support. It will add per-device |
| 54 | interface to control ASPM. |
| Rafael J. Wysocki | c7f4865 | 2010-02-17 23:39:08 +0100 | [diff] [blame] | 55 | |
| Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 56 | choice |
| 57 | prompt "Default ASPM policy" |
| 58 | default PCIEASPM_DEFAULT |
| 59 | depends on PCIEASPM |
| 60 | |
| 61 | config PCIEASPM_DEFAULT |
| Andreas Ziegler | cc73176 | 2016-03-15 12:28:32 +0100 | [diff] [blame] | 62 | bool "BIOS default" |
| Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 63 | depends on PCIEASPM |
| 64 | help |
| 65 | Use the BIOS defaults for PCI Express ASPM. |
| 66 | |
| 67 | config PCIEASPM_POWERSAVE |
| Andreas Ziegler | cc73176 | 2016-03-15 12:28:32 +0100 | [diff] [blame] | 68 | bool "Powersave" |
| Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 69 | depends on PCIEASPM |
| 70 | help |
| 71 | Enable PCI Express ASPM L0s and L1 where possible, even if the |
| 72 | BIOS did not. |
| 73 | |
| 74 | config PCIEASPM_PERFORMANCE |
| Andreas Ziegler | cc73176 | 2016-03-15 12:28:32 +0100 | [diff] [blame] | 75 | bool "Performance" |
| Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 76 | depends on PCIEASPM |
| 77 | help |
| 78 | Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them. |
| 79 | endchoice |
| 80 | |
| Rafael J. Wysocki | c7f4865 | 2010-02-17 23:39:08 +0100 | [diff] [blame] | 81 | config PCIE_PME |
| 82 | def_bool y |
| Rafael J. Wysocki | fbb988b | 2014-11-27 23:16:57 +0100 | [diff] [blame] | 83 | depends on PCIEPORTBUS && PM |
| Keith Busch | 26e5157 | 2016-04-28 16:24:48 -0600 | [diff] [blame] | 84 | |
| 85 | config PCIE_DPC |
| Keith Busch | a4959d8 | 2016-07-06 10:06:01 -0600 | [diff] [blame] | 86 | bool "PCIe Downstream Port Containment support" |
| Keith Busch | 26e5157 | 2016-04-28 16:24:48 -0600 | [diff] [blame] | 87 | depends on PCIEPORTBUS |
| 88 | default n |
| 89 | help |
| 90 | This enables PCI Express Downstream Port Containment (DPC) |
| 91 | driver support. DPC events from Root and Downstream ports |
| 92 | will be handled by the DPC driver. If your system doesn't |
| 93 | have this capability or you do not want to use this feature, |
| 94 | it is safe to answer N. |