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Magnus Damm119f5e42013-03-13 20:32:13 +09001/*
2 * Renesas R-Car GPIO Support
3 *
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +09004 * Copyright (C) 2014 Renesas Electronics Corporation
Magnus Damm119f5e42013-03-13 20:32:13 +09005 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +010017#include <linux/clk.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090018#include <linux/err.h>
19#include <linux/gpio.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/io.h>
23#include <linux/ioport.h>
24#include <linux/irq.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090025#include <linux/module.h>
Sachin Kamatbd0bf462013-10-16 15:35:02 +053026#include <linux/of.h>
Laurent Pinchartdc3465a2013-03-10 03:27:00 +010027#include <linux/pinctrl/consumer.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090028#include <linux/platform_device.h>
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +020029#include <linux/pm_runtime.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090030#include <linux/spinlock.h>
31#include <linux/slab.h>
32
33struct gpio_rcar_priv {
34 void __iomem *base;
35 spinlock_t lock;
Magnus Damm119f5e42013-03-13 20:32:13 +090036 struct platform_device *pdev;
37 struct gpio_chip gpio_chip;
38 struct irq_chip irq_chip;
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +010039 struct clk *clk;
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +010040 unsigned int irq_parent;
41 bool has_both_edge_trigger;
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +010042 bool needs_clk;
Magnus Damm119f5e42013-03-13 20:32:13 +090043};
44
Geert Uytterhoeven3dc1e682015-03-18 19:41:08 +010045#define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */
46#define INOUTSEL 0x04 /* General Input/Output Switching Register */
47#define OUTDT 0x08 /* General Output Register */
48#define INDT 0x0c /* General Input Register */
49#define INTDT 0x10 /* Interrupt Display Register */
50#define INTCLR 0x14 /* Interrupt Clear Register */
51#define INTMSK 0x18 /* Interrupt Mask Register */
52#define MSKCLR 0x1c /* Interrupt Mask Clear Register */
53#define POSNEG 0x20 /* Positive/Negative Logic Select Register */
54#define EDGLEVEL 0x24 /* Edge/level Select Register */
55#define FILONOFF 0x28 /* Chattering Prevention On/Off Register */
56#define BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */
Magnus Damm119f5e42013-03-13 20:32:13 +090057
Laurent Pinchart159f8a02013-05-21 13:40:06 +020058#define RCAR_MAX_GPIO_PER_BANK 32
59
Magnus Damm119f5e42013-03-13 20:32:13 +090060static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
61{
62 return ioread32(p->base + offs);
63}
64
65static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
66 u32 value)
67{
68 iowrite32(value, p->base + offs);
69}
70
71static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
72 int bit, bool value)
73{
74 u32 tmp = gpio_rcar_read(p, offs);
75
76 if (value)
77 tmp |= BIT(bit);
78 else
79 tmp &= ~BIT(bit);
80
81 gpio_rcar_write(p, offs, tmp);
82}
83
84static void gpio_rcar_irq_disable(struct irq_data *d)
85{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +010086 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijc7b6f452015-12-07 14:12:45 +010087 struct gpio_rcar_priv *p = gpiochip_get_data(gc);
Magnus Damm119f5e42013-03-13 20:32:13 +090088
89 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
90}
91
92static void gpio_rcar_irq_enable(struct irq_data *d)
93{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +010094 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijc7b6f452015-12-07 14:12:45 +010095 struct gpio_rcar_priv *p = gpiochip_get_data(gc);
Magnus Damm119f5e42013-03-13 20:32:13 +090096
97 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
98}
99
100static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
101 unsigned int hwirq,
102 bool active_high_rising_edge,
Simon Horman7e1092b2013-05-24 18:47:24 +0900103 bool level_trigger,
104 bool both)
Magnus Damm119f5e42013-03-13 20:32:13 +0900105{
106 unsigned long flags;
107
108 /* follow steps in the GPIO documentation for
109 * "Setting Edge-Sensitive Interrupt Input Mode" and
110 * "Setting Level-Sensitive Interrupt Input Mode"
111 */
112
113 spin_lock_irqsave(&p->lock, flags);
114
115 /* Configure postive or negative logic in POSNEG */
116 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
117
118 /* Configure edge or level trigger in EDGLEVEL */
119 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
120
Simon Horman7e1092b2013-05-24 18:47:24 +0900121 /* Select one edge or both edges in BOTHEDGE */
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100122 if (p->has_both_edge_trigger)
Simon Horman7e1092b2013-05-24 18:47:24 +0900123 gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
124
Magnus Damm119f5e42013-03-13 20:32:13 +0900125 /* Select "Interrupt Input Mode" in IOINTSEL */
126 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
127
128 /* Write INTCLR in case of edge trigger */
129 if (!level_trigger)
130 gpio_rcar_write(p, INTCLR, BIT(hwirq));
131
132 spin_unlock_irqrestore(&p->lock, flags);
133}
134
135static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
136{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100137 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijc7b6f452015-12-07 14:12:45 +0100138 struct gpio_rcar_priv *p = gpiochip_get_data(gc);
Magnus Damm119f5e42013-03-13 20:32:13 +0900139 unsigned int hwirq = irqd_to_hwirq(d);
140
141 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
142
143 switch (type & IRQ_TYPE_SENSE_MASK) {
144 case IRQ_TYPE_LEVEL_HIGH:
Simon Horman7e1092b2013-05-24 18:47:24 +0900145 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
146 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900147 break;
148 case IRQ_TYPE_LEVEL_LOW:
Simon Horman7e1092b2013-05-24 18:47:24 +0900149 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
150 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900151 break;
152 case IRQ_TYPE_EDGE_RISING:
Simon Horman7e1092b2013-05-24 18:47:24 +0900153 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
154 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900155 break;
156 case IRQ_TYPE_EDGE_FALLING:
Simon Horman7e1092b2013-05-24 18:47:24 +0900157 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
158 false);
159 break;
160 case IRQ_TYPE_EDGE_BOTH:
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100161 if (!p->has_both_edge_trigger)
Simon Horman7e1092b2013-05-24 18:47:24 +0900162 return -EINVAL;
163 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
164 true);
Magnus Damm119f5e42013-03-13 20:32:13 +0900165 break;
166 default:
167 return -EINVAL;
168 }
169 return 0;
170}
171
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100172static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)
173{
174 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijc7b6f452015-12-07 14:12:45 +0100175 struct gpio_rcar_priv *p = gpiochip_get_data(gc);
Geert Uytterhoeven501ef0f2015-05-21 13:21:37 +0200176 int error;
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100177
Geert Uytterhoeven501ef0f2015-05-21 13:21:37 +0200178 if (p->irq_parent) {
179 error = irq_set_irq_wake(p->irq_parent, on);
180 if (error) {
181 dev_dbg(&p->pdev->dev,
182 "irq %u doesn't support irq_set_wake\n",
183 p->irq_parent);
184 p->irq_parent = 0;
185 }
186 }
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100187
188 if (!p->clk)
189 return 0;
190
191 if (on)
192 clk_enable(p->clk);
193 else
194 clk_disable(p->clk);
195
196 return 0;
197}
198
Magnus Damm119f5e42013-03-13 20:32:13 +0900199static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
200{
201 struct gpio_rcar_priv *p = dev_id;
202 u32 pending;
203 unsigned int offset, irqs_handled = 0;
204
Valentine Barshak8808b642013-11-29 22:04:09 +0400205 while ((pending = gpio_rcar_read(p, INTDT) &
206 gpio_rcar_read(p, INTMSK))) {
Magnus Damm119f5e42013-03-13 20:32:13 +0900207 offset = __ffs(pending);
208 gpio_rcar_write(p, INTCLR, BIT(offset));
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100209 generic_handle_irq(irq_find_mapping(p->gpio_chip.irqdomain,
210 offset));
Magnus Damm119f5e42013-03-13 20:32:13 +0900211 irqs_handled++;
212 }
213
214 return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
215}
216
Magnus Damm119f5e42013-03-13 20:32:13 +0900217static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
218 unsigned int gpio,
219 bool output)
220{
Linus Walleijc7b6f452015-12-07 14:12:45 +0100221 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900222 unsigned long flags;
223
224 /* follow steps in the GPIO documentation for
225 * "Setting General Output Mode" and
226 * "Setting General Input Mode"
227 */
228
229 spin_lock_irqsave(&p->lock, flags);
230
231 /* Configure postive logic in POSNEG */
232 gpio_rcar_modify_bit(p, POSNEG, gpio, false);
233
234 /* Select "General Input/Output Mode" in IOINTSEL */
235 gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
236
237 /* Select Input Mode or Output Mode in INOUTSEL */
238 gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
239
240 spin_unlock_irqrestore(&p->lock, flags);
241}
242
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100243static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
244{
Linus Walleijce0e2c62016-04-12 10:05:22 +0200245 return pinctrl_request_gpio(chip->base + offset);
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100246}
247
248static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
249{
250 pinctrl_free_gpio(chip->base + offset);
251
Linus Walleijce0e2c62016-04-12 10:05:22 +0200252 /*
253 * Set the GPIO as an input to ensure that the next GPIO request won't
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100254 * drive the GPIO pin as an output.
255 */
256 gpio_rcar_config_general_input_output_mode(chip, offset, false);
257}
258
Magnus Damm119f5e42013-03-13 20:32:13 +0900259static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
260{
261 gpio_rcar_config_general_input_output_mode(chip, offset, false);
262 return 0;
263}
264
265static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
266{
Magnus Dammae9550f2013-06-17 08:41:52 +0900267 u32 bit = BIT(offset);
268
269 /* testing on r8a7790 shows that INDT does not show correct pin state
270 * when configured as output, so use OUTDT in case of output pins */
Linus Walleijc7b6f452015-12-07 14:12:45 +0100271 if (gpio_rcar_read(gpiochip_get_data(chip), INOUTSEL) & bit)
272 return !!(gpio_rcar_read(gpiochip_get_data(chip), OUTDT) & bit);
Magnus Dammae9550f2013-06-17 08:41:52 +0900273 else
Linus Walleijc7b6f452015-12-07 14:12:45 +0100274 return !!(gpio_rcar_read(gpiochip_get_data(chip), INDT) & bit);
Magnus Damm119f5e42013-03-13 20:32:13 +0900275}
276
277static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
278{
Linus Walleijc7b6f452015-12-07 14:12:45 +0100279 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900280 unsigned long flags;
281
282 spin_lock_irqsave(&p->lock, flags);
283 gpio_rcar_modify_bit(p, OUTDT, offset, value);
284 spin_unlock_irqrestore(&p->lock, flags);
285}
286
Geert Uytterhoevendbb763b2016-03-14 16:21:44 +0100287static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask,
288 unsigned long *bits)
289{
290 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
291 unsigned long flags;
292 u32 val, bankmask;
293
294 bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0);
295 if (!bankmask)
296 return;
297
298 spin_lock_irqsave(&p->lock, flags);
299 val = gpio_rcar_read(p, OUTDT);
300 val &= ~bankmask;
301 val |= (bankmask & bits[0]);
302 gpio_rcar_write(p, OUTDT, val);
303 spin_unlock_irqrestore(&p->lock, flags);
304}
305
Magnus Damm119f5e42013-03-13 20:32:13 +0900306static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
307 int value)
308{
309 /* write GPIO value to output before selecting output mode of pin */
310 gpio_rcar_set(chip, offset, value);
311 gpio_rcar_config_general_input_output_mode(chip, offset, true);
312 return 0;
313}
314
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100315struct gpio_rcar_info {
316 bool has_both_edge_trigger;
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +0100317 bool needs_clk;
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100318};
319
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900320static const struct gpio_rcar_info gpio_rcar_info_gen1 = {
321 .has_both_edge_trigger = false,
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +0100322 .needs_clk = false,
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900323};
324
325static const struct gpio_rcar_info gpio_rcar_info_gen2 = {
326 .has_both_edge_trigger = true,
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +0100327 .needs_clk = true,
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900328};
329
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100330static const struct of_device_id gpio_rcar_of_table[] = {
331 {
332 .compatible = "renesas,gpio-r8a7790",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900333 .data = &gpio_rcar_info_gen2,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100334 }, {
335 .compatible = "renesas,gpio-r8a7791",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900336 .data = &gpio_rcar_info_gen2,
337 }, {
Sergei Shtylyove79c5832016-07-07 17:11:45 +0300338 .compatible = "renesas,gpio-r8a7792",
339 .data = &gpio_rcar_info_gen2,
340 }, {
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900341 .compatible = "renesas,gpio-r8a7793",
342 .data = &gpio_rcar_info_gen2,
343 }, {
344 .compatible = "renesas,gpio-r8a7794",
345 .data = &gpio_rcar_info_gen2,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100346 }, {
Ulrich Hecht8cd14702015-07-21 11:08:50 +0200347 .compatible = "renesas,gpio-r8a7795",
348 /* Gen3 GPIO is identical to Gen2. */
349 .data = &gpio_rcar_info_gen2,
350 }, {
Simon Horman5d2f1d62016-09-06 12:35:39 +0200351 .compatible = "renesas,gpio-r8a7796",
352 /* Gen3 GPIO is identical to Gen2. */
353 .data = &gpio_rcar_info_gen2,
354 }, {
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100355 .compatible = "renesas,gpio-rcar",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900356 .data = &gpio_rcar_info_gen1,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100357 }, {
358 /* Terminator */
359 },
360};
361
362MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
363
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100364static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins)
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200365{
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200366 struct device_node *np = p->pdev->dev.of_node;
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100367 const struct of_device_id *match;
368 const struct gpio_rcar_info *info;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200369 struct of_phandle_args args;
370 int ret;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200371
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100372 match = of_match_node(gpio_rcar_of_table, np);
373 if (!match)
374 return -EINVAL;
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100375
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100376 info = match->data;
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100377
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100378 ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
379 *npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
380 p->has_both_edge_trigger = info->has_both_edge_trigger;
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +0100381 p->needs_clk = info->needs_clk;
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100382
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100383 if (*npins == 0 || *npins > RCAR_MAX_GPIO_PER_BANK) {
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200384 dev_warn(&p->pdev->dev,
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100385 "Invalid number of gpio lines %u, using %u\n", *npins,
386 RCAR_MAX_GPIO_PER_BANK);
387 *npins = RCAR_MAX_GPIO_PER_BANK;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200388 }
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100389
390 return 0;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200391}
392
Magnus Damm119f5e42013-03-13 20:32:13 +0900393static int gpio_rcar_probe(struct platform_device *pdev)
394{
Magnus Damm119f5e42013-03-13 20:32:13 +0900395 struct gpio_rcar_priv *p;
396 struct resource *io, *irq;
397 struct gpio_chip *gpio_chip;
398 struct irq_chip *irq_chip;
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100399 struct device *dev = &pdev->dev;
400 const char *name = dev_name(dev);
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100401 unsigned int npins;
Magnus Damm119f5e42013-03-13 20:32:13 +0900402 int ret;
403
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100404 p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
Geert Uytterhoeven7d82bf32015-01-12 11:07:58 +0100405 if (!p)
406 return -ENOMEM;
Magnus Damm119f5e42013-03-13 20:32:13 +0900407
Magnus Damm119f5e42013-03-13 20:32:13 +0900408 p->pdev = pdev;
Magnus Damm119f5e42013-03-13 20:32:13 +0900409 spin_lock_init(&p->lock);
410
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100411 /* Get device configuration from DT node */
412 ret = gpio_rcar_parse_dt(p, &npins);
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100413 if (ret < 0)
414 return ret;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200415
416 platform_set_drvdata(pdev, p);
417
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100418 p->clk = devm_clk_get(dev, NULL);
419 if (IS_ERR(p->clk)) {
Geert Uytterhoevene1fef9e2015-12-04 16:33:53 +0100420 if (p->needs_clk) {
421 dev_err(dev, "unable to get clock\n");
422 ret = PTR_ERR(p->clk);
423 goto err0;
424 }
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100425 p->clk = NULL;
426 }
427
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200428 pm_runtime_enable(dev);
Linus Walleijce0e2c62016-04-12 10:05:22 +0200429 pm_runtime_get_sync(dev);
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200430
Magnus Damm119f5e42013-03-13 20:32:13 +0900431 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
432 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
433
434 if (!io || !irq) {
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100435 dev_err(dev, "missing IRQ or IOMEM\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900436 ret = -EINVAL;
437 goto err0;
438 }
439
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100440 p->base = devm_ioremap_nocache(dev, io->start, resource_size(io));
Magnus Damm119f5e42013-03-13 20:32:13 +0900441 if (!p->base) {
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100442 dev_err(dev, "failed to remap I/O memory\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900443 ret = -ENXIO;
444 goto err0;
445 }
446
447 gpio_chip = &p->gpio_chip;
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100448 gpio_chip->request = gpio_rcar_request;
449 gpio_chip->free = gpio_rcar_free;
Magnus Damm119f5e42013-03-13 20:32:13 +0900450 gpio_chip->direction_input = gpio_rcar_direction_input;
451 gpio_chip->get = gpio_rcar_get;
452 gpio_chip->direction_output = gpio_rcar_direction_output;
453 gpio_chip->set = gpio_rcar_set;
Geert Uytterhoevendbb763b2016-03-14 16:21:44 +0100454 gpio_chip->set_multiple = gpio_rcar_set_multiple;
Magnus Damm119f5e42013-03-13 20:32:13 +0900455 gpio_chip->label = name;
Linus Walleij58383c782015-11-04 09:56:26 +0100456 gpio_chip->parent = dev;
Magnus Damm119f5e42013-03-13 20:32:13 +0900457 gpio_chip->owner = THIS_MODULE;
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100458 gpio_chip->base = -1;
459 gpio_chip->ngpio = npins;
Magnus Damm119f5e42013-03-13 20:32:13 +0900460
461 irq_chip = &p->irq_chip;
462 irq_chip->name = name;
463 irq_chip->irq_mask = gpio_rcar_irq_disable;
464 irq_chip->irq_unmask = gpio_rcar_irq_enable;
Magnus Damm119f5e42013-03-13 20:32:13 +0900465 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100466 irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;
467 irq_chip->flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;
Magnus Damm119f5e42013-03-13 20:32:13 +0900468
Linus Walleijc7b6f452015-12-07 14:12:45 +0100469 ret = gpiochip_add_data(gpio_chip, p);
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100470 if (ret) {
471 dev_err(dev, "failed to add GPIO controller\n");
Dan Carpenter0c8aab82013-11-07 10:56:51 +0300472 goto err0;
Magnus Damm119f5e42013-03-13 20:32:13 +0900473 }
474
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100475 ret = gpiochip_irqchip_add(gpio_chip, irq_chip, 0, handle_level_irq,
476 IRQ_TYPE_NONE);
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100477 if (ret) {
478 dev_err(dev, "cannot add irqchip\n");
479 goto err1;
480 }
481
Geert Uytterhoevenab82fa72015-03-18 19:41:09 +0100482 p->irq_parent = irq->start;
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100483 if (devm_request_irq(dev, irq->start, gpio_rcar_irq_handler,
484 IRQF_SHARED, name, p)) {
485 dev_err(dev, "failed to request IRQ\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900486 ret = -ENOENT;
487 goto err1;
488 }
489
Geert Uytterhoeven8b092be2015-12-04 16:33:52 +0100490 dev_info(dev, "driving %d GPIOs\n", npins);
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100491
Magnus Damm119f5e42013-03-13 20:32:13 +0900492 return 0;
493
494err1:
Geert Uytterhoeven4d84b9e2015-03-18 19:41:07 +0100495 gpiochip_remove(gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900496err0:
Linus Walleijce0e2c62016-04-12 10:05:22 +0200497 pm_runtime_put(dev);
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200498 pm_runtime_disable(dev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900499 return ret;
500}
501
502static int gpio_rcar_remove(struct platform_device *pdev)
503{
504 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900505
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200506 gpiochip_remove(&p->gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900507
Linus Walleijce0e2c62016-04-12 10:05:22 +0200508 pm_runtime_put(&pdev->dev);
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200509 pm_runtime_disable(&pdev->dev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900510 return 0;
511}
512
513static struct platform_driver gpio_rcar_device_driver = {
514 .probe = gpio_rcar_probe,
515 .remove = gpio_rcar_remove,
516 .driver = {
517 .name = "gpio_rcar",
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200518 .of_match_table = of_match_ptr(gpio_rcar_of_table),
Magnus Damm119f5e42013-03-13 20:32:13 +0900519 }
520};
521
522module_platform_driver(gpio_rcar_device_driver);
523
524MODULE_AUTHOR("Magnus Damm");
525MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
526MODULE_LICENSE("GPL v2");