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Richard Röjfors35570ac2009-12-15 16:46:18 -08001/*
Grant Likelyc103de22011-06-04 18:38:28 -06002 * Timberdale FPGA GPIO driver
Paul Gortmaker52ad9052016-05-09 19:59:57 -04003 * Author: Mocean Laboratories
Richard Röjfors35570ac2009-12-15 16:46:18 -08004 * Copyright (c) 2009 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20/* Supports:
21 * Timberdale FPGA GPIO
22 */
23
Paul Gortmaker52ad9052016-05-09 19:59:57 -040024#include <linux/init.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080025#include <linux/gpio.h>
26#include <linux/platform_device.h>
David Millere3cb91c2010-03-05 13:41:36 -080027#include <linux/irq.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080028#include <linux/io.h>
29#include <linux/timb_gpio.h>
30#include <linux/interrupt.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080032
33#define DRIVER_NAME "timb-gpio"
34
35#define TGPIOVAL 0x00
36#define TGPIODIR 0x04
37#define TGPIO_IER 0x08
38#define TGPIO_ISR 0x0c
39#define TGPIO_IPR 0x10
40#define TGPIO_ICR 0x14
41#define TGPIO_FLR 0x18
42#define TGPIO_LVR 0x1c
Richard Röjfors8c35c892010-03-05 13:44:35 -080043#define TGPIO_VER 0x20
44#define TGPIO_BFLR 0x24
Richard Röjfors35570ac2009-12-15 16:46:18 -080045
46struct timbgpio {
47 void __iomem *membase;
48 spinlock_t lock; /* mutual exclusion */
49 struct gpio_chip gpio;
50 int irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -070051 unsigned long last_ier;
Richard Röjfors35570ac2009-12-15 16:46:18 -080052};
53
54static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index,
55 unsigned offset, bool enabled)
56{
Linus Walleij92a41e22015-12-07 14:43:28 +010057 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -080058 u32 reg;
59
60 spin_lock(&tgpio->lock);
61 reg = ioread32(tgpio->membase + offset);
62
63 if (enabled)
64 reg |= (1 << index);
65 else
66 reg &= ~(1 << index);
67
68 iowrite32(reg, tgpio->membase + offset);
69 spin_unlock(&tgpio->lock);
70
71 return 0;
72}
73
74static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
75{
76 return timbgpio_update_bit(gpio, nr, TGPIODIR, true);
77}
78
79static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr)
80{
Linus Walleij92a41e22015-12-07 14:43:28 +010081 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -080082 u32 value;
83
84 value = ioread32(tgpio->membase + TGPIOVAL);
85 return (value & (1 << nr)) ? 1 : 0;
86}
87
88static int timbgpio_gpio_direction_output(struct gpio_chip *gpio,
89 unsigned nr, int val)
90{
91 return timbgpio_update_bit(gpio, nr, TGPIODIR, false);
92}
93
94static void timbgpio_gpio_set(struct gpio_chip *gpio,
95 unsigned nr, int val)
96{
97 timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0);
98}
99
100static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset)
101{
Linus Walleij92a41e22015-12-07 14:43:28 +0100102 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800103
104 if (tgpio->irq_base <= 0)
105 return -EINVAL;
106
107 return tgpio->irq_base + offset;
108}
109
110/*
111 * GPIO IRQ
112 */
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800113static void timbgpio_irq_disable(struct irq_data *d)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800114{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800115 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
116 int offset = d->irq - tgpio->irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700117 unsigned long flags;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800118
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700119 spin_lock_irqsave(&tgpio->lock, flags);
Dan Carpenterd79550a2012-10-11 09:56:35 +0300120 tgpio->last_ier &= ~(1UL << offset);
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700121 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
122 spin_unlock_irqrestore(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800123}
124
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800125static void timbgpio_irq_enable(struct irq_data *d)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800126{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800127 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
128 int offset = d->irq - tgpio->irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700129 unsigned long flags;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800130
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700131 spin_lock_irqsave(&tgpio->lock, flags);
Dan Carpenterd79550a2012-10-11 09:56:35 +0300132 tgpio->last_ier |= 1UL << offset;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700133 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
134 spin_unlock_irqrestore(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800135}
136
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800137static int timbgpio_irq_type(struct irq_data *d, unsigned trigger)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800138{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800139 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
140 int offset = d->irq - tgpio->irq_base;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800141 unsigned long flags;
Richard Röjfors8c35c892010-03-05 13:44:35 -0800142 u32 lvr, flr, bflr = 0;
143 u32 ver;
Julia Lawall2a481802010-04-06 14:34:48 -0700144 int ret = 0;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800145
146 if (offset < 0 || offset > tgpio->gpio.ngpio)
147 return -EINVAL;
148
Richard Röjfors8c35c892010-03-05 13:44:35 -0800149 ver = ioread32(tgpio->membase + TGPIO_VER);
150
Richard Röjfors35570ac2009-12-15 16:46:18 -0800151 spin_lock_irqsave(&tgpio->lock, flags);
152
153 lvr = ioread32(tgpio->membase + TGPIO_LVR);
154 flr = ioread32(tgpio->membase + TGPIO_FLR);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800155 if (ver > 2)
156 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800157
158 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
Richard Röjfors8c35c892010-03-05 13:44:35 -0800159 bflr &= ~(1 << offset);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800160 flr &= ~(1 << offset);
161 if (trigger & IRQ_TYPE_LEVEL_HIGH)
162 lvr |= 1 << offset;
163 else
164 lvr &= ~(1 << offset);
165 }
166
Richard Röjfors8c35c892010-03-05 13:44:35 -0800167 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
Julia Lawall2a481802010-04-06 14:34:48 -0700168 if (ver < 3) {
169 ret = -EINVAL;
170 goto out;
Laurent Navet8a29a402013-03-20 13:16:03 +0100171 } else {
Richard Röjfors8c35c892010-03-05 13:44:35 -0800172 flr |= 1 << offset;
173 bflr |= 1 << offset;
174 }
175 } else {
176 bflr &= ~(1 << offset);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800177 flr |= 1 << offset;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800178 if (trigger & IRQ_TYPE_EDGE_FALLING)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800179 lvr &= ~(1 << offset);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800180 else
181 lvr |= 1 << offset;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800182 }
183
184 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
185 iowrite32(flr, tgpio->membase + TGPIO_FLR);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800186 if (ver > 2)
187 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
188
Richard Röjfors35570ac2009-12-15 16:46:18 -0800189 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800190
Julia Lawall2a481802010-04-06 14:34:48 -0700191out:
192 spin_unlock_irqrestore(&tgpio->lock, flags);
193 return ret;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800194}
195
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +0200196static void timbgpio_irq(struct irq_desc *desc)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800197{
Jiang Liu476f8b42015-06-04 12:13:15 +0800198 struct timbgpio *tgpio = irq_desc_get_handler_data(desc);
199 struct irq_data *data = irq_desc_get_irq_data(desc);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800200 unsigned long ipr;
201 int offset;
202
Jiang Liu476f8b42015-06-04 12:13:15 +0800203 data->chip->irq_ack(data);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800204 ipr = ioread32(tgpio->membase + TGPIO_IPR);
205 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
206
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700207 /*
208 * Some versions of the hardware trash the IER register if more than
209 * one interrupt is received simultaneously.
210 */
211 iowrite32(0, tgpio->membase + TGPIO_IER);
212
Akinobu Mita984b3f52010-03-05 13:41:37 -0800213 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800214 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700215
216 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800217}
218
219static struct irq_chip timbgpio_irqchip = {
220 .name = "GPIO",
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800221 .irq_enable = timbgpio_irq_enable,
222 .irq_disable = timbgpio_irq_disable,
223 .irq_set_type = timbgpio_irq_type,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800224};
225
Bill Pemberton38363092012-11-19 13:22:34 -0500226static int timbgpio_probe(struct platform_device *pdev)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800227{
228 int err, i;
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200229 struct device *dev = &pdev->dev;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800230 struct gpio_chip *gc;
231 struct timbgpio *tgpio;
232 struct resource *iomem;
Jingoo Hane56aee12013-07-30 17:08:05 +0900233 struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800234 int irq = platform_get_irq(pdev, 0);
235
236 if (!pdata || pdata->nr_pins > 32) {
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200237 dev_err(dev, "Invalid platform data\n");
238 return -EINVAL;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800239 }
240
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200241 tgpio = devm_kzalloc(dev, sizeof(struct timbgpio), GFP_KERNEL);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800242 if (!tgpio) {
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200243 dev_err(dev, "Memory alloc failed\n");
244 return -EINVAL;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800245 }
246 tgpio->irq_base = pdata->irq_base;
247
248 spin_lock_init(&tgpio->lock);
249
Amitoj Kaur Chawlafa283db2016-02-28 18:00:56 +0530250 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
251 tgpio->membase = devm_ioremap_resource(dev, iomem);
252 if (IS_ERR(tgpio->membase))
253 return PTR_ERR(tgpio->membase);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800254
255 gc = &tgpio->gpio;
256
257 gc->label = dev_name(&pdev->dev);
258 gc->owner = THIS_MODULE;
Linus Walleij58383c782015-11-04 09:56:26 +0100259 gc->parent = &pdev->dev;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800260 gc->direction_input = timbgpio_gpio_direction_input;
261 gc->get = timbgpio_gpio_get;
262 gc->direction_output = timbgpio_gpio_direction_output;
263 gc->set = timbgpio_gpio_set;
264 gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
265 gc->dbg_show = NULL;
266 gc->base = pdata->gpio_base;
267 gc->ngpio = pdata->nr_pins;
Linus Walleij9fb1f392013-12-04 14:42:46 +0100268 gc->can_sleep = false;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800269
Laxman Dewangan43fad832016-02-22 17:43:28 +0530270 err = devm_gpiochip_add_data(&pdev->dev, gc, tgpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800271 if (err)
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200272 return err;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800273
274 platform_set_drvdata(pdev, tgpio);
275
276 /* make sure to disable interrupts */
277 iowrite32(0x0, tgpio->membase + TGPIO_IER);
278
279 if (irq < 0 || tgpio->irq_base <= 0)
280 return 0;
281
282 for (i = 0; i < pdata->nr_pins; i++) {
Linus Walleije5428a62013-11-26 14:28:32 +0100283 irq_set_chip_and_handler(tgpio->irq_base + i,
284 &timbgpio_irqchip, handle_simple_irq);
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000285 irq_set_chip_data(tgpio->irq_base + i, tgpio);
Rob Herring23393d42015-07-27 15:55:16 -0500286 irq_clear_status_flags(tgpio->irq_base + i, IRQ_NOREQUEST | IRQ_NOPROBE);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800287 }
288
Thomas Gleixner8a522112015-06-21 21:10:47 +0200289 irq_set_chained_handler_and_data(irq, timbgpio_irq, tgpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800290
291 return 0;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800292}
293
Richard Röjfors35570ac2009-12-15 16:46:18 -0800294static struct platform_driver timbgpio_platform_driver = {
295 .driver = {
Paul Gortmaker52ad9052016-05-09 19:59:57 -0400296 .name = DRIVER_NAME,
297 .suppress_bind_attrs = true,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800298 },
299 .probe = timbgpio_probe,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800300};
301
302/*--------------------------------------------------------------------------*/
303
Paul Gortmaker52ad9052016-05-09 19:59:57 -0400304builtin_platform_driver(timbgpio_platform_driver);