blob: de0fd552710d74242e31f6e46eef30b64d40a660 [file] [log] [blame]
Terje Bergstrom75471682013-03-22 16:34:01 +02001/*
2 * Tegra host1x driver
3 *
4 * Copyright (c) 2010-2013, NVIDIA Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/module.h>
20#include <linux/list.h>
21#include <linux/slab.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/clk.h>
25#include <linux/io.h>
26
27#define CREATE_TRACE_POINTS
28#include <trace/events/host1x.h>
29
Thierry Reding776dc382013-10-14 14:43:22 +020030#include "bus.h"
Terje Bergstrom75471682013-03-22 16:34:01 +020031#include "dev.h"
Terje Bergstrom7ede0b02013-03-22 16:34:02 +020032#include "intr.h"
Terje Bergstrom65793242013-03-22 16:34:03 +020033#include "channel.h"
Terje Bergstrom62364512013-03-22 16:34:04 +020034#include "debug.h"
Terje Bergstrom75471682013-03-22 16:34:01 +020035#include "hw/host1x01.h"
36
37void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
38{
39 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
40
41 writel(v, sync_regs + r);
42}
43
44u32 host1x_sync_readl(struct host1x *host1x, u32 r)
45{
46 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
47
48 return readl(sync_regs + r);
49}
50
Terje Bergstrom65793242013-03-22 16:34:03 +020051void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r)
52{
53 writel(v, ch->regs + r);
54}
55
56u32 host1x_ch_readl(struct host1x_channel *ch, u32 r)
57{
58 return readl(ch->regs + r);
59}
60
Terje Bergstrom75471682013-03-22 16:34:01 +020061static const struct host1x_info host1x01_info = {
62 .nb_channels = 8,
63 .nb_pts = 32,
64 .nb_mlocks = 16,
65 .nb_bases = 8,
66 .init = host1x01_init,
67 .sync_offset = 0x3000,
68};
69
70static struct of_device_id host1x_of_match[] = {
71 { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
72 { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
73 { },
74};
75MODULE_DEVICE_TABLE(of, host1x_of_match);
76
77static int host1x_probe(struct platform_device *pdev)
78{
79 const struct of_device_id *id;
80 struct host1x *host;
81 struct resource *regs;
82 int syncpt_irq;
83 int err;
84
85 id = of_match_device(host1x_of_match, &pdev->dev);
86 if (!id)
87 return -EINVAL;
88
89 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
90 if (!regs) {
91 dev_err(&pdev->dev, "failed to get registers\n");
92 return -ENXIO;
93 }
94
95 syncpt_irq = platform_get_irq(pdev, 0);
96 if (syncpt_irq < 0) {
97 dev_err(&pdev->dev, "failed to get IRQ\n");
98 return -ENXIO;
99 }
100
101 host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
102 if (!host)
103 return -ENOMEM;
104
Thierry Reding776dc382013-10-14 14:43:22 +0200105 mutex_init(&host->devices_lock);
106 INIT_LIST_HEAD(&host->devices);
107 INIT_LIST_HEAD(&host->list);
Terje Bergstrom75471682013-03-22 16:34:01 +0200108 host->dev = &pdev->dev;
109 host->info = id->data;
110
111 /* set common host1x device data */
112 platform_set_drvdata(pdev, host);
113
114 host->regs = devm_ioremap_resource(&pdev->dev, regs);
115 if (IS_ERR(host->regs))
116 return PTR_ERR(host->regs);
117
118 if (host->info->init) {
119 err = host->info->init(host);
120 if (err)
121 return err;
122 }
123
124 host->clk = devm_clk_get(&pdev->dev, NULL);
125 if (IS_ERR(host->clk)) {
126 dev_err(&pdev->dev, "failed to get clock\n");
127 err = PTR_ERR(host->clk);
128 return err;
129 }
130
Terje Bergstrom65793242013-03-22 16:34:03 +0200131 err = host1x_channel_list_init(host);
132 if (err) {
133 dev_err(&pdev->dev, "failed to initialize channel list\n");
134 return err;
135 }
136
Terje Bergstrom75471682013-03-22 16:34:01 +0200137 err = clk_prepare_enable(host->clk);
138 if (err < 0) {
139 dev_err(&pdev->dev, "failed to enable clock\n");
140 return err;
141 }
142
143 err = host1x_syncpt_init(host);
144 if (err) {
145 dev_err(&pdev->dev, "failed to initialize syncpts\n");
146 return err;
147 }
148
Terje Bergstrom7ede0b02013-03-22 16:34:02 +0200149 err = host1x_intr_init(host, syncpt_irq);
150 if (err) {
151 dev_err(&pdev->dev, "failed to initialize interrupts\n");
152 goto fail_deinit_syncpt;
153 }
154
Terje Bergstrom62364512013-03-22 16:34:04 +0200155 host1x_debug_init(host);
156
Thierry Reding776dc382013-10-14 14:43:22 +0200157 err = host1x_register(host);
158 if (err < 0)
159 goto fail_deinit_intr;
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200160
Terje Bergstrom75471682013-03-22 16:34:01 +0200161 return 0;
Terje Bergstrom7ede0b02013-03-22 16:34:02 +0200162
Thierry Reding776dc382013-10-14 14:43:22 +0200163fail_deinit_intr:
164 host1x_intr_deinit(host);
Terje Bergstrom7ede0b02013-03-22 16:34:02 +0200165fail_deinit_syncpt:
166 host1x_syncpt_deinit(host);
167 return err;
Terje Bergstrom75471682013-03-22 16:34:01 +0200168}
169
Thierry Reding452e7f02013-09-25 18:33:31 +0200170static int host1x_remove(struct platform_device *pdev)
Terje Bergstrom75471682013-03-22 16:34:01 +0200171{
172 struct host1x *host = platform_get_drvdata(pdev);
173
Thierry Reding776dc382013-10-14 14:43:22 +0200174 host1x_unregister(host);
Terje Bergstrom7ede0b02013-03-22 16:34:02 +0200175 host1x_intr_deinit(host);
Terje Bergstrom75471682013-03-22 16:34:01 +0200176 host1x_syncpt_deinit(host);
177 clk_disable_unprepare(host->clk);
178
179 return 0;
180}
181
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200182static struct platform_driver tegra_host1x_driver = {
Terje Bergstrom75471682013-03-22 16:34:01 +0200183 .driver = {
Terje Bergstrom75471682013-03-22 16:34:01 +0200184 .name = "tegra-host1x",
185 .of_match_table = host1x_of_match,
186 },
Thierry Reding452e7f02013-09-25 18:33:31 +0200187 .probe = host1x_probe,
188 .remove = host1x_remove,
Terje Bergstrom75471682013-03-22 16:34:01 +0200189};
190
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200191static int __init tegra_host1x_init(void)
192{
193 int err;
Terje Bergstrom75471682013-03-22 16:34:01 +0200194
Thierry Reding776dc382013-10-14 14:43:22 +0200195 err = host1x_bus_init();
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200196 if (err < 0)
197 return err;
198
Thierry Reding776dc382013-10-14 14:43:22 +0200199 err = platform_driver_register(&tegra_host1x_driver);
200 if (err < 0) {
201 host1x_bus_exit();
202 return err;
203 }
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200204
205 return 0;
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200206}
207module_init(tegra_host1x_init);
208
209static void __exit tegra_host1x_exit(void)
210{
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200211 platform_driver_unregister(&tegra_host1x_driver);
Thierry Reding776dc382013-10-14 14:43:22 +0200212 host1x_bus_exit();
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200213}
214module_exit(tegra_host1x_exit);
215
216MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
Terje Bergstrom75471682013-03-22 16:34:01 +0200217MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
218MODULE_DESCRIPTION("Host1x driver for Tegra products");
219MODULE_LICENSE("GPL");