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Linus Torvalds1da177e2005-04-16 15:20:36 -07001Driver for PXA25x LCD controller
2================================
3
4The driver supports the following options, either via
5options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in.
6
7For example:
Eric Miao77e19672008-12-16 11:54:34 +08008 modprobe pxafb options=vmem:2M,mode:640x480-8,passive
Linus Torvalds1da177e2005-04-16 15:20:36 -07009or on the kernel command line
Eric Miao77e19672008-12-16 11:54:34 +080010 video=pxafb:vmem:2M,mode:640x480-8,passive
11
12vmem: VIDEO_MEM_SIZE
13 Amount of video memory to allocate (can be suffixed with K or M
14 for kilobytes or megabytes)
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
16mode:XRESxYRES[-BPP]
17 XRES == LCCR1_PPL + 1
18 YRES == LLCR2_LPP + 1
19 The resolution of the display in pixels
20 BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16.
21
22pixclock:PIXCLOCK
23 Pixel clock in picoseconds
24
25left:LEFT == LCCR1_BLW + 1
26right:RIGHT == LCCR1_ELW + 1
27hsynclen:HSYNC == LCCR1_HSW + 1
28upper:UPPER == LCCR2_BFW
29lower:LOWER == LCCR2_EFR
30vsynclen:VSYNC == LCCR2_VSW + 1
31 Display margins and sync times
32
33color | mono => LCCR0_CMS
34 umm...
35
36active | passive => LCCR0_PAS
37 Active (TFT) or Passive (STN) display
38
39single | dual => LCCR0_SDS
40 Single or dual panel passive display
41
424pix | 8pix => LCCR0_DPD
43 4 or 8 pixel monochrome single panel data
44
45hsync:HSYNC
46vsync:VSYNC
47 Horizontal and vertical sync. 0 => active low, 1 => active
48 high.
49
50dpc:DPC
51 Double pixel clock. 1=>true, 0=>false
52
53outputen:POLARITY
54 Output Enable Polarity. 0 => active low, 1 => active high
55
56pixclockpol:POLARITY
57 pixel clock polarity
58 0 => falling edge, 1 => rising edge