Michael Williamson | f2dbb6d | 2010-09-02 13:58:07 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Critical Link MityOMAP-L138 SoM |
| 3 | * |
| 4 | * Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of |
| 8 | * any kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/console.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/mtd/partitions.h> |
Michael Williamson | 8774882 | 2010-09-05 13:29:39 -0400 | [diff] [blame] | 16 | #include <linux/regulator/machine.h> |
| 17 | #include <linux/i2c.h> |
Michael Williamson | f2dbb6d | 2010-09-02 13:58:07 -0400 | [diff] [blame] | 18 | |
| 19 | #include <asm/mach-types.h> |
| 20 | #include <asm/mach/arch.h> |
| 21 | #include <mach/common.h> |
| 22 | #include <mach/cp_intc.h> |
| 23 | #include <mach/da8xx.h> |
| 24 | #include <mach/nand.h> |
| 25 | #include <mach/mux.h> |
| 26 | |
Cyril Chemparathy | 782f2d7 | 2010-09-15 10:11:25 -0400 | [diff] [blame^] | 27 | #define MITYOMAPL138_PHY_ID "0:03" |
Michael Williamson | 8774882 | 2010-09-05 13:29:39 -0400 | [diff] [blame] | 28 | static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = { |
| 29 | .bus_freq = 100, /* kHz */ |
| 30 | .bus_delay = 0, /* usec */ |
| 31 | }; |
| 32 | |
| 33 | /* TPS65023 voltage regulator support */ |
| 34 | /* 1.2V Core */ |
| 35 | struct regulator_consumer_supply tps65023_dcdc1_consumers[] = { |
| 36 | { |
| 37 | .supply = "cvdd", |
| 38 | }, |
| 39 | }; |
| 40 | |
| 41 | /* 1.8V */ |
| 42 | struct regulator_consumer_supply tps65023_dcdc2_consumers[] = { |
| 43 | { |
| 44 | .supply = "usb0_vdda18", |
| 45 | }, |
| 46 | { |
| 47 | .supply = "usb1_vdda18", |
| 48 | }, |
| 49 | { |
| 50 | .supply = "ddr_dvdd18", |
| 51 | }, |
| 52 | { |
| 53 | .supply = "sata_vddr", |
| 54 | }, |
| 55 | }; |
| 56 | |
| 57 | /* 1.2V */ |
| 58 | struct regulator_consumer_supply tps65023_dcdc3_consumers[] = { |
| 59 | { |
| 60 | .supply = "sata_vdd", |
| 61 | }, |
| 62 | { |
| 63 | .supply = "usb_cvdd", |
| 64 | }, |
| 65 | { |
| 66 | .supply = "pll0_vdda", |
| 67 | }, |
| 68 | { |
| 69 | .supply = "pll1_vdda", |
| 70 | }, |
| 71 | }; |
| 72 | |
| 73 | /* 1.8V Aux LDO, not used */ |
| 74 | struct regulator_consumer_supply tps65023_ldo1_consumers[] = { |
| 75 | { |
| 76 | .supply = "1.8v_aux", |
| 77 | }, |
| 78 | }; |
| 79 | |
| 80 | /* FPGA VCC Aux (2.5 or 3.3) LDO */ |
| 81 | struct regulator_consumer_supply tps65023_ldo2_consumers[] = { |
| 82 | { |
| 83 | .supply = "vccaux", |
| 84 | }, |
| 85 | }; |
| 86 | |
| 87 | struct regulator_init_data tps65023_regulator_data[] = { |
| 88 | /* dcdc1 */ |
| 89 | { |
| 90 | .constraints = { |
| 91 | .min_uV = 1150000, |
| 92 | .max_uV = 1350000, |
| 93 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
| 94 | REGULATOR_CHANGE_STATUS, |
| 95 | .boot_on = 1, |
| 96 | }, |
| 97 | .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers), |
| 98 | .consumer_supplies = tps65023_dcdc1_consumers, |
| 99 | }, |
| 100 | /* dcdc2 */ |
| 101 | { |
| 102 | .constraints = { |
| 103 | .min_uV = 1800000, |
| 104 | .max_uV = 1800000, |
| 105 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
| 106 | .boot_on = 1, |
| 107 | }, |
| 108 | .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers), |
| 109 | .consumer_supplies = tps65023_dcdc2_consumers, |
| 110 | }, |
| 111 | /* dcdc3 */ |
| 112 | { |
| 113 | .constraints = { |
| 114 | .min_uV = 1200000, |
| 115 | .max_uV = 1200000, |
| 116 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
| 117 | .boot_on = 1, |
| 118 | }, |
| 119 | .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers), |
| 120 | .consumer_supplies = tps65023_dcdc3_consumers, |
| 121 | }, |
| 122 | /* ldo1 */ |
| 123 | { |
| 124 | .constraints = { |
| 125 | .min_uV = 1800000, |
| 126 | .max_uV = 1800000, |
| 127 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
| 128 | .boot_on = 1, |
| 129 | }, |
| 130 | .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers), |
| 131 | .consumer_supplies = tps65023_ldo1_consumers, |
| 132 | }, |
| 133 | /* ldo2 */ |
| 134 | { |
| 135 | .constraints = { |
| 136 | .min_uV = 2500000, |
| 137 | .max_uV = 3300000, |
| 138 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
| 139 | REGULATOR_CHANGE_STATUS, |
| 140 | .boot_on = 1, |
| 141 | }, |
| 142 | .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers), |
| 143 | .consumer_supplies = tps65023_ldo2_consumers, |
| 144 | }, |
| 145 | }; |
| 146 | |
| 147 | static struct i2c_board_info __initdata mityomap_tps65023_info[] = { |
| 148 | { |
| 149 | I2C_BOARD_INFO("tps65023", 0x48), |
| 150 | .platform_data = &tps65023_regulator_data[0], |
| 151 | }, |
| 152 | { |
| 153 | I2C_BOARD_INFO("24c02", 0x50), |
| 154 | }, |
| 155 | }; |
| 156 | |
| 157 | static int __init pmic_tps65023_init(void) |
| 158 | { |
| 159 | return i2c_register_board_info(1, mityomap_tps65023_info, |
| 160 | ARRAY_SIZE(mityomap_tps65023_info)); |
| 161 | } |
| 162 | |
Michael Williamson | f2dbb6d | 2010-09-02 13:58:07 -0400 | [diff] [blame] | 163 | /* |
| 164 | * MityDSP-L138 includes a 256 MByte large-page NAND flash |
| 165 | * (128K blocks). |
| 166 | */ |
| 167 | struct mtd_partition mityomapl138_nandflash_partition[] = { |
| 168 | { |
| 169 | .name = "rootfs", |
| 170 | .offset = 0, |
| 171 | .size = SZ_128M, |
| 172 | .mask_flags = 0, /* MTD_WRITEABLE, */ |
| 173 | }, |
| 174 | { |
| 175 | .name = "homefs", |
| 176 | .offset = MTDPART_OFS_APPEND, |
| 177 | .size = MTDPART_SIZ_FULL, |
| 178 | .mask_flags = 0, |
| 179 | }, |
| 180 | }; |
| 181 | |
| 182 | static struct davinci_nand_pdata mityomapl138_nandflash_data = { |
| 183 | .parts = mityomapl138_nandflash_partition, |
| 184 | .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition), |
| 185 | .ecc_mode = NAND_ECC_HW, |
| 186 | .options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16, |
| 187 | .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */ |
| 188 | }; |
| 189 | |
| 190 | static struct resource mityomapl138_nandflash_resource[] = { |
| 191 | { |
| 192 | .start = DA8XX_AEMIF_CS3_BASE, |
| 193 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, |
| 194 | .flags = IORESOURCE_MEM, |
| 195 | }, |
| 196 | { |
| 197 | .start = DA8XX_AEMIF_CTL_BASE, |
| 198 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, |
| 199 | .flags = IORESOURCE_MEM, |
| 200 | }, |
| 201 | }; |
| 202 | |
| 203 | static struct platform_device mityomapl138_nandflash_device = { |
| 204 | .name = "davinci_nand", |
| 205 | .id = 0, |
| 206 | .dev = { |
| 207 | .platform_data = &mityomapl138_nandflash_data, |
| 208 | }, |
| 209 | .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource), |
| 210 | .resource = mityomapl138_nandflash_resource, |
| 211 | }; |
| 212 | |
| 213 | static struct platform_device *mityomapl138_devices[] __initdata = { |
| 214 | &mityomapl138_nandflash_device, |
| 215 | }; |
| 216 | |
| 217 | static void __init mityomapl138_setup_nand(void) |
| 218 | { |
| 219 | platform_add_devices(mityomapl138_devices, |
| 220 | ARRAY_SIZE(mityomapl138_devices)); |
| 221 | } |
| 222 | |
| 223 | static struct davinci_uart_config mityomapl138_uart_config __initdata = { |
| 224 | .enabled_uarts = 0x7, |
| 225 | }; |
| 226 | |
| 227 | static const short mityomap_mii_pins[] = { |
| 228 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, |
| 229 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, |
| 230 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, |
| 231 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, |
| 232 | DA850_MDIO_D, |
| 233 | -1 |
| 234 | }; |
| 235 | |
| 236 | static const short mityomap_rmii_pins[] = { |
| 237 | DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, |
| 238 | DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, |
| 239 | DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, |
| 240 | DA850_MDIO_D, |
| 241 | -1 |
| 242 | }; |
| 243 | |
| 244 | static void __init mityomapl138_config_emac(void) |
| 245 | { |
| 246 | void __iomem *cfg_chip3_base; |
| 247 | int ret; |
| 248 | u32 val; |
| 249 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
| 250 | |
| 251 | soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */ |
| 252 | |
| 253 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
| 254 | val = __raw_readl(cfg_chip3_base); |
| 255 | |
| 256 | if (soc_info->emac_pdata->rmii_en) { |
| 257 | val |= BIT(8); |
| 258 | ret = davinci_cfg_reg_list(mityomap_rmii_pins); |
| 259 | pr_info("RMII PHY configured\n"); |
| 260 | } else { |
| 261 | val &= ~BIT(8); |
| 262 | ret = davinci_cfg_reg_list(mityomap_mii_pins); |
| 263 | pr_info("MII PHY configured\n"); |
| 264 | } |
| 265 | |
| 266 | if (ret) { |
| 267 | pr_warning("mii/rmii mux setup failed: %d\n", ret); |
| 268 | return; |
| 269 | } |
| 270 | |
| 271 | /* configure the CFGCHIP3 register for RMII or MII */ |
| 272 | __raw_writel(val, cfg_chip3_base); |
| 273 | |
Cyril Chemparathy | 782f2d7 | 2010-09-15 10:11:25 -0400 | [diff] [blame^] | 274 | soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID; |
Michael Williamson | f2dbb6d | 2010-09-02 13:58:07 -0400 | [diff] [blame] | 275 | |
| 276 | ret = da8xx_register_emac(); |
| 277 | if (ret) |
| 278 | pr_warning("emac registration failed: %d\n", ret); |
| 279 | } |
| 280 | |
| 281 | static struct davinci_pm_config da850_pm_pdata = { |
| 282 | .sleepcount = 128, |
| 283 | }; |
| 284 | |
| 285 | static struct platform_device da850_pm_device = { |
| 286 | .name = "pm-davinci", |
| 287 | .dev = { |
| 288 | .platform_data = &da850_pm_pdata, |
| 289 | }, |
| 290 | .id = -1, |
| 291 | }; |
| 292 | |
| 293 | static void __init mityomapl138_init(void) |
| 294 | { |
| 295 | int ret; |
| 296 | |
| 297 | /* for now, no special EDMA channels are reserved */ |
| 298 | ret = da850_register_edma(NULL); |
| 299 | if (ret) |
| 300 | pr_warning("edma registration failed: %d\n", ret); |
| 301 | |
| 302 | ret = da8xx_register_watchdog(); |
| 303 | if (ret) |
| 304 | pr_warning("watchdog registration failed: %d\n", ret); |
| 305 | |
| 306 | davinci_serial_init(&mityomapl138_uart_config); |
| 307 | |
Michael Williamson | 8774882 | 2010-09-05 13:29:39 -0400 | [diff] [blame] | 308 | ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata); |
| 309 | if (ret) |
| 310 | pr_warning("i2c0 registration failed: %d\n", ret); |
| 311 | |
| 312 | ret = pmic_tps65023_init(); |
| 313 | if (ret) |
| 314 | pr_warning("TPS65023 PMIC init failed: %d\n", ret); |
| 315 | |
Michael Williamson | f2dbb6d | 2010-09-02 13:58:07 -0400 | [diff] [blame] | 316 | mityomapl138_setup_nand(); |
| 317 | |
| 318 | mityomapl138_config_emac(); |
| 319 | |
| 320 | ret = da8xx_register_rtc(); |
| 321 | if (ret) |
| 322 | pr_warning("rtc setup failed: %d\n", ret); |
| 323 | |
| 324 | ret = da850_register_cpufreq("pll0_sysclk3"); |
| 325 | if (ret) |
| 326 | pr_warning("cpufreq registration failed: %d\n", ret); |
| 327 | |
| 328 | ret = da8xx_register_cpuidle(); |
| 329 | if (ret) |
| 330 | pr_warning("cpuidle registration failed: %d\n", ret); |
| 331 | |
| 332 | ret = da850_register_pm(&da850_pm_device); |
| 333 | if (ret) |
| 334 | pr_warning("da850_evm_init: suspend registration failed: %d\n", |
| 335 | ret); |
| 336 | } |
| 337 | |
| 338 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| 339 | static int __init mityomapl138_console_init(void) |
| 340 | { |
| 341 | if (!machine_is_mityomapl138()) |
| 342 | return 0; |
| 343 | |
| 344 | return add_preferred_console("ttyS", 1, "115200"); |
| 345 | } |
| 346 | console_initcall(mityomapl138_console_init); |
| 347 | #endif |
| 348 | |
| 349 | static void __init mityomapl138_map_io(void) |
| 350 | { |
| 351 | da850_init(); |
| 352 | } |
| 353 | |
| 354 | MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") |
| 355 | .phys_io = IO_PHYS, |
| 356 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, |
| 357 | .boot_params = (DA8XX_DDR_BASE + 0x100), |
| 358 | .map_io = mityomapl138_map_io, |
| 359 | .init_irq = cp_intc_init, |
| 360 | .timer = &davinci_timer, |
| 361 | .init_machine = mityomapl138_init, |
| 362 | MACHINE_END |