blob: 608340a25278c7a944716a0bc6cb308bc49f1ff9 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/drivers/mtd/nand/s3c2410.c
2 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01003 * Copyright (c) 2004,2005 Simtec Electronics
Ben Dooksfdf2fd52005-02-18 14:46:15 +00004 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01007 * Samsung S3C2410/S3C240 NAND driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
9 * Changelog:
10 * 21-Sep-2004 BJD Initial version
11 * 23-Sep-2004 BJD Mulitple device support
12 * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
13 * 12-Oct-2004 BJD Fixed errors in use of platform data
Ben Dooks3e4ef3b2005-03-17 11:31:30 +000014 * 18-Feb-2005 BJD Fix sparse errors
15 * 14-Mar-2005 BJD Applied tglx's code reduction patch
Ben Dooksa4f957f2005-06-20 12:48:25 +010016 * 02-May-2005 BJD Fixed s3c2440 support
17 * 02-May-2005 BJD Reduced hwcontrol decode
18 * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug
Ben Dooksfb8d82a2005-07-06 21:05:10 +010019 * 08-Jul-2005 BJD Fix OOPS when no platform data supplied
Ben Dookscfd320f2005-10-20 22:22:58 +010020 * 20-Oct-2005 BJD Fix timing calculation bug
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000022 * $Id: s3c2410.c,v 1.20 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37*/
38
39#include <config/mtd/nand/s3c2410/hwecc.h>
40#include <config/mtd/nand/s3c2410/debug.h>
41
42#ifdef CONFIG_MTD_NAND_S3C2410_DEBUG
43#define DEBUG
44#endif
45
46#include <linux/module.h>
47#include <linux/types.h>
48#include <linux/init.h>
49#include <linux/kernel.h>
50#include <linux/string.h>
51#include <linux/ioport.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010052#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/delay.h>
54#include <linux/err.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080055#include <linux/slab.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000056#include <linux/clk.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58#include <linux/mtd/mtd.h>
59#include <linux/mtd/nand.h>
60#include <linux/mtd/nand_ecc.h>
61#include <linux/mtd/partitions.h>
62
63#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65#include <asm/arch/regs-nand.h>
66#include <asm/arch/nand.h>
67
68#define PFX "s3c2410-nand: "
69
70#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
71static int hardware_ecc = 1;
72#else
73static int hardware_ecc = 0;
74#endif
75
76/* new oob placement block for use with hardware ecc generation
77 */
78
79static struct nand_oobinfo nand_hw_eccoob = {
David Woodhousee0c7d762006-05-13 18:07:53 +010080 .useecc = MTD_NANDECC_AUTOPLACE,
81 .eccbytes = 3,
82 .eccpos = {0, 1, 2},
83 .oobfree = {{8, 8}}
Linus Torvalds1da177e2005-04-16 15:20:36 -070084};
85
86/* controller and mtd information */
87
88struct s3c2410_nand_info;
89
90struct s3c2410_nand_mtd {
91 struct mtd_info mtd;
92 struct nand_chip chip;
93 struct s3c2410_nand_set *set;
94 struct s3c2410_nand_info *info;
95 int scan_res;
96};
97
98/* overview of the s3c2410 nand state */
99
100struct s3c2410_nand_info {
101 /* mtd info */
102 struct nand_hw_control controller;
103 struct s3c2410_nand_mtd *mtds;
104 struct s3c2410_platform_nand *platform;
105
106 /* device info */
107 struct device *device;
108 struct resource *area;
109 struct clk *clk;
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000110 void __iomem *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 int mtd_count;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100112
113 unsigned char is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114};
115
116/* conversion functions */
117
118static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
119{
120 return container_of(mtd, struct s3c2410_nand_mtd, mtd);
121}
122
123static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd)
124{
125 return s3c2410_nand_mtd_toours(mtd)->info;
126}
127
Russell King3ae5eae2005-11-09 22:32:44 +0000128static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129{
Russell King3ae5eae2005-11-09 22:32:44 +0000130 return platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131}
132
Russell King3ae5eae2005-11-09 22:32:44 +0000133static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134{
Russell King3ae5eae2005-11-09 22:32:44 +0000135 return dev->dev.platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136}
137
138/* timing calculations */
139
Ben Dookscfd320f2005-10-20 22:22:58 +0100140#define NS_IN_KHZ 1000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141
142static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max)
143{
144 int result;
145
Ben Dookscfd320f2005-10-20 22:22:58 +0100146 result = (wanted * clk) / NS_IN_KHZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 result++;
148
149 pr_debug("result %d from %ld, %d\n", result, clk, wanted);
150
151 if (result > max) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100152 printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 return -1;
154 }
155
156 if (result < 1)
157 result = 1;
158
159 return result;
160}
161
Ben Dookscfd320f2005-10-20 22:22:58 +0100162#define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
164/* controller setup */
165
David Woodhousee0c7d762006-05-13 18:07:53 +0100166static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167{
Russell King3ae5eae2005-11-09 22:32:44 +0000168 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 unsigned long clkrate = clk_get_rate(info->clk);
Ben Dookscfd320f2005-10-20 22:22:58 +0100170 int tacls, twrph0, twrph1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 unsigned long cfg;
172
173 /* calculate the timing information for the controller */
174
Ben Dookscfd320f2005-10-20 22:22:58 +0100175 clkrate /= 1000; /* turn clock into kHz for ease of use */
176
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177 if (plat != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100178 tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
180 twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
181 } else {
182 /* default timings */
Ben Dooksa4f957f2005-06-20 12:48:25 +0100183 tacls = 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 twrph0 = 8;
185 twrph1 = 8;
186 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000187
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
189 printk(KERN_ERR PFX "cannot get timings suitable for board\n");
190 return -EINVAL;
191 }
192
Ben Dookscfd320f2005-10-20 22:22:58 +0100193 printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100194 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
Ben Dooksa4f957f2005-06-20 12:48:25 +0100196 if (!info->is_s3c2440) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100197 cfg = S3C2410_NFCONF_EN;
198 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
199 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
200 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100201 } else {
David Woodhousee0c7d762006-05-13 18:07:53 +0100202 cfg = S3C2440_NFCONF_TACLS(tacls - 1);
203 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
204 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100205 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
207 pr_debug(PFX "NF_CONF is 0x%lx\n", cfg);
208
209 writel(cfg, info->regs + S3C2410_NFCONF);
210 return 0;
211}
212
213/* select chip */
214
215static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
216{
217 struct s3c2410_nand_info *info;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000218 struct s3c2410_nand_mtd *nmtd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 struct nand_chip *this = mtd->priv;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100220 void __iomem *reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221 unsigned long cur;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100222 unsigned long bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
224 nmtd = this->priv;
225 info = nmtd->info;
226
Ben Dooksa4f957f2005-06-20 12:48:25 +0100227 bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE;
David Woodhousee0c7d762006-05-13 18:07:53 +0100228 reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100229
230 cur = readl(reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231
232 if (chip == -1) {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100233 cur |= bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 } else {
Ben Dooksfb8d82a2005-07-06 21:05:10 +0100235 if (nmtd->set != NULL && chip > nmtd->set->nr_chips) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 printk(KERN_ERR PFX "chip %d out of range\n", chip);
237 return;
238 }
239
240 if (info->platform != NULL) {
241 if (info->platform->select_chip != NULL)
David Woodhousee0c7d762006-05-13 18:07:53 +0100242 (info->platform->select_chip) (nmtd->set, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 }
244
Ben Dooksa4f957f2005-06-20 12:48:25 +0100245 cur &= ~bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246 }
247
Ben Dooksa4f957f2005-06-20 12:48:25 +0100248 writel(cur, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249}
250
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000251/* command and control functions
Ben Dooksa4f957f2005-06-20 12:48:25 +0100252 *
253 * Note, these all use tglx's method of changing the IO_ADDR_W field
254 * to make the code simpler, and use the nand layer's code to issue the
255 * command and address sequences via the proper IO ports.
256 *
257*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
259static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd)
260{
261 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Ben Dooks3e4ef3b2005-03-17 11:31:30 +0000262 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263
264 switch (cmd) {
265 case NAND_CTL_SETNCE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 case NAND_CTL_CLRNCE:
Ben Dooksa4f957f2005-06-20 12:48:25 +0100267 printk(KERN_ERR "%s: called for NCE\n", __FUNCTION__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268 break;
269
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270 case NAND_CTL_SETCLE:
Ben Dooksa4f957f2005-06-20 12:48:25 +0100271 chip->IO_ADDR_W = info->regs + S3C2410_NFCMD;
Ben Dooks3e4ef3b2005-03-17 11:31:30 +0000272 break;
273
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 case NAND_CTL_SETALE:
Ben Dooksa4f957f2005-06-20 12:48:25 +0100275 chip->IO_ADDR_W = info->regs + S3C2410_NFADDR;
Ben Dooks3e4ef3b2005-03-17 11:31:30 +0000276 break;
277
278 /* NAND_CTL_CLRCLE: */
279 /* NAND_CTL_CLRALE: */
280 default:
Ben Dooksa4f957f2005-06-20 12:48:25 +0100281 chip->IO_ADDR_W = info->regs + S3C2410_NFDATA;
282 break;
283 }
284}
285
286/* command and control functions */
287
288static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd)
289{
290 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
291 struct nand_chip *chip = mtd->priv;
292
293 switch (cmd) {
294 case NAND_CTL_SETNCE:
295 case NAND_CTL_CLRNCE:
296 printk(KERN_ERR "%s: called for NCE\n", __FUNCTION__);
297 break;
298
299 case NAND_CTL_SETCLE:
300 chip->IO_ADDR_W = info->regs + S3C2440_NFCMD;
301 break;
302
303 case NAND_CTL_SETALE:
304 chip->IO_ADDR_W = info->regs + S3C2440_NFADDR;
305 break;
306
307 /* NAND_CTL_CLRCLE: */
308 /* NAND_CTL_CLRALE: */
309 default:
310 chip->IO_ADDR_W = info->regs + S3C2440_NFDATA;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 break;
312 }
313}
314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/* s3c2410_nand_devready()
316 *
317 * returns 0 if the nand is busy, 1 if it is ready
318*/
319
320static int s3c2410_nand_devready(struct mtd_info *mtd)
321{
322 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000323
Ben Dooksa4f957f2005-06-20 12:48:25 +0100324 if (info->is_s3c2440)
325 return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
327}
328
329/* ECC handling functions */
330
David Woodhousee0c7d762006-05-13 18:07:53 +0100331static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332{
David Woodhousee0c7d762006-05-13 18:07:53 +0100333 pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334
335 pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100336 read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337
David Woodhousee0c7d762006-05-13 18:07:53 +0100338 if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 return 0;
340
341 /* we curently have no method for correcting the error */
342
343 return -1;
344}
345
Ben Dooksa4f957f2005-06-20 12:48:25 +0100346/* ECC functions
347 *
348 * These allow the s3c2410 and s3c2440 to use the controller's ECC
349 * generator block to ECC the data as it passes through]
350*/
351
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
353{
354 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
355 unsigned long ctrl;
356
357 ctrl = readl(info->regs + S3C2410_NFCONF);
358 ctrl |= S3C2410_NFCONF_INITECC;
359 writel(ctrl, info->regs + S3C2410_NFCONF);
360}
361
Ben Dooksa4f957f2005-06-20 12:48:25 +0100362static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
363{
364 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
365 unsigned long ctrl;
366
367 ctrl = readl(info->regs + S3C2440_NFCONT);
368 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
369}
370
David Woodhousee0c7d762006-05-13 18:07:53 +0100371static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372{
373 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
374
375 ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0);
376 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
377 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
378
David Woodhousee0c7d762006-05-13 18:07:53 +0100379 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380
381 return 0;
382}
383
David Woodhousee0c7d762006-05-13 18:07:53 +0100384static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100385{
386 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
387 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
388
389 ecc_code[0] = ecc;
390 ecc_code[1] = ecc >> 8;
391 ecc_code[2] = ecc >> 16;
392
David Woodhousee0c7d762006-05-13 18:07:53 +0100393 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100394
395 return 0;
396}
397
Ben Dooksa4f957f2005-06-20 12:48:25 +0100398/* over-ride the standard functions for a little more speed. We can
399 * use read/write block to move the data buffers to/from the controller
400*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401
402static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
403{
404 struct nand_chip *this = mtd->priv;
405 readsb(this->IO_ADDR_R, buf, len);
406}
407
David Woodhousee0c7d762006-05-13 18:07:53 +0100408static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409{
410 struct nand_chip *this = mtd->priv;
411 writesb(this->IO_ADDR_W, buf, len);
412}
413
414/* device management functions */
415
Russell King3ae5eae2005-11-09 22:32:44 +0000416static int s3c2410_nand_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417{
Russell King3ae5eae2005-11-09 22:32:44 +0000418 struct s3c2410_nand_info *info = to_nand_info(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
Russell King3ae5eae2005-11-09 22:32:44 +0000420 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000422 if (info == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 return 0;
424
425 /* first thing we need to do is release all our mtds
426 * and their partitions, then go through freeing the
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000427 * resources used
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428 */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000429
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 if (info->mtds != NULL) {
431 struct s3c2410_nand_mtd *ptr = info->mtds;
432 int mtdno;
433
434 for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) {
435 pr_debug("releasing mtd %d (%p)\n", mtdno, ptr);
436 nand_release(&ptr->mtd);
437 }
438
439 kfree(info->mtds);
440 }
441
442 /* free the common resources */
443
444 if (info->clk != NULL && !IS_ERR(info->clk)) {
445 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 clk_put(info->clk);
447 }
448
449 if (info->regs != NULL) {
450 iounmap(info->regs);
451 info->regs = NULL;
452 }
453
454 if (info->area != NULL) {
455 release_resource(info->area);
456 kfree(info->area);
457 info->area = NULL;
458 }
459
460 kfree(info);
461
462 return 0;
463}
464
465#ifdef CONFIG_MTD_PARTITIONS
466static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
467 struct s3c2410_nand_mtd *mtd,
468 struct s3c2410_nand_set *set)
469{
470 if (set == NULL)
471 return add_mtd_device(&mtd->mtd);
472
473 if (set->nr_partitions > 0 && set->partitions != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100474 return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 }
476
477 return add_mtd_device(&mtd->mtd);
478}
479#else
480static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
481 struct s3c2410_nand_mtd *mtd,
482 struct s3c2410_nand_set *set)
483{
484 return add_mtd_device(&mtd->mtd);
485}
486#endif
487
488/* s3c2410_nand_init_chip
489 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000490 * init a single instance of an chip
Linus Torvalds1da177e2005-04-16 15:20:36 -0700491*/
492
493static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
494 struct s3c2410_nand_mtd *nmtd,
495 struct s3c2410_nand_set *set)
496{
497 struct nand_chip *chip = &nmtd->chip;
498
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000499 chip->IO_ADDR_R = info->regs + S3C2410_NFDATA;
500 chip->IO_ADDR_W = info->regs + S3C2410_NFDATA;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501 chip->hwcontrol = s3c2410_nand_hwcontrol;
502 chip->dev_ready = s3c2410_nand_devready;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 chip->write_buf = s3c2410_nand_write_buf;
504 chip->read_buf = s3c2410_nand_read_buf;
505 chip->select_chip = s3c2410_nand_select_chip;
506 chip->chip_delay = 50;
507 chip->priv = nmtd;
508 chip->options = 0;
509 chip->controller = &info->controller;
510
Ben Dooksa4f957f2005-06-20 12:48:25 +0100511 if (info->is_s3c2440) {
512 chip->IO_ADDR_R = info->regs + S3C2440_NFDATA;
513 chip->IO_ADDR_W = info->regs + S3C2440_NFDATA;
514 chip->hwcontrol = s3c2440_nand_hwcontrol;
515 }
516
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 nmtd->info = info;
518 nmtd->mtd.priv = chip;
David Woodhouse552d9202006-05-14 01:20:46 +0100519 nmtd->mtd.owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 nmtd->set = set;
521
522 if (hardware_ecc) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200523 chip->ecc.correct = s3c2410_nand_correct_data;
524 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
525 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
526 chip->ecc.mode = NAND_ECC_HW;
527 chip->ecc.size = 512;
528 chip->ecc.bytes = 3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 chip->autooob = &nand_hw_eccoob;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100530
531 if (info->is_s3c2440) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200532 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
533 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100534 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 } else {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200536 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 }
538}
539
540/* s3c2410_nand_probe
541 *
542 * called by device layer when it finds a device matching
543 * one our driver can handled. This code checks to see if
544 * it can allocate all necessary resources then calls the
545 * nand layer to look for devices
546*/
547
Russell King3ae5eae2005-11-09 22:32:44 +0000548static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549{
Russell King3ae5eae2005-11-09 22:32:44 +0000550 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 struct s3c2410_nand_info *info;
552 struct s3c2410_nand_mtd *nmtd;
553 struct s3c2410_nand_set *sets;
554 struct resource *res;
555 int err = 0;
556 int size;
557 int nr_sets;
558 int setno;
559
Russell King3ae5eae2005-11-09 22:32:44 +0000560 pr_debug("s3c2410_nand_probe(%p)\n", pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561
562 info = kmalloc(sizeof(*info), GFP_KERNEL);
563 if (info == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000564 dev_err(&pdev->dev, "no memory for flash info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 err = -ENOMEM;
566 goto exit_error;
567 }
568
569 memzero(info, sizeof(*info));
Russell King3ae5eae2005-11-09 22:32:44 +0000570 platform_set_drvdata(pdev, info);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
572 spin_lock_init(&info->controller.lock);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100573 init_waitqueue_head(&info->controller.wq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574
575 /* get the clock source and enable it */
576
Russell King3ae5eae2005-11-09 22:32:44 +0000577 info->clk = clk_get(&pdev->dev, "nand");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 if (IS_ERR(info->clk)) {
Russell King3ae5eae2005-11-09 22:32:44 +0000579 dev_err(&pdev->dev, "failed to get clock");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580 err = -ENOENT;
581 goto exit_error;
582 }
583
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 clk_enable(info->clk);
585
586 /* allocate and map the resource */
587
Ben Dooksa4f957f2005-06-20 12:48:25 +0100588 /* currently we assume we have the one resource */
589 res = pdev->resource;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590 size = res->end - res->start + 1;
591
592 info->area = request_mem_region(res->start, size, pdev->name);
593
594 if (info->area == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000595 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 err = -ENOENT;
597 goto exit_error;
598 }
599
Russell King3ae5eae2005-11-09 22:32:44 +0000600 info->device = &pdev->dev;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100601 info->platform = plat;
602 info->regs = ioremap(res->start, size);
603 info->is_s3c2440 = is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604
605 if (info->regs == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000606 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 err = -EIO;
608 goto exit_error;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000609 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610
Russell King3ae5eae2005-11-09 22:32:44 +0000611 dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612
613 /* initialise the hardware */
614
Russell King3ae5eae2005-11-09 22:32:44 +0000615 err = s3c2410_nand_inithw(info, pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 if (err != 0)
617 goto exit_error;
618
619 sets = (plat != NULL) ? plat->sets : NULL;
620 nr_sets = (plat != NULL) ? plat->nr_sets : 1;
621
622 info->mtd_count = nr_sets;
623
624 /* allocate our information */
625
626 size = nr_sets * sizeof(*info->mtds);
627 info->mtds = kmalloc(size, GFP_KERNEL);
628 if (info->mtds == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000629 dev_err(&pdev->dev, "failed to allocate mtd storage\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 err = -ENOMEM;
631 goto exit_error;
632 }
633
634 memzero(info->mtds, size);
635
636 /* initialise all possible chips */
637
638 nmtd = info->mtds;
639
640 for (setno = 0; setno < nr_sets; setno++, nmtd++) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100641 pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000642
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 s3c2410_nand_init_chip(info, nmtd, sets);
644
David Woodhousee0c7d762006-05-13 18:07:53 +0100645 nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646
647 if (nmtd->scan_res == 0) {
648 s3c2410_nand_add_partition(info, nmtd, sets);
649 }
650
651 if (sets != NULL)
652 sets++;
653 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000654
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 pr_debug("initialised ok\n");
656 return 0;
657
658 exit_error:
Russell King3ae5eae2005-11-09 22:32:44 +0000659 s3c2410_nand_remove(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660
661 if (err == 0)
662 err = -EINVAL;
663 return err;
664}
665
Ben Dooksa4f957f2005-06-20 12:48:25 +0100666/* driver device registration */
667
Russell King3ae5eae2005-11-09 22:32:44 +0000668static int s3c2410_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100669{
670 return s3c24xx_nand_probe(dev, 0);
671}
672
Russell King3ae5eae2005-11-09 22:32:44 +0000673static int s3c2440_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100674{
675 return s3c24xx_nand_probe(dev, 1);
676}
677
Russell King3ae5eae2005-11-09 22:32:44 +0000678static struct platform_driver s3c2410_nand_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 .probe = s3c2410_nand_probe,
680 .remove = s3c2410_nand_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000681 .driver = {
682 .name = "s3c2410-nand",
683 .owner = THIS_MODULE,
684 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685};
686
Russell King3ae5eae2005-11-09 22:32:44 +0000687static struct platform_driver s3c2440_nand_driver = {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100688 .probe = s3c2440_nand_probe,
689 .remove = s3c2410_nand_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000690 .driver = {
691 .name = "s3c2440-nand",
692 .owner = THIS_MODULE,
693 },
Ben Dooksa4f957f2005-06-20 12:48:25 +0100694};
695
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696static int __init s3c2410_nand_init(void)
697{
Ben Dooksa4f957f2005-06-20 12:48:25 +0100698 printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n");
699
Russell King3ae5eae2005-11-09 22:32:44 +0000700 platform_driver_register(&s3c2440_nand_driver);
701 return platform_driver_register(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702}
703
704static void __exit s3c2410_nand_exit(void)
705{
Russell King3ae5eae2005-11-09 22:32:44 +0000706 platform_driver_unregister(&s3c2440_nand_driver);
707 platform_driver_unregister(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708}
709
710module_init(s3c2410_nand_init);
711module_exit(s3c2410_nand_exit);
712
713MODULE_LICENSE("GPL");
714MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
Ben Dooksa4f957f2005-06-20 12:48:25 +0100715MODULE_DESCRIPTION("S3C24XX MTD NAND driver");