Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1 | /* |
| 2 | * libata-bmdma.c - helper library for PCI IDE BMDMA |
| 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
| 7 | * |
| 8 | * Copyright 2003-2006 Red Hat, Inc. All rights reserved. |
| 9 | * Copyright 2003-2006 Jeff Garzik |
| 10 | * |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2, or (at your option) |
| 15 | * any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; see the file COPYING. If not, write to |
| 24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | * |
| 26 | * |
| 27 | * libata documentation is available via 'make {ps|pdf}docs', |
| 28 | * as Documentation/DocBook/libata.* |
| 29 | * |
| 30 | * Hardware documentation available from http://www.t13.org/ and |
| 31 | * http://www.sata-io.org/ |
| 32 | * |
| 33 | */ |
| 34 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 35 | #include <linux/kernel.h> |
| 36 | #include <linux/pci.h> |
| 37 | #include <linux/libata.h> |
| 38 | |
| 39 | #include "libata.h" |
| 40 | |
| 41 | /** |
| 42 | * ata_tf_load_pio - send taskfile registers to host controller |
| 43 | * @ap: Port to which output is sent |
| 44 | * @tf: ATA taskfile register set |
| 45 | * |
| 46 | * Outputs ATA taskfile to standard ATA host controller. |
| 47 | * |
| 48 | * LOCKING: |
| 49 | * Inherited from caller. |
| 50 | */ |
| 51 | |
| 52 | static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
| 53 | { |
| 54 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 55 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; |
| 56 | |
| 57 | if (tf->ctl != ap->last_ctl) { |
| 58 | outb(tf->ctl, ioaddr->ctl_addr); |
| 59 | ap->last_ctl = tf->ctl; |
| 60 | ata_wait_idle(ap); |
| 61 | } |
| 62 | |
| 63 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { |
| 64 | outb(tf->hob_feature, ioaddr->feature_addr); |
| 65 | outb(tf->hob_nsect, ioaddr->nsect_addr); |
| 66 | outb(tf->hob_lbal, ioaddr->lbal_addr); |
| 67 | outb(tf->hob_lbam, ioaddr->lbam_addr); |
| 68 | outb(tf->hob_lbah, ioaddr->lbah_addr); |
| 69 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", |
| 70 | tf->hob_feature, |
| 71 | tf->hob_nsect, |
| 72 | tf->hob_lbal, |
| 73 | tf->hob_lbam, |
| 74 | tf->hob_lbah); |
| 75 | } |
| 76 | |
| 77 | if (is_addr) { |
| 78 | outb(tf->feature, ioaddr->feature_addr); |
| 79 | outb(tf->nsect, ioaddr->nsect_addr); |
| 80 | outb(tf->lbal, ioaddr->lbal_addr); |
| 81 | outb(tf->lbam, ioaddr->lbam_addr); |
| 82 | outb(tf->lbah, ioaddr->lbah_addr); |
| 83 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", |
| 84 | tf->feature, |
| 85 | tf->nsect, |
| 86 | tf->lbal, |
| 87 | tf->lbam, |
| 88 | tf->lbah); |
| 89 | } |
| 90 | |
| 91 | if (tf->flags & ATA_TFLAG_DEVICE) { |
| 92 | outb(tf->device, ioaddr->device_addr); |
| 93 | VPRINTK("device 0x%X\n", tf->device); |
| 94 | } |
| 95 | |
| 96 | ata_wait_idle(ap); |
| 97 | } |
| 98 | |
| 99 | /** |
| 100 | * ata_tf_load_mmio - send taskfile registers to host controller |
| 101 | * @ap: Port to which output is sent |
| 102 | * @tf: ATA taskfile register set |
| 103 | * |
| 104 | * Outputs ATA taskfile to standard ATA host controller using MMIO. |
| 105 | * |
| 106 | * LOCKING: |
| 107 | * Inherited from caller. |
| 108 | */ |
| 109 | |
| 110 | static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
| 111 | { |
| 112 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 113 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; |
| 114 | |
| 115 | if (tf->ctl != ap->last_ctl) { |
| 116 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); |
| 117 | ap->last_ctl = tf->ctl; |
| 118 | ata_wait_idle(ap); |
| 119 | } |
| 120 | |
| 121 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { |
| 122 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); |
| 123 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); |
| 124 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); |
| 125 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); |
| 126 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); |
| 127 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", |
| 128 | tf->hob_feature, |
| 129 | tf->hob_nsect, |
| 130 | tf->hob_lbal, |
| 131 | tf->hob_lbam, |
| 132 | tf->hob_lbah); |
| 133 | } |
| 134 | |
| 135 | if (is_addr) { |
| 136 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); |
| 137 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); |
| 138 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); |
| 139 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); |
| 140 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); |
| 141 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", |
| 142 | tf->feature, |
| 143 | tf->nsect, |
| 144 | tf->lbal, |
| 145 | tf->lbam, |
| 146 | tf->lbah); |
| 147 | } |
| 148 | |
| 149 | if (tf->flags & ATA_TFLAG_DEVICE) { |
| 150 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); |
| 151 | VPRINTK("device 0x%X\n", tf->device); |
| 152 | } |
| 153 | |
| 154 | ata_wait_idle(ap); |
| 155 | } |
| 156 | |
| 157 | |
| 158 | /** |
| 159 | * ata_tf_load - send taskfile registers to host controller |
| 160 | * @ap: Port to which output is sent |
| 161 | * @tf: ATA taskfile register set |
| 162 | * |
| 163 | * Outputs ATA taskfile to standard ATA host controller using MMIO |
| 164 | * or PIO as indicated by the ATA_FLAG_MMIO flag. |
| 165 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. |
| 166 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, |
| 167 | * hob_lbal, hob_lbam, and hob_lbah. |
| 168 | * |
| 169 | * This function waits for idle (!BUSY and !DRQ) after writing |
| 170 | * registers. If the control register has a new value, this |
| 171 | * function also waits for idle after writing control and before |
| 172 | * writing the remaining registers. |
| 173 | * |
| 174 | * May be used as the tf_load() entry in ata_port_operations. |
| 175 | * |
| 176 | * LOCKING: |
| 177 | * Inherited from caller. |
| 178 | */ |
| 179 | void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) |
| 180 | { |
| 181 | if (ap->flags & ATA_FLAG_MMIO) |
| 182 | ata_tf_load_mmio(ap, tf); |
| 183 | else |
| 184 | ata_tf_load_pio(ap, tf); |
| 185 | } |
| 186 | |
| 187 | /** |
| 188 | * ata_exec_command_pio - issue ATA command to host controller |
| 189 | * @ap: port to which command is being issued |
| 190 | * @tf: ATA taskfile register set |
| 191 | * |
| 192 | * Issues PIO write to ATA command register, with proper |
| 193 | * synchronization with interrupt handler / other threads. |
| 194 | * |
| 195 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 196 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 197 | */ |
| 198 | |
| 199 | static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
| 200 | { |
| 201 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); |
| 202 | |
| 203 | outb(tf->command, ap->ioaddr.command_addr); |
| 204 | ata_pause(ap); |
| 205 | } |
| 206 | |
| 207 | |
| 208 | /** |
| 209 | * ata_exec_command_mmio - issue ATA command to host controller |
| 210 | * @ap: port to which command is being issued |
| 211 | * @tf: ATA taskfile register set |
| 212 | * |
| 213 | * Issues MMIO write to ATA command register, with proper |
| 214 | * synchronization with interrupt handler / other threads. |
| 215 | * |
Alan Cox | 7c74ffd | 2006-03-22 15:47:34 +0000 | [diff] [blame] | 216 | * FIXME: missing write posting for 400nS delay enforcement |
| 217 | * |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 218 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 219 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 220 | */ |
| 221 | |
| 222 | static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
| 223 | { |
| 224 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); |
| 225 | |
| 226 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); |
| 227 | ata_pause(ap); |
| 228 | } |
| 229 | |
| 230 | |
| 231 | /** |
| 232 | * ata_exec_command - issue ATA command to host controller |
| 233 | * @ap: port to which command is being issued |
| 234 | * @tf: ATA taskfile register set |
| 235 | * |
| 236 | * Issues PIO/MMIO write to ATA command register, with proper |
| 237 | * synchronization with interrupt handler / other threads. |
| 238 | * |
| 239 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 240 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 241 | */ |
| 242 | void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) |
| 243 | { |
| 244 | if (ap->flags & ATA_FLAG_MMIO) |
| 245 | ata_exec_command_mmio(ap, tf); |
| 246 | else |
| 247 | ata_exec_command_pio(ap, tf); |
| 248 | } |
| 249 | |
| 250 | /** |
| 251 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
| 252 | * @ap: Port from which input is read |
| 253 | * @tf: ATA taskfile register set for storing input |
| 254 | * |
| 255 | * Reads ATA taskfile registers for currently-selected device |
| 256 | * into @tf. |
| 257 | * |
| 258 | * LOCKING: |
| 259 | * Inherited from caller. |
| 260 | */ |
| 261 | |
| 262 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) |
| 263 | { |
| 264 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 265 | |
| 266 | tf->command = ata_check_status(ap); |
| 267 | tf->feature = inb(ioaddr->error_addr); |
| 268 | tf->nsect = inb(ioaddr->nsect_addr); |
| 269 | tf->lbal = inb(ioaddr->lbal_addr); |
| 270 | tf->lbam = inb(ioaddr->lbam_addr); |
| 271 | tf->lbah = inb(ioaddr->lbah_addr); |
| 272 | tf->device = inb(ioaddr->device_addr); |
| 273 | |
| 274 | if (tf->flags & ATA_TFLAG_LBA48) { |
| 275 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); |
| 276 | tf->hob_feature = inb(ioaddr->error_addr); |
| 277 | tf->hob_nsect = inb(ioaddr->nsect_addr); |
| 278 | tf->hob_lbal = inb(ioaddr->lbal_addr); |
| 279 | tf->hob_lbam = inb(ioaddr->lbam_addr); |
| 280 | tf->hob_lbah = inb(ioaddr->lbah_addr); |
| 281 | } |
| 282 | } |
| 283 | |
| 284 | /** |
| 285 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers |
| 286 | * @ap: Port from which input is read |
| 287 | * @tf: ATA taskfile register set for storing input |
| 288 | * |
| 289 | * Reads ATA taskfile registers for currently-selected device |
| 290 | * into @tf via MMIO. |
| 291 | * |
| 292 | * LOCKING: |
| 293 | * Inherited from caller. |
| 294 | */ |
| 295 | |
| 296 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) |
| 297 | { |
| 298 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 299 | |
| 300 | tf->command = ata_check_status(ap); |
| 301 | tf->feature = readb((void __iomem *)ioaddr->error_addr); |
| 302 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); |
| 303 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); |
| 304 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); |
| 305 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); |
| 306 | tf->device = readb((void __iomem *)ioaddr->device_addr); |
| 307 | |
| 308 | if (tf->flags & ATA_TFLAG_LBA48) { |
| 309 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); |
| 310 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); |
| 311 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); |
| 312 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); |
| 313 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); |
| 314 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); |
| 315 | } |
| 316 | } |
| 317 | |
| 318 | |
| 319 | /** |
| 320 | * ata_tf_read - input device's ATA taskfile shadow registers |
| 321 | * @ap: Port from which input is read |
| 322 | * @tf: ATA taskfile register set for storing input |
| 323 | * |
| 324 | * Reads ATA taskfile registers for currently-selected device |
| 325 | * into @tf. |
| 326 | * |
| 327 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 |
| 328 | * is set, also reads the hob registers. |
| 329 | * |
| 330 | * May be used as the tf_read() entry in ata_port_operations. |
| 331 | * |
| 332 | * LOCKING: |
| 333 | * Inherited from caller. |
| 334 | */ |
| 335 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
| 336 | { |
| 337 | if (ap->flags & ATA_FLAG_MMIO) |
| 338 | ata_tf_read_mmio(ap, tf); |
| 339 | else |
| 340 | ata_tf_read_pio(ap, tf); |
| 341 | } |
| 342 | |
| 343 | /** |
| 344 | * ata_check_status_pio - Read device status reg & clear interrupt |
| 345 | * @ap: port where the device is |
| 346 | * |
| 347 | * Reads ATA taskfile status register for currently-selected device |
| 348 | * and return its value. This also clears pending interrupts |
| 349 | * from this device |
| 350 | * |
| 351 | * LOCKING: |
| 352 | * Inherited from caller. |
| 353 | */ |
| 354 | static u8 ata_check_status_pio(struct ata_port *ap) |
| 355 | { |
| 356 | return inb(ap->ioaddr.status_addr); |
| 357 | } |
| 358 | |
| 359 | /** |
| 360 | * ata_check_status_mmio - Read device status reg & clear interrupt |
| 361 | * @ap: port where the device is |
| 362 | * |
| 363 | * Reads ATA taskfile status register for currently-selected device |
| 364 | * via MMIO and return its value. This also clears pending interrupts |
| 365 | * from this device |
| 366 | * |
| 367 | * LOCKING: |
| 368 | * Inherited from caller. |
| 369 | */ |
| 370 | static u8 ata_check_status_mmio(struct ata_port *ap) |
| 371 | { |
| 372 | return readb((void __iomem *) ap->ioaddr.status_addr); |
| 373 | } |
| 374 | |
| 375 | |
| 376 | /** |
| 377 | * ata_check_status - Read device status reg & clear interrupt |
| 378 | * @ap: port where the device is |
| 379 | * |
| 380 | * Reads ATA taskfile status register for currently-selected device |
| 381 | * and return its value. This also clears pending interrupts |
| 382 | * from this device |
| 383 | * |
| 384 | * May be used as the check_status() entry in ata_port_operations. |
| 385 | * |
| 386 | * LOCKING: |
| 387 | * Inherited from caller. |
| 388 | */ |
| 389 | u8 ata_check_status(struct ata_port *ap) |
| 390 | { |
| 391 | if (ap->flags & ATA_FLAG_MMIO) |
| 392 | return ata_check_status_mmio(ap); |
| 393 | return ata_check_status_pio(ap); |
| 394 | } |
| 395 | |
| 396 | |
| 397 | /** |
| 398 | * ata_altstatus - Read device alternate status reg |
| 399 | * @ap: port where the device is |
| 400 | * |
| 401 | * Reads ATA taskfile alternate status register for |
| 402 | * currently-selected device and return its value. |
| 403 | * |
| 404 | * Note: may NOT be used as the check_altstatus() entry in |
| 405 | * ata_port_operations. |
| 406 | * |
| 407 | * LOCKING: |
| 408 | * Inherited from caller. |
| 409 | */ |
| 410 | u8 ata_altstatus(struct ata_port *ap) |
| 411 | { |
| 412 | if (ap->ops->check_altstatus) |
| 413 | return ap->ops->check_altstatus(ap); |
| 414 | |
| 415 | if (ap->flags & ATA_FLAG_MMIO) |
| 416 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); |
| 417 | return inb(ap->ioaddr.altstatus_addr); |
| 418 | } |
| 419 | |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 420 | /** |
| 421 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
| 422 | * @qc: Info associated with this ATA transaction. |
| 423 | * |
| 424 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 425 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 426 | */ |
| 427 | |
| 428 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) |
| 429 | { |
| 430 | struct ata_port *ap = qc->ap; |
| 431 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); |
| 432 | u8 dmactl; |
| 433 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; |
| 434 | |
| 435 | /* load PRD table addr. */ |
| 436 | mb(); /* make sure PRD table writes are visible to controller */ |
| 437 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); |
| 438 | |
| 439 | /* specify data direction, triple-check start bit is clear */ |
| 440 | dmactl = readb(mmio + ATA_DMA_CMD); |
| 441 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); |
| 442 | if (!rw) |
| 443 | dmactl |= ATA_DMA_WR; |
| 444 | writeb(dmactl, mmio + ATA_DMA_CMD); |
| 445 | |
| 446 | /* issue r/w command */ |
| 447 | ap->ops->exec_command(ap, &qc->tf); |
| 448 | } |
| 449 | |
| 450 | /** |
| 451 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
| 452 | * @qc: Info associated with this ATA transaction. |
| 453 | * |
| 454 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 455 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 456 | */ |
| 457 | |
| 458 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) |
| 459 | { |
| 460 | struct ata_port *ap = qc->ap; |
| 461 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; |
| 462 | u8 dmactl; |
| 463 | |
| 464 | /* start host DMA transaction */ |
| 465 | dmactl = readb(mmio + ATA_DMA_CMD); |
| 466 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); |
| 467 | |
| 468 | /* Strictly, one may wish to issue a readb() here, to |
| 469 | * flush the mmio write. However, control also passes |
| 470 | * to the hardware at this point, and it will interrupt |
| 471 | * us when we are to resume control. So, in effect, |
| 472 | * we don't care when the mmio write flushes. |
| 473 | * Further, a read of the DMA status register _immediately_ |
| 474 | * following the write may not be what certain flaky hardware |
| 475 | * is expected, so I think it is best to not add a readb() |
| 476 | * without first all the MMIO ATA cards/mobos. |
| 477 | * Or maybe I'm just being paranoid. |
| 478 | */ |
| 479 | } |
| 480 | |
| 481 | /** |
| 482 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) |
| 483 | * @qc: Info associated with this ATA transaction. |
| 484 | * |
| 485 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 486 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 487 | */ |
| 488 | |
| 489 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) |
| 490 | { |
| 491 | struct ata_port *ap = qc->ap; |
| 492 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); |
| 493 | u8 dmactl; |
| 494 | |
| 495 | /* load PRD table addr. */ |
| 496 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); |
| 497 | |
| 498 | /* specify data direction, triple-check start bit is clear */ |
| 499 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 500 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); |
| 501 | if (!rw) |
| 502 | dmactl |= ATA_DMA_WR; |
| 503 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 504 | |
| 505 | /* issue r/w command */ |
| 506 | ap->ops->exec_command(ap, &qc->tf); |
| 507 | } |
| 508 | |
| 509 | /** |
| 510 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) |
| 511 | * @qc: Info associated with this ATA transaction. |
| 512 | * |
| 513 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 514 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 515 | */ |
| 516 | |
| 517 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) |
| 518 | { |
| 519 | struct ata_port *ap = qc->ap; |
| 520 | u8 dmactl; |
| 521 | |
| 522 | /* start host DMA transaction */ |
| 523 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 524 | outb(dmactl | ATA_DMA_START, |
| 525 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 526 | } |
| 527 | |
| 528 | |
| 529 | /** |
| 530 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction |
| 531 | * @qc: Info associated with this ATA transaction. |
| 532 | * |
| 533 | * Writes the ATA_DMA_START flag to the DMA command register. |
| 534 | * |
| 535 | * May be used as the bmdma_start() entry in ata_port_operations. |
| 536 | * |
| 537 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 538 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 539 | */ |
| 540 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
| 541 | { |
| 542 | if (qc->ap->flags & ATA_FLAG_MMIO) |
| 543 | ata_bmdma_start_mmio(qc); |
| 544 | else |
| 545 | ata_bmdma_start_pio(qc); |
| 546 | } |
| 547 | |
| 548 | |
| 549 | /** |
| 550 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction |
| 551 | * @qc: Info associated with this ATA transaction. |
| 552 | * |
| 553 | * Writes address of PRD table to device's PRD Table Address |
| 554 | * register, sets the DMA control register, and calls |
| 555 | * ops->exec_command() to start the transfer. |
| 556 | * |
| 557 | * May be used as the bmdma_setup() entry in ata_port_operations. |
| 558 | * |
| 559 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 560 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 561 | */ |
| 562 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
| 563 | { |
| 564 | if (qc->ap->flags & ATA_FLAG_MMIO) |
| 565 | ata_bmdma_setup_mmio(qc); |
| 566 | else |
| 567 | ata_bmdma_setup_pio(qc); |
| 568 | } |
| 569 | |
| 570 | |
| 571 | /** |
| 572 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. |
| 573 | * @ap: Port associated with this ATA transaction. |
| 574 | * |
| 575 | * Clear interrupt and error flags in DMA status register. |
| 576 | * |
| 577 | * May be used as the irq_clear() entry in ata_port_operations. |
| 578 | * |
| 579 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 580 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 581 | */ |
| 582 | |
| 583 | void ata_bmdma_irq_clear(struct ata_port *ap) |
| 584 | { |
| 585 | if (!ap->ioaddr.bmdma_addr) |
| 586 | return; |
| 587 | |
| 588 | if (ap->flags & ATA_FLAG_MMIO) { |
| 589 | void __iomem *mmio = |
| 590 | ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; |
| 591 | writeb(readb(mmio), mmio); |
| 592 | } else { |
| 593 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; |
| 594 | outb(inb(addr), addr); |
| 595 | } |
| 596 | } |
| 597 | |
| 598 | |
| 599 | /** |
| 600 | * ata_bmdma_status - Read PCI IDE BMDMA status |
| 601 | * @ap: Port associated with this ATA transaction. |
| 602 | * |
| 603 | * Read and return BMDMA status register. |
| 604 | * |
| 605 | * May be used as the bmdma_status() entry in ata_port_operations. |
| 606 | * |
| 607 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 608 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 609 | */ |
| 610 | |
| 611 | u8 ata_bmdma_status(struct ata_port *ap) |
| 612 | { |
| 613 | u8 host_stat; |
| 614 | if (ap->flags & ATA_FLAG_MMIO) { |
| 615 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; |
| 616 | host_stat = readb(mmio + ATA_DMA_STATUS); |
| 617 | } else |
| 618 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
| 619 | return host_stat; |
| 620 | } |
| 621 | |
| 622 | |
| 623 | /** |
| 624 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer |
| 625 | * @qc: Command we are ending DMA for |
| 626 | * |
| 627 | * Clears the ATA_DMA_START flag in the dma control register |
| 628 | * |
| 629 | * May be used as the bmdma_stop() entry in ata_port_operations. |
| 630 | * |
| 631 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 632 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 633 | */ |
| 634 | |
| 635 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
| 636 | { |
| 637 | struct ata_port *ap = qc->ap; |
| 638 | if (ap->flags & ATA_FLAG_MMIO) { |
| 639 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; |
| 640 | |
| 641 | /* clear start/stop bit */ |
| 642 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, |
| 643 | mmio + ATA_DMA_CMD); |
| 644 | } else { |
| 645 | /* clear start/stop bit */ |
| 646 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, |
| 647 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 648 | } |
| 649 | |
| 650 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ |
| 651 | ata_altstatus(ap); /* dummy read */ |
| 652 | } |
| 653 | |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 654 | /** |
| 655 | * ata_bmdma_freeze - Freeze BMDMA controller port |
| 656 | * @ap: port to freeze |
| 657 | * |
| 658 | * Freeze BMDMA controller port. |
| 659 | * |
| 660 | * LOCKING: |
| 661 | * Inherited from caller. |
| 662 | */ |
| 663 | void ata_bmdma_freeze(struct ata_port *ap) |
| 664 | { |
| 665 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 666 | |
| 667 | ap->ctl |= ATA_NIEN; |
| 668 | ap->last_ctl = ap->ctl; |
| 669 | |
| 670 | if (ap->flags & ATA_FLAG_MMIO) |
| 671 | writeb(ap->ctl, (void __iomem *)ioaddr->ctl_addr); |
| 672 | else |
| 673 | outb(ap->ctl, ioaddr->ctl_addr); |
| 674 | } |
| 675 | |
| 676 | /** |
| 677 | * ata_bmdma_thaw - Thaw BMDMA controller port |
| 678 | * @ap: port to thaw |
| 679 | * |
| 680 | * Thaw BMDMA controller port. |
| 681 | * |
| 682 | * LOCKING: |
| 683 | * Inherited from caller. |
| 684 | */ |
| 685 | void ata_bmdma_thaw(struct ata_port *ap) |
| 686 | { |
| 687 | /* clear & re-enable interrupts */ |
| 688 | ata_chk_status(ap); |
| 689 | ap->ops->irq_clear(ap); |
| 690 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ |
| 691 | ata_irq_on(ap); |
| 692 | } |
| 693 | |
| 694 | /** |
| 695 | * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller |
| 696 | * @ap: port to handle error for |
Tejun Heo | f5914a4 | 2006-05-31 18:27:48 +0900 | [diff] [blame] | 697 | * @prereset: prereset method (can be NULL) |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 698 | * @softreset: softreset method (can be NULL) |
| 699 | * @hardreset: hardreset method (can be NULL) |
| 700 | * @postreset: postreset method (can be NULL) |
| 701 | * |
| 702 | * Handle error for ATA BMDMA controller. It can handle both |
| 703 | * PATA and SATA controllers. Many controllers should be able to |
| 704 | * use this EH as-is or with some added handling before and |
| 705 | * after. |
| 706 | * |
| 707 | * This function is intended to be used for constructing |
| 708 | * ->error_handler callback by low level drivers. |
| 709 | * |
| 710 | * LOCKING: |
| 711 | * Kernel thread context (may sleep) |
| 712 | */ |
Tejun Heo | f5914a4 | 2006-05-31 18:27:48 +0900 | [diff] [blame] | 713 | void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, |
| 714 | ata_reset_fn_t softreset, ata_reset_fn_t hardreset, |
| 715 | ata_postreset_fn_t postreset) |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 716 | { |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 717 | struct ata_eh_context *ehc = &ap->eh_context; |
| 718 | struct ata_queued_cmd *qc; |
| 719 | unsigned long flags; |
| 720 | int thaw = 0; |
| 721 | |
| 722 | qc = __ata_qc_from_tag(ap, ap->active_tag); |
| 723 | if (qc && !(qc->flags & ATA_QCFLAG_FAILED)) |
| 724 | qc = NULL; |
| 725 | |
| 726 | /* reset PIO HSM and stop DMA engine */ |
Jeff Garzik | ba6a130 | 2006-06-22 23:46:10 -0400 | [diff] [blame] | 727 | spin_lock_irqsave(ap->lock, flags); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 728 | |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 729 | ap->hsm_task_state = HSM_ST_IDLE; |
| 730 | |
| 731 | if (qc && (qc->tf.protocol == ATA_PROT_DMA || |
| 732 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) { |
| 733 | u8 host_stat; |
| 734 | |
| 735 | host_stat = ata_bmdma_status(ap); |
| 736 | |
| 737 | ata_ehi_push_desc(&ehc->i, "BMDMA stat 0x%x", host_stat); |
| 738 | |
| 739 | /* BMDMA controllers indicate host bus error by |
| 740 | * setting DMA_ERR bit and timing out. As it wasn't |
| 741 | * really a timeout event, adjust error mask and |
| 742 | * cancel frozen state. |
| 743 | */ |
| 744 | if (qc->err_mask == AC_ERR_TIMEOUT && host_stat & ATA_DMA_ERR) { |
| 745 | qc->err_mask = AC_ERR_HOST_BUS; |
| 746 | thaw = 1; |
| 747 | } |
| 748 | |
| 749 | ap->ops->bmdma_stop(qc); |
| 750 | } |
| 751 | |
| 752 | ata_altstatus(ap); |
| 753 | ata_chk_status(ap); |
| 754 | ap->ops->irq_clear(ap); |
| 755 | |
Jeff Garzik | ba6a130 | 2006-06-22 23:46:10 -0400 | [diff] [blame] | 756 | spin_unlock_irqrestore(ap->lock, flags); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 757 | |
| 758 | if (thaw) |
| 759 | ata_eh_thaw_port(ap); |
| 760 | |
| 761 | /* PIO and DMA engines have been stopped, perform recovery */ |
Tejun Heo | f5914a4 | 2006-05-31 18:27:48 +0900 | [diff] [blame] | 762 | ata_do_eh(ap, prereset, softreset, hardreset, postreset); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 763 | } |
| 764 | |
| 765 | /** |
| 766 | * ata_bmdma_error_handler - Stock error handler for BMDMA controller |
| 767 | * @ap: port to handle error for |
| 768 | * |
| 769 | * Stock error handler for BMDMA controller. |
| 770 | * |
| 771 | * LOCKING: |
| 772 | * Kernel thread context (may sleep) |
| 773 | */ |
| 774 | void ata_bmdma_error_handler(struct ata_port *ap) |
| 775 | { |
| 776 | ata_reset_fn_t hardreset; |
| 777 | |
| 778 | hardreset = NULL; |
| 779 | if (sata_scr_valid(ap)) |
| 780 | hardreset = sata_std_hardreset; |
| 781 | |
Tejun Heo | f5914a4 | 2006-05-31 18:27:48 +0900 | [diff] [blame] | 782 | ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, hardreset, |
| 783 | ata_std_postreset); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 784 | } |
| 785 | |
| 786 | /** |
| 787 | * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for |
| 788 | * BMDMA controller |
| 789 | * @qc: internal command to clean up |
| 790 | * |
| 791 | * LOCKING: |
| 792 | * Kernel thread context (may sleep) |
| 793 | */ |
| 794 | void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc) |
| 795 | { |
| 796 | ata_bmdma_stop(qc); |
| 797 | } |
| 798 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 799 | #ifdef CONFIG_PCI |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 800 | /** |
| 801 | * ata_pci_init_native_mode - Initialize native-mode driver |
| 802 | * @pdev: pci device to be initialized |
| 803 | * @port: array[2] of pointers to port info structures. |
| 804 | * @ports: bitmap of ports present |
| 805 | * |
| 806 | * Utility function which allocates and initializes an |
| 807 | * ata_probe_ent structure for a standard dual-port |
| 808 | * PIO-based IDE controller. The returned ata_probe_ent |
| 809 | * structure can be passed to ata_device_add(). The returned |
| 810 | * ata_probe_ent structure should then be freed with kfree(). |
| 811 | * |
| 812 | * The caller need only pass the address of the primary port, the |
| 813 | * secondary will be deduced automatically. If the device has non |
| 814 | * standard secondary port mappings this function can be called twice, |
| 815 | * once for each interface. |
| 816 | */ |
| 817 | |
| 818 | struct ata_probe_ent * |
| 819 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
| 820 | { |
| 821 | struct ata_probe_ent *probe_ent = |
| 822 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); |
| 823 | int p = 0; |
Alan Cox | 4e5ec5d | 2006-03-27 18:42:40 +0100 | [diff] [blame] | 824 | unsigned long bmdma; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 825 | |
| 826 | if (!probe_ent) |
| 827 | return NULL; |
| 828 | |
| 829 | probe_ent->irq = pdev->irq; |
Thomas Gleixner | 1d6f359 | 2006-07-01 19:29:42 -0700 | [diff] [blame] | 830 | probe_ent->irq_flags = IRQF_SHARED; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 831 | |
| 832 | if (ports & ATA_PORT_PRIMARY) { |
| 833 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); |
| 834 | probe_ent->port[p].altstatus_addr = |
| 835 | probe_ent->port[p].ctl_addr = |
| 836 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; |
Alan Cox | 4e5ec5d | 2006-03-27 18:42:40 +0100 | [diff] [blame] | 837 | bmdma = pci_resource_start(pdev, 4); |
| 838 | if (bmdma) { |
| 839 | if (inb(bmdma + 2) & 0x80) |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 840 | probe_ent->_host_flags |= ATA_HOST_SIMPLEX; |
Alan Cox | 4e5ec5d | 2006-03-27 18:42:40 +0100 | [diff] [blame] | 841 | probe_ent->port[p].bmdma_addr = bmdma; |
| 842 | } |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 843 | ata_std_ports(&probe_ent->port[p]); |
| 844 | p++; |
| 845 | } |
| 846 | |
| 847 | if (ports & ATA_PORT_SECONDARY) { |
| 848 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); |
| 849 | probe_ent->port[p].altstatus_addr = |
| 850 | probe_ent->port[p].ctl_addr = |
| 851 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; |
Alan Cox | 4e5ec5d | 2006-03-27 18:42:40 +0100 | [diff] [blame] | 852 | bmdma = pci_resource_start(pdev, 4); |
| 853 | if (bmdma) { |
| 854 | bmdma += 8; |
| 855 | if(inb(bmdma + 2) & 0x80) |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 856 | probe_ent->_host_flags |= ATA_HOST_SIMPLEX; |
Alan Cox | 4e5ec5d | 2006-03-27 18:42:40 +0100 | [diff] [blame] | 857 | probe_ent->port[p].bmdma_addr = bmdma; |
| 858 | } |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 859 | ata_std_ports(&probe_ent->port[p]); |
Tejun Heo | fea63e3 | 2006-09-16 03:04:15 +0900 | [diff] [blame] | 860 | probe_ent->pinfo2 = port[1]; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 861 | p++; |
| 862 | } |
| 863 | |
| 864 | probe_ent->n_ports = p; |
| 865 | return probe_ent; |
| 866 | } |
| 867 | |
| 868 | |
| 869 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 870 | struct ata_port_info **port, int port_mask) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 871 | { |
| 872 | struct ata_probe_ent *probe_ent; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 873 | unsigned long bmdma = pci_resource_start(pdev, 4); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 874 | |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 875 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 876 | if (!probe_ent) |
| 877 | return NULL; |
| 878 | |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 879 | probe_ent->n_ports = 2; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 880 | |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 881 | if (port_mask & ATA_PORT_PRIMARY) { |
Alan Cox | daac0ac | 2006-09-26 17:55:37 +0100 | [diff] [blame] | 882 | probe_ent->irq = ATA_PRIMARY_IRQ; |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 883 | probe_ent->port[0].cmd_addr = ATA_PRIMARY_CMD; |
| 884 | probe_ent->port[0].altstatus_addr = |
| 885 | probe_ent->port[0].ctl_addr = ATA_PRIMARY_CTL; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 886 | if (bmdma) { |
| 887 | probe_ent->port[0].bmdma_addr = bmdma; |
| 888 | if (inb(bmdma + 2) & 0x80) |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 889 | probe_ent->_host_flags |= ATA_HOST_SIMPLEX; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 890 | } |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 891 | ata_std_ports(&probe_ent->port[0]); |
| 892 | } else |
| 893 | probe_ent->dummy_port_mask |= ATA_PORT_PRIMARY; |
| 894 | |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 895 | if (port_mask & ATA_PORT_SECONDARY) { |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 896 | if (probe_ent->irq) |
Alan Cox | daac0ac | 2006-09-26 17:55:37 +0100 | [diff] [blame] | 897 | probe_ent->irq2 = ATA_SECONDARY_IRQ; |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 898 | else |
Jeff Garzik | fb46330 | 2006-09-26 17:16:32 -0400 | [diff] [blame] | 899 | probe_ent->irq = ATA_SECONDARY_IRQ; |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 900 | probe_ent->port[1].cmd_addr = ATA_SECONDARY_CMD; |
| 901 | probe_ent->port[1].altstatus_addr = |
| 902 | probe_ent->port[1].ctl_addr = ATA_SECONDARY_CTL; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 903 | if (bmdma) { |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 904 | probe_ent->port[1].bmdma_addr = bmdma + 8; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 905 | if (inb(bmdma + 10) & 0x80) |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 906 | probe_ent->_host_flags |= ATA_HOST_SIMPLEX; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 907 | } |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 908 | ata_std_ports(&probe_ent->port[1]); |
Jeff Garzik | d639ca9 | 2006-09-28 03:48:18 -0400 | [diff] [blame] | 909 | |
| 910 | /* FIXME: could be pointing to stack area; must copy */ |
Tejun Heo | fea63e3 | 2006-09-16 03:04:15 +0900 | [diff] [blame] | 911 | probe_ent->pinfo2 = port[1]; |
Tejun Heo | c4b01f1 | 2006-08-10 16:59:14 +0900 | [diff] [blame] | 912 | } else |
| 913 | probe_ent->dummy_port_mask |= ATA_PORT_SECONDARY; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 914 | |
| 915 | return probe_ent; |
| 916 | } |
| 917 | |
| 918 | |
| 919 | /** |
| 920 | * ata_pci_init_one - Initialize/register PCI IDE host controller |
| 921 | * @pdev: Controller to be initialized |
| 922 | * @port_info: Information from low-level host driver |
| 923 | * @n_ports: Number of ports attached to host controller |
| 924 | * |
| 925 | * This is a helper function which can be called from a driver's |
| 926 | * xxx_init_one() probe function if the hardware uses traditional |
| 927 | * IDE taskfile registers. |
| 928 | * |
| 929 | * This function calls pci_enable_device(), reserves its register |
| 930 | * regions, sets the dma mask, enables bus master mode, and calls |
| 931 | * ata_device_add() |
| 932 | * |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 933 | * ASSUMPTION: |
| 934 | * Nobody makes a single channel controller that appears solely as |
| 935 | * the secondary legacy port on PCI. |
| 936 | * |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 937 | * LOCKING: |
| 938 | * Inherited from PCI layer (may sleep). |
| 939 | * |
| 940 | * RETURNS: |
| 941 | * Zero on success, negative on errno-based value on error. |
| 942 | */ |
| 943 | |
| 944 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, |
| 945 | unsigned int n_ports) |
| 946 | { |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 947 | struct ata_probe_ent *probe_ent = NULL; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 948 | struct ata_port_info *port[2]; |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 949 | u8 mask; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 950 | unsigned int legacy_mode = 0; |
| 951 | int disable_dev_on_err = 1; |
| 952 | int rc; |
| 953 | |
| 954 | DPRINTK("ENTER\n"); |
| 955 | |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 956 | BUG_ON(n_ports < 1 || n_ports > 2); |
| 957 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 958 | port[0] = port_info[0]; |
| 959 | if (n_ports > 1) |
| 960 | port[1] = port_info[1]; |
| 961 | else |
| 962 | port[1] = port[0]; |
| 963 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 964 | /* FIXME: Really for ATA it isn't safe because the device may be |
| 965 | multi-purpose and we want to leave it alone if it was already |
| 966 | enabled. Secondly for shared use as Arjan says we want refcounting |
| 967 | |
| 968 | Checking dev->is_enabled is insufficient as this is not set at |
| 969 | boot for the primary video which is BIOS enabled |
| 970 | */ |
| 971 | |
| 972 | rc = pci_enable_device(pdev); |
| 973 | if (rc) |
| 974 | return rc; |
| 975 | |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 976 | if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { |
| 977 | u8 tmp8; |
| 978 | |
| 979 | /* TODO: What if one channel is in native mode ... */ |
| 980 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
| 981 | mask = (1 << 2) | (1 << 0); |
| 982 | if ((tmp8 & mask) != mask) |
| 983 | legacy_mode = (1 << 3); |
Alan Cox | 8eb166b | 2006-10-16 16:24:50 +0100 | [diff] [blame] | 984 | #if defined(CONFIG_NO_ATA_LEGACY) |
| 985 | /* Some platforms with PCI limits cannot address compat |
| 986 | port space. In that case we punt if their firmware has |
| 987 | left a device in compatibility mode */ |
| 988 | if (legacy_mode) { |
| 989 | printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n"); |
| 990 | return -EOPNOTSUPP; |
| 991 | } |
| 992 | #endif |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 993 | } |
| 994 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 995 | rc = pci_request_regions(pdev, DRV_NAME); |
| 996 | if (rc) { |
| 997 | disable_dev_on_err = 0; |
| 998 | goto err_out; |
| 999 | } |
| 1000 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1001 | if (legacy_mode) { |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1002 | if (!request_region(ATA_PRIMARY_CMD, 8, "libata")) { |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1003 | struct resource *conflict, res; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1004 | res.start = ATA_PRIMARY_CMD; |
| 1005 | res.end = ATA_PRIMARY_CMD + 8 - 1; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1006 | conflict = ____request_resource(&ioport_resource, &res); |
Arnaud Patard | cb60736 | 2006-09-19 00:23:52 -0400 | [diff] [blame] | 1007 | while (conflict->child) |
| 1008 | conflict = ____request_resource(conflict, &res); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1009 | if (!strcmp(conflict->name, "libata")) |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1010 | legacy_mode |= ATA_PORT_PRIMARY; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1011 | else { |
| 1012 | disable_dev_on_err = 0; |
Jeff Garzik | a64f97f | 2006-09-19 00:25:50 -0400 | [diff] [blame] | 1013 | printk(KERN_WARNING "ata: 0x%0X IDE port busy\n" \ |
| 1014 | "ata: conflict with %s\n", |
| 1015 | ATA_PRIMARY_CMD, |
| 1016 | conflict->name); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1017 | } |
| 1018 | } else |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1019 | legacy_mode |= ATA_PORT_PRIMARY; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1020 | |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1021 | if (!request_region(ATA_SECONDARY_CMD, 8, "libata")) { |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1022 | struct resource *conflict, res; |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1023 | res.start = ATA_SECONDARY_CMD; |
| 1024 | res.end = ATA_SECONDARY_CMD + 8 - 1; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1025 | conflict = ____request_resource(&ioport_resource, &res); |
Arnaud Patard | cb60736 | 2006-09-19 00:23:52 -0400 | [diff] [blame] | 1026 | while (conflict->child) |
| 1027 | conflict = ____request_resource(conflict, &res); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1028 | if (!strcmp(conflict->name, "libata")) |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1029 | legacy_mode |= ATA_PORT_SECONDARY; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1030 | else { |
| 1031 | disable_dev_on_err = 0; |
Jeff Garzik | a64f97f | 2006-09-19 00:25:50 -0400 | [diff] [blame] | 1032 | printk(KERN_WARNING "ata: 0x%X IDE port busy\n" \ |
| 1033 | "ata: conflict with %s\n", |
| 1034 | ATA_SECONDARY_CMD, |
| 1035 | conflict->name); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1036 | } |
| 1037 | } else |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1038 | legacy_mode |= ATA_PORT_SECONDARY; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1039 | } |
| 1040 | |
| 1041 | /* we have legacy mode, but all ports are unavailable */ |
| 1042 | if (legacy_mode == (1 << 3)) { |
| 1043 | rc = -EBUSY; |
| 1044 | goto err_out_regions; |
| 1045 | } |
| 1046 | |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 1047 | /* TODO: If we get no DMA mask we should fall back to PIO */ |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1048 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 1049 | if (rc) |
| 1050 | goto err_out_regions; |
| 1051 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 1052 | if (rc) |
| 1053 | goto err_out_regions; |
| 1054 | |
| 1055 | if (legacy_mode) { |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1056 | probe_ent = ata_pci_init_legacy_port(pdev, port, legacy_mode); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1057 | } else { |
| 1058 | if (n_ports == 2) |
| 1059 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); |
| 1060 | else |
| 1061 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); |
| 1062 | } |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1063 | if (!probe_ent) { |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1064 | rc = -ENOMEM; |
| 1065 | goto err_out_regions; |
| 1066 | } |
| 1067 | |
| 1068 | pci_set_master(pdev); |
| 1069 | |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 1070 | if (!ata_device_add(probe_ent)) { |
| 1071 | rc = -ENODEV; |
| 1072 | goto err_out_ent; |
| 1073 | } |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1074 | |
| 1075 | kfree(probe_ent); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1076 | |
| 1077 | return 0; |
| 1078 | |
Jeff Garzik | c791c30 | 2006-09-28 03:40:11 -0400 | [diff] [blame] | 1079 | err_out_ent: |
| 1080 | kfree(probe_ent); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1081 | err_out_regions: |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 1082 | if (legacy_mode & ATA_PORT_PRIMARY) |
| 1083 | release_region(ATA_PRIMARY_CMD, 8); |
| 1084 | if (legacy_mode & ATA_PORT_SECONDARY) |
| 1085 | release_region(ATA_SECONDARY_CMD, 8); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1086 | pci_release_regions(pdev); |
| 1087 | err_out: |
| 1088 | if (disable_dev_on_err) |
| 1089 | pci_disable_device(pdev); |
| 1090 | return rc; |
| 1091 | } |
| 1092 | |
Alan Cox | d33d44f | 2006-03-21 15:59:57 +0000 | [diff] [blame] | 1093 | /** |
| 1094 | * ata_pci_clear_simplex - attempt to kick device out of simplex |
| 1095 | * @pdev: PCI device |
| 1096 | * |
| 1097 | * Some PCI ATA devices report simplex mode but in fact can be told to |
Jeff Garzik | 2e9edbf | 2006-03-24 09:56:57 -0500 | [diff] [blame] | 1098 | * enter non simplex mode. This implements the neccessary logic to |
Alan Cox | d33d44f | 2006-03-21 15:59:57 +0000 | [diff] [blame] | 1099 | * perform the task on such devices. Calling it on other devices will |
| 1100 | * have -undefined- behaviour. |
| 1101 | */ |
| 1102 | |
| 1103 | int ata_pci_clear_simplex(struct pci_dev *pdev) |
| 1104 | { |
| 1105 | unsigned long bmdma = pci_resource_start(pdev, 4); |
| 1106 | u8 simplex; |
| 1107 | |
| 1108 | if (bmdma == 0) |
| 1109 | return -ENOENT; |
| 1110 | |
| 1111 | simplex = inb(bmdma + 0x02); |
| 1112 | outb(simplex & 0x60, bmdma + 0x02); |
| 1113 | simplex = inb(bmdma + 0x02); |
| 1114 | if (simplex & 0x80) |
| 1115 | return -EOPNOTSUPP; |
| 1116 | return 0; |
| 1117 | } |
| 1118 | |
| 1119 | unsigned long ata_pci_default_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long xfer_mask) |
| 1120 | { |
| 1121 | /* Filter out DMA modes if the device has been configured by |
| 1122 | the BIOS as PIO only */ |
Jeff Garzik | 2e9edbf | 2006-03-24 09:56:57 -0500 | [diff] [blame] | 1123 | |
Alan Cox | d33d44f | 2006-03-21 15:59:57 +0000 | [diff] [blame] | 1124 | if (ap->ioaddr.bmdma_addr == 0) |
| 1125 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
| 1126 | return xfer_mask; |
| 1127 | } |
| 1128 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1129 | #endif /* CONFIG_PCI */ |
| 1130 | |