blob: c7f3408e31487ef2db339233c61a4e66d15bb07d [file] [log] [blame]
Andy Shevchenko5823d082016-06-14 21:29:45 +03001/*
2 * Intel MID platform PM support
3 *
4 * Copyright (C) 2016, Intel Corporation
5 *
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/pci.h>
15
16#include <asm/cpu_device_id.h>
17#include <asm/intel-family.h>
18#include <asm/intel-mid.h>
19
20#include "pci.h"
21
22static bool mid_pci_power_manageable(struct pci_dev *dev)
23{
24 return true;
25}
26
27static int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state)
28{
29 return intel_mid_pci_set_power_state(pdev, state);
30}
31
Lukas Wunnere8a6123e2016-10-23 13:55:34 +020032static pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
33{
34 return intel_mid_pci_get_power_state(pdev);
35}
36
Andy Shevchenko5823d082016-06-14 21:29:45 +030037static pci_power_t mid_pci_choose_state(struct pci_dev *pdev)
38{
39 return PCI_D3hot;
40}
41
42static int mid_pci_sleep_wake(struct pci_dev *dev, bool enable)
43{
44 return 0;
45}
46
47static int mid_pci_run_wake(struct pci_dev *dev, bool enable)
48{
49 return 0;
50}
51
52static bool mid_pci_need_resume(struct pci_dev *dev)
53{
54 return false;
55}
56
57static struct pci_platform_pm_ops mid_pci_platform_pm = {
58 .is_manageable = mid_pci_power_manageable,
59 .set_state = mid_pci_set_power_state,
Lukas Wunnere8a6123e2016-10-23 13:55:34 +020060 .get_state = mid_pci_get_power_state,
Andy Shevchenko5823d082016-06-14 21:29:45 +030061 .choose_state = mid_pci_choose_state,
62 .sleep_wake = mid_pci_sleep_wake,
63 .run_wake = mid_pci_run_wake,
64 .need_resume = mid_pci_need_resume,
65};
66
67#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
68
Andy Shevchenko8e522e12016-09-08 13:32:31 +030069/*
70 * This table should be in sync with the one in
71 * arch/x86/platform/intel-mid/pwr.c.
72 */
Andy Shevchenko5823d082016-06-14 21:29:45 +030073static const struct x86_cpu_id lpss_cpu_ids[] = {
Andy Shevchenko8e522e12016-09-08 13:32:31 +030074 ICPU(INTEL_FAM6_ATOM_PENWELL),
Andy Shevchenkof5fbf842016-09-06 21:42:54 +030075 ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
Andy Shevchenko5823d082016-06-14 21:29:45 +030076 {}
77};
78
79static int __init mid_pci_init(void)
80{
81 const struct x86_cpu_id *id;
82
83 id = x86_match_cpu(lpss_cpu_ids);
84 if (id)
85 pci_set_platform_pm(&mid_pci_platform_pm);
86 return 0;
87}
88arch_initcall(mid_pci_init);