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David Howellsaf170c52012-12-14 22:37:13 +00001#ifndef _UAPI_ASM_X86_SIGCONTEXT_H
2#define _UAPI_ASM_X86_SIGCONTEXT_H
3
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +02004/*
5 * Linux signal context definitions. The sigcontext includes a complex hierarchy of CPU
6 * and FPU state, available to user-space (on the stack) when a signal handler is
7 * executed.
8 *
9 * As over the years this ABI grew from its very simple roots towards supporting more and
10 * more CPU state organically, some of the details (which were rather clever hacks back
11 * in the days) became a bit quirky by today.
12 *
13 * The current ABI includes flexible provisions for future extensions, so we won't have
14 * to grow new quirks for quite some time. Promise!
15 */
16
David Howellsaf170c52012-12-14 22:37:13 +000017#include <linux/compiler.h>
18#include <linux/types.h>
19
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020020#define FP_XSTATE_MAGIC1 0x46505853U
21#define FP_XSTATE_MAGIC2 0x46505845U
22#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
David Howellsaf170c52012-12-14 22:37:13 +000023
24/*
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020025 * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame
26 * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes
27 * are used to extend the fpstate pointer in the sigcontext, which now
David Howellsaf170c52012-12-14 22:37:13 +000028 * includes the extended state information along with fpstate information.
29 *
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020030 * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a sw_reserved.extended_size
31 * bytes large extended context area present. (The last 32-bit word of this extended
32 * area (at the fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to
33 * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.)
34 *
35 * This extended area typically grows with newer CPUs that have larger and larger
36 * XSAVE areas.
David Howellsaf170c52012-12-14 22:37:13 +000037 */
38struct _fpx_sw_bytes {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020039 /* If set to FP_XSTATE_MAGIC1 then this is an xstate context. 0 if a legacy frame. */
40 __u32 magic1;
41
42 /*
43 * Total size of the fpstate area:
44 *
45 * - if magic1 == 0 then it's sizeof(struct _fpstate)
46 * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) plus extensions (if any)
47 */
48 __u32 extended_size;
49
50 /*
51 * Feature bit mask (including FP/SSE/extended state) that is present
52 * in the memory layout:
53 */
54 __u64 xfeatures;
55
56 /*
57 * Actual XSAVE state size, based on the xfeatures saved in the layout.
58 * 'extended_size' is greater than 'xstate_size':
59 */
60 __u32 xstate_size;
61
62 /* For future use: */
63 __u32 padding[7];
David Howellsaf170c52012-12-14 22:37:13 +000064};
65
David Howellsaf170c52012-12-14 22:37:13 +000066/*
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020067 * As documented in the iBCS2 standard:
David Howellsaf170c52012-12-14 22:37:13 +000068 *
69 * The first part of "struct _fpstate" is just the normal i387
70 * hardware setup, the extra "status" word is used to save the
71 * coprocessor status word before entering the handler.
72 *
David Howellsaf170c52012-12-14 22:37:13 +000073 * The FPU state data structure has had to grow to accommodate the
74 * extended FPU state required by the Streaming SIMD Extensions.
75 * There is no documented standard to accomplish this at the moment.
76 */
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020077
78/* 10-byte legacy floating point register: */
David Howellsaf170c52012-12-14 22:37:13 +000079struct _fpreg {
Ingo Molnar3f623a52015-09-05 09:32:33 +020080 __u16 significand[4];
81 __u16 exponent;
David Howellsaf170c52012-12-14 22:37:13 +000082};
83
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020084/* 16-byte floating point register: */
David Howellsaf170c52012-12-14 22:37:13 +000085struct _fpxreg {
Ingo Molnar3f623a52015-09-05 09:32:33 +020086 __u16 significand[4];
87 __u16 exponent;
88 __u16 padding[3];
David Howellsaf170c52012-12-14 22:37:13 +000089};
90
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020091/* 16-byte XMM register: */
David Howellsaf170c52012-12-14 22:37:13 +000092struct _xmmreg {
Ingo Molnar3f623a52015-09-05 09:32:33 +020093 __u32 element[4];
David Howellsaf170c52012-12-14 22:37:13 +000094};
95
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020096#define X86_FXSR_MAGIC 0x0000
97
Ingo Molnar337a1672015-09-05 09:32:34 +020098#ifdef __i386__
99
David Howellsaf170c52012-12-14 22:37:13 +0000100struct _fpstate {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200101 /* Legacy FPU environment: */
Ingo Molnar3f623a52015-09-05 09:32:33 +0200102 __u32 cw;
103 __u32 sw;
104 __u32 tag;
105 __u32 ipoff;
106 __u32 cssel;
107 __u32 dataoff;
108 __u32 datasel;
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200109 struct _fpreg _st[8];
Ingo Molnar3f623a52015-09-05 09:32:33 +0200110 __u16 status;
111 __u16 magic; /* 0xffff: regular FPU data only */
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200112 /* 0x0000: FXSR FPU data */
David Howellsaf170c52012-12-14 22:37:13 +0000113
114 /* FXSR FPU environment */
Ingo Molnar3f623a52015-09-05 09:32:33 +0200115 __u32 _fxsr_env[6]; /* FXSR FPU env is ignored */
116 __u32 mxcsr;
117 __u32 reserved;
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200118 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
119 struct _xmmreg _xmm[8]; /* First 8 XMM registers */
Ingo Molnar3f623a52015-09-05 09:32:33 +0200120 __u32 padding1[44]; /* Second 8 XMM registers plus padding */
David Howellsaf170c52012-12-14 22:37:13 +0000121
122 union {
Ingo Molnar3f623a52015-09-05 09:32:33 +0200123 __u32 padding2[12];
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200124 struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
David Howellsaf170c52012-12-14 22:37:13 +0000125 };
126};
127
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200128#else /* __x86_64__: */
David Howellsaf170c52012-12-14 22:37:13 +0000129
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200130/*
131 * The FXSAVE frame.
132 *
133 * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
134 * larger: 'struct _xstate'. Note that 'struct _xstate' embedds
135 * 'struct _fpstate' so that you can always assume the _fpstate portion
136 * exists so that you can check the magic value.
137 *
138 * Note2: Reserved fields may someday contain valuable data. Always save/restore
139 * them when you change signal frames.
140 */
David Howellsaf170c52012-12-14 22:37:13 +0000141struct _fpstate {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200142 __u16 cwd;
143 __u16 swd;
144 /* Note this is not the same as the 32-bit/x87/FSAVE twd: */
145 __u16 twd;
146 __u16 fop;
147 __u64 rip;
148 __u64 rdp;
149 __u32 mxcsr;
150 __u32 mxcsr_mask;
151 __u32 st_space[32]; /* 8x FP registers, 16 bytes each */
152 __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */
153 __u32 reserved2[12];
David Howellsaf170c52012-12-14 22:37:13 +0000154 union {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200155 __u32 reserved3[12];
156 struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
David Howellsaf170c52012-12-14 22:37:13 +0000157 };
158};
159
Ingo Molnar128f8252015-09-05 09:32:32 +0200160#endif /* __x86_64__ */
161
162struct _header {
163 __u64 xfeatures;
164 __u64 reserved1[2];
165 __u64 reserved2[5];
166};
167
168struct _ymmh_state {
169 /* 16x YMM registers, 16 bytes each: */
170 __u32 ymmh_space[64];
171};
172
David Howellsaf170c52012-12-14 22:37:13 +0000173/*
Ingo Molnar128f8252015-09-05 09:32:32 +0200174 * Extended state pointed to by sigcontext::fpstate.
175 *
176 * In addition to the fpstate, information encoded in _xstate::xstate_hdr
177 * indicates the presence of other extended state information supported
178 * by the CPU and kernel:
David Howellsaf170c52012-12-14 22:37:13 +0000179 */
Ingo Molnar128f8252015-09-05 09:32:32 +0200180struct _xstate {
181 struct _fpstate fpstate;
182 struct _header xstate_hdr;
183 struct _ymmh_state ymmh;
184 /* New processor state extensions go here: */
185};
186
187/*
188 * The old user-space sigcontext definition, just in case user-space still
189 * relies on it. The kernel definition (in asm/sigcontext.h) has unified
190 * field names but otherwise the same layout.
191 */
192#ifndef __KERNEL__
193# ifdef __i386__
194struct sigcontext {
Ingo Molnar3f623a52015-09-05 09:32:33 +0200195 __u16 gs, __gsh;
196 __u16 fs, __fsh;
197 __u16 es, __esh;
198 __u16 ds, __dsh;
199 __u32 edi;
200 __u32 esi;
201 __u32 ebp;
202 __u32 esp;
203 __u32 ebx;
204 __u32 edx;
205 __u32 ecx;
206 __u32 eax;
207 __u32 trapno;
208 __u32 err;
209 __u32 eip;
210 __u16 cs, __csh;
211 __u32 eflags;
212 __u32 esp_at_signal;
213 __u16 ss, __ssh;
Ingo Molnar128f8252015-09-05 09:32:32 +0200214 struct _fpstate __user *fpstate;
Ingo Molnar3f623a52015-09-05 09:32:33 +0200215 __u32 oldmask;
216 __u32 cr2;
Ingo Molnar128f8252015-09-05 09:32:32 +0200217};
218# else /* __x86_64__: */
David Howellsaf170c52012-12-14 22:37:13 +0000219struct sigcontext {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200220 __u64 r8;
221 __u64 r9;
222 __u64 r10;
223 __u64 r11;
224 __u64 r12;
225 __u64 r13;
226 __u64 r14;
227 __u64 r15;
228 __u64 rdi;
229 __u64 rsi;
230 __u64 rbp;
231 __u64 rbx;
232 __u64 rdx;
233 __u64 rax;
234 __u64 rcx;
235 __u64 rsp;
236 __u64 rip;
237 __u64 eflags; /* RFLAGS */
238 __u16 cs;
239 __u16 gs;
240 __u16 fs;
241 __u16 __pad0;
242 __u64 err;
243 __u64 trapno;
244 __u64 oldmask;
245 __u64 cr2;
246 struct _fpstate __user *fpstate; /* Zero when no FPU context */
247# ifdef __ILP32__
248 __u32 __fpstate_pad;
249# endif
250 __u64 reserved1[8];
David Howellsaf170c52012-12-14 22:37:13 +0000251};
Ingo Molnar128f8252015-09-05 09:32:32 +0200252# endif /* __x86_64__ */
253#endif /* !__KERNEL__ */
David Howellsaf170c52012-12-14 22:37:13 +0000254
255#endif /* _UAPI_ASM_X86_SIGCONTEXT_H */