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Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05301/*
2 * DTS file for SPEAr320 Evaluation Baord
3 *
Viresh Kumar10d89352012-06-20 12:53:02 -07004 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05305 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear320.dtsi"
16
17/ {
Vipul Kumar Samar45a5e112012-07-13 17:20:46 +053018 model = "ST SPEAr320 Evaluation Board";
19 compatible = "st,spear320-evb", "st,spear320";
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053020 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
Viresh Kumare0373602012-03-29 08:30:19 +053028 pinmux@b3000000 {
Vipul Kumar Samar69da52f2012-07-13 17:22:11 +053029 st,pinmux-mode = <4>;
Viresh Kumare0373602012-03-29 08:30:19 +053030 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
32
33 state_default: pinmux {
34 i2c0 {
35 st,pins = "i2c0_grp";
36 st,function = "i2c0";
37 };
38 mii0 {
39 st,pins = "mii0_grp";
40 st,function = "mii0";
41 };
42 ssp0 {
43 st,pins = "ssp0_grp";
44 st,function = "ssp0";
45 };
46 uart0 {
47 st,pins = "uart0_grp";
48 st,function = "uart0";
49 };
50 sdhci {
51 st,pins = "sdhci_cd_51_grp";
52 st,function = "sdhci";
53 };
54 i2s {
55 st,pins = "i2s_grp";
56 st,function = "i2s";
57 };
58 uart1 {
59 st,pins = "uart1_grp";
60 st,function = "uart1";
61 };
62 uart2 {
63 st,pins = "uart2_grp";
64 st,function = "uart2";
65 };
66 can0 {
67 st,pins = "can0_grp";
68 st,function = "can0";
69 };
70 can1 {
71 st,pins = "can1_grp";
72 st,function = "can1";
73 };
74 mii2 {
75 st,pins = "mii2_grp";
76 st,function = "mii2";
77 };
78 pwm0_1 {
Vipul Kumar Samar7db083e2012-07-05 11:51:47 +080079 st,pins = "pwm0_1_pin_37_38_grp";
Viresh Kumare0373602012-03-29 08:30:19 +053080 st,function = "pwm0_1";
81 };
Viresh Kumare0373602012-03-29 08:30:19 +053082 };
83 };
84
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053085 clcd@90000000 {
86 status = "okay";
87 };
88
Viresh Kumar0b7ee712012-03-26 10:29:23 +053089 dma@fc400000 {
90 status = "okay";
91 };
92
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053093 fsmc: flash@4c000000 {
94 status = "okay";
95 };
96
97 gmac: eth@e0800000 {
98 status = "okay";
99 };
100
101 sdhci@70000000 {
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530102 status = "okay";
103 };
104
105 smi: flash@fc000000 {
106 status = "okay";
Viresh Kumar30a0d032012-05-01 18:09:22 +0530107 clock-rate=<50000000>;
108
109 flash@f8000000 {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 reg = <0xf8000000 0x800000>;
113 st,smi-fast-mode;
114
115 partition@0 {
116 label = "xloader";
117 reg = <0x0 0x10000>;
118 };
119 partition@10000 {
120 label = "u-boot";
121 reg = <0x10000 0x40000>;
122 };
123 partition@50000 {
124 label = "linux";
125 reg = <0x50000 0x2c0000>;
126 };
127 partition@310000 {
128 label = "rootfs";
129 reg = <0x310000 0x4f0000>;
130 };
131 };
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530132 };
133
134 spi0: spi@d0100000 {
135 status = "okay";
136 };
137
138 spi1: spi@a5000000 {
139 status = "okay";
140 };
141
142 spi2: spi@a6000000 {
143 status = "okay";
144 };
145
146 ehci@e1800000 {
147 status = "okay";
148 };
149
150 ohci@e1900000 {
151 status = "okay";
152 };
153
154 ohci@e2100000 {
155 status = "okay";
156 };
157
158 apb {
159 gpio0: gpio@fc980000 {
160 status = "okay";
161 };
162
Viresh Kumar4ddb1c22012-10-27 15:21:39 +0530163 gpio@b3000000 {
164 status = "okay";
165 };
166
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530167 i2c0: i2c@d0180000 {
168 status = "okay";
169 };
170
171 i2c1: i2c@a7000000 {
172 status = "okay";
173 };
174
175 rtc@fc900000 {
176 status = "okay";
177 };
178
179 serial@d0000000 {
180 status = "okay";
181 };
182
183 serial@a3000000 {
184 status = "okay";
185 };
186
187 serial@a4000000 {
188 status = "okay";
189 };
190
191 wdt@fc880000 {
192 status = "okay";
193 };
194 };
195 };
196};