Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the Conexant CX23885/7/8 PCIe bridge |
| 3 | * |
| 4 | * Infrared remote control input device |
| 5 | * |
| 6 | * Most of this file is |
| 7 | * |
| 8 | * Copyright (C) 2009 Andy Walls <awalls@radix.net> |
| 9 | * |
| 10 | * However, the cx23885_input_{init,fini} functions contained herein are |
| 11 | * derived from Linux kernel files linux/media/video/.../...-input.c marked as: |
| 12 | * |
| 13 | * Copyright (C) 2008 <srinivasa.deevi at conexant dot com> |
| 14 | * Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> |
| 15 | * Markus Rechberger <mrechberger@gmail.com> |
| 16 | * Mauro Carvalho Chehab <mchehab@infradead.org> |
| 17 | * Sascha Sommer <saschasommer@freenet.de> |
| 18 | * Copyright (C) 2004, 2005 Chris Pascoe |
| 19 | * Copyright (C) 2003, 2004 Gerd Knorr |
| 20 | * Copyright (C) 2003 Pavel Machek |
| 21 | * |
| 22 | * This program is free software; you can redistribute it and/or |
| 23 | * modify it under the terms of the GNU General Public License |
| 24 | * as published by the Free Software Foundation; either version 2 |
| 25 | * of the License, or (at your option) any later version. |
| 26 | * |
| 27 | * This program is distributed in the hope that it will be useful, |
| 28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 30 | * GNU General Public License for more details. |
| 31 | * |
| 32 | * You should have received a copy of the GNU General Public License |
| 33 | * along with this program; if not, write to the Free Software |
| 34 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
| 35 | * 02110-1301, USA. |
| 36 | */ |
| 37 | |
| 38 | #include <linux/input.h> |
| 39 | #include <media/ir-common.h> |
| 40 | #include <media/v4l2-subdev.h> |
| 41 | |
| 42 | #include "cx23885.h" |
| 43 | |
| 44 | #define RC5_BITS 14 |
| 45 | #define RC5_HALF_BITS (2*RC5_BITS) |
| 46 | #define RC5_HALF_BITS_MASK ((1 << RC5_HALF_BITS) - 1) |
| 47 | |
| 48 | #define RC5_START_BITS_NORMAL 0x3 /* Command range 0 - 63 */ |
| 49 | #define RC5_START_BITS_EXTENDED 0x2 /* Command range 64 - 127 */ |
| 50 | |
| 51 | #define RC5_EXTENDED_COMMAND_OFFSET 64 |
| 52 | |
| 53 | static inline unsigned int rc5_command(u32 rc5_baseband) |
| 54 | { |
| 55 | return RC5_INSTR(rc5_baseband) + |
| 56 | ((RC5_START(rc5_baseband) == RC5_START_BITS_EXTENDED) |
| 57 | ? RC5_EXTENDED_COMMAND_OFFSET : 0); |
| 58 | } |
| 59 | |
| 60 | static void cx23885_input_process_raw_rc5(struct cx23885_dev *dev) |
| 61 | { |
| 62 | struct card_ir *ir_input = dev->ir_input; |
| 63 | unsigned int code, command; |
| 64 | u32 rc5; |
| 65 | |
| 66 | /* Ignore codes that are too short to be valid RC-5 */ |
| 67 | if (ir_input->last_bit < (RC5_HALF_BITS - 1)) |
| 68 | return; |
| 69 | |
| 70 | /* The library has the manchester coding backwards; XOR to adapt. */ |
| 71 | code = (ir_input->code & RC5_HALF_BITS_MASK) ^ RC5_HALF_BITS_MASK; |
| 72 | rc5 = ir_rc5_decode(code); |
| 73 | |
| 74 | switch (RC5_START(rc5)) { |
| 75 | case RC5_START_BITS_NORMAL: |
| 76 | break; |
| 77 | case RC5_START_BITS_EXTENDED: |
| 78 | /* Don't allow if the remote only emits standard commands */ |
| 79 | if (ir_input->start == RC5_START_BITS_NORMAL) |
| 80 | return; |
| 81 | break; |
| 82 | default: |
| 83 | return; |
| 84 | } |
| 85 | |
| 86 | if (ir_input->addr != RC5_ADDR(rc5)) |
| 87 | return; |
| 88 | |
| 89 | /* Don't generate a keypress for RC-5 auto-repeated keypresses */ |
| 90 | command = rc5_command(rc5); |
| 91 | if (RC5_TOGGLE(rc5) != RC5_TOGGLE(ir_input->last_rc5) || |
| 92 | command != rc5_command(ir_input->last_rc5) || |
| 93 | /* Catch T == 0, CMD == 0 (e.g. '0') as first keypress after init */ |
| 94 | RC5_START(ir_input->last_rc5) == 0) { |
| 95 | /* This keypress is differnet: not an auto repeat */ |
| 96 | ir_input_nokey(ir_input->dev, &ir_input->ir); |
| 97 | ir_input_keydown(ir_input->dev, &ir_input->ir, |
| 98 | command, ir_input->code); |
| 99 | } |
| 100 | ir_input->last_rc5 = rc5; |
| 101 | |
| 102 | /* Schedule when we should do the key up event: ir_input_nokey() */ |
| 103 | mod_timer(&ir_input->timer_keyup, |
| 104 | jiffies + msecs_to_jiffies(ir_input->rc5_key_timeout)); |
| 105 | } |
| 106 | |
| 107 | static void cx23885_input_next_pulse_width_rc5(struct cx23885_dev *dev, |
| 108 | u32 ns_pulse) |
| 109 | { |
| 110 | const int rc5_quarterbit_ns = 444444; /* 32 cycles/36 kHz/2 = 444 us */ |
| 111 | struct card_ir *ir_input = dev->ir_input; |
| 112 | int i, level, quarterbits, halfbits; |
| 113 | |
| 114 | if (!ir_input->active) { |
| 115 | ir_input->active = 1; |
| 116 | /* assume an initial space that we may not detect or measure */ |
| 117 | ir_input->code = 0; |
| 118 | ir_input->last_bit = 0; |
| 119 | } |
| 120 | |
| 121 | if (ns_pulse == V4L2_SUBDEV_IR_PULSE_RX_SEQ_END) { |
| 122 | ir_input->last_bit++; /* Account for the final space */ |
| 123 | ir_input->active = 0; |
| 124 | cx23885_input_process_raw_rc5(dev); |
| 125 | return; |
| 126 | } |
| 127 | |
| 128 | level = (ns_pulse & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK) ? 1 : 0; |
| 129 | |
| 130 | /* Skip any leading space to sync to the start bit */ |
| 131 | if (ir_input->last_bit == 0 && level == 0) |
| 132 | return; |
| 133 | |
| 134 | /* |
| 135 | * With valid RC-5 we can get up to two consecutive half-bits in a |
| 136 | * single pulse measurment. Experiments have shown that the duration |
| 137 | * of a half-bit can vary. Make sure we always end up with an even |
| 138 | * number of quarter bits at the same level (mark or space). |
| 139 | */ |
| 140 | ns_pulse &= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; |
| 141 | quarterbits = ns_pulse / rc5_quarterbit_ns; |
| 142 | if (quarterbits & 1) |
| 143 | quarterbits++; |
| 144 | halfbits = quarterbits / 2; |
| 145 | |
| 146 | for (i = 0; i < halfbits; i++) { |
| 147 | ir_input->last_bit++; |
| 148 | ir_input->code |= (level << ir_input->last_bit); |
| 149 | |
| 150 | if (ir_input->last_bit >= RC5_HALF_BITS-1) { |
| 151 | ir_input->active = 0; |
| 152 | cx23885_input_process_raw_rc5(dev); |
| 153 | /* |
| 154 | * If level is 1, a leading mark is invalid for RC5. |
| 155 | * If level is 0, we scan past extra intial space. |
| 156 | * Either way we don't want to reactivate collecting |
| 157 | * marks or spaces here with any left over half-bits. |
| 158 | */ |
| 159 | break; |
| 160 | } |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | static void cx23885_input_process_pulse_widths_rc5(struct cx23885_dev *dev, |
| 165 | bool add_eom) |
| 166 | { |
| 167 | struct card_ir *ir_input = dev->ir_input; |
| 168 | struct ir_input_state *ir_input_state = &ir_input->ir; |
| 169 | |
| 170 | u32 ns_pulse[RC5_HALF_BITS+1]; |
| 171 | ssize_t num = 0; |
| 172 | int count, i; |
| 173 | |
| 174 | do { |
| 175 | v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) ns_pulse, |
| 176 | sizeof(ns_pulse), &num); |
| 177 | |
| 178 | count = num / sizeof(u32); |
| 179 | |
| 180 | /* Append an end of Rx seq, if the caller requested */ |
| 181 | if (add_eom && count < ARRAY_SIZE(ns_pulse)) { |
| 182 | ns_pulse[count] = V4L2_SUBDEV_IR_PULSE_RX_SEQ_END; |
| 183 | count++; |
| 184 | } |
| 185 | |
| 186 | /* Just drain the Rx FIFO, if we're called, but not RC-5 */ |
| 187 | if (ir_input_state->ir_type != IR_TYPE_RC5) |
| 188 | continue; |
| 189 | |
| 190 | for (i = 0; i < count; i++) |
| 191 | cx23885_input_next_pulse_width_rc5(dev, ns_pulse[i]); |
| 192 | } while (num != 0); |
| 193 | } |
| 194 | |
| 195 | void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) |
| 196 | { |
| 197 | struct v4l2_subdev_ir_parameters params; |
| 198 | int overrun, data_available; |
| 199 | |
| 200 | if (dev->sd_ir == NULL || events == 0) |
| 201 | return; |
| 202 | |
| 203 | switch (dev->board) { |
| 204 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 205 | /* |
| 206 | * The only board we handle right now. However other boards |
| 207 | * using the CX2388x integrated IR controller should be similar |
| 208 | */ |
| 209 | break; |
| 210 | default: |
| 211 | return; |
| 212 | } |
| 213 | |
| 214 | overrun = events & (V4L2_SUBDEV_IR_RX_SW_FIFO_OVERRUN | |
| 215 | V4L2_SUBDEV_IR_RX_HW_FIFO_OVERRUN); |
| 216 | |
| 217 | data_available = events & (V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED | |
| 218 | V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ); |
| 219 | |
| 220 | if (overrun) { |
| 221 | /* If there was a FIFO overrun, stop the device */ |
| 222 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 223 | params.enable = false; |
| 224 | /* Mitigate race with cx23885_input_ir_stop() */ |
| 225 | params.shutdown = atomic_read(&dev->ir_input_stopping); |
| 226 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 227 | } |
| 228 | |
| 229 | if (data_available) |
| 230 | cx23885_input_process_pulse_widths_rc5(dev, overrun); |
| 231 | |
| 232 | if (overrun) { |
| 233 | /* If there was a FIFO overrun, clear & restart the device */ |
| 234 | params.enable = true; |
| 235 | /* Mitigate race with cx23885_input_ir_stop() */ |
| 236 | params.shutdown = atomic_read(&dev->ir_input_stopping); |
| 237 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 238 | } |
| 239 | } |
| 240 | |
| 241 | static void cx23885_input_ir_start(struct cx23885_dev *dev) |
| 242 | { |
| 243 | struct card_ir *ir_input = dev->ir_input; |
| 244 | struct ir_input_state *ir_input_state = &ir_input->ir; |
| 245 | struct v4l2_subdev_ir_parameters params; |
| 246 | |
| 247 | if (dev->sd_ir == NULL) |
| 248 | return; |
| 249 | |
| 250 | atomic_set(&dev->ir_input_stopping, 0); |
| 251 | |
| 252 | /* keyup timer set up, if needed */ |
| 253 | switch (dev->board) { |
| 254 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 255 | setup_timer(&ir_input->timer_keyup, |
| 256 | ir_rc5_timer_keyup, /* Not actually RC-5 specific */ |
| 257 | (unsigned long) ir_input); |
| 258 | if (ir_input_state->ir_type == IR_TYPE_RC5) { |
| 259 | /* |
| 260 | * RC-5 repeats a held key every |
| 261 | * 64 bits * (2 * 32/36000) sec/bit = 113.778 ms |
| 262 | */ |
| 263 | ir_input->rc5_key_timeout = 115; |
| 264 | } |
| 265 | break; |
| 266 | } |
| 267 | |
| 268 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 269 | switch (dev->board) { |
| 270 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 271 | /* |
| 272 | * The IR controller on this board only returns pulse widths. |
| 273 | * Any other mode setting will fail to set up the device. |
| 274 | */ |
| 275 | params.mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
| 276 | params.enable = true; |
| 277 | params.interrupt_enable = true; |
| 278 | params.shutdown = false; |
| 279 | |
| 280 | /* Setup for baseband compatible with both RC-5 and RC-6A */ |
| 281 | params.modulation = false; |
| 282 | /* RC-5: 2,222,222 ns = 1/36 kHz * 32 cycles * 2 marks * 1.25*/ |
| 283 | /* RC-6A: 3,333,333 ns = 1/36 kHz * 16 cycles * 6 marks * 1.25*/ |
| 284 | params.max_pulse_width = 3333333; /* ns */ |
| 285 | /* RC-5: 666,667 ns = 1/36 kHz * 32 cycles * 1 mark * 0.75 */ |
| 286 | /* RC-6A: 333,333 ns = 1/36 kHz * 16 cycles * 1 mark * 0.75 */ |
| 287 | params.noise_filter_min_width = 333333; /* ns */ |
| 288 | /* |
| 289 | * This board has inverted receive sense: |
| 290 | * mark is received as low logic level; |
| 291 | * falling edges are detected as rising edges; etc. |
| 292 | */ |
| 293 | params.invert = true; |
| 294 | break; |
| 295 | } |
| 296 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 297 | } |
| 298 | |
| 299 | static void cx23885_input_ir_stop(struct cx23885_dev *dev) |
| 300 | { |
| 301 | struct card_ir *ir_input = dev->ir_input; |
| 302 | struct v4l2_subdev_ir_parameters params; |
| 303 | |
| 304 | if (dev->sd_ir == NULL) |
| 305 | return; |
| 306 | |
| 307 | /* |
| 308 | * Stop the sd_ir subdevice from generating notifications and |
| 309 | * scheduling work. |
| 310 | * It is shutdown this way in order to mitigate a race with |
| 311 | * cx23885_input_rx_work_handler() in the overrun case, which could |
| 312 | * re-enable the subdevice. |
| 313 | */ |
| 314 | atomic_set(&dev->ir_input_stopping, 1); |
| 315 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 316 | while (params.shutdown == false) { |
| 317 | params.enable = false; |
| 318 | params.interrupt_enable = false; |
| 319 | params.shutdown = true; |
| 320 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 321 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 322 | } |
| 323 | |
| 324 | flush_scheduled_work(); |
| 325 | |
| 326 | switch (dev->board) { |
| 327 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 328 | del_timer_sync(&ir_input->timer_keyup); |
| 329 | break; |
| 330 | } |
| 331 | } |
| 332 | |
| 333 | int cx23885_input_init(struct cx23885_dev *dev) |
| 334 | { |
| 335 | struct card_ir *ir; |
| 336 | struct input_dev *input_dev; |
| 337 | struct ir_scancode_table *ir_codes = NULL; |
| 338 | int ir_type, ir_addr, ir_start; |
| 339 | int ret; |
| 340 | |
| 341 | /* |
| 342 | * If the IR device (hardware registers, chip, GPIO lines, etc.) isn't |
| 343 | * encapsulated in a v4l2_subdev, then I'm not going to deal with it. |
| 344 | */ |
| 345 | if (dev->sd_ir == NULL) |
| 346 | return -ENODEV; |
| 347 | |
| 348 | switch (dev->board) { |
| 349 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 350 | /* Parameters for the grey Hauppauge remote for the HVR-1850 */ |
| 351 | ir_codes = &ir_codes_hauppauge_new_table; |
| 352 | ir_type = IR_TYPE_RC5; |
| 353 | ir_addr = 0x1e; /* RC-5 system bits emitted by the remote */ |
| 354 | ir_start = RC5_START_BITS_NORMAL; /* A basic RC-5 remote */ |
| 355 | break; |
| 356 | } |
| 357 | if (ir_codes == NULL) |
| 358 | return -ENODEV; |
| 359 | |
| 360 | ir = kzalloc(sizeof(*ir), GFP_KERNEL); |
| 361 | input_dev = input_allocate_device(); |
| 362 | if (!ir || !input_dev) { |
| 363 | ret = -ENOMEM; |
| 364 | goto err_out_free; |
| 365 | } |
| 366 | |
| 367 | ir->dev = input_dev; |
| 368 | ir->addr = ir_addr; |
| 369 | ir->start = ir_start; |
| 370 | |
| 371 | /* init input device */ |
| 372 | snprintf(ir->name, sizeof(ir->name), "cx23885 IR (%s)", |
| 373 | cx23885_boards[dev->board].name); |
| 374 | snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(dev->pci)); |
| 375 | |
| 376 | ir_input_init(input_dev, &ir->ir, ir_type, ir_codes); |
| 377 | input_dev->name = ir->name; |
| 378 | input_dev->phys = ir->phys; |
| 379 | input_dev->id.bustype = BUS_PCI; |
| 380 | input_dev->id.version = 1; |
| 381 | if (dev->pci->subsystem_vendor) { |
| 382 | input_dev->id.vendor = dev->pci->subsystem_vendor; |
| 383 | input_dev->id.product = dev->pci->subsystem_device; |
| 384 | } else { |
| 385 | input_dev->id.vendor = dev->pci->vendor; |
| 386 | input_dev->id.product = dev->pci->device; |
| 387 | } |
| 388 | input_dev->dev.parent = &dev->pci->dev; |
| 389 | |
| 390 | dev->ir_input = ir; |
| 391 | cx23885_input_ir_start(dev); |
| 392 | |
| 393 | ret = input_register_device(ir->dev); |
| 394 | if (ret) |
| 395 | goto err_out_stop; |
| 396 | |
| 397 | return 0; |
| 398 | |
| 399 | err_out_stop: |
| 400 | cx23885_input_ir_stop(dev); |
| 401 | dev->ir_input = NULL; |
| 402 | err_out_free: |
| 403 | input_free_device(input_dev); |
| 404 | kfree(ir); |
| 405 | return ret; |
| 406 | } |
| 407 | |
| 408 | void cx23885_input_fini(struct cx23885_dev *dev) |
| 409 | { |
| 410 | /* Always stop the IR hardware from generating interrupts */ |
| 411 | cx23885_input_ir_stop(dev); |
| 412 | |
| 413 | if (dev->ir_input == NULL) |
| 414 | return; |
| 415 | input_unregister_device(dev->ir_input->dev); |
| 416 | kfree(dev->ir_input); |
| 417 | dev->ir_input = NULL; |
| 418 | } |