blob: f620e3546eaf61e7c0ce4938e814a0d58c2821aa [file] [log] [blame]
Alexander Shishkine443b332012-05-11 17:25:46 +03001/*
2 * core.c - ChipIdea USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * Description: ChipIdea USB IP core family device controller
15 *
16 * This driver is composed of several blocks:
17 * - HW: hardware interface
18 * - DBG: debug facilities (optional)
19 * - UTIL: utilities
20 * - ISR: interrupts handling
21 * - ENDPT: endpoint operations (Gadget API)
22 * - GADGET: gadget operations (Gadget API)
23 * - BUS: bus glue code, bus abstraction layer
24 *
25 * Compile Options
Peter Chen58ce8492014-05-23 08:12:47 +080026 * - CONFIG_USB_CHIPIDEA_DEBUG: enable debug facilities
Alexander Shishkine443b332012-05-11 17:25:46 +030027 * - STALL_IN: non-empty bulk-in pipes cannot be halted
28 * if defined mass storage compliance succeeds but with warnings
29 * => case 4: Hi > Dn
30 * => case 5: Hi > Di
31 * => case 8: Hi <> Do
32 * if undefined usbtest 13 fails
33 * - TRACE: enable function tracing (depends on DEBUG)
34 *
35 * Main Features
36 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
37 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
38 * - Normal & LPM support
39 *
40 * USBTEST Report
41 * - OK: 0-12, 13 (STALL_IN defined) & 14
42 * - Not Supported: 15 & 16 (ISO)
43 *
44 * TODO List
Alexander Shishkine443b332012-05-11 17:25:46 +030045 * - Suspend & Remote Wakeup
46 */
47#include <linux/delay.h>
48#include <linux/device.h>
Alexander Shishkine443b332012-05-11 17:25:46 +030049#include <linux/dma-mapping.h>
Antoine Tenart1e5e2d32014-10-30 18:41:19 +010050#include <linux/phy/phy.h>
Alexander Shishkine443b332012-05-11 17:25:46 +030051#include <linux/platform_device.h>
52#include <linux/module.h>
Richard Zhaofe6e1252012-07-07 22:56:42 +080053#include <linux/idr.h>
Alexander Shishkine443b332012-05-11 17:25:46 +030054#include <linux/interrupt.h>
55#include <linux/io.h>
Alexander Shishkine443b332012-05-11 17:25:46 +030056#include <linux/kernel.h>
57#include <linux/slab.h>
58#include <linux/pm_runtime.h>
59#include <linux/usb/ch9.h>
60#include <linux/usb/gadget.h>
61#include <linux/usb/otg.h>
62#include <linux/usb/chipidea.h>
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +030063#include <linux/usb/of.h>
Michael Grzeschik4f6743d2014-02-19 13:41:43 +080064#include <linux/of.h>
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +030065#include <linux/phy.h>
Peter Chen1542d9c2013-08-14 12:44:03 +030066#include <linux/regulator/consumer.h>
Alexander Shishkine443b332012-05-11 17:25:46 +030067
68#include "ci.h"
69#include "udc.h"
70#include "bits.h"
Alexander Shishkineb70e5a2012-05-11 17:25:54 +030071#include "host.h"
Alexander Shishkine443b332012-05-11 17:25:46 +030072#include "debug.h"
Peter Chenc10b4f02013-08-14 12:44:06 +030073#include "otg.h"
Li Jun4dcf7202014-04-23 15:56:50 +080074#include "otg_fsm.h"
Alexander Shishkine443b332012-05-11 17:25:46 +030075
Alexander Shishkin5f36e232012-05-11 17:25:47 +030076/* Controller register map */
Marc Kleine-Budde987e7bc2014-01-06 10:10:39 +080077static const u8 ci_regs_nolpm[] = {
78 [CAP_CAPLENGTH] = 0x00U,
79 [CAP_HCCPARAMS] = 0x08U,
80 [CAP_DCCPARAMS] = 0x24U,
81 [CAP_TESTMODE] = 0x38U,
82 [OP_USBCMD] = 0x00U,
83 [OP_USBSTS] = 0x04U,
84 [OP_USBINTR] = 0x08U,
85 [OP_DEVICEADDR] = 0x14U,
86 [OP_ENDPTLISTADDR] = 0x18U,
Peter Chen28362672015-06-18 11:51:53 +080087 [OP_TTCTRL] = 0x1CU,
Marc Kleine-Budde987e7bc2014-01-06 10:10:39 +080088 [OP_PORTSC] = 0x44U,
89 [OP_DEVLC] = 0x84U,
90 [OP_OTGSC] = 0x64U,
91 [OP_USBMODE] = 0x68U,
92 [OP_ENDPTSETUPSTAT] = 0x6CU,
93 [OP_ENDPTPRIME] = 0x70U,
94 [OP_ENDPTFLUSH] = 0x74U,
95 [OP_ENDPTSTAT] = 0x78U,
96 [OP_ENDPTCOMPLETE] = 0x7CU,
97 [OP_ENDPTCTRL] = 0x80U,
Alexander Shishkine443b332012-05-11 17:25:46 +030098};
99
Marc Kleine-Budde987e7bc2014-01-06 10:10:39 +0800100static const u8 ci_regs_lpm[] = {
101 [CAP_CAPLENGTH] = 0x00U,
102 [CAP_HCCPARAMS] = 0x08U,
103 [CAP_DCCPARAMS] = 0x24U,
104 [CAP_TESTMODE] = 0xFCU,
105 [OP_USBCMD] = 0x00U,
106 [OP_USBSTS] = 0x04U,
107 [OP_USBINTR] = 0x08U,
108 [OP_DEVICEADDR] = 0x14U,
109 [OP_ENDPTLISTADDR] = 0x18U,
Peter Chen28362672015-06-18 11:51:53 +0800110 [OP_TTCTRL] = 0x1CU,
Marc Kleine-Budde987e7bc2014-01-06 10:10:39 +0800111 [OP_PORTSC] = 0x44U,
112 [OP_DEVLC] = 0x84U,
113 [OP_OTGSC] = 0xC4U,
114 [OP_USBMODE] = 0xC8U,
115 [OP_ENDPTSETUPSTAT] = 0xD8U,
116 [OP_ENDPTPRIME] = 0xDCU,
117 [OP_ENDPTFLUSH] = 0xE0U,
118 [OP_ENDPTSTAT] = 0xE4U,
119 [OP_ENDPTCOMPLETE] = 0xE8U,
120 [OP_ENDPTCTRL] = 0xECU,
Alexander Shishkine443b332012-05-11 17:25:46 +0300121};
122
Nicholas Krause158ec072015-06-27 00:34:48 -0400123static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
Alexander Shishkine443b332012-05-11 17:25:46 +0300124{
125 int i;
126
Alexander Shishkine443b332012-05-11 17:25:46 +0300127 for (i = 0; i < OP_ENDPTCTRL; i++)
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300128 ci->hw_bank.regmap[i] =
129 (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
Alexander Shishkine443b332012-05-11 17:25:46 +0300130 (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
131
132 for (; i <= OP_LAST; i++)
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300133 ci->hw_bank.regmap[i] = ci->hw_bank.op +
Alexander Shishkine443b332012-05-11 17:25:46 +0300134 4 * (i - OP_ENDPTCTRL) +
135 (is_lpm
136 ? ci_regs_lpm[OP_ENDPTCTRL]
137 : ci_regs_nolpm[OP_ENDPTCTRL]);
138
Alexander Shishkine443b332012-05-11 17:25:46 +0300139}
140
Peter Chencb271f32015-02-11 12:44:55 +0800141static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
142{
143 int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
144 enum ci_revision rev = CI_REVISION_UNKNOWN;
145
146 if (ver == 0x2) {
147 rev = hw_read_id_reg(ci, ID_ID, REVISION)
148 >> __ffs(REVISION);
149 rev += CI_REVISION_20;
150 } else if (ver == 0x0) {
151 rev = CI_REVISION_1X;
152 }
153
154 return rev;
155}
156
Alexander Shishkine443b332012-05-11 17:25:46 +0300157/**
Li Jun36304b02014-04-23 15:56:39 +0800158 * hw_read_intr_enable: returns interrupt enable register
159 *
Peter Chen19353882014-09-22 08:14:17 +0800160 * @ci: the controller
161 *
Li Jun36304b02014-04-23 15:56:39 +0800162 * This function returns register data
163 */
164u32 hw_read_intr_enable(struct ci_hdrc *ci)
165{
166 return hw_read(ci, OP_USBINTR, ~0);
167}
168
169/**
170 * hw_read_intr_status: returns interrupt status register
171 *
Peter Chen19353882014-09-22 08:14:17 +0800172 * @ci: the controller
173 *
Li Jun36304b02014-04-23 15:56:39 +0800174 * This function returns register data
175 */
176u32 hw_read_intr_status(struct ci_hdrc *ci)
177{
178 return hw_read(ci, OP_USBSTS, ~0);
179}
180
181/**
Alexander Shishkine443b332012-05-11 17:25:46 +0300182 * hw_port_test_set: writes port test mode (execute without interruption)
183 * @mode: new value
184 *
185 * This function returns an error code
186 */
Alexander Shishkin8e229782013-06-24 14:46:36 +0300187int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
Alexander Shishkine443b332012-05-11 17:25:46 +0300188{
189 const u8 TEST_MODE_MAX = 7;
190
191 if (mode > TEST_MODE_MAX)
192 return -EINVAL;
193
Felipe Balbi727b4dd2013-03-30 12:53:55 +0200194 hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
Alexander Shishkine443b332012-05-11 17:25:46 +0300195 return 0;
196}
197
198/**
199 * hw_port_test_get: reads port test mode value
200 *
Peter Chen19353882014-09-22 08:14:17 +0800201 * @ci: the controller
202 *
Alexander Shishkine443b332012-05-11 17:25:46 +0300203 * This function returns port test mode value
204 */
Alexander Shishkin8e229782013-06-24 14:46:36 +0300205u8 hw_port_test_get(struct ci_hdrc *ci)
Alexander Shishkine443b332012-05-11 17:25:46 +0300206{
Felipe Balbi727b4dd2013-03-30 12:53:55 +0200207 return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
Alexander Shishkine443b332012-05-11 17:25:46 +0300208}
209
Peter Chenb82613c2014-11-26 13:44:28 +0800210static void hw_wait_phy_stable(void)
211{
212 /*
213 * The phy needs some delay to output the stable status from low
214 * power mode. And for OTGSC, the status inputs are debounced
215 * using a 1 ms time constant, so, delay 2ms for controller to get
216 * the stable status, like vbus and id when the phy leaves low power.
217 */
218 usleep_range(2000, 2500);
219}
220
Peter Chen864cf942013-09-24 12:47:55 +0800221/* The PHY enters/leaves low power mode */
222static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
223{
224 enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
225 bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
226
Peter Chen6d037db2014-11-26 13:44:27 +0800227 if (enable && !lpm)
Peter Chen864cf942013-09-24 12:47:55 +0800228 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
229 PORTSC_PHCD(ci->hw_bank.lpm));
Peter Chen6d037db2014-11-26 13:44:27 +0800230 else if (!enable && lpm)
Peter Chen864cf942013-09-24 12:47:55 +0800231 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
232 0);
Peter Chen864cf942013-09-24 12:47:55 +0800233}
234
Alexander Shishkin8e229782013-06-24 14:46:36 +0300235static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
Alexander Shishkine443b332012-05-11 17:25:46 +0300236{
237 u32 reg;
238
239 /* bank is a module variable */
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300240 ci->hw_bank.abs = base;
Alexander Shishkine443b332012-05-11 17:25:46 +0300241
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300242 ci->hw_bank.cap = ci->hw_bank.abs;
Richard Zhao77c44002012-06-29 17:48:53 +0800243 ci->hw_bank.cap += ci->platdata->capoffset;
Svetoslav Neykov938d3232013-03-30 12:54:03 +0200244 ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
Alexander Shishkine443b332012-05-11 17:25:46 +0300245
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300246 hw_alloc_regmap(ci, false);
247 reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
Felipe Balbi727b4dd2013-03-30 12:53:55 +0200248 __ffs(HCCPARAMS_LEN);
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300249 ci->hw_bank.lpm = reg;
Chris Ruehlaeb2c122013-12-06 16:35:12 +0800250 if (reg)
251 hw_alloc_regmap(ci, !!reg);
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300252 ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
253 ci->hw_bank.size += OP_LAST;
254 ci->hw_bank.size /= sizeof(u32);
Alexander Shishkine443b332012-05-11 17:25:46 +0300255
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300256 reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
Felipe Balbi727b4dd2013-03-30 12:53:55 +0200257 __ffs(DCCPARAMS_DEN);
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300258 ci->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
Alexander Shishkine443b332012-05-11 17:25:46 +0300259
Richard Zhao09c94e62012-05-15 21:58:18 +0800260 if (ci->hw_ep_max > ENDPT_MAX)
Alexander Shishkine443b332012-05-11 17:25:46 +0300261 return -ENODEV;
262
Peter Chen864cf942013-09-24 12:47:55 +0800263 ci_hdrc_enter_lpm(ci, false);
264
Peter Chenc344b512013-08-14 12:44:09 +0300265 /* Disable all interrupts bits */
266 hw_write(ci, OP_USBINTR, 0xffffffff, 0);
267
268 /* Clear all interrupts status bits*/
269 hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
270
Peter Chencb271f32015-02-11 12:44:55 +0800271 ci->rev = ci_get_revision(ci);
272
273 dev_dbg(ci->dev,
274 "ChipIdea HDRC found, revision: %d, lpm: %d; cap: %p op: %p\n",
275 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
Alexander Shishkine443b332012-05-11 17:25:46 +0300276
277 /* setup lock mode ? */
278
279 /* ENDPTSETUPSTAT is '0' by default */
280
281 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
282
283 return 0;
284}
285
Alexander Shishkin8e229782013-06-24 14:46:36 +0300286static void hw_phymode_configure(struct ci_hdrc *ci)
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +0300287{
Chris Ruehl3b5d3e62014-01-10 13:51:29 +0800288 u32 portsc, lpm, sts = 0;
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +0300289
290 switch (ci->platdata->phy_mode) {
291 case USBPHY_INTERFACE_MODE_UTMI:
292 portsc = PORTSC_PTS(PTS_UTMI);
293 lpm = DEVLC_PTS(PTS_UTMI);
294 break;
295 case USBPHY_INTERFACE_MODE_UTMIW:
296 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
297 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
298 break;
299 case USBPHY_INTERFACE_MODE_ULPI:
300 portsc = PORTSC_PTS(PTS_ULPI);
301 lpm = DEVLC_PTS(PTS_ULPI);
302 break;
303 case USBPHY_INTERFACE_MODE_SERIAL:
304 portsc = PORTSC_PTS(PTS_SERIAL);
305 lpm = DEVLC_PTS(PTS_SERIAL);
306 sts = 1;
307 break;
308 case USBPHY_INTERFACE_MODE_HSIC:
309 portsc = PORTSC_PTS(PTS_HSIC);
310 lpm = DEVLC_PTS(PTS_HSIC);
311 break;
312 default:
313 return;
314 }
315
316 if (ci->hw_bank.lpm) {
317 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
Chris Ruehl3b5d3e62014-01-10 13:51:29 +0800318 if (sts)
319 hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +0300320 } else {
321 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
Chris Ruehl3b5d3e62014-01-10 13:51:29 +0800322 if (sts)
323 hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
Michael Grzeschik40dcd0e2013-06-13 17:59:56 +0300324 }
325}
326
Alexander Shishkine443b332012-05-11 17:25:46 +0300327/**
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100328 * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
329 * interfaces
330 * @ci: the controller
331 *
332 * This function returns an error code if the phy failed to init
333 */
334static int _ci_usb_phy_init(struct ci_hdrc *ci)
335{
336 int ret;
337
338 if (ci->phy) {
339 ret = phy_init(ci->phy);
340 if (ret)
341 return ret;
342
343 ret = phy_power_on(ci->phy);
344 if (ret) {
345 phy_exit(ci->phy);
346 return ret;
347 }
348 } else {
349 ret = usb_phy_init(ci->usb_phy);
350 }
351
352 return ret;
353}
354
355/**
356 * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
357 * interfaces
358 * @ci: the controller
359 */
360static void ci_usb_phy_exit(struct ci_hdrc *ci)
361{
362 if (ci->phy) {
363 phy_power_off(ci->phy);
364 phy_exit(ci->phy);
365 } else {
366 usb_phy_shutdown(ci->usb_phy);
367 }
368}
369
370/**
Peter Chend03cccf2014-04-23 15:56:37 +0800371 * ci_usb_phy_init: initialize phy according to different phy type
372 * @ci: the controller
Peter Chen19353882014-09-22 08:14:17 +0800373 *
Peter Chend03cccf2014-04-23 15:56:37 +0800374 * This function returns an error code if usb_phy_init has failed
375 */
376static int ci_usb_phy_init(struct ci_hdrc *ci)
377{
378 int ret;
379
380 switch (ci->platdata->phy_mode) {
381 case USBPHY_INTERFACE_MODE_UTMI:
382 case USBPHY_INTERFACE_MODE_UTMIW:
383 case USBPHY_INTERFACE_MODE_HSIC:
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100384 ret = _ci_usb_phy_init(ci);
Peter Chenb82613c2014-11-26 13:44:28 +0800385 if (!ret)
386 hw_wait_phy_stable();
387 else
Peter Chend03cccf2014-04-23 15:56:37 +0800388 return ret;
389 hw_phymode_configure(ci);
390 break;
391 case USBPHY_INTERFACE_MODE_ULPI:
392 case USBPHY_INTERFACE_MODE_SERIAL:
393 hw_phymode_configure(ci);
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100394 ret = _ci_usb_phy_init(ci);
Peter Chend03cccf2014-04-23 15:56:37 +0800395 if (ret)
396 return ret;
397 break;
398 default:
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100399 ret = _ci_usb_phy_init(ci);
Peter Chenb82613c2014-11-26 13:44:28 +0800400 if (!ret)
401 hw_wait_phy_stable();
Peter Chend03cccf2014-04-23 15:56:37 +0800402 }
403
404 return ret;
405}
406
Peter Chenbf9c85e2015-03-17 10:40:50 +0800407
408/**
409 * ci_platform_configure: do controller configure
410 * @ci: the controller
411 *
412 */
413void ci_platform_configure(struct ci_hdrc *ci)
414{
415 if (ci->platdata->flags & CI_HDRC_DISABLE_STREAMING)
416 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
417
418 if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
419 if (ci->hw_bank.lpm)
420 hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
421 else
422 hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
423 }
424
425 if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
426 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
Peter Chendf96ed82014-09-22 16:45:39 +0800427
428 hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
429
Peter Chenbf9c85e2015-03-17 10:40:50 +0800430}
431
Peter Chend03cccf2014-04-23 15:56:37 +0800432/**
Peter Chencdd278f2014-11-26 13:44:32 +0800433 * hw_controller_reset: do controller reset
Alexander Shishkine443b332012-05-11 17:25:46 +0300434 * @ci: the controller
435 *
436 * This function returns an error code
437 */
Peter Chencdd278f2014-11-26 13:44:32 +0800438static int hw_controller_reset(struct ci_hdrc *ci)
439{
440 int count = 0;
441
442 hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
443 while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
444 udelay(10);
445 if (count++ > 1000)
446 return -ETIMEDOUT;
447 }
448
449 return 0;
450}
451
452/**
453 * hw_device_reset: resets chip (execute without interruption)
454 * @ci: the controller
455 *
456 * This function returns an error code
457 */
Peter Chen5b157302014-11-26 13:44:33 +0800458int hw_device_reset(struct ci_hdrc *ci)
Alexander Shishkine443b332012-05-11 17:25:46 +0300459{
Peter Chencdd278f2014-11-26 13:44:32 +0800460 int ret;
461
Alexander Shishkine443b332012-05-11 17:25:46 +0300462 /* should flush & stop before reset */
463 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
464 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
465
Peter Chencdd278f2014-11-26 13:44:32 +0800466 ret = hw_controller_reset(ci);
467 if (ret) {
468 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
469 return ret;
470 }
Alexander Shishkine443b332012-05-11 17:25:46 +0300471
Richard Zhao77c44002012-06-29 17:48:53 +0800472 if (ci->platdata->notify_event)
473 ci->platdata->notify_event(ci,
Alexander Shishkin8e229782013-06-24 14:46:36 +0300474 CI_HDRC_CONTROLLER_RESET_EVENT);
Alexander Shishkine443b332012-05-11 17:25:46 +0300475
Alexander Shishkine443b332012-05-11 17:25:46 +0300476 /* USBMODE should be configured step by step */
477 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
Peter Chen5b157302014-11-26 13:44:33 +0800478 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
Alexander Shishkine443b332012-05-11 17:25:46 +0300479 /* HW >= 2.3 */
480 hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
481
Peter Chen5b157302014-11-26 13:44:33 +0800482 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
483 pr_err("cannot enter in %s device mode", ci_role(ci)->name);
Alexander Shishkine443b332012-05-11 17:25:46 +0300484 pr_err("lpm = %i", ci->hw_bank.lpm);
485 return -ENODEV;
486 }
487
Peter Chenbf9c85e2015-03-17 10:40:50 +0800488 ci_platform_configure(ci);
489
Alexander Shishkine443b332012-05-11 17:25:46 +0300490 return 0;
491}
492
Peter Chen22fa8442013-08-14 12:44:12 +0300493/**
494 * hw_wait_reg: wait the register value
495 *
496 * Sometimes, it needs to wait register value before going on.
497 * Eg, when switch to device mode, the vbus value should be lower
498 * than OTGSC_BSV before connects to host.
499 *
500 * @ci: the controller
501 * @reg: register index
502 * @mask: mast bit
503 * @value: the bit value to wait
504 * @timeout_ms: timeout in millisecond
505 *
506 * This function returns an error code if timeout
507 */
508int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
509 u32 value, unsigned int timeout_ms)
510{
511 unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
512
513 while (hw_read(ci, reg, mask) != value) {
514 if (time_after(jiffies, elapse)) {
515 dev_err(ci->dev, "timeout waiting for %08x in %d\n",
516 mask, reg);
517 return -ETIMEDOUT;
518 }
519 msleep(20);
520 }
521
522 return 0;
523}
524
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300525static irqreturn_t ci_irq(int irq, void *data)
526{
Alexander Shishkin8e229782013-06-24 14:46:36 +0300527 struct ci_hdrc *ci = data;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300528 irqreturn_t ret = IRQ_NONE;
Richard Zhaob183c192012-09-12 14:58:11 +0300529 u32 otgsc = 0;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300530
Peter Chen1f874ed2015-02-11 12:44:45 +0800531 if (ci->in_lpm) {
532 disable_irq_nosync(irq);
533 ci->wakeup_int = true;
534 pm_runtime_get(ci->dev);
535 return IRQ_HANDLED;
536 }
537
Li Jun4dcf7202014-04-23 15:56:50 +0800538 if (ci->is_otg) {
Li Jun0c33bf72014-04-23 15:56:38 +0800539 otgsc = hw_read_otgsc(ci, ~0);
Li Jun4dcf7202014-04-23 15:56:50 +0800540 if (ci_otg_is_fsm_mode(ci)) {
541 ret = ci_otg_fsm_irq(ci);
542 if (ret == IRQ_HANDLED)
543 return ret;
544 }
545 }
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300546
Peter Chena107f8c2013-08-14 12:44:11 +0300547 /*
548 * Handle id change interrupt, it indicates device/host function
549 * switch.
550 */
551 if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
552 ci->id_event = true;
Li Jun0c33bf72014-04-23 15:56:38 +0800553 /* Clear ID change irq status */
554 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
Peter Chenbe6b0c12014-05-23 08:12:49 +0800555 ci_otg_queue_work(ci);
Peter Chena107f8c2013-08-14 12:44:11 +0300556 return IRQ_HANDLED;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300557 }
558
Peter Chena107f8c2013-08-14 12:44:11 +0300559 /*
560 * Handle vbus change interrupt, it indicates device connection
561 * and disconnection events.
562 */
563 if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
564 ci->b_sess_valid_event = true;
Li Jun0c33bf72014-04-23 15:56:38 +0800565 /* Clear BSV irq */
566 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
Peter Chenbe6b0c12014-05-23 08:12:49 +0800567 ci_otg_queue_work(ci);
Peter Chena107f8c2013-08-14 12:44:11 +0300568 return IRQ_HANDLED;
569 }
570
571 /* Handle device/host interrupt */
572 if (ci->role != CI_ROLE_END)
573 ret = ci_role(ci)->irq(ci);
574
Richard Zhaob183c192012-09-12 14:58:11 +0300575 return ret;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300576}
577
Peter Chen1542d9c2013-08-14 12:44:03 +0300578static int ci_get_platdata(struct device *dev,
579 struct ci_hdrc_platform_data *platdata)
580{
Peter Chendf96ed82014-09-22 16:45:39 +0800581 int ret;
582
Peter Chenc22600c2013-09-17 12:37:22 +0800583 if (!platdata->phy_mode)
584 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
585
586 if (!platdata->dr_mode)
587 platdata->dr_mode = of_usb_get_dr_mode(dev->of_node);
588
589 if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
590 platdata->dr_mode = USB_DR_MODE_OTG;
591
Peter Chenc2ec3a72013-10-30 09:19:29 +0800592 if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
593 /* Get the vbus regulator */
594 platdata->reg_vbus = devm_regulator_get(dev, "vbus");
595 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
596 return -EPROBE_DEFER;
597 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
Mickael Maison66294672014-11-26 13:44:38 +0800598 /* no vbus regulator is needed */
Peter Chenc2ec3a72013-10-30 09:19:29 +0800599 platdata->reg_vbus = NULL;
600 } else if (IS_ERR(platdata->reg_vbus)) {
601 dev_err(dev, "Getting regulator error: %ld\n",
602 PTR_ERR(platdata->reg_vbus));
603 return PTR_ERR(platdata->reg_vbus);
604 }
Peter Chenf6a9ff02014-08-19 09:51:56 +0800605 /* Get TPL support */
606 if (!platdata->tpl_support)
607 platdata->tpl_support =
608 of_usb_host_tpl_support(dev->of_node);
Peter Chenc2ec3a72013-10-30 09:19:29 +0800609 }
610
Michael Grzeschik4f6743d2014-02-19 13:41:43 +0800611 if (of_usb_get_maximum_speed(dev->of_node) == USB_SPEED_FULL)
612 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
613
Peter Chendf96ed82014-09-22 16:45:39 +0800614 platdata->itc_setting = 1;
615 if (of_find_property(dev->of_node, "itc-setting", NULL)) {
616 ret = of_property_read_u32(dev->of_node, "itc-setting",
617 &platdata->itc_setting);
618 if (ret) {
619 dev_err(dev,
620 "failed to get itc-setting\n");
621 return ret;
622 }
623 }
624
Peter Chen1542d9c2013-08-14 12:44:03 +0300625 return 0;
626}
627
Richard Zhaofe6e1252012-07-07 22:56:42 +0800628static DEFINE_IDA(ci_ida);
629
Alexander Shishkin8e229782013-06-24 14:46:36 +0300630struct platform_device *ci_hdrc_add_device(struct device *dev,
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800631 struct resource *res, int nres,
Alexander Shishkin8e229782013-06-24 14:46:36 +0300632 struct ci_hdrc_platform_data *platdata)
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800633{
634 struct platform_device *pdev;
Richard Zhaofe6e1252012-07-07 22:56:42 +0800635 int id, ret;
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800636
Peter Chen1542d9c2013-08-14 12:44:03 +0300637 ret = ci_get_platdata(dev, platdata);
638 if (ret)
639 return ERR_PTR(ret);
640
Richard Zhaofe6e1252012-07-07 22:56:42 +0800641 id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
642 if (id < 0)
643 return ERR_PTR(id);
644
645 pdev = platform_device_alloc("ci_hdrc", id);
646 if (!pdev) {
647 ret = -ENOMEM;
648 goto put_id;
649 }
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800650
651 pdev->dev.parent = dev;
652 pdev->dev.dma_mask = dev->dma_mask;
653 pdev->dev.dma_parms = dev->dma_parms;
654 dma_set_coherent_mask(&pdev->dev, dev->coherent_dma_mask);
655
656 ret = platform_device_add_resources(pdev, res, nres);
657 if (ret)
658 goto err;
659
660 ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
661 if (ret)
662 goto err;
663
664 ret = platform_device_add(pdev);
665 if (ret)
666 goto err;
667
668 return pdev;
669
670err:
671 platform_device_put(pdev);
Richard Zhaofe6e1252012-07-07 22:56:42 +0800672put_id:
673 ida_simple_remove(&ci_ida, id);
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800674 return ERR_PTR(ret);
675}
Alexander Shishkin8e229782013-06-24 14:46:36 +0300676EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800677
Alexander Shishkin8e229782013-06-24 14:46:36 +0300678void ci_hdrc_remove_device(struct platform_device *pdev)
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800679{
Lothar Waßmann98c35532012-11-22 10:11:25 +0100680 int id = pdev->id;
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800681 platform_device_unregister(pdev);
Lothar Waßmann98c35532012-11-22 10:11:25 +0100682 ida_simple_remove(&ci_ida, id);
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800683}
Alexander Shishkin8e229782013-06-24 14:46:36 +0300684EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
Richard Zhaocbc6dc22012-07-07 22:56:41 +0800685
Peter Chen3f124d22013-08-14 12:44:07 +0300686static inline void ci_role_destroy(struct ci_hdrc *ci)
687{
688 ci_hdrc_gadget_destroy(ci);
689 ci_hdrc_host_destroy(ci);
Peter Chencbec6bd2013-08-14 12:44:10 +0300690 if (ci->is_otg)
691 ci_hdrc_otg_destroy(ci);
Peter Chen3f124d22013-08-14 12:44:07 +0300692}
693
Peter Chen577b2322013-08-14 12:44:08 +0300694static void ci_get_otg_capable(struct ci_hdrc *ci)
695{
696 if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
697 ci->is_otg = false;
698 else
699 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
700 DCCPARAMS_DC | DCCPARAMS_HC)
701 == (DCCPARAMS_DC | DCCPARAMS_HC));
Peter Chen2e37cfd2015-02-11 12:44:51 +0800702 if (ci->is_otg) {
Peter Chen577b2322013-08-14 12:44:08 +0300703 dev_dbg(ci->dev, "It is OTG capable controller\n");
Peter Chen2e37cfd2015-02-11 12:44:51 +0800704 /* Disable and clear all OTG irq */
705 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
706 OTGSC_INT_STATUS_BITS);
707 }
Peter Chen577b2322013-08-14 12:44:08 +0300708}
709
Bill Pemberton41ac7b32012-11-19 13:21:48 -0500710static int ci_hdrc_probe(struct platform_device *pdev)
Alexander Shishkine443b332012-05-11 17:25:46 +0300711{
712 struct device *dev = &pdev->dev;
Alexander Shishkin8e229782013-06-24 14:46:36 +0300713 struct ci_hdrc *ci;
Alexander Shishkine443b332012-05-11 17:25:46 +0300714 struct resource *res;
715 void __iomem *base;
716 int ret;
Sascha Hauer691962d2013-06-13 17:59:57 +0300717 enum usb_dr_mode dr_mode;
Alexander Shishkine443b332012-05-11 17:25:46 +0300718
Jingoo Hanfad56742014-02-19 13:41:42 +0800719 if (!dev_get_platdata(dev)) {
Alexander Shishkine443b332012-05-11 17:25:46 +0300720 dev_err(dev, "platform data missing\n");
721 return -ENODEV;
722 }
723
724 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Felipe Balbi19290812013-03-30 02:46:27 +0200725 base = devm_ioremap_resource(dev, res);
726 if (IS_ERR(base))
727 return PTR_ERR(base);
Alexander Shishkine443b332012-05-11 17:25:46 +0300728
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300729 ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
Fabio Estevamd0f99242014-11-26 13:44:23 +0800730 if (!ci)
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300731 return -ENOMEM;
Alexander Shishkine443b332012-05-11 17:25:46 +0300732
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300733 ci->dev = dev;
Jingoo Hanfad56742014-02-19 13:41:42 +0800734 ci->platdata = dev_get_platdata(dev);
Peter Chened8f8312014-01-10 13:51:27 +0800735 ci->imx28_write_fix = !!(ci->platdata->flags &
736 CI_HDRC_IMX28_WRITE_FIX);
Peter Chen1f874ed2015-02-11 12:44:45 +0800737 ci->supports_runtime_pm = !!(ci->platdata->flags &
738 CI_HDRC_SUPPORTS_RUNTIME_PM);
Alexander Shishkine443b332012-05-11 17:25:46 +0300739
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300740 ret = hw_device_init(ci, base);
741 if (ret < 0) {
742 dev_err(dev, "can't initialize hardware\n");
743 return -ENODEV;
744 }
745
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100746 if (ci->platdata->phy) {
747 ci->phy = ci->platdata->phy;
748 } else if (ci->platdata->usb_phy) {
Antoine Tenartef44cb42014-10-30 18:41:16 +0100749 ci->usb_phy = ci->platdata->usb_phy;
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100750 } else {
Antoine Tenart21a5b572014-11-26 13:44:35 +0800751 ci->phy = devm_phy_get(dev->parent, "usb-phy");
752 ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2);
Peter Chenc859aa652014-02-19 13:41:40 +0800753
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100754 /* if both generic PHY and USB PHY layers aren't enabled */
755 if (PTR_ERR(ci->phy) == -ENOSYS &&
756 PTR_ERR(ci->usb_phy) == -ENXIO)
757 return -ENXIO;
Peter Chenc859aa652014-02-19 13:41:40 +0800758
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100759 if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
760 return -EPROBE_DEFER;
761
762 if (IS_ERR(ci->phy))
763 ci->phy = NULL;
764 else if (IS_ERR(ci->usb_phy))
765 ci->usb_phy = NULL;
Peter Chenc859aa652014-02-19 13:41:40 +0800766 }
767
Peter Chend03cccf2014-04-23 15:56:37 +0800768 ret = ci_usb_phy_init(ci);
Peter Chen74475ed2013-09-24 12:47:53 +0800769 if (ret) {
770 dev_err(dev, "unable to init phy: %d\n", ret);
771 return ret;
772 }
773
Alexander Shishkineb70e5a2012-05-11 17:25:54 +0300774 ci->hw_bank.phys = res->start;
775
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300776 ci->irq = platform_get_irq(pdev, 0);
777 if (ci->irq < 0) {
778 dev_err(dev, "missing IRQ\n");
Fabio Estevam42d18212014-02-19 13:41:44 +0800779 ret = ci->irq;
Peter Chenc859aa652014-02-19 13:41:40 +0800780 goto deinit_phy;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300781 }
782
Peter Chen577b2322013-08-14 12:44:08 +0300783 ci_get_otg_capable(ci);
784
Sascha Hauer691962d2013-06-13 17:59:57 +0300785 dr_mode = ci->platdata->dr_mode;
786 /* initialize role(s) before the interrupt is requested */
787 if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
788 ret = ci_hdrc_host_init(ci);
789 if (ret)
790 dev_info(dev, "doesn't support host\n");
791 }
792
793 if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
794 ret = ci_hdrc_gadget_init(ci);
795 if (ret)
796 dev_info(dev, "doesn't support gadget\n");
797 }
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300798
799 if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
800 dev_err(dev, "no supported roles\n");
Peter Chen74475ed2013-09-24 12:47:53 +0800801 ret = -ENODEV;
Peter Chenc859aa652014-02-19 13:41:40 +0800802 goto deinit_phy;
Peter Chencbec6bd2013-08-14 12:44:10 +0300803 }
804
Peter Chen27c62c22014-09-22 08:14:16 +0800805 if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
Peter Chencbec6bd2013-08-14 12:44:10 +0300806 ret = ci_hdrc_otg_init(ci);
807 if (ret) {
808 dev_err(dev, "init otg fails, ret = %d\n", ret);
809 goto stop;
810 }
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300811 }
812
813 if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
Peter Chen577b2322013-08-14 12:44:08 +0300814 if (ci->is_otg) {
Peter Chen577b2322013-08-14 12:44:08 +0300815 ci->role = ci_otg_role(ci);
Li Jun0c33bf72014-04-23 15:56:38 +0800816 /* Enable ID change irq */
817 hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
Peter Chen577b2322013-08-14 12:44:08 +0300818 } else {
819 /*
820 * If the controller is not OTG capable, but support
821 * role switch, the defalt role is gadget, and the
822 * user can switch it through debugfs.
823 */
824 ci->role = CI_ROLE_GADGET;
825 }
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300826 } else {
827 ci->role = ci->roles[CI_ROLE_HOST]
828 ? CI_ROLE_HOST
829 : CI_ROLE_GADGET;
830 }
831
Li Jun4dcf7202014-04-23 15:56:50 +0800832 if (!ci_otg_is_fsm_mode(ci)) {
Li Jun961ea492015-02-11 12:45:03 +0800833 /* only update vbus status for peripheral */
834 if (ci->role == CI_ROLE_GADGET)
835 ci_handle_vbus_change(ci);
836
Li Jun4dcf7202014-04-23 15:56:50 +0800837 ret = ci_role_start(ci, ci->role);
838 if (ret) {
839 dev_err(dev, "can't start %s role\n",
840 ci_role(ci)->name);
841 goto stop;
842 }
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300843 }
844
Peter Chen24c498d2014-12-24 11:33:17 +0800845 platform_set_drvdata(pdev, ci);
Peter Chen4c503dd2014-11-26 13:44:22 +0800846 ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
847 ci->platdata->name, ci);
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300848 if (ret)
849 goto stop;
850
Peter Chen1f874ed2015-02-11 12:44:45 +0800851 if (ci->supports_runtime_pm) {
852 pm_runtime_set_active(&pdev->dev);
853 pm_runtime_enable(&pdev->dev);
854 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
855 pm_runtime_mark_last_busy(ci->dev);
856 pm_runtime_use_autosuspend(&pdev->dev);
857 }
858
Li Jun4dcf7202014-04-23 15:56:50 +0800859 if (ci_otg_is_fsm_mode(ci))
860 ci_hdrc_otg_fsm_start(ci);
861
Peter Chenf8efa762015-02-11 12:44:48 +0800862 device_set_wakeup_capable(&pdev->dev, true);
863
Alexander Shishkinadf0f732013-03-30 12:53:53 +0200864 ret = dbg_create_files(ci);
865 if (!ret)
866 return 0;
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300867
Alexander Shishkin5f36e232012-05-11 17:25:47 +0300868stop:
Peter Chen3f124d22013-08-14 12:44:07 +0300869 ci_role_destroy(ci);
Peter Chenc859aa652014-02-19 13:41:40 +0800870deinit_phy:
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100871 ci_usb_phy_exit(ci);
Alexander Shishkine443b332012-05-11 17:25:46 +0300872
873 return ret;
874}
875
Bill Pembertonfb4e98a2012-11-19 13:26:20 -0500876static int ci_hdrc_remove(struct platform_device *pdev)
Alexander Shishkine443b332012-05-11 17:25:46 +0300877{
Alexander Shishkin8e229782013-06-24 14:46:36 +0300878 struct ci_hdrc *ci = platform_get_drvdata(pdev);
Alexander Shishkine443b332012-05-11 17:25:46 +0300879
Peter Chen1f874ed2015-02-11 12:44:45 +0800880 if (ci->supports_runtime_pm) {
881 pm_runtime_get_sync(&pdev->dev);
882 pm_runtime_disable(&pdev->dev);
883 pm_runtime_put_noidle(&pdev->dev);
884 }
885
Alexander Shishkinadf0f732013-03-30 12:53:53 +0200886 dbg_remove_files(ci);
Peter Chen3f124d22013-08-14 12:44:07 +0300887 ci_role_destroy(ci);
Peter Chen864cf942013-09-24 12:47:55 +0800888 ci_hdrc_enter_lpm(ci, true);
Antoine Tenart1e5e2d32014-10-30 18:41:19 +0100889 ci_usb_phy_exit(ci);
Alexander Shishkine443b332012-05-11 17:25:46 +0300890
891 return 0;
892}
893
Peter Chen1f874ed2015-02-11 12:44:45 +0800894#ifdef CONFIG_PM
Li Jun961ea492015-02-11 12:45:03 +0800895/* Prepare wakeup by SRP before suspend */
896static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
897{
898 if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
899 !hw_read_otgsc(ci, OTGSC_ID)) {
900 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
901 PORTSC_PP);
902 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
903 PORTSC_WKCN);
904 }
905}
906
907/* Handle SRP when wakeup by data pulse */
908static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
909{
910 if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
911 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
912 if (!hw_read_otgsc(ci, OTGSC_ID)) {
913 ci->fsm.a_srp_det = 1;
914 ci->fsm.a_bus_drop = 0;
915 } else {
916 ci->fsm.id = 1;
917 }
918 ci_otg_queue_work(ci);
919 }
920}
921
Peter Chen80769322014-11-26 13:44:29 +0800922static void ci_controller_suspend(struct ci_hdrc *ci)
923{
Peter Chen1f874ed2015-02-11 12:44:45 +0800924 disable_irq(ci->irq);
Peter Chen80769322014-11-26 13:44:29 +0800925 ci_hdrc_enter_lpm(ci, true);
Peter Chen1f874ed2015-02-11 12:44:45 +0800926 usb_phy_set_suspend(ci->usb_phy, 1);
927 ci->in_lpm = true;
928 enable_irq(ci->irq);
Peter Chen80769322014-11-26 13:44:29 +0800929}
930
931static int ci_controller_resume(struct device *dev)
932{
933 struct ci_hdrc *ci = dev_get_drvdata(dev);
934
935 dev_dbg(dev, "at %s\n", __func__);
936
Peter Chen1f874ed2015-02-11 12:44:45 +0800937 if (!ci->in_lpm) {
938 WARN_ON(1);
939 return 0;
940 }
Peter Chen80769322014-11-26 13:44:29 +0800941
Peter Chen1f874ed2015-02-11 12:44:45 +0800942 ci_hdrc_enter_lpm(ci, false);
Peter Chen80769322014-11-26 13:44:29 +0800943 if (ci->usb_phy) {
944 usb_phy_set_suspend(ci->usb_phy, 0);
945 usb_phy_set_wakeup(ci->usb_phy, false);
946 hw_wait_phy_stable();
947 }
948
Peter Chen1f874ed2015-02-11 12:44:45 +0800949 ci->in_lpm = false;
950 if (ci->wakeup_int) {
951 ci->wakeup_int = false;
952 pm_runtime_mark_last_busy(ci->dev);
953 pm_runtime_put_autosuspend(ci->dev);
954 enable_irq(ci->irq);
Li Jun961ea492015-02-11 12:45:03 +0800955 if (ci_otg_is_fsm_mode(ci))
956 ci_otg_fsm_wakeup_by_srp(ci);
Peter Chen1f874ed2015-02-11 12:44:45 +0800957 }
958
Peter Chen80769322014-11-26 13:44:29 +0800959 return 0;
960}
961
Peter Chen1f874ed2015-02-11 12:44:45 +0800962#ifdef CONFIG_PM_SLEEP
Peter Chen80769322014-11-26 13:44:29 +0800963static int ci_suspend(struct device *dev)
964{
965 struct ci_hdrc *ci = dev_get_drvdata(dev);
966
967 if (ci->wq)
968 flush_workqueue(ci->wq);
Peter Chen1f874ed2015-02-11 12:44:45 +0800969 /*
970 * Controller needs to be active during suspend, otherwise the core
971 * may run resume when the parent is at suspend if other driver's
972 * suspend fails, it occurs before parent's suspend has not started,
973 * but the core suspend has finished.
974 */
975 if (ci->in_lpm)
976 pm_runtime_resume(dev);
977
978 if (ci->in_lpm) {
979 WARN_ON(1);
980 return 0;
981 }
Peter Chen80769322014-11-26 13:44:29 +0800982
Peter Chenf8efa762015-02-11 12:44:48 +0800983 if (device_may_wakeup(dev)) {
Li Jun961ea492015-02-11 12:45:03 +0800984 if (ci_otg_is_fsm_mode(ci))
985 ci_otg_fsm_suspend_for_srp(ci);
986
Peter Chenf8efa762015-02-11 12:44:48 +0800987 usb_phy_set_wakeup(ci->usb_phy, true);
988 enable_irq_wake(ci->irq);
989 }
990
Peter Chen80769322014-11-26 13:44:29 +0800991 ci_controller_suspend(ci);
992
993 return 0;
994}
995
996static int ci_resume(struct device *dev)
997{
Peter Chen1f874ed2015-02-11 12:44:45 +0800998 struct ci_hdrc *ci = dev_get_drvdata(dev);
999 int ret;
1000
Peter Chenf8efa762015-02-11 12:44:48 +08001001 if (device_may_wakeup(dev))
1002 disable_irq_wake(ci->irq);
1003
Peter Chen1f874ed2015-02-11 12:44:45 +08001004 ret = ci_controller_resume(dev);
1005 if (ret)
1006 return ret;
1007
1008 if (ci->supports_runtime_pm) {
1009 pm_runtime_disable(dev);
1010 pm_runtime_set_active(dev);
1011 pm_runtime_enable(dev);
1012 }
1013
1014 return ret;
Peter Chen80769322014-11-26 13:44:29 +08001015}
1016#endif /* CONFIG_PM_SLEEP */
1017
Peter Chen1f874ed2015-02-11 12:44:45 +08001018static int ci_runtime_suspend(struct device *dev)
1019{
1020 struct ci_hdrc *ci = dev_get_drvdata(dev);
1021
1022 dev_dbg(dev, "at %s\n", __func__);
1023
1024 if (ci->in_lpm) {
1025 WARN_ON(1);
1026 return 0;
1027 }
1028
Li Jun961ea492015-02-11 12:45:03 +08001029 if (ci_otg_is_fsm_mode(ci))
1030 ci_otg_fsm_suspend_for_srp(ci);
1031
Peter Chen1f874ed2015-02-11 12:44:45 +08001032 usb_phy_set_wakeup(ci->usb_phy, true);
1033 ci_controller_suspend(ci);
1034
1035 return 0;
1036}
1037
1038static int ci_runtime_resume(struct device *dev)
1039{
1040 return ci_controller_resume(dev);
1041}
1042
1043#endif /* CONFIG_PM */
Peter Chen80769322014-11-26 13:44:29 +08001044static const struct dev_pm_ops ci_pm_ops = {
1045 SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
Peter Chen1f874ed2015-02-11 12:44:45 +08001046 SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
Peter Chen80769322014-11-26 13:44:29 +08001047};
Peter Chen1f874ed2015-02-11 12:44:45 +08001048
Alexander Shishkin5f36e232012-05-11 17:25:47 +03001049static struct platform_driver ci_hdrc_driver = {
1050 .probe = ci_hdrc_probe,
Bill Pemberton76904172012-11-19 13:21:08 -05001051 .remove = ci_hdrc_remove,
Alexander Shishkine443b332012-05-11 17:25:46 +03001052 .driver = {
Alexander Shishkin5f36e232012-05-11 17:25:47 +03001053 .name = "ci_hdrc",
Peter Chen80769322014-11-26 13:44:29 +08001054 .pm = &ci_pm_ops,
Alexander Shishkine443b332012-05-11 17:25:46 +03001055 },
1056};
1057
Peter Chen2f01a332015-07-21 09:51:29 +08001058static int __init ci_hdrc_platform_register(void)
1059{
1060 ci_hdrc_host_driver_init();
1061 return platform_driver_register(&ci_hdrc_driver);
1062}
1063module_init(ci_hdrc_platform_register);
1064
1065static void __exit ci_hdrc_platform_unregister(void)
1066{
1067 platform_driver_unregister(&ci_hdrc_driver);
1068}
1069module_exit(ci_hdrc_platform_unregister);
Alexander Shishkine443b332012-05-11 17:25:46 +03001070
Alexander Shishkin5f36e232012-05-11 17:25:47 +03001071MODULE_ALIAS("platform:ci_hdrc");
Alexander Shishkine443b332012-05-11 17:25:46 +03001072MODULE_LICENSE("GPL v2");
1073MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
Alexander Shishkin5f36e232012-05-11 17:25:47 +03001074MODULE_DESCRIPTION("ChipIdea HDRC Driver");