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Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001/*
2 * linux/arch/arm/plat-omap/gpio.c
3 *
4 * Support functions for OMAP GPIO
5 *
Tony Lindgren92105bb2005-09-07 17:20:26 +01006 * Copyright (C) 2003-2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +02007 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01008 *
Santosh Shilimkar44169072009-05-28 14:16:04 -07009 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010017#include <linux/init.h>
18#include <linux/module.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010019#include <linux/interrupt.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010020#include <linux/sysdev.h>
21#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000022#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010023#include <linux/io.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010024
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010026#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/irqs.h>
28#include <mach/gpio.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010029#include <asm/mach/irq.h>
30
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010031/*
32 * OMAP1510 GPIO registers
33 */
Tony Lindgren94113262009-08-28 10:50:33 -070034#define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010035#define OMAP1510_GPIO_DATA_INPUT 0x00
36#define OMAP1510_GPIO_DATA_OUTPUT 0x04
37#define OMAP1510_GPIO_DIR_CONTROL 0x08
38#define OMAP1510_GPIO_INT_CONTROL 0x0c
39#define OMAP1510_GPIO_INT_MASK 0x10
40#define OMAP1510_GPIO_INT_STATUS 0x14
41#define OMAP1510_GPIO_PIN_CONTROL 0x18
42
43#define OMAP1510_IH_GPIO_BASE 64
44
45/*
46 * OMAP1610 specific GPIO registers
47 */
Tony Lindgren94113262009-08-28 10:50:33 -070048#define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400)
49#define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00)
50#define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400)
51#define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010052#define OMAP1610_GPIO_REVISION 0x0000
53#define OMAP1610_GPIO_SYSCONFIG 0x0010
54#define OMAP1610_GPIO_SYSSTATUS 0x0014
55#define OMAP1610_GPIO_IRQSTATUS1 0x0018
56#define OMAP1610_GPIO_IRQENABLE1 0x001c
Tony Lindgren92105bb2005-09-07 17:20:26 +010057#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010058#define OMAP1610_GPIO_DATAIN 0x002c
59#define OMAP1610_GPIO_DATAOUT 0x0030
60#define OMAP1610_GPIO_DIRECTION 0x0034
61#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
62#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
63#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
Tony Lindgren92105bb2005-09-07 17:20:26 +010064#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010065#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
66#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
Tony Lindgren92105bb2005-09-07 17:20:26 +010067#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010068#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
69
70/*
71 * OMAP730 specific GPIO registers
72 */
Tony Lindgren94113262009-08-28 10:50:33 -070073#define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
74#define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
75#define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
76#define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
77#define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
78#define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010079#define OMAP730_GPIO_DATA_INPUT 0x00
80#define OMAP730_GPIO_DATA_OUTPUT 0x04
81#define OMAP730_GPIO_DIR_CONTROL 0x08
82#define OMAP730_GPIO_INT_CONTROL 0x0c
83#define OMAP730_GPIO_INT_MASK 0x10
84#define OMAP730_GPIO_INT_STATUS 0x14
85
Tony Lindgren92105bb2005-09-07 17:20:26 +010086/*
Zebediah C. McClure56739a62009-03-23 18:07:40 -070087 * OMAP850 specific GPIO registers
88 */
Tony Lindgren94113262009-08-28 10:50:33 -070089#define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
90#define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
91#define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
92#define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
93#define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
94#define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
Zebediah C. McClure56739a62009-03-23 18:07:40 -070095#define OMAP850_GPIO_DATA_INPUT 0x00
96#define OMAP850_GPIO_DATA_OUTPUT 0x04
97#define OMAP850_GPIO_DIR_CONTROL 0x08
98#define OMAP850_GPIO_INT_CONTROL 0x0c
99#define OMAP850_GPIO_INT_MASK 0x10
100#define OMAP850_GPIO_INT_STATUS 0x14
101
Tony Lindgren61755562009-08-28 10:50:34 -0700102#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
Tony Lindgren94113262009-08-28 10:50:33 -0700103
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700104/*
Tony Lindgren92105bb2005-09-07 17:20:26 +0100105 * omap24xx specific GPIO registers
106 */
Tony Lindgren94113262009-08-28 10:50:33 -0700107#define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000)
108#define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000)
109#define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000)
110#define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800111
Tony Lindgren94113262009-08-28 10:50:33 -0700112#define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000)
113#define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000)
114#define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000)
115#define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000)
116#define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800117
Tony Lindgren92105bb2005-09-07 17:20:26 +0100118#define OMAP24XX_GPIO_REVISION 0x0000
119#define OMAP24XX_GPIO_SYSCONFIG 0x0010
120#define OMAP24XX_GPIO_SYSSTATUS 0x0014
121#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300122#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
123#define OMAP24XX_GPIO_IRQENABLE2 0x002c
Tony Lindgren92105bb2005-09-07 17:20:26 +0100124#define OMAP24XX_GPIO_IRQENABLE1 0x001c
Tero Kristo723fdb72008-11-26 14:35:16 -0800125#define OMAP24XX_GPIO_WAKE_EN 0x0020
Tony Lindgren92105bb2005-09-07 17:20:26 +0100126#define OMAP24XX_GPIO_CTRL 0x0030
127#define OMAP24XX_GPIO_OE 0x0034
128#define OMAP24XX_GPIO_DATAIN 0x0038
129#define OMAP24XX_GPIO_DATAOUT 0x003c
130#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
131#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
132#define OMAP24XX_GPIO_RISINGDETECT 0x0048
133#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700134#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
135#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
Tony Lindgren92105bb2005-09-07 17:20:26 +0100136#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
137#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
138#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
139#define OMAP24XX_GPIO_SETWKUENA 0x0084
140#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
141#define OMAP24XX_GPIO_SETDATAOUT 0x0094
142
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800143/*
144 * omap34xx specific GPIO registers
145 */
146
Tony Lindgren94113262009-08-28 10:50:33 -0700147#define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000)
148#define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000)
149#define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000)
150#define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000)
151#define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000)
152#define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800153
Santosh Shilimkar44169072009-05-28 14:16:04 -0700154/*
155 * OMAP44XX specific GPIO registers
156 */
Tony Lindgren94113262009-08-28 10:50:33 -0700157#define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000)
158#define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000)
159#define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000)
160#define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000)
161#define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000)
162#define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800163
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100164struct gpio_bank {
Tony Lindgren92105bb2005-09-07 17:20:26 +0100165 void __iomem *base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100166 u16 irq;
167 u16 virtual_irq_start;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100168 int method;
Santosh Shilimkar44169072009-05-28 14:16:04 -0700169#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
170 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100171 u32 suspend_wakeup;
172 u32 saved_wakeup;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800173#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700174#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
175 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800176 u32 non_wakeup_gpios;
177 u32 enabled_non_wakeup_gpios;
178
179 u32 saved_datain;
180 u32 saved_fallingdetect;
181 u32 saved_risingdetect;
182#endif
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800183 u32 level_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100184 spinlock_t lock;
David Brownell52e31342008-03-03 12:43:23 -0800185 struct gpio_chip chip;
Jouni Hogander89db9482008-12-10 17:35:24 -0800186 struct clk *dbck;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100187};
188
189#define METHOD_MPUIO 0
190#define METHOD_GPIO_1510 1
191#define METHOD_GPIO_1610 2
192#define METHOD_GPIO_730 3
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700193#define METHOD_GPIO_850 4
194#define METHOD_GPIO_24XX 5
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100195
Tony Lindgren92105bb2005-09-07 17:20:26 +0100196#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100197static struct gpio_bank gpio_bank_1610[5] = {
Tony Lindgren94113262009-08-28 10:50:33 -0700198 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO},
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100199 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 },
200 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
201 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
202 { OMAP1610_GPIO4_BASE, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, METHOD_GPIO_1610 },
203};
204#endif
205
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000206#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100207static struct gpio_bank gpio_bank_1510[2] = {
Tony Lindgren94113262009-08-28 10:50:33 -0700208 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100209 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 }
210};
211#endif
212
213#ifdef CONFIG_ARCH_OMAP730
214static struct gpio_bank gpio_bank_730[7] = {
Tony Lindgren94113262009-08-28 10:50:33 -0700215 { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100216 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 },
217 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 },
218 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 },
219 { OMAP730_GPIO4_BASE, INT_730_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 },
220 { OMAP730_GPIO5_BASE, INT_730_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 },
221 { OMAP730_GPIO6_BASE, INT_730_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 },
222};
223#endif
224
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700225#ifdef CONFIG_ARCH_OMAP850
226static struct gpio_bank gpio_bank_850[7] = {
Tony Lindgren61755562009-08-28 10:50:34 -0700227 { OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700228 { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
229 { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
230 { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
231 { OMAP850_GPIO4_BASE, INT_850_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_850 },
232 { OMAP850_GPIO5_BASE, INT_850_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_850 },
233 { OMAP850_GPIO6_BASE, INT_850_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_850 },
234};
235#endif
236
237
Tony Lindgren92105bb2005-09-07 17:20:26 +0100238#ifdef CONFIG_ARCH_OMAP24XX
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800239
240static struct gpio_bank gpio_bank_242x[4] = {
241 { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
242 { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
243 { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
244 { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
Tony Lindgren92105bb2005-09-07 17:20:26 +0100245};
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800246
247static struct gpio_bank gpio_bank_243x[5] = {
248 { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
249 { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
250 { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
251 { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
252 { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
253};
254
Tony Lindgren92105bb2005-09-07 17:20:26 +0100255#endif
256
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800257#ifdef CONFIG_ARCH_OMAP34XX
258static struct gpio_bank gpio_bank_34xx[6] = {
259 { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
260 { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
261 { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
262 { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
263 { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
264 { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX },
265};
266
267#endif
268
Santosh Shilimkar44169072009-05-28 14:16:04 -0700269#ifdef CONFIG_ARCH_OMAP4
270static struct gpio_bank gpio_bank_44xx[6] = {
271 { OMAP44XX_GPIO1_BASE, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, \
272 METHOD_GPIO_24XX },
273 { OMAP44XX_GPIO2_BASE, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, \
274 METHOD_GPIO_24XX },
275 { OMAP44XX_GPIO3_BASE, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, \
276 METHOD_GPIO_24XX },
277 { OMAP44XX_GPIO4_BASE, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, \
278 METHOD_GPIO_24XX },
279 { OMAP44XX_GPIO5_BASE, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, \
280 METHOD_GPIO_24XX },
281 { OMAP44XX_GPIO6_BASE, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, \
282 METHOD_GPIO_24XX },
283};
284
285#endif
286
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100287static struct gpio_bank *gpio_bank;
288static int gpio_bank_count;
289
290static inline struct gpio_bank *get_gpio_bank(int gpio)
291{
Tony Lindgren6e60e792006-04-02 17:46:23 +0100292 if (cpu_is_omap15xx()) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100293 if (OMAP_GPIO_IS_MPUIO(gpio))
294 return &gpio_bank[0];
295 return &gpio_bank[1];
296 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100297 if (cpu_is_omap16xx()) {
298 if (OMAP_GPIO_IS_MPUIO(gpio))
299 return &gpio_bank[0];
300 return &gpio_bank[1 + (gpio >> 4)];
301 }
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700302 if (cpu_is_omap7xx()) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100303 if (OMAP_GPIO_IS_MPUIO(gpio))
304 return &gpio_bank[0];
305 return &gpio_bank[1 + (gpio >> 5)];
306 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100307 if (cpu_is_omap24xx())
308 return &gpio_bank[gpio >> 5];
Santosh Shilimkar44169072009-05-28 14:16:04 -0700309 if (cpu_is_omap34xx() || cpu_is_omap44xx())
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800310 return &gpio_bank[gpio >> 5];
David Brownelle031ab22008-12-10 17:35:27 -0800311 BUG();
312 return NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100313}
314
315static inline int get_gpio_index(int gpio)
316{
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700317 if (cpu_is_omap7xx())
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100318 return gpio & 0x1f;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100319 if (cpu_is_omap24xx())
320 return gpio & 0x1f;
Santosh Shilimkar44169072009-05-28 14:16:04 -0700321 if (cpu_is_omap34xx() || cpu_is_omap44xx())
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800322 return gpio & 0x1f;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100323 return gpio & 0x0f;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100324}
325
326static inline int gpio_valid(int gpio)
327{
328 if (gpio < 0)
329 return -1;
Tony Lindgrend11ac972008-01-12 15:35:04 -0800330 if (cpu_class_is_omap1() && OMAP_GPIO_IS_MPUIO(gpio)) {
Jonathan McDowell193e68b2006-09-25 12:41:30 +0300331 if (gpio >= OMAP_MAX_GPIO_LINES + 16)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100332 return -1;
333 return 0;
334 }
Tony Lindgren6e60e792006-04-02 17:46:23 +0100335 if (cpu_is_omap15xx() && gpio < 16)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100336 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100337 if ((cpu_is_omap16xx()) && gpio < 64)
338 return 0;
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700339 if (cpu_is_omap7xx() && gpio < 192)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100340 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100341 if (cpu_is_omap24xx() && gpio < 128)
342 return 0;
Santosh Shilimkar44169072009-05-28 14:16:04 -0700343 if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800344 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100345 return -1;
346}
347
348static int check_gpio(int gpio)
349{
350 if (unlikely(gpio_valid(gpio)) < 0) {
351 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio);
352 dump_stack();
353 return -1;
354 }
355 return 0;
356}
357
358static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
359{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100360 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100361 u32 l;
362
363 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800364#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100365 case METHOD_MPUIO:
366 reg += OMAP_MPUIO_IO_CNTL;
367 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800368#endif
369#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100370 case METHOD_GPIO_1510:
371 reg += OMAP1510_GPIO_DIR_CONTROL;
372 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800373#endif
374#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100375 case METHOD_GPIO_1610:
376 reg += OMAP1610_GPIO_DIRECTION;
377 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800378#endif
379#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100380 case METHOD_GPIO_730:
381 reg += OMAP730_GPIO_DIR_CONTROL;
382 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800383#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700384#ifdef CONFIG_ARCH_OMAP850
385 case METHOD_GPIO_850:
386 reg += OMAP850_GPIO_DIR_CONTROL;
387 break;
388#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700389#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
390 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100391 case METHOD_GPIO_24XX:
392 reg += OMAP24XX_GPIO_OE;
393 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800394#endif
395 default:
396 WARN_ON(1);
397 return;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100398 }
399 l = __raw_readl(reg);
400 if (is_input)
401 l |= 1 << gpio;
402 else
403 l &= ~(1 << gpio);
404 __raw_writel(l, reg);
405}
406
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100407static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
408{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100409 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100410 u32 l = 0;
411
412 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800413#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100414 case METHOD_MPUIO:
415 reg += OMAP_MPUIO_OUTPUT;
416 l = __raw_readl(reg);
417 if (enable)
418 l |= 1 << gpio;
419 else
420 l &= ~(1 << gpio);
421 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800422#endif
423#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100424 case METHOD_GPIO_1510:
425 reg += OMAP1510_GPIO_DATA_OUTPUT;
426 l = __raw_readl(reg);
427 if (enable)
428 l |= 1 << gpio;
429 else
430 l &= ~(1 << gpio);
431 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800432#endif
433#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100434 case METHOD_GPIO_1610:
435 if (enable)
436 reg += OMAP1610_GPIO_SET_DATAOUT;
437 else
438 reg += OMAP1610_GPIO_CLEAR_DATAOUT;
439 l = 1 << gpio;
440 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800441#endif
442#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100443 case METHOD_GPIO_730:
444 reg += OMAP730_GPIO_DATA_OUTPUT;
445 l = __raw_readl(reg);
446 if (enable)
447 l |= 1 << gpio;
448 else
449 l &= ~(1 << gpio);
450 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800451#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700452#ifdef CONFIG_ARCH_OMAP850
453 case METHOD_GPIO_850:
454 reg += OMAP850_GPIO_DATA_OUTPUT;
455 l = __raw_readl(reg);
456 if (enable)
457 l |= 1 << gpio;
458 else
459 l &= ~(1 << gpio);
460 break;
461#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700462#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
463 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100464 case METHOD_GPIO_24XX:
465 if (enable)
466 reg += OMAP24XX_GPIO_SETDATAOUT;
467 else
468 reg += OMAP24XX_GPIO_CLEARDATAOUT;
469 l = 1 << gpio;
470 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800471#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100472 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800473 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100474 return;
475 }
476 __raw_writel(l, reg);
477}
478
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300479static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100480{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100481 void __iomem *reg;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100482
483 if (check_gpio(gpio) < 0)
David Brownelle5c56ed2006-12-06 17:13:59 -0800484 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100485 reg = bank->base;
486 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800487#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100488 case METHOD_MPUIO:
489 reg += OMAP_MPUIO_INPUT_LATCH;
490 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800491#endif
492#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100493 case METHOD_GPIO_1510:
494 reg += OMAP1510_GPIO_DATA_INPUT;
495 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800496#endif
497#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100498 case METHOD_GPIO_1610:
499 reg += OMAP1610_GPIO_DATAIN;
500 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800501#endif
502#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100503 case METHOD_GPIO_730:
504 reg += OMAP730_GPIO_DATA_INPUT;
505 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800506#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700507#ifdef CONFIG_ARCH_OMAP850
508 case METHOD_GPIO_850:
509 reg += OMAP850_GPIO_DATA_INPUT;
510 break;
511#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700512#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
513 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100514 case METHOD_GPIO_24XX:
515 reg += OMAP24XX_GPIO_DATAIN;
516 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800517#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100518 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800519 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100520 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100521 return (__raw_readl(reg)
522 & (1 << get_gpio_index(gpio))) != 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100523}
524
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300525static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
526{
527 void __iomem *reg;
528
529 if (check_gpio(gpio) < 0)
530 return -EINVAL;
531 reg = bank->base;
532
533 switch (bank->method) {
534#ifdef CONFIG_ARCH_OMAP1
535 case METHOD_MPUIO:
536 reg += OMAP_MPUIO_OUTPUT;
537 break;
538#endif
539#ifdef CONFIG_ARCH_OMAP15XX
540 case METHOD_GPIO_1510:
541 reg += OMAP1510_GPIO_DATA_OUTPUT;
542 break;
543#endif
544#ifdef CONFIG_ARCH_OMAP16XX
545 case METHOD_GPIO_1610:
546 reg += OMAP1610_GPIO_DATAOUT;
547 break;
548#endif
549#ifdef CONFIG_ARCH_OMAP730
550 case METHOD_GPIO_730:
551 reg += OMAP730_GPIO_DATA_OUTPUT;
552 break;
553#endif
554#ifdef CONFIG_ARCH_OMAP850
555 case METHOD_GPIO_850:
556 reg += OMAP850_GPIO_DATA_OUTPUT;
557 break;
558#endif
559#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
560 defined(CONFIG_ARCH_OMAP4)
561 case METHOD_GPIO_24XX:
562 reg += OMAP24XX_GPIO_DATAOUT;
563 break;
564#endif
565 default:
566 return -EINVAL;
567 }
568
569 return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;
570}
571
Tony Lindgren92105bb2005-09-07 17:20:26 +0100572#define MOD_REG_BIT(reg, bit_mask, set) \
573do { \
574 int l = __raw_readl(base + reg); \
575 if (set) l |= bit_mask; \
576 else l &= ~bit_mask; \
577 __raw_writel(l, base + reg); \
578} while(0)
579
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700580void omap_set_gpio_debounce(int gpio, int enable)
581{
582 struct gpio_bank *bank;
583 void __iomem *reg;
David Brownelle031ab22008-12-10 17:35:27 -0800584 unsigned long flags;
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700585 u32 val, l = 1 << get_gpio_index(gpio);
586
587 if (cpu_class_is_omap1())
588 return;
589
590 bank = get_gpio_bank(gpio);
591 reg = bank->base;
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700592 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
David Brownelle031ab22008-12-10 17:35:27 -0800593
594 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700595 val = __raw_readl(reg);
596
Jouni Hogander89db9482008-12-10 17:35:24 -0800597 if (enable && !(val & l))
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700598 val |= l;
David Brownelle031ab22008-12-10 17:35:27 -0800599 else if (!enable && (val & l))
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700600 val &= ~l;
Jouni Hogander89db9482008-12-10 17:35:24 -0800601 else
David Brownelle031ab22008-12-10 17:35:27 -0800602 goto done;
Jouni Hogander89db9482008-12-10 17:35:24 -0800603
Santosh Shilimkar44169072009-05-28 14:16:04 -0700604 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
David Brownelle031ab22008-12-10 17:35:27 -0800605 if (enable)
606 clk_enable(bank->dbck);
607 else
608 clk_disable(bank->dbck);
609 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700610
611 __raw_writel(val, reg);
David Brownelle031ab22008-12-10 17:35:27 -0800612done:
613 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700614}
615EXPORT_SYMBOL(omap_set_gpio_debounce);
616
617void omap_set_gpio_debounce_time(int gpio, int enc_time)
618{
619 struct gpio_bank *bank;
620 void __iomem *reg;
621
622 if (cpu_class_is_omap1())
623 return;
624
625 bank = get_gpio_bank(gpio);
626 reg = bank->base;
627
628 enc_time &= 0xff;
629 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
630 __raw_writel(enc_time, reg);
631}
632EXPORT_SYMBOL(omap_set_gpio_debounce_time);
633
Santosh Shilimkar44169072009-05-28 14:16:04 -0700634#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
635 defined(CONFIG_ARCH_OMAP4)
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700636static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
637 int trigger)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100638{
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800639 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100640 u32 gpio_bit = 1 << gpio;
641
642 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100643 trigger & IRQ_TYPE_LEVEL_LOW);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100644 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100645 trigger & IRQ_TYPE_LEVEL_HIGH);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100646 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100647 trigger & IRQ_TYPE_EDGE_RISING);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100648 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100649 trigger & IRQ_TYPE_EDGE_FALLING);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700650
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800651 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
652 if (trigger != 0)
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700653 __raw_writel(1 << gpio, bank->base
654 + OMAP24XX_GPIO_SETWKUENA);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800655 else
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700656 __raw_writel(1 << gpio, bank->base
657 + OMAP24XX_GPIO_CLEARWKUENA);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800658 } else {
659 if (trigger != 0)
660 bank->enabled_non_wakeup_gpios |= gpio_bit;
661 else
662 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
663 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700664
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800665 bank->level_mask =
666 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
667 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100668}
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800669#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +0100670
671static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
672{
673 void __iomem *reg = bank->base;
674 u32 l = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100675
676 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800677#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100678 case METHOD_MPUIO:
679 reg += OMAP_MPUIO_GPIO_INT_EDGE;
680 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100681 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100682 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100683 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100684 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100685 else
686 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100687 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800688#endif
689#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100690 case METHOD_GPIO_1510:
691 reg += OMAP1510_GPIO_INT_CONTROL;
692 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100693 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100694 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100695 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100696 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100697 else
698 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100699 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800700#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800701#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100702 case METHOD_GPIO_1610:
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100703 if (gpio & 0x08)
704 reg += OMAP1610_GPIO_EDGE_CTRL2;
705 else
706 reg += OMAP1610_GPIO_EDGE_CTRL1;
707 gpio &= 0x07;
708 l = __raw_readl(reg);
709 l &= ~(3 << (gpio << 1));
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100710 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100711 l |= 2 << (gpio << 1);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100712 if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100713 l |= 1 << (gpio << 1);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800714 if (trigger)
715 /* Enable wake-up during idle for dynamic tick */
716 __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
717 else
718 __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100719 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800720#endif
721#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100722 case METHOD_GPIO_730:
723 reg += OMAP730_GPIO_INT_CONTROL;
724 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100725 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100726 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100727 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100728 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100729 else
730 goto bad;
731 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800732#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700733#ifdef CONFIG_ARCH_OMAP850
734 case METHOD_GPIO_850:
735 reg += OMAP850_GPIO_INT_CONTROL;
736 l = __raw_readl(reg);
737 if (trigger & IRQ_TYPE_EDGE_RISING)
738 l |= 1 << gpio;
739 else if (trigger & IRQ_TYPE_EDGE_FALLING)
740 l &= ~(1 << gpio);
741 else
742 goto bad;
743 break;
744#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700745#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
746 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100747 case METHOD_GPIO_24XX:
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800748 set_24xx_gpio_triggering(bank, gpio, trigger);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100749 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800750#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100751 default:
Tony Lindgren92105bb2005-09-07 17:20:26 +0100752 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100753 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100754 __raw_writel(l, reg);
755 return 0;
756bad:
757 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100758}
759
Tony Lindgren92105bb2005-09-07 17:20:26 +0100760static int gpio_irq_type(unsigned irq, unsigned type)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100761{
762 struct gpio_bank *bank;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100763 unsigned gpio;
764 int retval;
David Brownella6472532008-03-03 04:33:30 -0800765 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100766
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800767 if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100768 gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
769 else
770 gpio = irq - IH_GPIO_BASE;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100771
772 if (check_gpio(gpio) < 0)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100773 return -EINVAL;
774
David Brownelle5c56ed2006-12-06 17:13:59 -0800775 if (type & ~IRQ_TYPE_SENSE_MASK)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100776 return -EINVAL;
David Brownelle5c56ed2006-12-06 17:13:59 -0800777
778 /* OMAP1 allows only only edge triggering */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800779 if (!cpu_class_is_omap2()
David Brownelle5c56ed2006-12-06 17:13:59 -0800780 && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
Tony Lindgren92105bb2005-09-07 17:20:26 +0100781 return -EINVAL;
782
David Brownell58781012006-12-06 17:14:10 -0800783 bank = get_irq_chip_data(irq);
David Brownella6472532008-03-03 04:33:30 -0800784 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100785 retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
David Brownellb9772a22006-12-06 17:13:53 -0800786 if (retval == 0) {
787 irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
788 irq_desc[irq].status |= type;
789 }
David Brownella6472532008-03-03 04:33:30 -0800790 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman672e3022008-01-16 21:56:16 -0800791
792 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
793 __set_irq_handler_unlocked(irq, handle_level_irq);
794 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
795 __set_irq_handler_unlocked(irq, handle_edge_irq);
796
Tony Lindgren92105bb2005-09-07 17:20:26 +0100797 return retval;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100798}
799
800static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
801{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100802 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100803
804 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800805#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100806 case METHOD_MPUIO:
807 /* MPUIO irqstatus is reset by reading the status register,
808 * so do nothing here */
809 return;
David Brownelle5c56ed2006-12-06 17:13:59 -0800810#endif
811#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100812 case METHOD_GPIO_1510:
813 reg += OMAP1510_GPIO_INT_STATUS;
814 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800815#endif
816#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100817 case METHOD_GPIO_1610:
818 reg += OMAP1610_GPIO_IRQSTATUS1;
819 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800820#endif
821#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100822 case METHOD_GPIO_730:
823 reg += OMAP730_GPIO_INT_STATUS;
824 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800825#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700826#ifdef CONFIG_ARCH_OMAP850
827 case METHOD_GPIO_850:
828 reg += OMAP850_GPIO_INT_STATUS;
829 break;
830#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700831#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
832 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100833 case METHOD_GPIO_24XX:
834 reg += OMAP24XX_GPIO_IRQSTATUS1;
835 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800836#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100837 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800838 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100839 return;
840 }
841 __raw_writel(gpio_mask, reg);
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300842
843 /* Workaround for clearing DSP GPIO interrupts to allow retention */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800844#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Roger Quadrosbedfd152009-04-23 11:10:50 -0700845 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800846 if (cpu_is_omap24xx() || cpu_is_omap34xx())
Roger Quadrosbedfd152009-04-23 11:10:50 -0700847 __raw_writel(gpio_mask, reg);
848
849 /* Flush posted write for the irq status to avoid spurious interrupts */
850 __raw_readl(reg);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800851#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100852}
853
854static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
855{
856 _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio));
857}
858
Imre Deakea6dedd2006-06-26 16:16:00 -0700859static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
860{
861 void __iomem *reg = bank->base;
Imre Deak99c47702006-06-26 16:16:07 -0700862 int inv = 0;
863 u32 l;
864 u32 mask;
Imre Deakea6dedd2006-06-26 16:16:00 -0700865
866 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800867#ifdef CONFIG_ARCH_OMAP1
Imre Deakea6dedd2006-06-26 16:16:00 -0700868 case METHOD_MPUIO:
869 reg += OMAP_MPUIO_GPIO_MASKIT;
Imre Deak99c47702006-06-26 16:16:07 -0700870 mask = 0xffff;
871 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700872 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800873#endif
874#ifdef CONFIG_ARCH_OMAP15XX
Imre Deakea6dedd2006-06-26 16:16:00 -0700875 case METHOD_GPIO_1510:
876 reg += OMAP1510_GPIO_INT_MASK;
Imre Deak99c47702006-06-26 16:16:07 -0700877 mask = 0xffff;
878 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700879 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800880#endif
881#ifdef CONFIG_ARCH_OMAP16XX
Imre Deakea6dedd2006-06-26 16:16:00 -0700882 case METHOD_GPIO_1610:
883 reg += OMAP1610_GPIO_IRQENABLE1;
Imre Deak99c47702006-06-26 16:16:07 -0700884 mask = 0xffff;
Imre Deakea6dedd2006-06-26 16:16:00 -0700885 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800886#endif
887#ifdef CONFIG_ARCH_OMAP730
Imre Deakea6dedd2006-06-26 16:16:00 -0700888 case METHOD_GPIO_730:
889 reg += OMAP730_GPIO_INT_MASK;
Imre Deak99c47702006-06-26 16:16:07 -0700890 mask = 0xffffffff;
891 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700892 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800893#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700894#ifdef CONFIG_ARCH_OMAP850
895 case METHOD_GPIO_850:
896 reg += OMAP850_GPIO_INT_MASK;
897 mask = 0xffffffff;
898 inv = 1;
899 break;
900#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700901#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
902 defined(CONFIG_ARCH_OMAP4)
Imre Deakea6dedd2006-06-26 16:16:00 -0700903 case METHOD_GPIO_24XX:
904 reg += OMAP24XX_GPIO_IRQENABLE1;
Imre Deak99c47702006-06-26 16:16:07 -0700905 mask = 0xffffffff;
Imre Deakea6dedd2006-06-26 16:16:00 -0700906 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800907#endif
Imre Deakea6dedd2006-06-26 16:16:00 -0700908 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800909 WARN_ON(1);
Imre Deakea6dedd2006-06-26 16:16:00 -0700910 return 0;
911 }
912
Imre Deak99c47702006-06-26 16:16:07 -0700913 l = __raw_readl(reg);
914 if (inv)
915 l = ~l;
916 l &= mask;
917 return l;
Imre Deakea6dedd2006-06-26 16:16:00 -0700918}
919
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100920static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
921{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100922 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100923 u32 l;
924
925 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800926#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100927 case METHOD_MPUIO:
928 reg += OMAP_MPUIO_GPIO_MASKIT;
929 l = __raw_readl(reg);
930 if (enable)
931 l &= ~(gpio_mask);
932 else
933 l |= gpio_mask;
934 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800935#endif
936#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100937 case METHOD_GPIO_1510:
938 reg += OMAP1510_GPIO_INT_MASK;
939 l = __raw_readl(reg);
940 if (enable)
941 l &= ~(gpio_mask);
942 else
943 l |= gpio_mask;
944 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800945#endif
946#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100947 case METHOD_GPIO_1610:
948 if (enable)
949 reg += OMAP1610_GPIO_SET_IRQENABLE1;
950 else
951 reg += OMAP1610_GPIO_CLEAR_IRQENABLE1;
952 l = gpio_mask;
953 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800954#endif
955#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100956 case METHOD_GPIO_730:
957 reg += OMAP730_GPIO_INT_MASK;
958 l = __raw_readl(reg);
959 if (enable)
960 l &= ~(gpio_mask);
961 else
962 l |= gpio_mask;
963 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800964#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -0700965#ifdef CONFIG_ARCH_OMAP850
966 case METHOD_GPIO_850:
967 reg += OMAP850_GPIO_INT_MASK;
968 l = __raw_readl(reg);
969 if (enable)
970 l &= ~(gpio_mask);
971 else
972 l |= gpio_mask;
973 break;
974#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -0700975#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
976 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100977 case METHOD_GPIO_24XX:
978 if (enable)
979 reg += OMAP24XX_GPIO_SETIRQENABLE1;
980 else
981 reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
982 l = gpio_mask;
983 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800984#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100985 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800986 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100987 return;
988 }
989 __raw_writel(l, reg);
990}
991
992static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
993{
994 _enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio), enable);
995}
996
Tony Lindgren92105bb2005-09-07 17:20:26 +0100997/*
998 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
999 * 1510 does not seem to have a wake-up register. If JTAG is connected
1000 * to the target, system will wake up always on GPIO events. While
1001 * system is running all registered GPIO interrupts need to have wake-up
1002 * enabled. When system is suspended, only selected GPIO interrupts need
1003 * to have wake-up enabled.
1004 */
1005static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
1006{
David Brownella6472532008-03-03 04:33:30 -08001007 unsigned long flags;
1008
Tony Lindgren92105bb2005-09-07 17:20:26 +01001009 switch (bank->method) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001010#ifdef CONFIG_ARCH_OMAP16XX
David Brownell11a78b72006-12-06 17:14:11 -08001011 case METHOD_MPUIO:
Tony Lindgren92105bb2005-09-07 17:20:26 +01001012 case METHOD_GPIO_1610:
David Brownella6472532008-03-03 04:33:30 -08001013 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanb3bb4f62009-04-23 11:10:49 -07001014 if (enable)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001015 bank->suspend_wakeup |= (1 << gpio);
Kevin Hilmanb3bb4f62009-04-23 11:10:49 -07001016 else
Tony Lindgren92105bb2005-09-07 17:20:26 +01001017 bank->suspend_wakeup &= ~(1 << gpio);
David Brownella6472532008-03-03 04:33:30 -08001018 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001019 return 0;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001020#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001021#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1022 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001023 case METHOD_GPIO_24XX:
David Brownell11a78b72006-12-06 17:14:11 -08001024 if (bank->non_wakeup_gpios & (1 << gpio)) {
1025 printk(KERN_ERR "Unable to modify wakeup on "
1026 "non-wakeup GPIO%d\n",
1027 (bank - gpio_bank) * 32 + gpio);
1028 return -EINVAL;
1029 }
David Brownella6472532008-03-03 04:33:30 -08001030 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanb3bb4f62009-04-23 11:10:49 -07001031 if (enable)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001032 bank->suspend_wakeup |= (1 << gpio);
Kevin Hilmanb3bb4f62009-04-23 11:10:49 -07001033 else
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001034 bank->suspend_wakeup &= ~(1 << gpio);
David Brownella6472532008-03-03 04:33:30 -08001035 spin_unlock_irqrestore(&bank->lock, flags);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001036 return 0;
1037#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001038 default:
1039 printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n",
1040 bank->method);
1041 return -EINVAL;
1042 }
1043}
1044
Tony Lindgren4196dd62006-09-25 12:41:38 +03001045static void _reset_gpio(struct gpio_bank *bank, int gpio)
1046{
1047 _set_gpio_direction(bank, get_gpio_index(gpio), 1);
1048 _set_gpio_irqenable(bank, gpio, 0);
1049 _clear_gpio_irqstatus(bank, gpio);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +01001050 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
Tony Lindgren4196dd62006-09-25 12:41:38 +03001051}
1052
Tony Lindgren92105bb2005-09-07 17:20:26 +01001053/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
1054static int gpio_wake_enable(unsigned int irq, unsigned int enable)
1055{
1056 unsigned int gpio = irq - IH_GPIO_BASE;
1057 struct gpio_bank *bank;
1058 int retval;
1059
1060 if (check_gpio(gpio) < 0)
1061 return -ENODEV;
David Brownell58781012006-12-06 17:14:10 -08001062 bank = get_irq_chip_data(irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001063 retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001064
1065 return retval;
1066}
1067
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001068static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001069{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001070 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -08001071 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001072
David Brownella6472532008-03-03 04:33:30 -08001073 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001074
Tony Lindgren4196dd62006-09-25 12:41:38 +03001075 /* Set trigger to none. You need to enable the desired trigger with
1076 * request_irq() or set_irq_type().
1077 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001078 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001079
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001080#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001081 if (bank->method == METHOD_GPIO_1510) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001082 void __iomem *reg;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001083
Tony Lindgren92105bb2005-09-07 17:20:26 +01001084 /* Claim the pin for MPU */
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001085 reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001086 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001087 }
1088#endif
David Brownella6472532008-03-03 04:33:30 -08001089 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001090
1091 return 0;
1092}
1093
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001094static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001095{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001096 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -08001097 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001098
David Brownella6472532008-03-03 04:33:30 -08001099 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001100#ifdef CONFIG_ARCH_OMAP16XX
1101 if (bank->method == METHOD_GPIO_1610) {
1102 /* Disable wake-up during idle for dynamic tick */
1103 void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001104 __raw_writel(1 << offset, reg);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001105 }
1106#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001107#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1108 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001109 if (bank->method == METHOD_GPIO_24XX) {
1110 /* Disable wake-up during idle for dynamic tick */
1111 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001112 __raw_writel(1 << offset, reg);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001113 }
1114#endif
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001115 _reset_gpio(bank, bank->chip.base + offset);
David Brownella6472532008-03-03 04:33:30 -08001116 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001117}
1118
1119/*
1120 * We need to unmask the GPIO bank interrupt as soon as possible to
1121 * avoid missing GPIO interrupts for other lines in the bank.
1122 * Then we need to mask-read-clear-unmask the triggered GPIO lines
1123 * in the bank to avoid missing nested interrupts for a GPIO line.
1124 * If we wait to unmask individual GPIO lines in the bank after the
1125 * line's interrupt handler has been run, we may miss some nested
1126 * interrupts.
1127 */
Russell King10dd5ce2006-11-23 11:41:32 +00001128static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001129{
Tony Lindgren92105bb2005-09-07 17:20:26 +01001130 void __iomem *isr_reg = NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001131 u32 isr;
1132 unsigned int gpio_irq;
1133 struct gpio_bank *bank;
Imre Deakea6dedd2006-06-26 16:16:00 -07001134 u32 retrigger = 0;
1135 int unmasked = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001136
1137 desc->chip->ack(irq);
1138
Thomas Gleixner418ca1f02006-07-01 22:32:41 +01001139 bank = get_irq_data(irq);
David Brownelle5c56ed2006-12-06 17:13:59 -08001140#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001141 if (bank->method == METHOD_MPUIO)
1142 isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
David Brownelle5c56ed2006-12-06 17:13:59 -08001143#endif
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001144#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001145 if (bank->method == METHOD_GPIO_1510)
1146 isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
1147#endif
1148#if defined(CONFIG_ARCH_OMAP16XX)
1149 if (bank->method == METHOD_GPIO_1610)
1150 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
1151#endif
1152#ifdef CONFIG_ARCH_OMAP730
1153 if (bank->method == METHOD_GPIO_730)
1154 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
1155#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -07001156#ifdef CONFIG_ARCH_OMAP850
1157 if (bank->method == METHOD_GPIO_850)
1158 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
1159#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001160#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1161 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001162 if (bank->method == METHOD_GPIO_24XX)
1163 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
1164#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001165 while(1) {
Tony Lindgren6e60e792006-04-02 17:46:23 +01001166 u32 isr_saved, level_mask = 0;
Imre Deakea6dedd2006-06-26 16:16:00 -07001167 u32 enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +01001168
Imre Deakea6dedd2006-06-26 16:16:00 -07001169 enabled = _get_gpio_irqbank_mask(bank);
1170 isr_saved = isr = __raw_readl(isr_reg) & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +01001171
1172 if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
1173 isr &= 0x0000ffff;
1174
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001175 if (cpu_class_is_omap2()) {
Kevin Hilmanb144ff62008-01-16 21:56:15 -08001176 level_mask = bank->level_mask & enabled;
Imre Deakea6dedd2006-06-26 16:16:00 -07001177 }
Tony Lindgren6e60e792006-04-02 17:46:23 +01001178
1179 /* clear edge sensitive interrupts before handler(s) are
1180 called so that we don't miss any interrupt occurred while
1181 executing them */
1182 _enable_gpio_irqbank(bank, isr_saved & ~level_mask, 0);
1183 _clear_gpio_irqbank(bank, isr_saved & ~level_mask);
1184 _enable_gpio_irqbank(bank, isr_saved & ~level_mask, 1);
1185
1186 /* if there is only edge sensitive GPIO pin interrupts
1187 configured, we could unmask GPIO bank interrupt immediately */
Imre Deakea6dedd2006-06-26 16:16:00 -07001188 if (!level_mask && !unmasked) {
1189 unmasked = 1;
Tony Lindgren6e60e792006-04-02 17:46:23 +01001190 desc->chip->unmask(irq);
Imre Deakea6dedd2006-06-26 16:16:00 -07001191 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001192
Imre Deakea6dedd2006-06-26 16:16:00 -07001193 isr |= retrigger;
1194 retrigger = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001195 if (!isr)
1196 break;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001197
Tony Lindgren92105bb2005-09-07 17:20:26 +01001198 gpio_irq = bank->virtual_irq_start;
1199 for (; isr != 0; isr >>= 1, gpio_irq++) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001200 if (!(isr & 1))
1201 continue;
Thomas Gleixner29454dd2006-07-03 02:22:22 +02001202
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +01001203 generic_handle_irq(gpio_irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001204 }
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001205 }
Imre Deakea6dedd2006-06-26 16:16:00 -07001206 /* if bank has any level sensitive GPIO pin interrupt
1207 configured, we must unmask the bank interrupt only after
1208 handler(s) are executed in order to avoid spurious bank
1209 interrupt */
1210 if (!unmasked)
1211 desc->chip->unmask(irq);
1212
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001213}
1214
Tony Lindgren4196dd62006-09-25 12:41:38 +03001215static void gpio_irq_shutdown(unsigned int irq)
1216{
1217 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001218 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren4196dd62006-09-25 12:41:38 +03001219
1220 _reset_gpio(bank, gpio);
1221}
1222
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001223static void gpio_ack_irq(unsigned int irq)
1224{
1225 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001226 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001227
1228 _clear_gpio_irqstatus(bank, gpio);
1229}
1230
1231static void gpio_mask_irq(unsigned int irq)
1232{
1233 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001234 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001235
1236 _set_gpio_irqenable(bank, gpio, 0);
Kevin Hilman55b60192009-06-04 15:57:10 -07001237 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001238}
1239
1240static void gpio_unmask_irq(unsigned int irq)
1241{
1242 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001243 struct gpio_bank *bank = get_irq_chip_data(irq);
Kevin Hilmanb144ff62008-01-16 21:56:15 -08001244 unsigned int irq_mask = 1 << get_gpio_index(gpio);
Kevin Hilman55b60192009-06-04 15:57:10 -07001245 struct irq_desc *desc = irq_to_desc(irq);
1246 u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
1247
1248 if (trigger)
1249 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
Kevin Hilmanb144ff62008-01-16 21:56:15 -08001250
1251 /* For level-triggered GPIOs, the clearing must be done after
1252 * the HW source is cleared, thus after the handler has run */
1253 if (bank->level_mask & irq_mask) {
1254 _set_gpio_irqenable(bank, gpio, 0);
1255 _clear_gpio_irqstatus(bank, gpio);
1256 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001257
Kevin Hilman4de8c752008-01-16 21:56:14 -08001258 _set_gpio_irqenable(bank, gpio, 1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001259}
1260
David Brownelle5c56ed2006-12-06 17:13:59 -08001261static struct irq_chip gpio_irq_chip = {
1262 .name = "GPIO",
1263 .shutdown = gpio_irq_shutdown,
1264 .ack = gpio_ack_irq,
1265 .mask = gpio_mask_irq,
1266 .unmask = gpio_unmask_irq,
1267 .set_type = gpio_irq_type,
1268 .set_wake = gpio_wake_enable,
1269};
1270
1271/*---------------------------------------------------------------------*/
1272
1273#ifdef CONFIG_ARCH_OMAP1
1274
1275/* MPUIO uses the always-on 32k clock */
1276
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001277static void mpuio_ack_irq(unsigned int irq)
1278{
1279 /* The ISR is reset automatically, so do nothing here. */
1280}
1281
1282static void mpuio_mask_irq(unsigned int irq)
1283{
1284 unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
David Brownell58781012006-12-06 17:14:10 -08001285 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001286
1287 _set_gpio_irqenable(bank, gpio, 0);
1288}
1289
1290static void mpuio_unmask_irq(unsigned int irq)
1291{
1292 unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
David Brownell58781012006-12-06 17:14:10 -08001293 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001294
1295 _set_gpio_irqenable(bank, gpio, 1);
1296}
1297
David Brownelle5c56ed2006-12-06 17:13:59 -08001298static struct irq_chip mpuio_irq_chip = {
1299 .name = "MPUIO",
1300 .ack = mpuio_ack_irq,
1301 .mask = mpuio_mask_irq,
1302 .unmask = mpuio_unmask_irq,
Tony Lindgren92105bb2005-09-07 17:20:26 +01001303 .set_type = gpio_irq_type,
David Brownell11a78b72006-12-06 17:14:11 -08001304#ifdef CONFIG_ARCH_OMAP16XX
1305 /* REVISIT: assuming only 16xx supports MPUIO wake events */
1306 .set_wake = gpio_wake_enable,
1307#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001308};
1309
David Brownelle5c56ed2006-12-06 17:13:59 -08001310
1311#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
1312
David Brownell11a78b72006-12-06 17:14:11 -08001313
1314#ifdef CONFIG_ARCH_OMAP16XX
1315
1316#include <linux/platform_device.h>
1317
1318static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t mesg)
1319{
1320 struct gpio_bank *bank = platform_get_drvdata(pdev);
1321 void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
David Brownella6472532008-03-03 04:33:30 -08001322 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -08001323
David Brownella6472532008-03-03 04:33:30 -08001324 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001325 bank->saved_wakeup = __raw_readl(mask_reg);
1326 __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -08001327 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001328
1329 return 0;
1330}
1331
1332static int omap_mpuio_resume_early(struct platform_device *pdev)
1333{
1334 struct gpio_bank *bank = platform_get_drvdata(pdev);
1335 void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
David Brownella6472532008-03-03 04:33:30 -08001336 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -08001337
David Brownella6472532008-03-03 04:33:30 -08001338 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001339 __raw_writel(bank->saved_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -08001340 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001341
1342 return 0;
1343}
1344
1345/* use platform_driver for this, now that there's no longer any
1346 * point to sys_device (other than not disturbing old code).
1347 */
1348static struct platform_driver omap_mpuio_driver = {
1349 .suspend_late = omap_mpuio_suspend_late,
1350 .resume_early = omap_mpuio_resume_early,
1351 .driver = {
1352 .name = "mpuio",
1353 },
1354};
1355
1356static struct platform_device omap_mpuio_device = {
1357 .name = "mpuio",
1358 .id = -1,
1359 .dev = {
1360 .driver = &omap_mpuio_driver.driver,
1361 }
1362 /* could list the /proc/iomem resources */
1363};
1364
1365static inline void mpuio_init(void)
1366{
David Brownellfcf126d2007-04-02 12:46:47 -07001367 platform_set_drvdata(&omap_mpuio_device, &gpio_bank_1610[0]);
1368
David Brownell11a78b72006-12-06 17:14:11 -08001369 if (platform_driver_register(&omap_mpuio_driver) == 0)
1370 (void) platform_device_register(&omap_mpuio_device);
1371}
1372
1373#else
1374static inline void mpuio_init(void) {}
1375#endif /* 16xx */
1376
David Brownelle5c56ed2006-12-06 17:13:59 -08001377#else
1378
1379extern struct irq_chip mpuio_irq_chip;
1380
1381#define bank_is_mpuio(bank) 0
David Brownell11a78b72006-12-06 17:14:11 -08001382static inline void mpuio_init(void) {}
David Brownelle5c56ed2006-12-06 17:13:59 -08001383
1384#endif
1385
1386/*---------------------------------------------------------------------*/
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001387
David Brownell52e31342008-03-03 12:43:23 -08001388/* REVISIT these are stupid implementations! replace by ones that
1389 * don't switch on METHOD_* and which mostly avoid spinlocks
1390 */
1391
1392static int gpio_input(struct gpio_chip *chip, unsigned offset)
1393{
1394 struct gpio_bank *bank;
1395 unsigned long flags;
1396
1397 bank = container_of(chip, struct gpio_bank, chip);
1398 spin_lock_irqsave(&bank->lock, flags);
1399 _set_gpio_direction(bank, offset, 1);
1400 spin_unlock_irqrestore(&bank->lock, flags);
1401 return 0;
1402}
1403
Roger Quadrosb37c45b2009-08-05 16:53:24 +03001404static int gpio_is_input(struct gpio_bank *bank, int mask)
1405{
1406 void __iomem *reg = bank->base;
1407
1408 switch (bank->method) {
1409 case METHOD_MPUIO:
1410 reg += OMAP_MPUIO_IO_CNTL;
1411 break;
1412 case METHOD_GPIO_1510:
1413 reg += OMAP1510_GPIO_DIR_CONTROL;
1414 break;
1415 case METHOD_GPIO_1610:
1416 reg += OMAP1610_GPIO_DIRECTION;
1417 break;
1418 case METHOD_GPIO_730:
1419 reg += OMAP730_GPIO_DIR_CONTROL;
1420 break;
1421 case METHOD_GPIO_850:
1422 reg += OMAP850_GPIO_DIR_CONTROL;
1423 break;
1424 case METHOD_GPIO_24XX:
1425 reg += OMAP24XX_GPIO_OE;
1426 break;
1427 }
1428 return __raw_readl(reg) & mask;
1429}
1430
David Brownell52e31342008-03-03 12:43:23 -08001431static int gpio_get(struct gpio_chip *chip, unsigned offset)
1432{
Roger Quadrosb37c45b2009-08-05 16:53:24 +03001433 struct gpio_bank *bank;
1434 void __iomem *reg;
1435 int gpio;
1436 u32 mask;
1437
1438 gpio = chip->base + offset;
1439 bank = get_gpio_bank(gpio);
1440 reg = bank->base;
1441 mask = 1 << get_gpio_index(gpio);
1442
1443 if (gpio_is_input(bank, mask))
1444 return _get_gpio_datain(bank, gpio);
1445 else
1446 return _get_gpio_dataout(bank, gpio);
David Brownell52e31342008-03-03 12:43:23 -08001447}
1448
1449static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
1450{
1451 struct gpio_bank *bank;
1452 unsigned long flags;
1453
1454 bank = container_of(chip, struct gpio_bank, chip);
1455 spin_lock_irqsave(&bank->lock, flags);
1456 _set_gpio_dataout(bank, offset, value);
1457 _set_gpio_direction(bank, offset, 0);
1458 spin_unlock_irqrestore(&bank->lock, flags);
1459 return 0;
1460}
1461
1462static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1463{
1464 struct gpio_bank *bank;
1465 unsigned long flags;
1466
1467 bank = container_of(chip, struct gpio_bank, chip);
1468 spin_lock_irqsave(&bank->lock, flags);
1469 _set_gpio_dataout(bank, offset, value);
1470 spin_unlock_irqrestore(&bank->lock, flags);
1471}
1472
David Brownella007b702008-12-10 17:35:25 -08001473static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
1474{
1475 struct gpio_bank *bank;
1476
1477 bank = container_of(chip, struct gpio_bank, chip);
1478 return bank->virtual_irq_start + offset;
1479}
1480
David Brownell52e31342008-03-03 12:43:23 -08001481/*---------------------------------------------------------------------*/
1482
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001483static int initialized;
Santosh Shilimkar44169072009-05-28 14:16:04 -07001484#if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4))
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001485static struct clk * gpio_ick;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001486#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001487
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001488#if defined(CONFIG_ARCH_OMAP2)
1489static struct clk * gpio_fck;
1490#endif
1491
1492#if defined(CONFIG_ARCH_OMAP2430)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001493static struct clk * gpio5_ick;
1494static struct clk * gpio5_fck;
1495#endif
1496
Santosh Shilimkar44169072009-05-28 14:16:04 -07001497#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001498static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
1499#endif
1500
David Brownell8ba55c52008-02-26 11:10:50 -08001501/* This lock class tells lockdep that GPIO irqs are in a different
1502 * category than their parents, so it won't report false recursion.
1503 */
1504static struct lock_class_key gpio_lock_class;
1505
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001506static int __init _omap_gpio_init(void)
1507{
1508 int i;
David Brownell52e31342008-03-03 12:43:23 -08001509 int gpio = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001510 struct gpio_bank *bank;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001511 char clk_name[11];
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001512
1513 initialized = 1;
1514
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001515#if defined(CONFIG_ARCH_OMAP1)
Tony Lindgren6e60e792006-04-02 17:46:23 +01001516 if (cpu_is_omap15xx()) {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001517 gpio_ick = clk_get(NULL, "arm_gpio_ck");
1518 if (IS_ERR(gpio_ick))
Tony Lindgren92105bb2005-09-07 17:20:26 +01001519 printk("Could not get arm_gpio_ck\n");
1520 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001521 clk_enable(gpio_ick);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001522 }
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001523#endif
1524#if defined(CONFIG_ARCH_OMAP2)
1525 if (cpu_class_is_omap2()) {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001526 gpio_ick = clk_get(NULL, "gpios_ick");
1527 if (IS_ERR(gpio_ick))
1528 printk("Could not get gpios_ick\n");
1529 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001530 clk_enable(gpio_ick);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001531 gpio_fck = clk_get(NULL, "gpios_fck");
Komal Shah1630b522006-09-25 12:51:08 +03001532 if (IS_ERR(gpio_fck))
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001533 printk("Could not get gpios_fck\n");
1534 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001535 clk_enable(gpio_fck);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001536
1537 /*
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001538 * On 2430 & 3430 GPIO 5 uses CORE L4 ICLK
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001539 */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001540#if defined(CONFIG_ARCH_OMAP2430)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001541 if (cpu_is_omap2430()) {
1542 gpio5_ick = clk_get(NULL, "gpio5_ick");
1543 if (IS_ERR(gpio5_ick))
1544 printk("Could not get gpio5_ick\n");
1545 else
1546 clk_enable(gpio5_ick);
1547 gpio5_fck = clk_get(NULL, "gpio5_fck");
1548 if (IS_ERR(gpio5_fck))
1549 printk("Could not get gpio5_fck\n");
1550 else
1551 clk_enable(gpio5_fck);
1552 }
1553#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001554 }
1555#endif
1556
Santosh Shilimkar44169072009-05-28 14:16:04 -07001557#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
1558 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001559 for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
1560 sprintf(clk_name, "gpio%d_ick", i + 1);
1561 gpio_iclks[i] = clk_get(NULL, clk_name);
1562 if (IS_ERR(gpio_iclks[i]))
1563 printk(KERN_ERR "Could not get %s\n", clk_name);
1564 else
1565 clk_enable(gpio_iclks[i]);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001566 }
1567 }
1568#endif
1569
Tony Lindgren92105bb2005-09-07 17:20:26 +01001570
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001571#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren6e60e792006-04-02 17:46:23 +01001572 if (cpu_is_omap15xx()) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001573 printk(KERN_INFO "OMAP1510 GPIO hardware\n");
1574 gpio_bank_count = 2;
1575 gpio_bank = gpio_bank_1510;
1576 }
1577#endif
1578#if defined(CONFIG_ARCH_OMAP16XX)
1579 if (cpu_is_omap16xx()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001580 u32 rev;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001581
1582 gpio_bank_count = 5;
1583 gpio_bank = gpio_bank_1610;
Russell King7c7095a2008-09-05 15:49:14 +01001584 rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001585 printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
1586 (rev >> 4) & 0x0f, rev & 0x0f);
1587 }
1588#endif
1589#ifdef CONFIG_ARCH_OMAP730
1590 if (cpu_is_omap730()) {
1591 printk(KERN_INFO "OMAP730 GPIO hardware\n");
1592 gpio_bank_count = 7;
1593 gpio_bank = gpio_bank_730;
1594 }
1595#endif
Zebediah C. McClure56739a62009-03-23 18:07:40 -07001596#ifdef CONFIG_ARCH_OMAP850
1597 if (cpu_is_omap850()) {
1598 printk(KERN_INFO "OMAP850 GPIO hardware\n");
1599 gpio_bank_count = 7;
1600 gpio_bank = gpio_bank_850;
1601 }
1602#endif
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001603
Tony Lindgren92105bb2005-09-07 17:20:26 +01001604#ifdef CONFIG_ARCH_OMAP24XX
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001605 if (cpu_is_omap242x()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001606 int rev;
1607
1608 gpio_bank_count = 4;
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001609 gpio_bank = gpio_bank_242x;
Russell King7c7095a2008-09-05 15:49:14 +01001610 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001611 printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n",
1612 (rev >> 4) & 0x0f, rev & 0x0f);
1613 }
1614 if (cpu_is_omap243x()) {
1615 int rev;
1616
1617 gpio_bank_count = 5;
1618 gpio_bank = gpio_bank_243x;
Russell King7c7095a2008-09-05 15:49:14 +01001619 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001620 printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
Tony Lindgren92105bb2005-09-07 17:20:26 +01001621 (rev >> 4) & 0x0f, rev & 0x0f);
1622 }
1623#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001624#ifdef CONFIG_ARCH_OMAP34XX
1625 if (cpu_is_omap34xx()) {
1626 int rev;
1627
1628 gpio_bank_count = OMAP34XX_NR_GPIOS;
1629 gpio_bank = gpio_bank_34xx;
Russell King7c7095a2008-09-05 15:49:14 +01001630 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001631 printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
1632 (rev >> 4) & 0x0f, rev & 0x0f);
1633 }
1634#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001635#ifdef CONFIG_ARCH_OMAP4
1636 if (cpu_is_omap44xx()) {
1637 int rev;
1638
1639 gpio_bank_count = OMAP34XX_NR_GPIOS;
1640 gpio_bank = gpio_bank_44xx;
1641 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
1642 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
1643 (rev >> 4) & 0x0f, rev & 0x0f);
1644 }
1645#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001646 for (i = 0; i < gpio_bank_count; i++) {
1647 int j, gpio_count = 16;
1648
1649 bank = &gpio_bank[i];
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001650 spin_lock_init(&bank->lock);
David Brownelle5c56ed2006-12-06 17:13:59 -08001651 if (bank_is_mpuio(bank))
Russell King7c7095a2008-09-05 15:49:14 +01001652 __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
Tony Lindgrend11ac972008-01-12 15:35:04 -08001653 if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001654 __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
1655 __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
1656 }
Tony Lindgrend11ac972008-01-12 15:35:04 -08001657 if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001658 __raw_writew(0x0000, bank->base + OMAP1610_GPIO_IRQENABLE1);
1659 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001660 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001661 }
Zebediah C. McClure56739a62009-03-23 18:07:40 -07001662 if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001663 __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
1664 __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
1665
1666 gpio_count = 32; /* 730 has 32-bit GPIOs */
1667 }
Tony Lindgrend11ac972008-01-12 15:35:04 -08001668
Santosh Shilimkar44169072009-05-28 14:16:04 -07001669#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1670 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001671 if (bank->method == METHOD_GPIO_24XX) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001672 static const u32 non_wakeup_gpios[] = {
1673 0xe203ffc0, 0x08700040
1674 };
1675
Tony Lindgren92105bb2005-09-07 17:20:26 +01001676 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
1677 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
Juha Yrjola14f1c3b2006-12-06 17:13:48 -08001678 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
janboecb5793d2009-06-23 13:30:25 +03001679 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN);
Juha Yrjola14f1c3b2006-12-06 17:13:48 -08001680
1681 /* Initialize interface clock ungated, module enabled */
1682 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001683 if (i < ARRAY_SIZE(non_wakeup_gpios))
1684 bank->non_wakeup_gpios = non_wakeup_gpios[i];
Tony Lindgren92105bb2005-09-07 17:20:26 +01001685 gpio_count = 32;
1686 }
1687#endif
David Brownell52e31342008-03-03 12:43:23 -08001688
1689 /* REVISIT eventually switch from OMAP-specific gpio structs
1690 * over to the generic ones
1691 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001692 bank->chip.request = omap_gpio_request;
1693 bank->chip.free = omap_gpio_free;
David Brownell52e31342008-03-03 12:43:23 -08001694 bank->chip.direction_input = gpio_input;
1695 bank->chip.get = gpio_get;
1696 bank->chip.direction_output = gpio_output;
1697 bank->chip.set = gpio_set;
David Brownella007b702008-12-10 17:35:25 -08001698 bank->chip.to_irq = gpio_2irq;
David Brownell52e31342008-03-03 12:43:23 -08001699 if (bank_is_mpuio(bank)) {
1700 bank->chip.label = "mpuio";
Russell King69114a42008-09-03 10:15:26 +01001701#ifdef CONFIG_ARCH_OMAP16XX
David Brownelld8f388d82008-07-25 01:46:07 -07001702 bank->chip.dev = &omap_mpuio_device.dev;
1703#endif
David Brownell52e31342008-03-03 12:43:23 -08001704 bank->chip.base = OMAP_MPUIO(0);
1705 } else {
1706 bank->chip.label = "gpio";
1707 bank->chip.base = gpio;
1708 gpio += gpio_count;
1709 }
1710 bank->chip.ngpio = gpio_count;
1711
1712 gpiochip_add(&bank->chip);
1713
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001714 for (j = bank->virtual_irq_start;
1715 j < bank->virtual_irq_start + gpio_count; j++) {
David Brownell8ba55c52008-02-26 11:10:50 -08001716 lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
David Brownell58781012006-12-06 17:14:10 -08001717 set_irq_chip_data(j, bank);
David Brownelle5c56ed2006-12-06 17:13:59 -08001718 if (bank_is_mpuio(bank))
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001719 set_irq_chip(j, &mpuio_irq_chip);
1720 else
1721 set_irq_chip(j, &gpio_irq_chip);
Russell King10dd5ce2006-11-23 11:41:32 +00001722 set_irq_handler(j, handle_simple_irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001723 set_irq_flags(j, IRQF_VALID);
1724 }
1725 set_irq_chained_handler(bank->irq, gpio_irq_handler);
1726 set_irq_data(bank->irq, bank);
Jouni Hogander89db9482008-12-10 17:35:24 -08001727
Santosh Shilimkar44169072009-05-28 14:16:04 -07001728 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
Jouni Hogander89db9482008-12-10 17:35:24 -08001729 sprintf(clk_name, "gpio%d_dbck", i + 1);
1730 bank->dbck = clk_get(NULL, clk_name);
1731 if (IS_ERR(bank->dbck))
1732 printk(KERN_ERR "Could not get %s\n", clk_name);
1733 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001734 }
1735
1736 /* Enable system clock for GPIO module.
1737 * The CAM_CLK_CTRL *is* really the right place. */
Tony Lindgren92105bb2005-09-07 17:20:26 +01001738 if (cpu_is_omap16xx())
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001739 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL);
1740
Juha Yrjola14f1c3b2006-12-06 17:13:48 -08001741 /* Enable autoidle for the OCP interface */
1742 if (cpu_is_omap24xx())
1743 omap_writel(1 << 0, 0x48019010);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001744 if (cpu_is_omap34xx())
1745 omap_writel(1 << 0, 0x48306814);
Tony Lindgrend11ac972008-01-12 15:35:04 -08001746
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001747 return 0;
1748}
1749
Santosh Shilimkar44169072009-05-28 14:16:04 -07001750#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1751 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001752static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1753{
1754 int i;
1755
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001756 if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
Tony Lindgren92105bb2005-09-07 17:20:26 +01001757 return 0;
1758
1759 for (i = 0; i < gpio_bank_count; i++) {
1760 struct gpio_bank *bank = &gpio_bank[i];
1761 void __iomem *wake_status;
1762 void __iomem *wake_clear;
1763 void __iomem *wake_set;
David Brownella6472532008-03-03 04:33:30 -08001764 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001765
1766 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -08001767#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren92105bb2005-09-07 17:20:26 +01001768 case METHOD_GPIO_1610:
1769 wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
1770 wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
1771 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1772 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001773#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001774#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1775 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001776 case METHOD_GPIO_24XX:
Tero Kristo723fdb72008-11-26 14:35:16 -08001777 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001778 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1779 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1780 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001781#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001782 default:
1783 continue;
1784 }
1785
David Brownella6472532008-03-03 04:33:30 -08001786 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001787 bank->saved_wakeup = __raw_readl(wake_status);
1788 __raw_writel(0xffffffff, wake_clear);
1789 __raw_writel(bank->suspend_wakeup, wake_set);
David Brownella6472532008-03-03 04:33:30 -08001790 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001791 }
1792
1793 return 0;
1794}
1795
1796static int omap_gpio_resume(struct sys_device *dev)
1797{
1798 int i;
1799
Tero Kristo723fdb72008-11-26 14:35:16 -08001800 if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
Tony Lindgren92105bb2005-09-07 17:20:26 +01001801 return 0;
1802
1803 for (i = 0; i < gpio_bank_count; i++) {
1804 struct gpio_bank *bank = &gpio_bank[i];
1805 void __iomem *wake_clear;
1806 void __iomem *wake_set;
David Brownella6472532008-03-03 04:33:30 -08001807 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001808
1809 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -08001810#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren92105bb2005-09-07 17:20:26 +01001811 case METHOD_GPIO_1610:
1812 wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
1813 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1814 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001815#endif
Santosh Shilimkar44169072009-05-28 14:16:04 -07001816#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1817 defined(CONFIG_ARCH_OMAP4)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001818 case METHOD_GPIO_24XX:
Tony Lindgren0d9356c2006-09-25 12:41:45 +03001819 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1820 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001821 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001822#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001823 default:
1824 continue;
1825 }
1826
David Brownella6472532008-03-03 04:33:30 -08001827 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001828 __raw_writel(0xffffffff, wake_clear);
1829 __raw_writel(bank->saved_wakeup, wake_set);
David Brownella6472532008-03-03 04:33:30 -08001830 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001831 }
1832
1833 return 0;
1834}
1835
1836static struct sysdev_class omap_gpio_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +01001837 .name = "gpio",
Tony Lindgren92105bb2005-09-07 17:20:26 +01001838 .suspend = omap_gpio_suspend,
1839 .resume = omap_gpio_resume,
1840};
1841
1842static struct sys_device omap_gpio_device = {
1843 .id = 0,
1844 .cls = &omap_gpio_sysclass,
1845};
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001846
1847#endif
1848
Santosh Shilimkar44169072009-05-28 14:16:04 -07001849#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1850 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001851
1852static int workaround_enabled;
1853
1854void omap2_gpio_prepare_for_retention(void)
1855{
1856 int i, c = 0;
1857
1858 /* Remove triggering for all non-wakeup GPIOs. Otherwise spurious
1859 * IRQs will be generated. See OMAP2420 Errata item 1.101. */
1860 for (i = 0; i < gpio_bank_count; i++) {
1861 struct gpio_bank *bank = &gpio_bank[i];
1862 u32 l1, l2;
1863
1864 if (!(bank->enabled_non_wakeup_gpios))
1865 continue;
Santosh Shilimkar44169072009-05-28 14:16:04 -07001866#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1867 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001868 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1869 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1870 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001871#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001872 bank->saved_fallingdetect = l1;
1873 bank->saved_risingdetect = l2;
1874 l1 &= ~bank->enabled_non_wakeup_gpios;
1875 l2 &= ~bank->enabled_non_wakeup_gpios;
Santosh Shilimkar44169072009-05-28 14:16:04 -07001876#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1877 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001878 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1879 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001880#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001881 c++;
1882 }
1883 if (!c) {
1884 workaround_enabled = 0;
1885 return;
1886 }
1887 workaround_enabled = 1;
1888}
1889
1890void omap2_gpio_resume_after_retention(void)
1891{
1892 int i;
1893
1894 if (!workaround_enabled)
1895 return;
1896 for (i = 0; i < gpio_bank_count; i++) {
1897 struct gpio_bank *bank = &gpio_bank[i];
Eero Nurkkala82dbb9d2009-08-28 10:51:36 -07001898 u32 l, gen, gen0, gen1;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001899
1900 if (!(bank->enabled_non_wakeup_gpios))
1901 continue;
Santosh Shilimkar44169072009-05-28 14:16:04 -07001902#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1903 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001904 __raw_writel(bank->saved_fallingdetect,
1905 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1906 __raw_writel(bank->saved_risingdetect,
1907 bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001908#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001909 /* Check if any of the non-wakeup interrupt GPIOs have changed
1910 * state. If so, generate an IRQ by software. This is
1911 * horribly racy, but it's the best we can do to work around
1912 * this silicon bug. */
Santosh Shilimkar44169072009-05-28 14:16:04 -07001913#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1914 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001915 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001916#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001917 l ^= bank->saved_datain;
1918 l &= bank->non_wakeup_gpios;
Eero Nurkkala82dbb9d2009-08-28 10:51:36 -07001919
1920 /*
1921 * No need to generate IRQs for the rising edge for gpio IRQs
1922 * configured with falling edge only; and vice versa.
1923 */
1924 gen0 = l & bank->saved_fallingdetect;
1925 gen0 &= bank->saved_datain;
1926
1927 gen1 = l & bank->saved_risingdetect;
1928 gen1 &= ~(bank->saved_datain);
1929
1930 /* FIXME: Consider GPIO IRQs with level detections properly! */
1931 gen = l & (~(bank->saved_fallingdetect) &
1932 ~(bank->saved_risingdetect));
1933 /* Consider all GPIO IRQs needed to be updated */
1934 gen |= gen0 | gen1;
1935
1936 if (gen) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001937 u32 old0, old1;
Santosh Shilimkar44169072009-05-28 14:16:04 -07001938#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1939 defined(CONFIG_ARCH_OMAP4)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001940 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1941 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
Eero Nurkkala82dbb9d2009-08-28 10:51:36 -07001942 __raw_writel(old0 | gen, bank->base +
1943 OMAP24XX_GPIO_LEVELDETECT0);
1944 __raw_writel(old1 | gen, bank->base +
1945 OMAP24XX_GPIO_LEVELDETECT1);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001946 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1947 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001948#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001949 }
1950 }
1951
1952}
1953
Tony Lindgren92105bb2005-09-07 17:20:26 +01001954#endif
1955
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001956/*
1957 * This may get called early from board specific init
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001958 * for boards that have interrupts routed via FPGA.
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001959 */
David Brownell277d58e2006-12-06 17:13:59 -08001960int __init omap_gpio_init(void)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001961{
1962 if (!initialized)
1963 return _omap_gpio_init();
1964 else
1965 return 0;
1966}
1967
Tony Lindgren92105bb2005-09-07 17:20:26 +01001968static int __init omap_gpio_sysinit(void)
1969{
1970 int ret = 0;
1971
1972 if (!initialized)
1973 ret = _omap_gpio_init();
1974
David Brownell11a78b72006-12-06 17:14:11 -08001975 mpuio_init();
1976
Santosh Shilimkar44169072009-05-28 14:16:04 -07001977#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1978 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001979 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001980 if (ret == 0) {
1981 ret = sysdev_class_register(&omap_gpio_sysclass);
1982 if (ret == 0)
1983 ret = sysdev_register(&omap_gpio_device);
1984 }
1985 }
1986#endif
1987
1988 return ret;
1989}
1990
Tony Lindgren92105bb2005-09-07 17:20:26 +01001991arch_initcall(omap_gpio_sysinit);
David Brownellb9772a22006-12-06 17:13:53 -08001992
1993
1994#ifdef CONFIG_DEBUG_FS
1995
1996#include <linux/debugfs.h>
1997#include <linux/seq_file.h>
1998
David Brownellb9772a22006-12-06 17:13:53 -08001999static int dbg_gpio_show(struct seq_file *s, void *unused)
2000{
2001 unsigned i, j, gpio;
2002
2003 for (i = 0, gpio = 0; i < gpio_bank_count; i++) {
2004 struct gpio_bank *bank = gpio_bank + i;
2005 unsigned bankwidth = 16;
2006 u32 mask = 1;
2007
David Brownelle5c56ed2006-12-06 17:13:59 -08002008 if (bank_is_mpuio(bank))
David Brownellb9772a22006-12-06 17:13:53 -08002009 gpio = OMAP_MPUIO(0);
Zebediah C. McClure56739a62009-03-23 18:07:40 -07002010 else if (cpu_class_is_omap2() || cpu_is_omap730() ||
2011 cpu_is_omap850())
David Brownellb9772a22006-12-06 17:13:53 -08002012 bankwidth = 32;
2013
2014 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
2015 unsigned irq, value, is_in, irqstat;
David Brownell52e31342008-03-03 12:43:23 -08002016 const char *label;
David Brownellb9772a22006-12-06 17:13:53 -08002017
David Brownell52e31342008-03-03 12:43:23 -08002018 label = gpiochip_is_requested(&bank->chip, j);
2019 if (!label)
David Brownellb9772a22006-12-06 17:13:53 -08002020 continue;
2021
2022 irq = bank->virtual_irq_start + j;
David Brownell0b84b5c2008-12-10 17:35:25 -08002023 value = gpio_get_value(gpio);
David Brownellb9772a22006-12-06 17:13:53 -08002024 is_in = gpio_is_input(bank, mask);
2025
David Brownelle5c56ed2006-12-06 17:13:59 -08002026 if (bank_is_mpuio(bank))
David Brownell52e31342008-03-03 12:43:23 -08002027 seq_printf(s, "MPUIO %2d ", j);
David Brownellb9772a22006-12-06 17:13:53 -08002028 else
David Brownell52e31342008-03-03 12:43:23 -08002029 seq_printf(s, "GPIO %3d ", gpio);
Jarkko Nikula21c867f2008-12-10 17:35:24 -08002030 seq_printf(s, "(%-20.20s): %s %s",
David Brownell52e31342008-03-03 12:43:23 -08002031 label,
David Brownellb9772a22006-12-06 17:13:53 -08002032 is_in ? "in " : "out",
2033 value ? "hi" : "lo");
2034
David Brownell52e31342008-03-03 12:43:23 -08002035/* FIXME for at least omap2, show pullup/pulldown state */
2036
David Brownellb9772a22006-12-06 17:13:53 -08002037 irqstat = irq_desc[irq].status;
Tony Lindgren3a26e332009-01-15 13:09:53 +02002038#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
Santosh Shilimkar44169072009-05-28 14:16:04 -07002039 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
David Brownellb9772a22006-12-06 17:13:53 -08002040 if (is_in && ((bank->suspend_wakeup & mask)
2041 || irqstat & IRQ_TYPE_SENSE_MASK)) {
2042 char *trigger = NULL;
2043
2044 switch (irqstat & IRQ_TYPE_SENSE_MASK) {
2045 case IRQ_TYPE_EDGE_FALLING:
2046 trigger = "falling";
2047 break;
2048 case IRQ_TYPE_EDGE_RISING:
2049 trigger = "rising";
2050 break;
2051 case IRQ_TYPE_EDGE_BOTH:
2052 trigger = "bothedge";
2053 break;
2054 case IRQ_TYPE_LEVEL_LOW:
2055 trigger = "low";
2056 break;
2057 case IRQ_TYPE_LEVEL_HIGH:
2058 trigger = "high";
2059 break;
2060 case IRQ_TYPE_NONE:
David Brownell52e31342008-03-03 12:43:23 -08002061 trigger = "(?)";
David Brownellb9772a22006-12-06 17:13:53 -08002062 break;
2063 }
David Brownell52e31342008-03-03 12:43:23 -08002064 seq_printf(s, ", irq-%d %-8s%s",
David Brownellb9772a22006-12-06 17:13:53 -08002065 irq, trigger,
2066 (bank->suspend_wakeup & mask)
2067 ? " wakeup" : "");
2068 }
Tony Lindgren3a26e332009-01-15 13:09:53 +02002069#endif
David Brownellb9772a22006-12-06 17:13:53 -08002070 seq_printf(s, "\n");
2071 }
2072
David Brownelle5c56ed2006-12-06 17:13:59 -08002073 if (bank_is_mpuio(bank)) {
David Brownellb9772a22006-12-06 17:13:53 -08002074 seq_printf(s, "\n");
2075 gpio = 0;
2076 }
2077 }
2078 return 0;
2079}
2080
2081static int dbg_gpio_open(struct inode *inode, struct file *file)
2082{
David Brownelle5c56ed2006-12-06 17:13:59 -08002083 return single_open(file, dbg_gpio_show, &inode->i_private);
David Brownellb9772a22006-12-06 17:13:53 -08002084}
2085
2086static const struct file_operations debug_fops = {
2087 .open = dbg_gpio_open,
2088 .read = seq_read,
2089 .llseek = seq_lseek,
2090 .release = single_release,
2091};
2092
2093static int __init omap_gpio_debuginit(void)
2094{
David Brownelle5c56ed2006-12-06 17:13:59 -08002095 (void) debugfs_create_file("omap_gpio", S_IRUGO,
2096 NULL, NULL, &debug_fops);
David Brownellb9772a22006-12-06 17:13:53 -08002097 return 0;
2098}
2099late_initcall(omap_gpio_debuginit);
2100#endif