Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family |
| 3 | * of PCI-SCSI IO processors. |
| 4 | * |
| 5 | * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr> |
| 6 | * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx> |
| 7 | * |
| 8 | * This driver is derived from the Linux sym53c8xx driver. |
| 9 | * Copyright (C) 1998-2000 Gerard Roudier |
| 10 | * |
| 11 | * The sym53c8xx driver is derived from the ncr53c8xx driver that had been |
| 12 | * a port of the FreeBSD ncr driver to Linux-1.2.13. |
| 13 | * |
| 14 | * The original ncr driver has been written for 386bsd and FreeBSD by |
| 15 | * Wolfgang Stanglmeier <wolf@cologne.de> |
| 16 | * Stefan Esser <se@mi.Uni-Koeln.de> |
| 17 | * Copyright (C) 1994 Wolfgang Stanglmeier |
| 18 | * |
| 19 | * Other major contributions: |
| 20 | * |
| 21 | * NVRAM detection and reading. |
| 22 | * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk> |
| 23 | * |
| 24 | *----------------------------------------------------------------------------- |
| 25 | * |
| 26 | * This program is free software; you can redistribute it and/or modify |
| 27 | * it under the terms of the GNU General Public License as published by |
| 28 | * the Free Software Foundation; either version 2 of the License, or |
| 29 | * (at your option) any later version. |
| 30 | * |
| 31 | * This program is distributed in the hope that it will be useful, |
| 32 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 33 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 34 | * GNU General Public License for more details. |
| 35 | * |
| 36 | * You should have received a copy of the GNU General Public License |
| 37 | * along with this program; if not, write to the Free Software |
| 38 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 39 | */ |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 40 | |
| 41 | #include <linux/slab.h> |
Tim Schmielau | 8c65b4a | 2005-11-07 00:59:43 -0800 | [diff] [blame] | 42 | #include <asm/param.h> /* for timeouts in units of HZ */ |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 43 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include "sym_glue.h" |
| 45 | #include "sym_nvram.h" |
| 46 | |
| 47 | #if 0 |
| 48 | #define SYM_DEBUG_GENERIC_SUPPORT |
| 49 | #endif |
| 50 | |
| 51 | /* |
| 52 | * Needed function prototypes. |
| 53 | */ |
| 54 | static void sym_int_ma (struct sym_hcb *np); |
| 55 | static void sym_int_sir (struct sym_hcb *np); |
| 56 | static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np); |
| 57 | static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa); |
| 58 | static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln); |
| 59 | static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp); |
| 60 | static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp); |
| 61 | static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp); |
| 62 | |
| 63 | /* |
| 64 | * Print a buffer in hexadecimal format with a ".\n" at end. |
| 65 | */ |
| 66 | static void sym_printl_hex(u_char *p, int n) |
| 67 | { |
| 68 | while (n-- > 0) |
| 69 | printf (" %x", *p++); |
| 70 | printf (".\n"); |
| 71 | } |
| 72 | |
| 73 | /* |
| 74 | * Print out the content of a SCSI message. |
| 75 | */ |
| 76 | static int sym_show_msg (u_char * msg) |
| 77 | { |
| 78 | u_char i; |
| 79 | printf ("%x",*msg); |
| 80 | if (*msg==M_EXTENDED) { |
| 81 | for (i=1;i<8;i++) { |
| 82 | if (i-1>msg[1]) break; |
| 83 | printf ("-%x",msg[i]); |
| 84 | } |
| 85 | return (i+1); |
| 86 | } else if ((*msg & 0xf0) == 0x20) { |
| 87 | printf ("-%x",msg[1]); |
| 88 | return (2); |
| 89 | } |
| 90 | return (1); |
| 91 | } |
| 92 | |
| 93 | static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg) |
| 94 | { |
| 95 | sym_print_addr(cp->cmd, "%s: ", label); |
| 96 | |
| 97 | sym_show_msg(msg); |
| 98 | printf(".\n"); |
| 99 | } |
| 100 | |
| 101 | static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg) |
| 102 | { |
| 103 | struct sym_tcb *tp = &np->target[target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 104 | dev_info(&tp->starget->dev, "%s: ", label); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | |
| 106 | sym_show_msg(msg); |
| 107 | printf(".\n"); |
| 108 | } |
| 109 | |
| 110 | /* |
| 111 | * Print something that tells about extended errors. |
| 112 | */ |
| 113 | void sym_print_xerr(struct scsi_cmnd *cmd, int x_status) |
| 114 | { |
| 115 | if (x_status & XE_PARITY_ERR) { |
| 116 | sym_print_addr(cmd, "unrecovered SCSI parity error.\n"); |
| 117 | } |
| 118 | if (x_status & XE_EXTRA_DATA) { |
| 119 | sym_print_addr(cmd, "extraneous data discarded.\n"); |
| 120 | } |
| 121 | if (x_status & XE_BAD_PHASE) { |
| 122 | sym_print_addr(cmd, "illegal scsi phase (4/5).\n"); |
| 123 | } |
| 124 | if (x_status & XE_SODL_UNRUN) { |
| 125 | sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n"); |
| 126 | } |
| 127 | if (x_status & XE_SWIDE_OVRUN) { |
| 128 | sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n"); |
| 129 | } |
| 130 | } |
| 131 | |
| 132 | /* |
| 133 | * Return a string for SCSI BUS mode. |
| 134 | */ |
| 135 | static char *sym_scsi_bus_mode(int mode) |
| 136 | { |
| 137 | switch(mode) { |
| 138 | case SMODE_HVD: return "HVD"; |
| 139 | case SMODE_SE: return "SE"; |
| 140 | case SMODE_LVD: return "LVD"; |
| 141 | } |
| 142 | return "??"; |
| 143 | } |
| 144 | |
| 145 | /* |
| 146 | * Soft reset the chip. |
| 147 | * |
| 148 | * Raising SRST when the chip is running may cause |
| 149 | * problems on dual function chips (see below). |
| 150 | * On the other hand, LVD devices need some delay |
| 151 | * to settle and report actual BUS mode in STEST4. |
| 152 | */ |
| 153 | static void sym_chip_reset (struct sym_hcb *np) |
| 154 | { |
| 155 | OUTB(np, nc_istat, SRST); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 156 | INB(np, nc_mbox1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | udelay(10); |
| 158 | OUTB(np, nc_istat, 0); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 159 | INB(np, nc_mbox1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | udelay(2000); /* For BUS MODE to settle */ |
| 161 | } |
| 162 | |
| 163 | /* |
| 164 | * Really soft reset the chip.:) |
| 165 | * |
| 166 | * Some 896 and 876 chip revisions may hang-up if we set |
| 167 | * the SRST (soft reset) bit at the wrong time when SCRIPTS |
| 168 | * are running. |
| 169 | * So, we need to abort the current operation prior to |
| 170 | * soft resetting the chip. |
| 171 | */ |
| 172 | static void sym_soft_reset (struct sym_hcb *np) |
| 173 | { |
| 174 | u_char istat = 0; |
| 175 | int i; |
| 176 | |
| 177 | if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN)) |
| 178 | goto do_chip_reset; |
| 179 | |
| 180 | OUTB(np, nc_istat, CABRT); |
| 181 | for (i = 100000 ; i ; --i) { |
| 182 | istat = INB(np, nc_istat); |
| 183 | if (istat & SIP) { |
| 184 | INW(np, nc_sist); |
| 185 | } |
| 186 | else if (istat & DIP) { |
| 187 | if (INB(np, nc_dstat) & ABRT) |
| 188 | break; |
| 189 | } |
| 190 | udelay(5); |
| 191 | } |
| 192 | OUTB(np, nc_istat, 0); |
| 193 | if (!i) |
| 194 | printf("%s: unable to abort current chip operation, " |
| 195 | "ISTAT=0x%02x.\n", sym_name(np), istat); |
| 196 | do_chip_reset: |
| 197 | sym_chip_reset(np); |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * Start reset process. |
| 202 | * |
| 203 | * The interrupt handler will reinitialize the chip. |
| 204 | */ |
| 205 | static void sym_start_reset(struct sym_hcb *np) |
| 206 | { |
| 207 | sym_reset_scsi_bus(np, 1); |
| 208 | } |
| 209 | |
| 210 | int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int) |
| 211 | { |
| 212 | u32 term; |
| 213 | int retv = 0; |
| 214 | |
| 215 | sym_soft_reset(np); /* Soft reset the chip */ |
| 216 | if (enab_int) |
| 217 | OUTW(np, nc_sien, RST); |
| 218 | /* |
| 219 | * Enable Tolerant, reset IRQD if present and |
| 220 | * properly set IRQ mode, prior to resetting the bus. |
| 221 | */ |
| 222 | OUTB(np, nc_stest3, TE); |
| 223 | OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM)); |
| 224 | OUTB(np, nc_scntl1, CRST); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 225 | INB(np, nc_mbox1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | udelay(200); |
| 227 | |
| 228 | if (!SYM_SETUP_SCSI_BUS_CHECK) |
| 229 | goto out; |
| 230 | /* |
| 231 | * Check for no terminators or SCSI bus shorts to ground. |
| 232 | * Read SCSI data bus, data parity bits and control signals. |
| 233 | * We are expecting RESET to be TRUE and other signals to be |
| 234 | * FALSE. |
| 235 | */ |
| 236 | term = INB(np, nc_sstat0); |
| 237 | term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ |
| 238 | term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */ |
| 239 | ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */ |
| 240 | ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */ |
| 241 | INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */ |
| 242 | |
| 243 | if (!np->maxwide) |
| 244 | term &= 0x3ffff; |
| 245 | |
| 246 | if (term != (2<<7)) { |
| 247 | printf("%s: suspicious SCSI data while resetting the BUS.\n", |
| 248 | sym_name(np)); |
| 249 | printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " |
| 250 | "0x%lx, expecting 0x%lx\n", |
| 251 | sym_name(np), |
| 252 | (np->features & FE_WIDE) ? "dp1,d15-8," : "", |
| 253 | (u_long)term, (u_long)(2<<7)); |
| 254 | if (SYM_SETUP_SCSI_BUS_CHECK == 1) |
| 255 | retv = 1; |
| 256 | } |
| 257 | out: |
| 258 | OUTB(np, nc_scntl1, 0); |
| 259 | return retv; |
| 260 | } |
| 261 | |
| 262 | /* |
| 263 | * Select SCSI clock frequency |
| 264 | */ |
| 265 | static void sym_selectclock(struct sym_hcb *np, u_char scntl3) |
| 266 | { |
| 267 | /* |
| 268 | * If multiplier not present or not selected, leave here. |
| 269 | */ |
| 270 | if (np->multiplier <= 1) { |
| 271 | OUTB(np, nc_scntl3, scntl3); |
| 272 | return; |
| 273 | } |
| 274 | |
| 275 | if (sym_verbose >= 2) |
| 276 | printf ("%s: enabling clock multiplier\n", sym_name(np)); |
| 277 | |
| 278 | OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */ |
| 279 | /* |
| 280 | * Wait for the LCKFRQ bit to be set if supported by the chip. |
| 281 | * Otherwise wait 50 micro-seconds (at least). |
| 282 | */ |
| 283 | if (np->features & FE_LCKFRQ) { |
| 284 | int i = 20; |
| 285 | while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0) |
| 286 | udelay(20); |
| 287 | if (!i) |
| 288 | printf("%s: the chip cannot lock the frequency\n", |
| 289 | sym_name(np)); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 290 | } else { |
| 291 | INB(np, nc_mbox1); |
| 292 | udelay(50+10); |
| 293 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */ |
| 295 | OUTB(np, nc_scntl3, scntl3); |
| 296 | OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ |
| 297 | OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */ |
| 298 | } |
| 299 | |
| 300 | |
| 301 | /* |
| 302 | * Determine the chip's clock frequency. |
| 303 | * |
| 304 | * This is essential for the negotiation of the synchronous |
| 305 | * transfer rate. |
| 306 | * |
| 307 | * Note: we have to return the correct value. |
| 308 | * THERE IS NO SAFE DEFAULT VALUE. |
| 309 | * |
| 310 | * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. |
| 311 | * 53C860 and 53C875 rev. 1 support fast20 transfers but |
| 312 | * do not have a clock doubler and so are provided with a |
| 313 | * 80 MHz clock. All other fast20 boards incorporate a doubler |
| 314 | * and so should be delivered with a 40 MHz clock. |
| 315 | * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base |
| 316 | * clock and provide a clock quadrupler (160 Mhz). |
| 317 | */ |
| 318 | |
| 319 | /* |
| 320 | * calculate SCSI clock frequency (in KHz) |
| 321 | */ |
| 322 | static unsigned getfreq (struct sym_hcb *np, int gen) |
| 323 | { |
| 324 | unsigned int ms = 0; |
| 325 | unsigned int f; |
| 326 | |
| 327 | /* |
| 328 | * Measure GEN timer delay in order |
| 329 | * to calculate SCSI clock frequency |
| 330 | * |
| 331 | * This code will never execute too |
| 332 | * many loop iterations (if DELAY is |
| 333 | * reasonably correct). It could get |
| 334 | * too low a delay (too high a freq.) |
| 335 | * if the CPU is slow executing the |
| 336 | * loop for some reason (an NMI, for |
| 337 | * example). For this reason we will |
| 338 | * if multiple measurements are to be |
| 339 | * performed trust the higher delay |
| 340 | * (lower frequency returned). |
| 341 | */ |
| 342 | OUTW(np, nc_sien, 0); /* mask all scsi interrupts */ |
| 343 | INW(np, nc_sist); /* clear pending scsi interrupt */ |
| 344 | OUTB(np, nc_dien, 0); /* mask all dma interrupts */ |
| 345 | INW(np, nc_sist); /* another one, just to be sure :) */ |
| 346 | /* |
| 347 | * The C1010-33 core does not report GEN in SIST, |
| 348 | * if this interrupt is masked in SIEN. |
| 349 | * I don't know yet if the C1010-66 behaves the same way. |
| 350 | */ |
| 351 | if (np->features & FE_C10) { |
| 352 | OUTW(np, nc_sien, GEN); |
| 353 | OUTB(np, nc_istat1, SIRQD); |
| 354 | } |
| 355 | OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */ |
| 356 | OUTB(np, nc_stime1, 0); /* disable general purpose timer */ |
| 357 | OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ |
| 358 | while (!(INW(np, nc_sist) & GEN) && ms++ < 100000) |
| 359 | udelay(1000/4); /* count in 1/4 of ms */ |
| 360 | OUTB(np, nc_stime1, 0); /* disable general purpose timer */ |
| 361 | /* |
| 362 | * Undo C1010-33 specific settings. |
| 363 | */ |
| 364 | if (np->features & FE_C10) { |
| 365 | OUTW(np, nc_sien, 0); |
| 366 | OUTB(np, nc_istat1, 0); |
| 367 | } |
| 368 | /* |
| 369 | * set prescaler to divide by whatever 0 means |
| 370 | * 0 ought to choose divide by 2, but appears |
| 371 | * to set divide by 3.5 mode in my 53c810 ... |
| 372 | */ |
| 373 | OUTB(np, nc_scntl3, 0); |
| 374 | |
| 375 | /* |
| 376 | * adjust for prescaler, and convert into KHz |
| 377 | */ |
| 378 | f = ms ? ((1 << gen) * (4340*4)) / ms : 0; |
| 379 | |
| 380 | /* |
| 381 | * The C1010-33 result is biased by a factor |
| 382 | * of 2/3 compared to earlier chips. |
| 383 | */ |
| 384 | if (np->features & FE_C10) |
| 385 | f = (f * 2) / 3; |
| 386 | |
| 387 | if (sym_verbose >= 2) |
| 388 | printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n", |
| 389 | sym_name(np), gen, ms/4, f); |
| 390 | |
| 391 | return f; |
| 392 | } |
| 393 | |
| 394 | static unsigned sym_getfreq (struct sym_hcb *np) |
| 395 | { |
| 396 | u_int f1, f2; |
| 397 | int gen = 8; |
| 398 | |
| 399 | getfreq (np, gen); /* throw away first result */ |
| 400 | f1 = getfreq (np, gen); |
| 401 | f2 = getfreq (np, gen); |
| 402 | if (f1 > f2) f1 = f2; /* trust lower result */ |
| 403 | return f1; |
| 404 | } |
| 405 | |
| 406 | /* |
| 407 | * Get/probe chip SCSI clock frequency |
| 408 | */ |
| 409 | static void sym_getclock (struct sym_hcb *np, int mult) |
| 410 | { |
| 411 | unsigned char scntl3 = np->sv_scntl3; |
| 412 | unsigned char stest1 = np->sv_stest1; |
| 413 | unsigned f1; |
| 414 | |
| 415 | np->multiplier = 1; |
| 416 | f1 = 40000; |
| 417 | /* |
| 418 | * True with 875/895/896/895A with clock multiplier selected |
| 419 | */ |
| 420 | if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { |
| 421 | if (sym_verbose >= 2) |
| 422 | printf ("%s: clock multiplier found\n", sym_name(np)); |
| 423 | np->multiplier = mult; |
| 424 | } |
| 425 | |
| 426 | /* |
| 427 | * If multiplier not found or scntl3 not 7,5,3, |
| 428 | * reset chip and get frequency from general purpose timer. |
| 429 | * Otherwise trust scntl3 BIOS setting. |
| 430 | */ |
| 431 | if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { |
| 432 | OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */ |
| 433 | f1 = sym_getfreq (np); |
| 434 | |
| 435 | if (sym_verbose) |
| 436 | printf ("%s: chip clock is %uKHz\n", sym_name(np), f1); |
| 437 | |
| 438 | if (f1 < 45000) f1 = 40000; |
| 439 | else if (f1 < 55000) f1 = 50000; |
| 440 | else f1 = 80000; |
| 441 | |
| 442 | if (f1 < 80000 && mult > 1) { |
| 443 | if (sym_verbose >= 2) |
| 444 | printf ("%s: clock multiplier assumed\n", |
| 445 | sym_name(np)); |
| 446 | np->multiplier = mult; |
| 447 | } |
| 448 | } else { |
| 449 | if ((scntl3 & 7) == 3) f1 = 40000; |
| 450 | else if ((scntl3 & 7) == 5) f1 = 80000; |
| 451 | else f1 = 160000; |
| 452 | |
| 453 | f1 /= np->multiplier; |
| 454 | } |
| 455 | |
| 456 | /* |
| 457 | * Compute controller synchronous parameters. |
| 458 | */ |
| 459 | f1 *= np->multiplier; |
| 460 | np->clock_khz = f1; |
| 461 | } |
| 462 | |
| 463 | /* |
| 464 | * Get/probe PCI clock frequency |
| 465 | */ |
| 466 | static int sym_getpciclock (struct sym_hcb *np) |
| 467 | { |
| 468 | int f = 0; |
| 469 | |
| 470 | /* |
| 471 | * For now, we only need to know about the actual |
| 472 | * PCI BUS clock frequency for C1010-66 chips. |
| 473 | */ |
| 474 | #if 1 |
| 475 | if (np->features & FE_66MHZ) { |
| 476 | #else |
| 477 | if (1) { |
| 478 | #endif |
| 479 | OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */ |
| 480 | f = sym_getfreq(np); |
| 481 | OUTB(np, nc_stest1, 0); |
| 482 | } |
| 483 | np->pciclk_khz = f; |
| 484 | |
| 485 | return f; |
| 486 | } |
| 487 | |
| 488 | /* |
| 489 | * SYMBIOS chip clock divisor table. |
| 490 | * |
| 491 | * Divisors are multiplied by 10,000,000 in order to make |
| 492 | * calculations more simple. |
| 493 | */ |
| 494 | #define _5M 5000000 |
| 495 | static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; |
| 496 | |
| 497 | /* |
| 498 | * Get clock factor and sync divisor for a given |
| 499 | * synchronous factor period. |
| 500 | */ |
| 501 | static int |
| 502 | sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp) |
| 503 | { |
| 504 | u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */ |
| 505 | int div = np->clock_divn; /* Number of divisors supported */ |
| 506 | u32 fak; /* Sync factor in sxfer */ |
| 507 | u32 per; /* Period in tenths of ns */ |
| 508 | u32 kpc; /* (per * clk) */ |
| 509 | int ret; |
| 510 | |
| 511 | /* |
| 512 | * Compute the synchronous period in tenths of nano-seconds |
| 513 | */ |
| 514 | if (dt && sfac <= 9) per = 125; |
| 515 | else if (sfac <= 10) per = 250; |
| 516 | else if (sfac == 11) per = 303; |
| 517 | else if (sfac == 12) per = 500; |
| 518 | else per = 40 * sfac; |
| 519 | ret = per; |
| 520 | |
| 521 | kpc = per * clk; |
| 522 | if (dt) |
| 523 | kpc <<= 1; |
| 524 | |
| 525 | /* |
| 526 | * For earliest C10 revision 0, we cannot use extra |
| 527 | * clocks for the setting of the SCSI clocking. |
| 528 | * Note that this limits the lowest sync data transfer |
| 529 | * to 5 Mega-transfers per second and may result in |
| 530 | * using higher clock divisors. |
| 531 | */ |
| 532 | #if 1 |
| 533 | if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) { |
| 534 | /* |
| 535 | * Look for the lowest clock divisor that allows an |
| 536 | * output speed not faster than the period. |
| 537 | */ |
| 538 | while (div > 0) { |
| 539 | --div; |
| 540 | if (kpc > (div_10M[div] << 2)) { |
| 541 | ++div; |
| 542 | break; |
| 543 | } |
| 544 | } |
| 545 | fak = 0; /* No extra clocks */ |
| 546 | if (div == np->clock_divn) { /* Are we too fast ? */ |
| 547 | ret = -1; |
| 548 | } |
| 549 | *divp = div; |
| 550 | *fakp = fak; |
| 551 | return ret; |
| 552 | } |
| 553 | #endif |
| 554 | |
| 555 | /* |
| 556 | * Look for the greatest clock divisor that allows an |
| 557 | * input speed faster than the period. |
| 558 | */ |
| 559 | while (div-- > 0) |
| 560 | if (kpc >= (div_10M[div] << 2)) break; |
| 561 | |
| 562 | /* |
| 563 | * Calculate the lowest clock factor that allows an output |
| 564 | * speed not faster than the period, and the max output speed. |
| 565 | * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT. |
| 566 | * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT. |
| 567 | */ |
| 568 | if (dt) { |
| 569 | fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2; |
| 570 | /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */ |
| 571 | } else { |
| 572 | fak = (kpc - 1) / div_10M[div] + 1 - 4; |
| 573 | /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */ |
| 574 | } |
| 575 | |
| 576 | /* |
| 577 | * Check against our hardware limits, or bugs :). |
| 578 | */ |
| 579 | if (fak > 2) { |
| 580 | fak = 2; |
| 581 | ret = -1; |
| 582 | } |
| 583 | |
| 584 | /* |
| 585 | * Compute and return sync parameters. |
| 586 | */ |
| 587 | *divp = div; |
| 588 | *fakp = fak; |
| 589 | |
| 590 | return ret; |
| 591 | } |
| 592 | |
| 593 | /* |
| 594 | * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64, |
| 595 | * 128 transfers. All chips support at least 16 transfers |
| 596 | * bursts. The 825A, 875 and 895 chips support bursts of up |
| 597 | * to 128 transfers and the 895A and 896 support bursts of up |
| 598 | * to 64 transfers. All other chips support up to 16 |
| 599 | * transfers bursts. |
| 600 | * |
| 601 | * For PCI 32 bit data transfers each transfer is a DWORD. |
| 602 | * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers. |
| 603 | * |
| 604 | * We use log base 2 (burst length) as internal code, with |
| 605 | * value 0 meaning "burst disabled". |
| 606 | */ |
| 607 | |
| 608 | /* |
| 609 | * Burst length from burst code. |
| 610 | */ |
| 611 | #define burst_length(bc) (!(bc))? 0 : 1 << (bc) |
| 612 | |
| 613 | /* |
| 614 | * Burst code from io register bits. |
| 615 | */ |
| 616 | #define burst_code(dmode, ctest4, ctest5) \ |
| 617 | (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1 |
| 618 | |
| 619 | /* |
| 620 | * Set initial io register bits from burst code. |
| 621 | */ |
| 622 | static __inline void sym_init_burst(struct sym_hcb *np, u_char bc) |
| 623 | { |
| 624 | np->rv_ctest4 &= ~0x80; |
| 625 | np->rv_dmode &= ~(0x3 << 6); |
| 626 | np->rv_ctest5 &= ~0x4; |
| 627 | |
| 628 | if (!bc) { |
| 629 | np->rv_ctest4 |= 0x80; |
| 630 | } |
| 631 | else { |
| 632 | --bc; |
| 633 | np->rv_dmode |= ((bc & 0x3) << 6); |
| 634 | np->rv_ctest5 |= (bc & 0x4); |
| 635 | } |
| 636 | } |
| 637 | |
| 638 | |
| 639 | /* |
| 640 | * Print out the list of targets that have some flag disabled by user. |
| 641 | */ |
| 642 | static void sym_print_targets_flag(struct sym_hcb *np, int mask, char *msg) |
| 643 | { |
| 644 | int cnt; |
| 645 | int i; |
| 646 | |
| 647 | for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { |
| 648 | if (i == np->myaddr) |
| 649 | continue; |
| 650 | if (np->target[i].usrflags & mask) { |
| 651 | if (!cnt++) |
| 652 | printf("%s: %s disabled for targets", |
| 653 | sym_name(np), msg); |
| 654 | printf(" %d", i); |
| 655 | } |
| 656 | } |
| 657 | if (cnt) |
| 658 | printf(".\n"); |
| 659 | } |
| 660 | |
| 661 | /* |
| 662 | * Save initial settings of some IO registers. |
| 663 | * Assumed to have been set by BIOS. |
| 664 | * We cannot reset the chip prior to reading the |
| 665 | * IO registers, since informations will be lost. |
| 666 | * Since the SCRIPTS processor may be running, this |
| 667 | * is not safe on paper, but it seems to work quite |
| 668 | * well. :) |
| 669 | */ |
| 670 | static void sym_save_initial_setting (struct sym_hcb *np) |
| 671 | { |
| 672 | np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a; |
| 673 | np->sv_scntl3 = INB(np, nc_scntl3) & 0x07; |
| 674 | np->sv_dmode = INB(np, nc_dmode) & 0xce; |
| 675 | np->sv_dcntl = INB(np, nc_dcntl) & 0xa8; |
| 676 | np->sv_ctest3 = INB(np, nc_ctest3) & 0x01; |
| 677 | np->sv_ctest4 = INB(np, nc_ctest4) & 0x80; |
| 678 | np->sv_gpcntl = INB(np, nc_gpcntl); |
| 679 | np->sv_stest1 = INB(np, nc_stest1); |
| 680 | np->sv_stest2 = INB(np, nc_stest2) & 0x20; |
| 681 | np->sv_stest4 = INB(np, nc_stest4); |
| 682 | if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */ |
| 683 | np->sv_scntl4 = INB(np, nc_scntl4); |
| 684 | np->sv_ctest5 = INB(np, nc_ctest5) & 0x04; |
| 685 | } |
| 686 | else |
| 687 | np->sv_ctest5 = INB(np, nc_ctest5) & 0x24; |
| 688 | } |
| 689 | |
| 690 | /* |
| 691 | * Prepare io register values used by sym_start_up() |
| 692 | * according to selected and supported features. |
| 693 | */ |
| 694 | static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram) |
| 695 | { |
| 696 | u_char burst_max; |
| 697 | u32 period; |
| 698 | int i; |
| 699 | |
| 700 | /* |
| 701 | * Wide ? |
| 702 | */ |
| 703 | np->maxwide = (np->features & FE_WIDE)? 1 : 0; |
| 704 | |
| 705 | /* |
| 706 | * Guess the frequency of the chip's clock. |
| 707 | */ |
| 708 | if (np->features & (FE_ULTRA3 | FE_ULTRA2)) |
| 709 | np->clock_khz = 160000; |
| 710 | else if (np->features & FE_ULTRA) |
| 711 | np->clock_khz = 80000; |
| 712 | else |
| 713 | np->clock_khz = 40000; |
| 714 | |
| 715 | /* |
| 716 | * Get the clock multiplier factor. |
| 717 | */ |
| 718 | if (np->features & FE_QUAD) |
| 719 | np->multiplier = 4; |
| 720 | else if (np->features & FE_DBLR) |
| 721 | np->multiplier = 2; |
| 722 | else |
| 723 | np->multiplier = 1; |
| 724 | |
| 725 | /* |
| 726 | * Measure SCSI clock frequency for chips |
| 727 | * it may vary from assumed one. |
| 728 | */ |
| 729 | if (np->features & FE_VARCLK) |
| 730 | sym_getclock(np, np->multiplier); |
| 731 | |
| 732 | /* |
| 733 | * Divisor to be used for async (timer pre-scaler). |
| 734 | */ |
| 735 | i = np->clock_divn - 1; |
| 736 | while (--i >= 0) { |
| 737 | if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) { |
| 738 | ++i; |
| 739 | break; |
| 740 | } |
| 741 | } |
| 742 | np->rv_scntl3 = i+1; |
| 743 | |
| 744 | /* |
| 745 | * The C1010 uses hardwired divisors for async. |
| 746 | * So, we just throw away, the async. divisor.:-) |
| 747 | */ |
| 748 | if (np->features & FE_C10) |
| 749 | np->rv_scntl3 = 0; |
| 750 | |
| 751 | /* |
| 752 | * Minimum synchronous period factor supported by the chip. |
| 753 | * Btw, 'period' is in tenths of nanoseconds. |
| 754 | */ |
| 755 | period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; |
| 756 | |
| 757 | if (period <= 250) np->minsync = 10; |
| 758 | else if (period <= 303) np->minsync = 11; |
| 759 | else if (period <= 500) np->minsync = 12; |
| 760 | else np->minsync = (period + 40 - 1) / 40; |
| 761 | |
| 762 | /* |
| 763 | * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). |
| 764 | */ |
| 765 | if (np->minsync < 25 && |
| 766 | !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3))) |
| 767 | np->minsync = 25; |
| 768 | else if (np->minsync < 12 && |
| 769 | !(np->features & (FE_ULTRA2|FE_ULTRA3))) |
| 770 | np->minsync = 12; |
| 771 | |
| 772 | /* |
| 773 | * Maximum synchronous period factor supported by the chip. |
| 774 | */ |
| 775 | period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); |
| 776 | np->maxsync = period > 2540 ? 254 : period / 10; |
| 777 | |
| 778 | /* |
| 779 | * If chip is a C1010, guess the sync limits in DT mode. |
| 780 | */ |
| 781 | if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) { |
| 782 | if (np->clock_khz == 160000) { |
| 783 | np->minsync_dt = 9; |
| 784 | np->maxsync_dt = 50; |
| 785 | np->maxoffs_dt = nvram->type ? 62 : 31; |
| 786 | } |
| 787 | } |
| 788 | |
| 789 | /* |
| 790 | * 64 bit addressing (895A/896/1010) ? |
| 791 | */ |
| 792 | if (np->features & FE_DAC) { |
| 793 | #if SYM_CONF_DMA_ADDRESSING_MODE == 0 |
| 794 | np->rv_ccntl1 |= (DDAC); |
| 795 | #elif SYM_CONF_DMA_ADDRESSING_MODE == 1 |
| 796 | if (!np->use_dac) |
| 797 | np->rv_ccntl1 |= (DDAC); |
| 798 | else |
| 799 | np->rv_ccntl1 |= (XTIMOD | EXTIBMV); |
| 800 | #elif SYM_CONF_DMA_ADDRESSING_MODE == 2 |
| 801 | if (!np->use_dac) |
| 802 | np->rv_ccntl1 |= (DDAC); |
| 803 | else |
| 804 | np->rv_ccntl1 |= (0 | EXTIBMV); |
| 805 | #endif |
| 806 | } |
| 807 | |
| 808 | /* |
| 809 | * Phase mismatch handled by SCRIPTS (895A/896/1010) ? |
| 810 | */ |
| 811 | if (np->features & FE_NOPM) |
| 812 | np->rv_ccntl0 |= (ENPMJ); |
| 813 | |
| 814 | /* |
| 815 | * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed. |
| 816 | * In dual channel mode, contention occurs if internal cycles |
| 817 | * are used. Disable internal cycles. |
| 818 | */ |
| 819 | if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 && |
| 820 | np->revision_id < 0x1) |
| 821 | np->rv_ccntl0 |= DILS; |
| 822 | |
| 823 | /* |
| 824 | * Select burst length (dwords) |
| 825 | */ |
| 826 | burst_max = SYM_SETUP_BURST_ORDER; |
| 827 | if (burst_max == 255) |
| 828 | burst_max = burst_code(np->sv_dmode, np->sv_ctest4, |
| 829 | np->sv_ctest5); |
| 830 | if (burst_max > 7) |
| 831 | burst_max = 7; |
| 832 | if (burst_max > np->maxburst) |
| 833 | burst_max = np->maxburst; |
| 834 | |
| 835 | /* |
| 836 | * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2. |
| 837 | * This chip and the 860 Rev 1 may wrongly use PCI cache line |
| 838 | * based transactions on LOAD/STORE instructions. So we have |
| 839 | * to prevent these chips from using such PCI transactions in |
| 840 | * this driver. The generic ncr driver that does not use |
| 841 | * LOAD/STORE instructions does not need this work-around. |
| 842 | */ |
| 843 | if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 && |
| 844 | np->revision_id >= 0x10 && np->revision_id <= 0x11) || |
| 845 | (np->device_id == PCI_DEVICE_ID_NCR_53C860 && |
| 846 | np->revision_id <= 0x1)) |
| 847 | np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP); |
| 848 | |
| 849 | /* |
| 850 | * Select all supported special features. |
| 851 | * If we are using on-board RAM for scripts, prefetch (PFEN) |
| 852 | * does not help, but burst op fetch (BOF) does. |
| 853 | * Disabling PFEN makes sure BOF will be used. |
| 854 | */ |
| 855 | if (np->features & FE_ERL) |
| 856 | np->rv_dmode |= ERL; /* Enable Read Line */ |
| 857 | if (np->features & FE_BOF) |
| 858 | np->rv_dmode |= BOF; /* Burst Opcode Fetch */ |
| 859 | if (np->features & FE_ERMP) |
| 860 | np->rv_dmode |= ERMP; /* Enable Read Multiple */ |
| 861 | #if 1 |
| 862 | if ((np->features & FE_PFEN) && !np->ram_ba) |
| 863 | #else |
| 864 | if (np->features & FE_PFEN) |
| 865 | #endif |
| 866 | np->rv_dcntl |= PFEN; /* Prefetch Enable */ |
| 867 | if (np->features & FE_CLSE) |
| 868 | np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ |
| 869 | if (np->features & FE_WRIE) |
| 870 | np->rv_ctest3 |= WRIE; /* Write and Invalidate */ |
| 871 | if (np->features & FE_DFS) |
| 872 | np->rv_ctest5 |= DFS; /* Dma Fifo Size */ |
| 873 | |
| 874 | /* |
| 875 | * Select some other |
| 876 | */ |
| 877 | np->rv_ctest4 |= MPEE; /* Master parity checking */ |
| 878 | np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ |
| 879 | |
| 880 | /* |
| 881 | * Get parity checking, host ID and verbose mode from NVRAM |
| 882 | */ |
| 883 | np->myaddr = 255; |
| 884 | sym_nvram_setup_host(shost, np, nvram); |
| 885 | |
| 886 | /* |
| 887 | * Get SCSI addr of host adapter (set by bios?). |
| 888 | */ |
| 889 | if (np->myaddr == 255) { |
| 890 | np->myaddr = INB(np, nc_scid) & 0x07; |
| 891 | if (!np->myaddr) |
| 892 | np->myaddr = SYM_SETUP_HOST_ID; |
| 893 | } |
| 894 | |
| 895 | /* |
| 896 | * Prepare initial io register bits for burst length |
| 897 | */ |
| 898 | sym_init_burst(np, burst_max); |
| 899 | |
| 900 | /* |
| 901 | * Set SCSI BUS mode. |
| 902 | * - LVD capable chips (895/895A/896/1010) report the |
| 903 | * current BUS mode through the STEST4 IO register. |
| 904 | * - For previous generation chips (825/825A/875), |
| 905 | * user has to tell us how to check against HVD, |
| 906 | * since a 100% safe algorithm is not possible. |
| 907 | */ |
| 908 | np->scsi_mode = SMODE_SE; |
| 909 | if (np->features & (FE_ULTRA2|FE_ULTRA3)) |
| 910 | np->scsi_mode = (np->sv_stest4 & SMODE); |
| 911 | else if (np->features & FE_DIFF) { |
| 912 | if (SYM_SETUP_SCSI_DIFF == 1) { |
| 913 | if (np->sv_scntl3) { |
| 914 | if (np->sv_stest2 & 0x20) |
| 915 | np->scsi_mode = SMODE_HVD; |
| 916 | } |
| 917 | else if (nvram->type == SYM_SYMBIOS_NVRAM) { |
| 918 | if (!(INB(np, nc_gpreg) & 0x08)) |
| 919 | np->scsi_mode = SMODE_HVD; |
| 920 | } |
| 921 | } |
| 922 | else if (SYM_SETUP_SCSI_DIFF == 2) |
| 923 | np->scsi_mode = SMODE_HVD; |
| 924 | } |
| 925 | if (np->scsi_mode == SMODE_HVD) |
| 926 | np->rv_stest2 |= 0x20; |
| 927 | |
| 928 | /* |
| 929 | * Set LED support from SCRIPTS. |
| 930 | * Ignore this feature for boards known to use a |
| 931 | * specific GPIO wiring and for the 895A, 896 |
| 932 | * and 1010 that drive the LED directly. |
| 933 | */ |
| 934 | if ((SYM_SETUP_SCSI_LED || |
| 935 | (nvram->type == SYM_SYMBIOS_NVRAM || |
| 936 | (nvram->type == SYM_TEKRAM_NVRAM && |
| 937 | np->device_id == PCI_DEVICE_ID_NCR_53C895))) && |
| 938 | !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) |
| 939 | np->features |= FE_LED0; |
| 940 | |
| 941 | /* |
| 942 | * Set irq mode. |
| 943 | */ |
| 944 | switch(SYM_SETUP_IRQ_MODE & 3) { |
| 945 | case 2: |
| 946 | np->rv_dcntl |= IRQM; |
| 947 | break; |
| 948 | case 1: |
| 949 | np->rv_dcntl |= (np->sv_dcntl & IRQM); |
| 950 | break; |
| 951 | default: |
| 952 | break; |
| 953 | } |
| 954 | |
| 955 | /* |
| 956 | * Configure targets according to driver setup. |
| 957 | * If NVRAM present get targets setup from NVRAM. |
| 958 | */ |
| 959 | for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { |
| 960 | struct sym_tcb *tp = &np->target[i]; |
| 961 | |
| 962 | tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED); |
| 963 | tp->usrtags = SYM_SETUP_MAX_TAG; |
| 964 | |
| 965 | sym_nvram_setup_target(np, i, nvram); |
| 966 | |
| 967 | if (!tp->usrtags) |
| 968 | tp->usrflags &= ~SYM_TAGS_ENABLED; |
| 969 | } |
| 970 | |
| 971 | /* |
| 972 | * Let user know about the settings. |
| 973 | */ |
| 974 | printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np), |
| 975 | sym_nvram_type(nvram), np->myaddr, |
| 976 | (np->features & FE_ULTRA3) ? 80 : |
| 977 | (np->features & FE_ULTRA2) ? 40 : |
| 978 | (np->features & FE_ULTRA) ? 20 : 10, |
| 979 | sym_scsi_bus_mode(np->scsi_mode), |
| 980 | (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity"); |
| 981 | /* |
| 982 | * Tell him more on demand. |
| 983 | */ |
| 984 | if (sym_verbose) { |
| 985 | printf("%s: %s IRQ line driver%s\n", |
| 986 | sym_name(np), |
| 987 | np->rv_dcntl & IRQM ? "totem pole" : "open drain", |
| 988 | np->ram_ba ? ", using on-chip SRAM" : ""); |
| 989 | printf("%s: using %s firmware.\n", sym_name(np), np->fw_name); |
| 990 | if (np->features & FE_NOPM) |
| 991 | printf("%s: handling phase mismatch from SCRIPTS.\n", |
| 992 | sym_name(np)); |
| 993 | } |
| 994 | /* |
| 995 | * And still more. |
| 996 | */ |
| 997 | if (sym_verbose >= 2) { |
| 998 | printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
| 999 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", |
| 1000 | sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, |
| 1001 | np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); |
| 1002 | |
| 1003 | printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
| 1004 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", |
| 1005 | sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, |
| 1006 | np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); |
| 1007 | } |
| 1008 | /* |
| 1009 | * Let user be aware of targets that have some disable flags set. |
| 1010 | */ |
| 1011 | sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT"); |
| 1012 | if (sym_verbose) |
| 1013 | sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED, |
| 1014 | "SCAN FOR LUNS"); |
| 1015 | |
| 1016 | return 0; |
| 1017 | } |
| 1018 | |
| 1019 | /* |
| 1020 | * Test the pci bus snoop logic :-( |
| 1021 | * |
| 1022 | * Has to be called with interrupts disabled. |
| 1023 | */ |
| 1024 | #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED |
| 1025 | static int sym_regtest (struct sym_hcb *np) |
| 1026 | { |
| 1027 | register volatile u32 data; |
| 1028 | /* |
| 1029 | * chip registers may NOT be cached. |
| 1030 | * write 0xffffffff to a read only register area, |
| 1031 | * and try to read it back. |
| 1032 | */ |
| 1033 | data = 0xffffffff; |
| 1034 | OUTL(np, nc_dstat, data); |
| 1035 | data = INL(np, nc_dstat); |
| 1036 | #if 1 |
| 1037 | if (data == 0xffffffff) { |
| 1038 | #else |
| 1039 | if ((data & 0xe2f0fffd) != 0x02000080) { |
| 1040 | #endif |
| 1041 | printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", |
| 1042 | (unsigned) data); |
| 1043 | return (0x10); |
| 1044 | } |
| 1045 | return (0); |
| 1046 | } |
| 1047 | #endif |
| 1048 | |
| 1049 | static int sym_snooptest (struct sym_hcb *np) |
| 1050 | { |
| 1051 | u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat; |
| 1052 | int i, err=0; |
| 1053 | #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED |
| 1054 | err |= sym_regtest (np); |
| 1055 | if (err) return (err); |
| 1056 | #endif |
| 1057 | restart_test: |
| 1058 | /* |
| 1059 | * Enable Master Parity Checking as we intend |
| 1060 | * to enable it for normal operations. |
| 1061 | */ |
| 1062 | OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE)); |
| 1063 | /* |
| 1064 | * init |
| 1065 | */ |
| 1066 | pc = SCRIPTZ_BA(np, snooptest); |
| 1067 | host_wr = 1; |
| 1068 | sym_wr = 2; |
| 1069 | /* |
| 1070 | * Set memory and register. |
| 1071 | */ |
| 1072 | np->scratch = cpu_to_scr(host_wr); |
| 1073 | OUTL(np, nc_temp, sym_wr); |
| 1074 | /* |
| 1075 | * Start script (exchange values) |
| 1076 | */ |
| 1077 | OUTL(np, nc_dsa, np->hcb_ba); |
| 1078 | OUTL_DSP(np, pc); |
| 1079 | /* |
| 1080 | * Wait 'til done (with timeout) |
| 1081 | */ |
| 1082 | for (i=0; i<SYM_SNOOP_TIMEOUT; i++) |
| 1083 | if (INB(np, nc_istat) & (INTF|SIP|DIP)) |
| 1084 | break; |
| 1085 | if (i>=SYM_SNOOP_TIMEOUT) { |
| 1086 | printf ("CACHE TEST FAILED: timeout.\n"); |
| 1087 | return (0x20); |
| 1088 | } |
| 1089 | /* |
| 1090 | * Check for fatal DMA errors. |
| 1091 | */ |
| 1092 | dstat = INB(np, nc_dstat); |
| 1093 | #if 1 /* Band aiding for broken hardwares that fail PCI parity */ |
| 1094 | if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) { |
| 1095 | printf ("%s: PCI DATA PARITY ERROR DETECTED - " |
| 1096 | "DISABLING MASTER DATA PARITY CHECKING.\n", |
| 1097 | sym_name(np)); |
| 1098 | np->rv_ctest4 &= ~MPEE; |
| 1099 | goto restart_test; |
| 1100 | } |
| 1101 | #endif |
| 1102 | if (dstat & (MDPE|BF|IID)) { |
| 1103 | printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat); |
| 1104 | return (0x80); |
| 1105 | } |
| 1106 | /* |
| 1107 | * Save termination position. |
| 1108 | */ |
| 1109 | pc = INL(np, nc_dsp); |
| 1110 | /* |
| 1111 | * Read memory and register. |
| 1112 | */ |
| 1113 | host_rd = scr_to_cpu(np->scratch); |
| 1114 | sym_rd = INL(np, nc_scratcha); |
| 1115 | sym_bk = INL(np, nc_temp); |
| 1116 | /* |
| 1117 | * Check termination position. |
| 1118 | */ |
| 1119 | if (pc != SCRIPTZ_BA(np, snoopend)+8) { |
| 1120 | printf ("CACHE TEST FAILED: script execution failed.\n"); |
| 1121 | printf ("start=%08lx, pc=%08lx, end=%08lx\n", |
| 1122 | (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc, |
| 1123 | (u_long) SCRIPTZ_BA(np, snoopend) +8); |
| 1124 | return (0x40); |
| 1125 | } |
| 1126 | /* |
| 1127 | * Show results. |
| 1128 | */ |
| 1129 | if (host_wr != sym_rd) { |
| 1130 | printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n", |
| 1131 | (int) host_wr, (int) sym_rd); |
| 1132 | err |= 1; |
| 1133 | } |
| 1134 | if (host_rd != sym_wr) { |
| 1135 | printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n", |
| 1136 | (int) sym_wr, (int) host_rd); |
| 1137 | err |= 2; |
| 1138 | } |
| 1139 | if (sym_bk != sym_wr) { |
| 1140 | printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n", |
| 1141 | (int) sym_wr, (int) sym_bk); |
| 1142 | err |= 4; |
| 1143 | } |
| 1144 | |
| 1145 | return (err); |
| 1146 | } |
| 1147 | |
| 1148 | /* |
| 1149 | * log message for real hard errors |
| 1150 | * |
| 1151 | * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc). |
| 1152 | * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf. |
| 1153 | * |
| 1154 | * exception register: |
| 1155 | * ds: dstat |
| 1156 | * si: sist |
| 1157 | * |
| 1158 | * SCSI bus lines: |
| 1159 | * so: control lines as driven by chip. |
| 1160 | * si: control lines as seen by chip. |
| 1161 | * sd: scsi data lines as seen by chip. |
| 1162 | * |
| 1163 | * wide/fastmode: |
| 1164 | * sx: sxfer (see the manual) |
| 1165 | * s3: scntl3 (see the manual) |
| 1166 | * s4: scntl4 (see the manual) |
| 1167 | * |
| 1168 | * current script command: |
| 1169 | * dsp: script address (relative to start of script). |
| 1170 | * dbc: first word of script command. |
| 1171 | * |
| 1172 | * First 24 register of the chip: |
| 1173 | * r0..rf |
| 1174 | */ |
| 1175 | static void sym_log_hard_error(struct sym_hcb *np, u_short sist, u_char dstat) |
| 1176 | { |
| 1177 | u32 dsp; |
| 1178 | int script_ofs; |
| 1179 | int script_size; |
| 1180 | char *script_name; |
| 1181 | u_char *script_base; |
| 1182 | int i; |
| 1183 | |
| 1184 | dsp = INL(np, nc_dsp); |
| 1185 | |
| 1186 | if (dsp > np->scripta_ba && |
| 1187 | dsp <= np->scripta_ba + np->scripta_sz) { |
| 1188 | script_ofs = dsp - np->scripta_ba; |
| 1189 | script_size = np->scripta_sz; |
| 1190 | script_base = (u_char *) np->scripta0; |
| 1191 | script_name = "scripta"; |
| 1192 | } |
| 1193 | else if (np->scriptb_ba < dsp && |
| 1194 | dsp <= np->scriptb_ba + np->scriptb_sz) { |
| 1195 | script_ofs = dsp - np->scriptb_ba; |
| 1196 | script_size = np->scriptb_sz; |
| 1197 | script_base = (u_char *) np->scriptb0; |
| 1198 | script_name = "scriptb"; |
| 1199 | } else { |
| 1200 | script_ofs = dsp; |
| 1201 | script_size = 0; |
| 1202 | script_base = NULL; |
| 1203 | script_name = "mem"; |
| 1204 | } |
| 1205 | |
| 1206 | printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n", |
| 1207 | sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist, |
| 1208 | (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl), |
| 1209 | (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer), |
| 1210 | (unsigned)INB(np, nc_scntl3), |
| 1211 | (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0, |
| 1212 | script_name, script_ofs, (unsigned)INL(np, nc_dbc)); |
| 1213 | |
| 1214 | if (((script_ofs & 3) == 0) && |
| 1215 | (unsigned)script_ofs < script_size) { |
| 1216 | printf ("%s: script cmd = %08x\n", sym_name(np), |
| 1217 | scr_to_cpu((int) *(u32 *)(script_base + script_ofs))); |
| 1218 | } |
| 1219 | |
| 1220 | printf ("%s: regdump:", sym_name(np)); |
| 1221 | for (i=0; i<24;i++) |
| 1222 | printf (" %02x", (unsigned)INB_OFF(np, i)); |
| 1223 | printf (".\n"); |
| 1224 | |
| 1225 | /* |
| 1226 | * PCI BUS error. |
| 1227 | */ |
| 1228 | if (dstat & (MDPE|BF)) |
| 1229 | sym_log_bus_error(np); |
| 1230 | } |
| 1231 | |
| 1232 | static struct sym_chip sym_dev_table[] = { |
| 1233 | {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64, |
| 1234 | FE_ERL} |
| 1235 | , |
| 1236 | #ifdef SYM_DEBUG_GENERIC_SUPPORT |
| 1237 | {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1, |
| 1238 | FE_BOF} |
| 1239 | , |
| 1240 | #else |
| 1241 | {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1, |
| 1242 | FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF} |
| 1243 | , |
| 1244 | #endif |
| 1245 | {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64, |
| 1246 | FE_BOF|FE_ERL} |
| 1247 | , |
| 1248 | {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64, |
| 1249 | FE_WIDE|FE_BOF|FE_ERL|FE_DIFF} |
| 1250 | , |
| 1251 | {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2, |
| 1252 | FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF} |
| 1253 | , |
| 1254 | {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1, |
| 1255 | FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN} |
| 1256 | , |
| 1257 | {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2, |
| 1258 | FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1259 | FE_RAM|FE_DIFF|FE_VARCLK} |
| 1260 | , |
| 1261 | {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2, |
| 1262 | FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1263 | FE_RAM|FE_DIFF|FE_VARCLK} |
| 1264 | , |
| 1265 | {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2, |
| 1266 | FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1267 | FE_RAM|FE_DIFF|FE_VARCLK} |
| 1268 | , |
| 1269 | {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2, |
| 1270 | FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1271 | FE_RAM|FE_DIFF|FE_VARCLK} |
| 1272 | , |
| 1273 | #ifdef SYM_DEBUG_GENERIC_SUPPORT |
| 1274 | {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2, |
| 1275 | FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS| |
| 1276 | FE_RAM|FE_LCKFRQ} |
| 1277 | , |
| 1278 | #else |
| 1279 | {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2, |
| 1280 | FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1281 | FE_RAM|FE_LCKFRQ} |
| 1282 | , |
| 1283 | #endif |
| 1284 | {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4, |
| 1285 | FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1286 | FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} |
| 1287 | , |
| 1288 | {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4, |
| 1289 | FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1290 | FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} |
| 1291 | , |
| 1292 | {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4, |
| 1293 | FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1294 | FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} |
| 1295 | , |
| 1296 | {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8, |
| 1297 | FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| |
| 1298 | FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC| |
| 1299 | FE_C10} |
| 1300 | , |
| 1301 | {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8, |
| 1302 | FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| |
| 1303 | FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC| |
| 1304 | FE_C10|FE_U3EN} |
| 1305 | , |
| 1306 | {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8, |
| 1307 | FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| |
| 1308 | FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC| |
| 1309 | FE_C10|FE_U3EN} |
| 1310 | , |
| 1311 | {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4, |
| 1312 | FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| |
| 1313 | FE_RAM|FE_IO256|FE_LEDC} |
| 1314 | }; |
| 1315 | |
| 1316 | #define sym_num_devs \ |
| 1317 | (sizeof(sym_dev_table) / sizeof(sym_dev_table[0])) |
| 1318 | |
| 1319 | /* |
| 1320 | * Look up the chip table. |
| 1321 | * |
| 1322 | * Return a pointer to the chip entry if found, |
| 1323 | * zero otherwise. |
| 1324 | */ |
| 1325 | struct sym_chip * |
| 1326 | sym_lookup_chip_table (u_short device_id, u_char revision) |
| 1327 | { |
| 1328 | struct sym_chip *chip; |
| 1329 | int i; |
| 1330 | |
| 1331 | for (i = 0; i < sym_num_devs; i++) { |
| 1332 | chip = &sym_dev_table[i]; |
| 1333 | if (device_id != chip->device_id) |
| 1334 | continue; |
| 1335 | if (revision > chip->revision_id) |
| 1336 | continue; |
| 1337 | return chip; |
| 1338 | } |
| 1339 | |
| 1340 | return NULL; |
| 1341 | } |
| 1342 | |
| 1343 | #if SYM_CONF_DMA_ADDRESSING_MODE == 2 |
| 1344 | /* |
| 1345 | * Lookup the 64 bit DMA segments map. |
| 1346 | * This is only used if the direct mapping |
| 1347 | * has been unsuccessful. |
| 1348 | */ |
| 1349 | int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s) |
| 1350 | { |
| 1351 | int i; |
| 1352 | |
| 1353 | if (!np->use_dac) |
| 1354 | goto weird; |
| 1355 | |
| 1356 | /* Look up existing mappings */ |
| 1357 | for (i = SYM_DMAP_SIZE-1; i > 0; i--) { |
| 1358 | if (h == np->dmap_bah[i]) |
| 1359 | return i; |
| 1360 | } |
| 1361 | /* If direct mapping is free, get it */ |
| 1362 | if (!np->dmap_bah[s]) |
| 1363 | goto new; |
| 1364 | /* Collision -> lookup free mappings */ |
| 1365 | for (s = SYM_DMAP_SIZE-1; s > 0; s--) { |
| 1366 | if (!np->dmap_bah[s]) |
| 1367 | goto new; |
| 1368 | } |
| 1369 | weird: |
| 1370 | panic("sym: ran out of 64 bit DMA segment registers"); |
| 1371 | return -1; |
| 1372 | new: |
| 1373 | np->dmap_bah[s] = h; |
| 1374 | np->dmap_dirty = 1; |
| 1375 | return s; |
| 1376 | } |
| 1377 | |
| 1378 | /* |
| 1379 | * Update IO registers scratch C..R so they will be |
| 1380 | * in sync. with queued CCB expectations. |
| 1381 | */ |
| 1382 | static void sym_update_dmap_regs(struct sym_hcb *np) |
| 1383 | { |
| 1384 | int o, i; |
| 1385 | |
| 1386 | if (!np->dmap_dirty) |
| 1387 | return; |
| 1388 | o = offsetof(struct sym_reg, nc_scrx[0]); |
| 1389 | for (i = 0; i < SYM_DMAP_SIZE; i++) { |
| 1390 | OUTL_OFF(np, o, np->dmap_bah[i]); |
| 1391 | o += 4; |
| 1392 | } |
| 1393 | np->dmap_dirty = 0; |
| 1394 | } |
| 1395 | #endif |
| 1396 | |
| 1397 | /* Enforce all the fiddly SPI rules and the chip limitations */ |
| 1398 | static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget, |
| 1399 | struct sym_trans *goal) |
| 1400 | { |
| 1401 | if (!spi_support_wide(starget)) |
| 1402 | goal->width = 0; |
| 1403 | |
| 1404 | if (!spi_support_sync(starget)) { |
| 1405 | goal->iu = 0; |
| 1406 | goal->dt = 0; |
| 1407 | goal->qas = 0; |
| 1408 | goal->period = 0; |
| 1409 | goal->offset = 0; |
| 1410 | return; |
| 1411 | } |
| 1412 | |
| 1413 | if (spi_support_dt(starget)) { |
| 1414 | if (spi_support_dt_only(starget)) |
| 1415 | goal->dt = 1; |
| 1416 | |
| 1417 | if (goal->offset == 0) |
| 1418 | goal->dt = 0; |
| 1419 | } else { |
| 1420 | goal->dt = 0; |
| 1421 | } |
| 1422 | |
| 1423 | /* Some targets fail to properly negotiate DT in SE mode */ |
| 1424 | if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN)) |
| 1425 | goal->dt = 0; |
| 1426 | |
| 1427 | if (goal->dt) { |
| 1428 | /* all DT transfers must be wide */ |
| 1429 | goal->width = 1; |
| 1430 | if (goal->offset > np->maxoffs_dt) |
| 1431 | goal->offset = np->maxoffs_dt; |
| 1432 | if (goal->period < np->minsync_dt) |
| 1433 | goal->period = np->minsync_dt; |
| 1434 | if (goal->period > np->maxsync_dt) |
| 1435 | goal->period = np->maxsync_dt; |
| 1436 | } else { |
| 1437 | goal->iu = goal->qas = 0; |
| 1438 | if (goal->offset > np->maxoffs) |
| 1439 | goal->offset = np->maxoffs; |
| 1440 | if (goal->period < np->minsync) |
| 1441 | goal->period = np->minsync; |
| 1442 | if (goal->period > np->maxsync) |
| 1443 | goal->period = np->maxsync; |
| 1444 | } |
| 1445 | } |
| 1446 | |
| 1447 | /* |
| 1448 | * Prepare the next negotiation message if needed. |
| 1449 | * |
| 1450 | * Fill in the part of message buffer that contains the |
| 1451 | * negotiation and the nego_status field of the CCB. |
| 1452 | * Returns the size of the message in bytes. |
| 1453 | */ |
| 1454 | static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr) |
| 1455 | { |
| 1456 | struct sym_tcb *tp = &np->target[cp->target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 1457 | struct scsi_target *starget = tp->starget; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1458 | struct sym_trans *goal = &tp->tgoal; |
| 1459 | int msglen = 0; |
| 1460 | int nego; |
| 1461 | |
| 1462 | sym_check_goals(np, starget, goal); |
| 1463 | |
| 1464 | /* |
| 1465 | * Many devices implement PPR in a buggy way, so only use it if we |
| 1466 | * really want to. |
| 1467 | */ |
| 1468 | if (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)) { |
| 1469 | nego = NS_PPR; |
| 1470 | } else if (spi_width(starget) != goal->width) { |
| 1471 | nego = NS_WIDE; |
| 1472 | } else if (spi_period(starget) != goal->period || |
| 1473 | spi_offset(starget) != goal->offset) { |
| 1474 | nego = NS_SYNC; |
| 1475 | } else { |
| 1476 | goal->check_nego = 0; |
| 1477 | nego = 0; |
| 1478 | } |
| 1479 | |
| 1480 | switch (nego) { |
| 1481 | case NS_SYNC: |
| 1482 | msgptr[msglen++] = M_EXTENDED; |
| 1483 | msgptr[msglen++] = 3; |
| 1484 | msgptr[msglen++] = M_X_SYNC_REQ; |
| 1485 | msgptr[msglen++] = goal->period; |
| 1486 | msgptr[msglen++] = goal->offset; |
| 1487 | break; |
| 1488 | case NS_WIDE: |
| 1489 | msgptr[msglen++] = M_EXTENDED; |
| 1490 | msgptr[msglen++] = 2; |
| 1491 | msgptr[msglen++] = M_X_WIDE_REQ; |
| 1492 | msgptr[msglen++] = goal->width; |
| 1493 | break; |
| 1494 | case NS_PPR: |
| 1495 | msgptr[msglen++] = M_EXTENDED; |
| 1496 | msgptr[msglen++] = 6; |
| 1497 | msgptr[msglen++] = M_X_PPR_REQ; |
| 1498 | msgptr[msglen++] = goal->period; |
| 1499 | msgptr[msglen++] = 0; |
| 1500 | msgptr[msglen++] = goal->offset; |
| 1501 | msgptr[msglen++] = goal->width; |
| 1502 | msgptr[msglen++] = (goal->iu ? PPR_OPT_IU : 0) | |
| 1503 | (goal->dt ? PPR_OPT_DT : 0) | |
| 1504 | (goal->qas ? PPR_OPT_QAS : 0); |
| 1505 | break; |
| 1506 | } |
| 1507 | |
| 1508 | cp->nego_status = nego; |
| 1509 | |
| 1510 | if (nego) { |
| 1511 | tp->nego_cp = cp; /* Keep track a nego will be performed */ |
| 1512 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 1513 | sym_print_nego_msg(np, cp->target, |
| 1514 | nego == NS_SYNC ? "sync msgout" : |
| 1515 | nego == NS_WIDE ? "wide msgout" : |
| 1516 | "ppr msgout", msgptr); |
| 1517 | } |
| 1518 | } |
| 1519 | |
| 1520 | return msglen; |
| 1521 | } |
| 1522 | |
| 1523 | /* |
| 1524 | * Insert a job into the start queue. |
| 1525 | */ |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 1526 | static void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1527 | { |
| 1528 | u_short qidx; |
| 1529 | |
| 1530 | #ifdef SYM_CONF_IARB_SUPPORT |
| 1531 | /* |
| 1532 | * If the previously queued CCB is not yet done, |
| 1533 | * set the IARB hint. The SCRIPTS will go with IARB |
| 1534 | * for this job when starting the previous one. |
| 1535 | * We leave devices a chance to win arbitration by |
| 1536 | * not using more than 'iarb_max' consecutive |
| 1537 | * immediate arbitrations. |
| 1538 | */ |
| 1539 | if (np->last_cp && np->iarb_count < np->iarb_max) { |
| 1540 | np->last_cp->host_flags |= HF_HINT_IARB; |
| 1541 | ++np->iarb_count; |
| 1542 | } |
| 1543 | else |
| 1544 | np->iarb_count = 0; |
| 1545 | np->last_cp = cp; |
| 1546 | #endif |
| 1547 | |
| 1548 | #if SYM_CONF_DMA_ADDRESSING_MODE == 2 |
| 1549 | /* |
| 1550 | * Make SCRIPTS aware of the 64 bit DMA |
| 1551 | * segment registers not being up-to-date. |
| 1552 | */ |
| 1553 | if (np->dmap_dirty) |
| 1554 | cp->host_xflags |= HX_DMAP_DIRTY; |
| 1555 | #endif |
| 1556 | |
| 1557 | /* |
| 1558 | * Insert first the idle task and then our job. |
| 1559 | * The MBs should ensure proper ordering. |
| 1560 | */ |
| 1561 | qidx = np->squeueput + 2; |
| 1562 | if (qidx >= MAX_QUEUE*2) qidx = 0; |
| 1563 | |
| 1564 | np->squeue [qidx] = cpu_to_scr(np->idletask_ba); |
| 1565 | MEMORY_WRITE_BARRIER(); |
| 1566 | np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba); |
| 1567 | |
| 1568 | np->squeueput = qidx; |
| 1569 | |
| 1570 | if (DEBUG_FLAGS & DEBUG_QUEUE) |
| 1571 | printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput); |
| 1572 | |
| 1573 | /* |
| 1574 | * Script processor may be waiting for reselect. |
| 1575 | * Wake it up. |
| 1576 | */ |
| 1577 | MEMORY_WRITE_BARRIER(); |
| 1578 | OUTB(np, nc_istat, SIGP|np->istat_sem); |
| 1579 | } |
| 1580 | |
| 1581 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 1582 | /* |
| 1583 | * Start next ready-to-start CCBs. |
| 1584 | */ |
| 1585 | void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn) |
| 1586 | { |
| 1587 | SYM_QUEHEAD *qp; |
| 1588 | struct sym_ccb *cp; |
| 1589 | |
| 1590 | /* |
| 1591 | * Paranoia, as usual. :-) |
| 1592 | */ |
| 1593 | assert(!lp->started_tags || !lp->started_no_tag); |
| 1594 | |
| 1595 | /* |
| 1596 | * Try to start as many commands as asked by caller. |
| 1597 | * Prevent from having both tagged and untagged |
| 1598 | * commands queued to the device at the same time. |
| 1599 | */ |
| 1600 | while (maxn--) { |
| 1601 | qp = sym_remque_head(&lp->waiting_ccbq); |
| 1602 | if (!qp) |
| 1603 | break; |
| 1604 | cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq); |
| 1605 | if (cp->tag != NO_TAG) { |
| 1606 | if (lp->started_no_tag || |
| 1607 | lp->started_tags >= lp->started_max) { |
| 1608 | sym_insque_head(qp, &lp->waiting_ccbq); |
| 1609 | break; |
| 1610 | } |
| 1611 | lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba); |
| 1612 | lp->head.resel_sa = |
| 1613 | cpu_to_scr(SCRIPTA_BA(np, resel_tag)); |
| 1614 | ++lp->started_tags; |
| 1615 | } else { |
| 1616 | if (lp->started_no_tag || lp->started_tags) { |
| 1617 | sym_insque_head(qp, &lp->waiting_ccbq); |
| 1618 | break; |
| 1619 | } |
| 1620 | lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba); |
| 1621 | lp->head.resel_sa = |
| 1622 | cpu_to_scr(SCRIPTA_BA(np, resel_no_tag)); |
| 1623 | ++lp->started_no_tag; |
| 1624 | } |
| 1625 | cp->started = 1; |
| 1626 | sym_insque_tail(qp, &lp->started_ccbq); |
| 1627 | sym_put_start_queue(np, cp); |
| 1628 | } |
| 1629 | } |
| 1630 | #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */ |
| 1631 | |
| 1632 | /* |
| 1633 | * The chip may have completed jobs. Look at the DONE QUEUE. |
| 1634 | * |
| 1635 | * On paper, memory read barriers may be needed here to |
| 1636 | * prevent out of order LOADs by the CPU from having |
| 1637 | * prefetched stale data prior to DMA having occurred. |
| 1638 | */ |
| 1639 | static int sym_wakeup_done (struct sym_hcb *np) |
| 1640 | { |
| 1641 | struct sym_ccb *cp; |
| 1642 | int i, n; |
| 1643 | u32 dsa; |
| 1644 | |
| 1645 | n = 0; |
| 1646 | i = np->dqueueget; |
| 1647 | |
| 1648 | /* MEMORY_READ_BARRIER(); */ |
| 1649 | while (1) { |
| 1650 | dsa = scr_to_cpu(np->dqueue[i]); |
| 1651 | if (!dsa) |
| 1652 | break; |
| 1653 | np->dqueue[i] = 0; |
| 1654 | if ((i = i+2) >= MAX_QUEUE*2) |
| 1655 | i = 0; |
| 1656 | |
| 1657 | cp = sym_ccb_from_dsa(np, dsa); |
| 1658 | if (cp) { |
| 1659 | MEMORY_READ_BARRIER(); |
| 1660 | sym_complete_ok (np, cp); |
| 1661 | ++n; |
| 1662 | } |
| 1663 | else |
| 1664 | printf ("%s: bad DSA (%x) in done queue.\n", |
| 1665 | sym_name(np), (u_int) dsa); |
| 1666 | } |
| 1667 | np->dqueueget = i; |
| 1668 | |
| 1669 | return n; |
| 1670 | } |
| 1671 | |
| 1672 | /* |
| 1673 | * Complete all CCBs queued to the COMP queue. |
| 1674 | * |
| 1675 | * These CCBs are assumed: |
| 1676 | * - Not to be referenced either by devices or |
| 1677 | * SCRIPTS-related queues and datas. |
| 1678 | * - To have to be completed with an error condition |
| 1679 | * or requeued. |
| 1680 | * |
| 1681 | * The device queue freeze count is incremented |
| 1682 | * for each CCB that does not prevent this. |
| 1683 | * This function is called when all CCBs involved |
| 1684 | * in error handling/recovery have been reaped. |
| 1685 | */ |
| 1686 | static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status) |
| 1687 | { |
| 1688 | SYM_QUEHEAD *qp; |
| 1689 | struct sym_ccb *cp; |
| 1690 | |
| 1691 | while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) { |
| 1692 | struct scsi_cmnd *cmd; |
| 1693 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 1694 | sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); |
| 1695 | /* Leave quiet CCBs waiting for resources */ |
| 1696 | if (cp->host_status == HS_WAIT) |
| 1697 | continue; |
| 1698 | cmd = cp->cmd; |
| 1699 | if (cam_status) |
| 1700 | sym_set_cam_status(cmd, cam_status); |
| 1701 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 1702 | if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1703 | struct sym_tcb *tp = &np->target[cp->target]; |
| 1704 | struct sym_lcb *lp = sym_lp(tp, cp->lun); |
| 1705 | if (lp) { |
| 1706 | sym_remque(&cp->link2_ccbq); |
| 1707 | sym_insque_tail(&cp->link2_ccbq, |
| 1708 | &lp->waiting_ccbq); |
| 1709 | if (cp->started) { |
| 1710 | if (cp->tag != NO_TAG) |
| 1711 | --lp->started_tags; |
| 1712 | else |
| 1713 | --lp->started_no_tag; |
| 1714 | } |
| 1715 | } |
| 1716 | cp->started = 0; |
| 1717 | continue; |
| 1718 | } |
| 1719 | #endif |
| 1720 | sym_free_ccb(np, cp); |
| 1721 | sym_xpt_done(np, cmd); |
| 1722 | } |
| 1723 | } |
| 1724 | |
| 1725 | /* |
| 1726 | * Complete all active CCBs with error. |
| 1727 | * Used on CHIP/SCSI RESET. |
| 1728 | */ |
| 1729 | static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status) |
| 1730 | { |
| 1731 | /* |
| 1732 | * Move all active CCBs to the COMP queue |
| 1733 | * and flush this queue. |
| 1734 | */ |
| 1735 | sym_que_splice(&np->busy_ccbq, &np->comp_ccbq); |
| 1736 | sym_que_init(&np->busy_ccbq); |
| 1737 | sym_flush_comp_queue(np, cam_status); |
| 1738 | } |
| 1739 | |
| 1740 | /* |
| 1741 | * Start chip. |
| 1742 | * |
| 1743 | * 'reason' means: |
| 1744 | * 0: initialisation. |
| 1745 | * 1: SCSI BUS RESET delivered or received. |
| 1746 | * 2: SCSI BUS MODE changed. |
| 1747 | */ |
| 1748 | void sym_start_up (struct sym_hcb *np, int reason) |
| 1749 | { |
| 1750 | int i; |
| 1751 | u32 phys; |
| 1752 | |
| 1753 | /* |
| 1754 | * Reset chip if asked, otherwise just clear fifos. |
| 1755 | */ |
| 1756 | if (reason == 1) |
| 1757 | sym_soft_reset(np); |
| 1758 | else { |
| 1759 | OUTB(np, nc_stest3, TE|CSF); |
| 1760 | OUTONB(np, nc_ctest3, CLF); |
| 1761 | } |
| 1762 | |
| 1763 | /* |
| 1764 | * Clear Start Queue |
| 1765 | */ |
| 1766 | phys = np->squeue_ba; |
| 1767 | for (i = 0; i < MAX_QUEUE*2; i += 2) { |
| 1768 | np->squeue[i] = cpu_to_scr(np->idletask_ba); |
| 1769 | np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4); |
| 1770 | } |
| 1771 | np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys); |
| 1772 | |
| 1773 | /* |
| 1774 | * Start at first entry. |
| 1775 | */ |
| 1776 | np->squeueput = 0; |
| 1777 | |
| 1778 | /* |
| 1779 | * Clear Done Queue |
| 1780 | */ |
| 1781 | phys = np->dqueue_ba; |
| 1782 | for (i = 0; i < MAX_QUEUE*2; i += 2) { |
| 1783 | np->dqueue[i] = 0; |
| 1784 | np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4); |
| 1785 | } |
| 1786 | np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys); |
| 1787 | |
| 1788 | /* |
| 1789 | * Start at first entry. |
| 1790 | */ |
| 1791 | np->dqueueget = 0; |
| 1792 | |
| 1793 | /* |
| 1794 | * Install patches in scripts. |
| 1795 | * This also let point to first position the start |
| 1796 | * and done queue pointers used from SCRIPTS. |
| 1797 | */ |
| 1798 | np->fw_patch(np); |
| 1799 | |
| 1800 | /* |
| 1801 | * Wakeup all pending jobs. |
| 1802 | */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 1803 | sym_flush_busy_queue(np, DID_RESET); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1804 | |
| 1805 | /* |
| 1806 | * Init chip. |
| 1807 | */ |
| 1808 | OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 1809 | INB(np, nc_mbox1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1810 | udelay(2000); /* The 895 needs time for the bus mode to settle */ |
| 1811 | |
| 1812 | OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0); |
| 1813 | /* full arb., ena parity, par->ATN */ |
| 1814 | OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ |
| 1815 | |
| 1816 | sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ |
| 1817 | |
| 1818 | OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ |
| 1819 | OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */ |
| 1820 | OUTB(np, nc_istat , SIGP ); /* Signal Process */ |
| 1821 | OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */ |
| 1822 | OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ |
| 1823 | |
| 1824 | OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ |
| 1825 | OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */ |
| 1826 | OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */ |
| 1827 | |
| 1828 | /* Extended Sreq/Sack filtering not supported on the C10 */ |
| 1829 | if (np->features & FE_C10) |
| 1830 | OUTB(np, nc_stest2, np->rv_stest2); |
| 1831 | else |
| 1832 | OUTB(np, nc_stest2, EXT|np->rv_stest2); |
| 1833 | |
| 1834 | OUTB(np, nc_stest3, TE); /* TolerANT enable */ |
| 1835 | OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */ |
| 1836 | |
| 1837 | /* |
| 1838 | * For now, disable AIP generation on C1010-66. |
| 1839 | */ |
| 1840 | if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66) |
| 1841 | OUTB(np, nc_aipcntl1, DISAIP); |
| 1842 | |
| 1843 | /* |
| 1844 | * C10101 rev. 0 errata. |
| 1845 | * Errant SGE's when in narrow. Write bits 4 & 5 of |
| 1846 | * STEST1 register to disable SGE. We probably should do |
| 1847 | * that from SCRIPTS for each selection/reselection, but |
| 1848 | * I just don't want. :) |
| 1849 | */ |
| 1850 | if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 && |
| 1851 | np->revision_id < 1) |
| 1852 | OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30); |
| 1853 | |
| 1854 | /* |
| 1855 | * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2. |
| 1856 | * Disable overlapped arbitration for some dual function devices, |
| 1857 | * regardless revision id (kind of post-chip-design feature. ;-)) |
| 1858 | */ |
| 1859 | if (np->device_id == PCI_DEVICE_ID_NCR_53C875) |
| 1860 | OUTB(np, nc_ctest0, (1<<5)); |
| 1861 | else if (np->device_id == PCI_DEVICE_ID_NCR_53C896) |
| 1862 | np->rv_ccntl0 |= DPR; |
| 1863 | |
| 1864 | /* |
| 1865 | * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing |
| 1866 | * and/or hardware phase mismatch, since only such chips |
| 1867 | * seem to support those IO registers. |
| 1868 | */ |
| 1869 | if (np->features & (FE_DAC|FE_NOPM)) { |
| 1870 | OUTB(np, nc_ccntl0, np->rv_ccntl0); |
| 1871 | OUTB(np, nc_ccntl1, np->rv_ccntl1); |
| 1872 | } |
| 1873 | |
| 1874 | #if SYM_CONF_DMA_ADDRESSING_MODE == 2 |
| 1875 | /* |
| 1876 | * Set up scratch C and DRS IO registers to map the 32 bit |
| 1877 | * DMA address range our data structures are located in. |
| 1878 | */ |
| 1879 | if (np->use_dac) { |
| 1880 | np->dmap_bah[0] = 0; /* ??? */ |
| 1881 | OUTL(np, nc_scrx[0], np->dmap_bah[0]); |
| 1882 | OUTL(np, nc_drs, np->dmap_bah[0]); |
| 1883 | } |
| 1884 | #endif |
| 1885 | |
| 1886 | /* |
| 1887 | * If phase mismatch handled by scripts (895A/896/1010), |
| 1888 | * set PM jump addresses. |
| 1889 | */ |
| 1890 | if (np->features & FE_NOPM) { |
| 1891 | OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle)); |
| 1892 | OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle)); |
| 1893 | } |
| 1894 | |
| 1895 | /* |
| 1896 | * Enable GPIO0 pin for writing if LED support from SCRIPTS. |
| 1897 | * Also set GPIO5 and clear GPIO6 if hardware LED control. |
| 1898 | */ |
| 1899 | if (np->features & FE_LED0) |
| 1900 | OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01); |
| 1901 | else if (np->features & FE_LEDC) |
| 1902 | OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20); |
| 1903 | |
| 1904 | /* |
| 1905 | * enable ints |
| 1906 | */ |
| 1907 | OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); |
| 1908 | OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID); |
| 1909 | |
| 1910 | /* |
| 1911 | * For 895/6 enable SBMC interrupt and save current SCSI bus mode. |
| 1912 | * Try to eat the spurious SBMC interrupt that may occur when |
| 1913 | * we reset the chip but not the SCSI BUS (at initialization). |
| 1914 | */ |
| 1915 | if (np->features & (FE_ULTRA2|FE_ULTRA3)) { |
| 1916 | OUTONW(np, nc_sien, SBMC); |
| 1917 | if (reason == 0) { |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 1918 | INB(np, nc_mbox1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1919 | mdelay(100); |
| 1920 | INW(np, nc_sist); |
| 1921 | } |
| 1922 | np->scsi_mode = INB(np, nc_stest4) & SMODE; |
| 1923 | } |
| 1924 | |
| 1925 | /* |
| 1926 | * Fill in target structure. |
| 1927 | * Reinitialize usrsync. |
| 1928 | * Reinitialize usrwide. |
| 1929 | * Prepare sync negotiation according to actual SCSI bus mode. |
| 1930 | */ |
| 1931 | for (i=0;i<SYM_CONF_MAX_TARGET;i++) { |
| 1932 | struct sym_tcb *tp = &np->target[i]; |
| 1933 | |
| 1934 | tp->to_reset = 0; |
| 1935 | tp->head.sval = 0; |
| 1936 | tp->head.wval = np->rv_scntl3; |
| 1937 | tp->head.uval = 0; |
| 1938 | } |
| 1939 | |
| 1940 | /* |
| 1941 | * Download SCSI SCRIPTS to on-chip RAM if present, |
| 1942 | * and start script processor. |
| 1943 | * We do the download preferently from the CPU. |
| 1944 | * For platforms that may not support PCI memory mapping, |
| 1945 | * we use simple SCRIPTS that performs MEMORY MOVEs. |
| 1946 | */ |
| 1947 | phys = SCRIPTA_BA(np, init); |
| 1948 | if (np->ram_ba) { |
| 1949 | if (sym_verbose >= 2) |
| 1950 | printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np)); |
| 1951 | memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz); |
| 1952 | if (np->ram_ws == 8192) { |
| 1953 | memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz); |
| 1954 | phys = scr_to_cpu(np->scr_ram_seg); |
| 1955 | OUTL(np, nc_mmws, phys); |
| 1956 | OUTL(np, nc_mmrs, phys); |
| 1957 | OUTL(np, nc_sfs, phys); |
| 1958 | phys = SCRIPTB_BA(np, start64); |
| 1959 | } |
| 1960 | } |
| 1961 | |
| 1962 | np->istat_sem = 0; |
| 1963 | |
| 1964 | OUTL(np, nc_dsa, np->hcb_ba); |
| 1965 | OUTL_DSP(np, phys); |
| 1966 | |
| 1967 | /* |
| 1968 | * Notify the XPT about the RESET condition. |
| 1969 | */ |
| 1970 | if (reason != 0) |
| 1971 | sym_xpt_async_bus_reset(np); |
| 1972 | } |
| 1973 | |
| 1974 | /* |
| 1975 | * Switch trans mode for current job and its target. |
| 1976 | */ |
| 1977 | static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs, |
| 1978 | u_char per, u_char wide, u_char div, u_char fak) |
| 1979 | { |
| 1980 | SYM_QUEHEAD *qp; |
| 1981 | u_char sval, wval, uval; |
| 1982 | struct sym_tcb *tp = &np->target[target]; |
| 1983 | |
| 1984 | assert(target == (INB(np, nc_sdid) & 0x0f)); |
| 1985 | |
| 1986 | sval = tp->head.sval; |
| 1987 | wval = tp->head.wval; |
| 1988 | uval = tp->head.uval; |
| 1989 | |
| 1990 | #if 0 |
| 1991 | printf("XXXX sval=%x wval=%x uval=%x (%x)\n", |
| 1992 | sval, wval, uval, np->rv_scntl3); |
| 1993 | #endif |
| 1994 | /* |
| 1995 | * Set the offset. |
| 1996 | */ |
| 1997 | if (!(np->features & FE_C10)) |
| 1998 | sval = (sval & ~0x1f) | ofs; |
| 1999 | else |
| 2000 | sval = (sval & ~0x3f) | ofs; |
| 2001 | |
| 2002 | /* |
| 2003 | * Set the sync divisor and extra clock factor. |
| 2004 | */ |
| 2005 | if (ofs != 0) { |
| 2006 | wval = (wval & ~0x70) | ((div+1) << 4); |
| 2007 | if (!(np->features & FE_C10)) |
| 2008 | sval = (sval & ~0xe0) | (fak << 5); |
| 2009 | else { |
| 2010 | uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT); |
| 2011 | if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT); |
| 2012 | if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT); |
| 2013 | } |
| 2014 | } |
| 2015 | |
| 2016 | /* |
| 2017 | * Set the bus width. |
| 2018 | */ |
| 2019 | wval = wval & ~EWS; |
| 2020 | if (wide != 0) |
| 2021 | wval |= EWS; |
| 2022 | |
| 2023 | /* |
| 2024 | * Set misc. ultra enable bits. |
| 2025 | */ |
| 2026 | if (np->features & FE_C10) { |
| 2027 | uval = uval & ~(U3EN|AIPCKEN); |
| 2028 | if (opts) { |
| 2029 | assert(np->features & FE_U3EN); |
| 2030 | uval |= U3EN; |
| 2031 | } |
| 2032 | } else { |
| 2033 | wval = wval & ~ULTRA; |
| 2034 | if (per <= 12) wval |= ULTRA; |
| 2035 | } |
| 2036 | |
| 2037 | /* |
| 2038 | * Stop there if sync parameters are unchanged. |
| 2039 | */ |
| 2040 | if (tp->head.sval == sval && |
| 2041 | tp->head.wval == wval && |
| 2042 | tp->head.uval == uval) |
| 2043 | return; |
| 2044 | tp->head.sval = sval; |
| 2045 | tp->head.wval = wval; |
| 2046 | tp->head.uval = uval; |
| 2047 | |
| 2048 | /* |
| 2049 | * Disable extended Sreq/Sack filtering if per < 50. |
| 2050 | * Not supported on the C1010. |
| 2051 | */ |
| 2052 | if (per < 50 && !(np->features & FE_C10)) |
| 2053 | OUTOFFB(np, nc_stest2, EXT); |
| 2054 | |
| 2055 | /* |
| 2056 | * set actual value and sync_status |
| 2057 | */ |
| 2058 | OUTB(np, nc_sxfer, tp->head.sval); |
| 2059 | OUTB(np, nc_scntl3, tp->head.wval); |
| 2060 | |
| 2061 | if (np->features & FE_C10) { |
| 2062 | OUTB(np, nc_scntl4, tp->head.uval); |
| 2063 | } |
| 2064 | |
| 2065 | /* |
| 2066 | * patch ALL busy ccbs of this target. |
| 2067 | */ |
| 2068 | FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { |
| 2069 | struct sym_ccb *cp; |
| 2070 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 2071 | if (cp->target != target) |
| 2072 | continue; |
| 2073 | cp->phys.select.sel_scntl3 = tp->head.wval; |
| 2074 | cp->phys.select.sel_sxfer = tp->head.sval; |
| 2075 | if (np->features & FE_C10) { |
| 2076 | cp->phys.select.sel_scntl4 = tp->head.uval; |
| 2077 | } |
| 2078 | } |
| 2079 | } |
| 2080 | |
| 2081 | /* |
| 2082 | * We received a WDTR. |
| 2083 | * Let everything be aware of the changes. |
| 2084 | */ |
| 2085 | static void sym_setwide(struct sym_hcb *np, int target, u_char wide) |
| 2086 | { |
| 2087 | struct sym_tcb *tp = &np->target[target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 2088 | struct scsi_target *starget = tp->starget; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2089 | |
| 2090 | if (spi_width(starget) == wide) |
| 2091 | return; |
| 2092 | |
| 2093 | sym_settrans(np, target, 0, 0, 0, wide, 0, 0); |
| 2094 | |
| 2095 | tp->tgoal.width = wide; |
| 2096 | spi_offset(starget) = 0; |
| 2097 | spi_period(starget) = 0; |
| 2098 | spi_width(starget) = wide; |
| 2099 | spi_iu(starget) = 0; |
| 2100 | spi_dt(starget) = 0; |
| 2101 | spi_qas(starget) = 0; |
| 2102 | |
| 2103 | if (sym_verbose >= 3) |
| 2104 | spi_display_xfer_agreement(starget); |
| 2105 | } |
| 2106 | |
| 2107 | /* |
| 2108 | * We received a SDTR. |
| 2109 | * Let everything be aware of the changes. |
| 2110 | */ |
| 2111 | static void |
| 2112 | sym_setsync(struct sym_hcb *np, int target, |
| 2113 | u_char ofs, u_char per, u_char div, u_char fak) |
| 2114 | { |
| 2115 | struct sym_tcb *tp = &np->target[target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 2116 | struct scsi_target *starget = tp->starget; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2117 | u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT; |
| 2118 | |
| 2119 | sym_settrans(np, target, 0, ofs, per, wide, div, fak); |
| 2120 | |
| 2121 | spi_period(starget) = per; |
| 2122 | spi_offset(starget) = ofs; |
| 2123 | spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0; |
| 2124 | |
| 2125 | if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) { |
| 2126 | tp->tgoal.period = per; |
| 2127 | tp->tgoal.offset = ofs; |
| 2128 | tp->tgoal.check_nego = 0; |
| 2129 | } |
| 2130 | |
| 2131 | spi_display_xfer_agreement(starget); |
| 2132 | } |
| 2133 | |
| 2134 | /* |
| 2135 | * We received a PPR. |
| 2136 | * Let everything be aware of the changes. |
| 2137 | */ |
| 2138 | static void |
| 2139 | sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs, |
| 2140 | u_char per, u_char wide, u_char div, u_char fak) |
| 2141 | { |
| 2142 | struct sym_tcb *tp = &np->target[target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 2143 | struct scsi_target *starget = tp->starget; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2144 | |
| 2145 | sym_settrans(np, target, opts, ofs, per, wide, div, fak); |
| 2146 | |
| 2147 | spi_width(starget) = tp->tgoal.width = wide; |
| 2148 | spi_period(starget) = tp->tgoal.period = per; |
| 2149 | spi_offset(starget) = tp->tgoal.offset = ofs; |
| 2150 | spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU); |
| 2151 | spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT); |
| 2152 | spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS); |
| 2153 | tp->tgoal.check_nego = 0; |
| 2154 | |
| 2155 | spi_display_xfer_agreement(starget); |
| 2156 | } |
| 2157 | |
| 2158 | /* |
| 2159 | * generic recovery from scsi interrupt |
| 2160 | * |
| 2161 | * The doc says that when the chip gets an SCSI interrupt, |
| 2162 | * it tries to stop in an orderly fashion, by completing |
| 2163 | * an instruction fetch that had started or by flushing |
| 2164 | * the DMA fifo for a write to memory that was executing. |
| 2165 | * Such a fashion is not enough to know if the instruction |
| 2166 | * that was just before the current DSP value has been |
| 2167 | * executed or not. |
| 2168 | * |
| 2169 | * There are some small SCRIPTS sections that deal with |
| 2170 | * the start queue and the done queue that may break any |
| 2171 | * assomption from the C code if we are interrupted |
| 2172 | * inside, so we reset if this happens. Btw, since these |
| 2173 | * SCRIPTS sections are executed while the SCRIPTS hasn't |
| 2174 | * started SCSI operations, it is very unlikely to happen. |
| 2175 | * |
| 2176 | * All the driver data structures are supposed to be |
| 2177 | * allocated from the same 4 GB memory window, so there |
| 2178 | * is a 1 to 1 relationship between DSA and driver data |
| 2179 | * structures. Since we are careful :) to invalidate the |
| 2180 | * DSA when we complete a command or when the SCRIPTS |
| 2181 | * pushes a DSA into a queue, we can trust it when it |
| 2182 | * points to a CCB. |
| 2183 | */ |
| 2184 | static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts) |
| 2185 | { |
| 2186 | u32 dsp = INL(np, nc_dsp); |
| 2187 | u32 dsa = INL(np, nc_dsa); |
| 2188 | struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); |
| 2189 | |
| 2190 | /* |
| 2191 | * If we haven't been interrupted inside the SCRIPTS |
| 2192 | * critical pathes, we can safely restart the SCRIPTS |
| 2193 | * and trust the DSA value if it matches a CCB. |
| 2194 | */ |
| 2195 | if ((!(dsp > SCRIPTA_BA(np, getjob_begin) && |
| 2196 | dsp < SCRIPTA_BA(np, getjob_end) + 1)) && |
| 2197 | (!(dsp > SCRIPTA_BA(np, ungetjob) && |
| 2198 | dsp < SCRIPTA_BA(np, reselect) + 1)) && |
| 2199 | (!(dsp > SCRIPTB_BA(np, sel_for_abort) && |
| 2200 | dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) && |
| 2201 | (!(dsp > SCRIPTA_BA(np, done) && |
| 2202 | dsp < SCRIPTA_BA(np, done_end) + 1))) { |
| 2203 | OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ |
| 2204 | OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */ |
| 2205 | /* |
| 2206 | * If we have a CCB, let the SCRIPTS call us back for |
| 2207 | * the handling of the error with SCRATCHA filled with |
| 2208 | * STARTPOS. This way, we will be able to freeze the |
| 2209 | * device queue and requeue awaiting IOs. |
| 2210 | */ |
| 2211 | if (cp) { |
| 2212 | cp->host_status = hsts; |
| 2213 | OUTL_DSP(np, SCRIPTA_BA(np, complete_error)); |
| 2214 | } |
| 2215 | /* |
| 2216 | * Otherwise just restart the SCRIPTS. |
| 2217 | */ |
| 2218 | else { |
| 2219 | OUTL(np, nc_dsa, 0xffffff); |
| 2220 | OUTL_DSP(np, SCRIPTA_BA(np, start)); |
| 2221 | } |
| 2222 | } |
| 2223 | else |
| 2224 | goto reset_all; |
| 2225 | |
| 2226 | return; |
| 2227 | |
| 2228 | reset_all: |
| 2229 | sym_start_reset(np); |
| 2230 | } |
| 2231 | |
| 2232 | /* |
| 2233 | * chip exception handler for selection timeout |
| 2234 | */ |
| 2235 | static void sym_int_sto (struct sym_hcb *np) |
| 2236 | { |
| 2237 | u32 dsp = INL(np, nc_dsp); |
| 2238 | |
| 2239 | if (DEBUG_FLAGS & DEBUG_TINY) printf ("T"); |
| 2240 | |
| 2241 | if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8) |
| 2242 | sym_recover_scsi_int(np, HS_SEL_TIMEOUT); |
| 2243 | else |
| 2244 | sym_start_reset(np); |
| 2245 | } |
| 2246 | |
| 2247 | /* |
| 2248 | * chip exception handler for unexpected disconnect |
| 2249 | */ |
| 2250 | static void sym_int_udc (struct sym_hcb *np) |
| 2251 | { |
| 2252 | printf ("%s: unexpected disconnect\n", sym_name(np)); |
| 2253 | sym_recover_scsi_int(np, HS_UNEXPECTED); |
| 2254 | } |
| 2255 | |
| 2256 | /* |
| 2257 | * chip exception handler for SCSI bus mode change |
| 2258 | * |
| 2259 | * spi2-r12 11.2.3 says a transceiver mode change must |
| 2260 | * generate a reset event and a device that detects a reset |
| 2261 | * event shall initiate a hard reset. It says also that a |
| 2262 | * device that detects a mode change shall set data transfer |
| 2263 | * mode to eight bit asynchronous, etc... |
| 2264 | * So, just reinitializing all except chip should be enough. |
| 2265 | */ |
| 2266 | static void sym_int_sbmc (struct sym_hcb *np) |
| 2267 | { |
| 2268 | u_char scsi_mode = INB(np, nc_stest4) & SMODE; |
| 2269 | |
| 2270 | /* |
| 2271 | * Notify user. |
| 2272 | */ |
| 2273 | printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np), |
| 2274 | sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode)); |
| 2275 | |
| 2276 | /* |
| 2277 | * Should suspend command processing for a few seconds and |
| 2278 | * reinitialize all except the chip. |
| 2279 | */ |
| 2280 | sym_start_up (np, 2); |
| 2281 | } |
| 2282 | |
| 2283 | /* |
| 2284 | * chip exception handler for SCSI parity error. |
| 2285 | * |
| 2286 | * When the chip detects a SCSI parity error and is |
| 2287 | * currently executing a (CH)MOV instruction, it does |
| 2288 | * not interrupt immediately, but tries to finish the |
| 2289 | * transfer of the current scatter entry before |
| 2290 | * interrupting. The following situations may occur: |
| 2291 | * |
| 2292 | * - The complete scatter entry has been transferred |
| 2293 | * without the device having changed phase. |
| 2294 | * The chip will then interrupt with the DSP pointing |
| 2295 | * to the instruction that follows the MOV. |
| 2296 | * |
| 2297 | * - A phase mismatch occurs before the MOV finished |
| 2298 | * and phase errors are to be handled by the C code. |
| 2299 | * The chip will then interrupt with both PAR and MA |
| 2300 | * conditions set. |
| 2301 | * |
| 2302 | * - A phase mismatch occurs before the MOV finished and |
| 2303 | * phase errors are to be handled by SCRIPTS. |
| 2304 | * The chip will load the DSP with the phase mismatch |
| 2305 | * JUMP address and interrupt the host processor. |
| 2306 | */ |
| 2307 | static void sym_int_par (struct sym_hcb *np, u_short sist) |
| 2308 | { |
| 2309 | u_char hsts = INB(np, HS_PRT); |
| 2310 | u32 dsp = INL(np, nc_dsp); |
| 2311 | u32 dbc = INL(np, nc_dbc); |
| 2312 | u32 dsa = INL(np, nc_dsa); |
| 2313 | u_char sbcl = INB(np, nc_sbcl); |
| 2314 | u_char cmd = dbc >> 24; |
| 2315 | int phase = cmd & 7; |
| 2316 | struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); |
| 2317 | |
| 2318 | printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n", |
| 2319 | sym_name(np), hsts, dbc, sbcl); |
| 2320 | |
| 2321 | /* |
| 2322 | * Check that the chip is connected to the SCSI BUS. |
| 2323 | */ |
| 2324 | if (!(INB(np, nc_scntl1) & ISCON)) { |
| 2325 | sym_recover_scsi_int(np, HS_UNEXPECTED); |
| 2326 | return; |
| 2327 | } |
| 2328 | |
| 2329 | /* |
| 2330 | * If the nexus is not clearly identified, reset the bus. |
| 2331 | * We will try to do better later. |
| 2332 | */ |
| 2333 | if (!cp) |
| 2334 | goto reset_all; |
| 2335 | |
| 2336 | /* |
| 2337 | * Check instruction was a MOV, direction was INPUT and |
| 2338 | * ATN is asserted. |
| 2339 | */ |
| 2340 | if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8)) |
| 2341 | goto reset_all; |
| 2342 | |
| 2343 | /* |
| 2344 | * Keep track of the parity error. |
| 2345 | */ |
| 2346 | OUTONB(np, HF_PRT, HF_EXT_ERR); |
| 2347 | cp->xerr_status |= XE_PARITY_ERR; |
| 2348 | |
| 2349 | /* |
| 2350 | * Prepare the message to send to the device. |
| 2351 | */ |
| 2352 | np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR; |
| 2353 | |
| 2354 | /* |
| 2355 | * If the old phase was DATA IN phase, we have to deal with |
| 2356 | * the 3 situations described above. |
| 2357 | * For other input phases (MSG IN and STATUS), the device |
| 2358 | * must resend the whole thing that failed parity checking |
| 2359 | * or signal error. So, jumping to dispatcher should be OK. |
| 2360 | */ |
| 2361 | if (phase == 1 || phase == 5) { |
| 2362 | /* Phase mismatch handled by SCRIPTS */ |
| 2363 | if (dsp == SCRIPTB_BA(np, pm_handle)) |
| 2364 | OUTL_DSP(np, dsp); |
| 2365 | /* Phase mismatch handled by the C code */ |
| 2366 | else if (sist & MA) |
| 2367 | sym_int_ma (np); |
| 2368 | /* No phase mismatch occurred */ |
| 2369 | else { |
| 2370 | sym_set_script_dp (np, cp, dsp); |
| 2371 | OUTL_DSP(np, SCRIPTA_BA(np, dispatch)); |
| 2372 | } |
| 2373 | } |
| 2374 | else if (phase == 7) /* We definitely cannot handle parity errors */ |
| 2375 | #if 1 /* in message-in phase due to the relection */ |
| 2376 | goto reset_all; /* path and various message anticipations. */ |
| 2377 | #else |
| 2378 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 2379 | #endif |
| 2380 | else |
| 2381 | OUTL_DSP(np, SCRIPTA_BA(np, dispatch)); |
| 2382 | return; |
| 2383 | |
| 2384 | reset_all: |
| 2385 | sym_start_reset(np); |
| 2386 | return; |
| 2387 | } |
| 2388 | |
| 2389 | /* |
| 2390 | * chip exception handler for phase errors. |
| 2391 | * |
| 2392 | * We have to construct a new transfer descriptor, |
| 2393 | * to transfer the rest of the current block. |
| 2394 | */ |
| 2395 | static void sym_int_ma (struct sym_hcb *np) |
| 2396 | { |
| 2397 | u32 dbc; |
| 2398 | u32 rest; |
| 2399 | u32 dsp; |
| 2400 | u32 dsa; |
| 2401 | u32 nxtdsp; |
| 2402 | u32 *vdsp; |
| 2403 | u32 oadr, olen; |
| 2404 | u32 *tblp; |
| 2405 | u32 newcmd; |
| 2406 | u_int delta; |
| 2407 | u_char cmd; |
| 2408 | u_char hflags, hflags0; |
| 2409 | struct sym_pmc *pm; |
| 2410 | struct sym_ccb *cp; |
| 2411 | |
| 2412 | dsp = INL(np, nc_dsp); |
| 2413 | dbc = INL(np, nc_dbc); |
| 2414 | dsa = INL(np, nc_dsa); |
| 2415 | |
| 2416 | cmd = dbc >> 24; |
| 2417 | rest = dbc & 0xffffff; |
| 2418 | delta = 0; |
| 2419 | |
| 2420 | /* |
| 2421 | * locate matching cp if any. |
| 2422 | */ |
| 2423 | cp = sym_ccb_from_dsa(np, dsa); |
| 2424 | |
| 2425 | /* |
| 2426 | * Donnot take into account dma fifo and various buffers in |
| 2427 | * INPUT phase since the chip flushes everything before |
| 2428 | * raising the MA interrupt for interrupted INPUT phases. |
| 2429 | * For DATA IN phase, we will check for the SWIDE later. |
| 2430 | */ |
| 2431 | if ((cmd & 7) != 1 && (cmd & 7) != 5) { |
| 2432 | u_char ss0, ss2; |
| 2433 | |
| 2434 | if (np->features & FE_DFBC) |
| 2435 | delta = INW(np, nc_dfbc); |
| 2436 | else { |
| 2437 | u32 dfifo; |
| 2438 | |
| 2439 | /* |
| 2440 | * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership. |
| 2441 | */ |
| 2442 | dfifo = INL(np, nc_dfifo); |
| 2443 | |
| 2444 | /* |
| 2445 | * Calculate remaining bytes in DMA fifo. |
| 2446 | * (CTEST5 = dfifo >> 16) |
| 2447 | */ |
| 2448 | if (dfifo & (DFS << 16)) |
| 2449 | delta = ((((dfifo >> 8) & 0x300) | |
| 2450 | (dfifo & 0xff)) - rest) & 0x3ff; |
| 2451 | else |
| 2452 | delta = ((dfifo & 0xff) - rest) & 0x7f; |
| 2453 | } |
| 2454 | |
| 2455 | /* |
| 2456 | * The data in the dma fifo has not been transfered to |
| 2457 | * the target -> add the amount to the rest |
| 2458 | * and clear the data. |
| 2459 | * Check the sstat2 register in case of wide transfer. |
| 2460 | */ |
| 2461 | rest += delta; |
| 2462 | ss0 = INB(np, nc_sstat0); |
| 2463 | if (ss0 & OLF) rest++; |
| 2464 | if (!(np->features & FE_C10)) |
| 2465 | if (ss0 & ORF) rest++; |
| 2466 | if (cp && (cp->phys.select.sel_scntl3 & EWS)) { |
| 2467 | ss2 = INB(np, nc_sstat2); |
| 2468 | if (ss2 & OLF1) rest++; |
| 2469 | if (!(np->features & FE_C10)) |
| 2470 | if (ss2 & ORF1) rest++; |
| 2471 | } |
| 2472 | |
| 2473 | /* |
| 2474 | * Clear fifos. |
| 2475 | */ |
| 2476 | OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */ |
| 2477 | OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */ |
| 2478 | } |
| 2479 | |
| 2480 | /* |
| 2481 | * log the information |
| 2482 | */ |
| 2483 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) |
| 2484 | printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7, |
| 2485 | (unsigned) rest, (unsigned) delta); |
| 2486 | |
| 2487 | /* |
| 2488 | * try to find the interrupted script command, |
| 2489 | * and the address at which to continue. |
| 2490 | */ |
| 2491 | vdsp = NULL; |
| 2492 | nxtdsp = 0; |
| 2493 | if (dsp > np->scripta_ba && |
| 2494 | dsp <= np->scripta_ba + np->scripta_sz) { |
| 2495 | vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8)); |
| 2496 | nxtdsp = dsp; |
| 2497 | } |
| 2498 | else if (dsp > np->scriptb_ba && |
| 2499 | dsp <= np->scriptb_ba + np->scriptb_sz) { |
| 2500 | vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8)); |
| 2501 | nxtdsp = dsp; |
| 2502 | } |
| 2503 | |
| 2504 | /* |
| 2505 | * log the information |
| 2506 | */ |
| 2507 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
| 2508 | printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", |
| 2509 | cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd); |
| 2510 | } |
| 2511 | |
| 2512 | if (!vdsp) { |
| 2513 | printf ("%s: interrupted SCRIPT address not found.\n", |
| 2514 | sym_name (np)); |
| 2515 | goto reset_all; |
| 2516 | } |
| 2517 | |
| 2518 | if (!cp) { |
| 2519 | printf ("%s: SCSI phase error fixup: CCB already dequeued.\n", |
| 2520 | sym_name (np)); |
| 2521 | goto reset_all; |
| 2522 | } |
| 2523 | |
| 2524 | /* |
| 2525 | * get old startaddress and old length. |
| 2526 | */ |
| 2527 | oadr = scr_to_cpu(vdsp[1]); |
| 2528 | |
| 2529 | if (cmd & 0x10) { /* Table indirect */ |
| 2530 | tblp = (u32 *) ((char*) &cp->phys + oadr); |
| 2531 | olen = scr_to_cpu(tblp[0]); |
| 2532 | oadr = scr_to_cpu(tblp[1]); |
| 2533 | } else { |
| 2534 | tblp = (u32 *) 0; |
| 2535 | olen = scr_to_cpu(vdsp[0]) & 0xffffff; |
| 2536 | } |
| 2537 | |
| 2538 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
| 2539 | printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", |
| 2540 | (unsigned) (scr_to_cpu(vdsp[0]) >> 24), |
| 2541 | tblp, |
| 2542 | (unsigned) olen, |
| 2543 | (unsigned) oadr); |
| 2544 | } |
| 2545 | |
| 2546 | /* |
| 2547 | * check cmd against assumed interrupted script command. |
| 2548 | * If dt data phase, the MOVE instruction hasn't bit 4 of |
| 2549 | * the phase. |
| 2550 | */ |
| 2551 | if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) { |
| 2552 | sym_print_addr(cp->cmd, |
| 2553 | "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n", |
| 2554 | cmd, scr_to_cpu(vdsp[0]) >> 24); |
| 2555 | |
| 2556 | goto reset_all; |
| 2557 | } |
| 2558 | |
| 2559 | /* |
| 2560 | * if old phase not dataphase, leave here. |
| 2561 | */ |
| 2562 | if (cmd & 2) { |
| 2563 | sym_print_addr(cp->cmd, |
| 2564 | "phase change %x-%x %d@%08x resid=%d.\n", |
| 2565 | cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen, |
| 2566 | (unsigned)oadr, (unsigned)rest); |
| 2567 | goto unexpected_phase; |
| 2568 | } |
| 2569 | |
| 2570 | /* |
| 2571 | * Choose the correct PM save area. |
| 2572 | * |
| 2573 | * Look at the PM_SAVE SCRIPT if you want to understand |
| 2574 | * this stuff. The equivalent code is implemented in |
| 2575 | * SCRIPTS for the 895A, 896 and 1010 that are able to |
| 2576 | * handle PM from the SCRIPTS processor. |
| 2577 | */ |
| 2578 | hflags0 = INB(np, HF_PRT); |
| 2579 | hflags = hflags0; |
| 2580 | |
| 2581 | if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) { |
| 2582 | if (hflags & HF_IN_PM0) |
| 2583 | nxtdsp = scr_to_cpu(cp->phys.pm0.ret); |
| 2584 | else if (hflags & HF_IN_PM1) |
| 2585 | nxtdsp = scr_to_cpu(cp->phys.pm1.ret); |
| 2586 | |
| 2587 | if (hflags & HF_DP_SAVED) |
| 2588 | hflags ^= HF_ACT_PM; |
| 2589 | } |
| 2590 | |
| 2591 | if (!(hflags & HF_ACT_PM)) { |
| 2592 | pm = &cp->phys.pm0; |
| 2593 | newcmd = SCRIPTA_BA(np, pm0_data); |
| 2594 | } |
| 2595 | else { |
| 2596 | pm = &cp->phys.pm1; |
| 2597 | newcmd = SCRIPTA_BA(np, pm1_data); |
| 2598 | } |
| 2599 | |
| 2600 | hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED); |
| 2601 | if (hflags != hflags0) |
| 2602 | OUTB(np, HF_PRT, hflags); |
| 2603 | |
| 2604 | /* |
| 2605 | * fillin the phase mismatch context |
| 2606 | */ |
| 2607 | pm->sg.addr = cpu_to_scr(oadr + olen - rest); |
| 2608 | pm->sg.size = cpu_to_scr(rest); |
| 2609 | pm->ret = cpu_to_scr(nxtdsp); |
| 2610 | |
| 2611 | /* |
| 2612 | * If we have a SWIDE, |
| 2613 | * - prepare the address to write the SWIDE from SCRIPTS, |
| 2614 | * - compute the SCRIPTS address to restart from, |
| 2615 | * - move current data pointer context by one byte. |
| 2616 | */ |
| 2617 | nxtdsp = SCRIPTA_BA(np, dispatch); |
| 2618 | if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) && |
| 2619 | (INB(np, nc_scntl2) & WSR)) { |
| 2620 | u32 tmp; |
| 2621 | |
| 2622 | /* |
| 2623 | * Set up the table indirect for the MOVE |
| 2624 | * of the residual byte and adjust the data |
| 2625 | * pointer context. |
| 2626 | */ |
| 2627 | tmp = scr_to_cpu(pm->sg.addr); |
| 2628 | cp->phys.wresid.addr = cpu_to_scr(tmp); |
| 2629 | pm->sg.addr = cpu_to_scr(tmp + 1); |
| 2630 | tmp = scr_to_cpu(pm->sg.size); |
| 2631 | cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1); |
| 2632 | pm->sg.size = cpu_to_scr(tmp - 1); |
| 2633 | |
| 2634 | /* |
| 2635 | * If only the residual byte is to be moved, |
| 2636 | * no PM context is needed. |
| 2637 | */ |
| 2638 | if ((tmp&0xffffff) == 1) |
| 2639 | newcmd = pm->ret; |
| 2640 | |
| 2641 | /* |
| 2642 | * Prepare the address of SCRIPTS that will |
| 2643 | * move the residual byte to memory. |
| 2644 | */ |
| 2645 | nxtdsp = SCRIPTB_BA(np, wsr_ma_helper); |
| 2646 | } |
| 2647 | |
| 2648 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
| 2649 | sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n", |
| 2650 | hflags0, hflags, newcmd, |
| 2651 | (unsigned)scr_to_cpu(pm->sg.addr), |
| 2652 | (unsigned)scr_to_cpu(pm->sg.size), |
| 2653 | (unsigned)scr_to_cpu(pm->ret)); |
| 2654 | } |
| 2655 | |
| 2656 | /* |
| 2657 | * Restart the SCRIPTS processor. |
| 2658 | */ |
| 2659 | sym_set_script_dp (np, cp, newcmd); |
| 2660 | OUTL_DSP(np, nxtdsp); |
| 2661 | return; |
| 2662 | |
| 2663 | /* |
| 2664 | * Unexpected phase changes that occurs when the current phase |
| 2665 | * is not a DATA IN or DATA OUT phase are due to error conditions. |
| 2666 | * Such event may only happen when the SCRIPTS is using a |
| 2667 | * multibyte SCSI MOVE. |
| 2668 | * |
| 2669 | * Phase change Some possible cause |
| 2670 | * |
| 2671 | * COMMAND --> MSG IN SCSI parity error detected by target. |
| 2672 | * COMMAND --> STATUS Bad command or refused by target. |
| 2673 | * MSG OUT --> MSG IN Message rejected by target. |
| 2674 | * MSG OUT --> COMMAND Bogus target that discards extended |
| 2675 | * negotiation messages. |
| 2676 | * |
| 2677 | * The code below does not care of the new phase and so |
| 2678 | * trusts the target. Why to annoy it ? |
| 2679 | * If the interrupted phase is COMMAND phase, we restart at |
| 2680 | * dispatcher. |
| 2681 | * If a target does not get all the messages after selection, |
| 2682 | * the code assumes blindly that the target discards extended |
| 2683 | * messages and clears the negotiation status. |
| 2684 | * If the target does not want all our response to negotiation, |
| 2685 | * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids |
| 2686 | * bloat for such a should_not_happen situation). |
| 2687 | * In all other situation, we reset the BUS. |
| 2688 | * Are these assumptions reasonnable ? (Wait and see ...) |
| 2689 | */ |
| 2690 | unexpected_phase: |
| 2691 | dsp -= 8; |
| 2692 | nxtdsp = 0; |
| 2693 | |
| 2694 | switch (cmd & 7) { |
| 2695 | case 2: /* COMMAND phase */ |
| 2696 | nxtdsp = SCRIPTA_BA(np, dispatch); |
| 2697 | break; |
| 2698 | #if 0 |
| 2699 | case 3: /* STATUS phase */ |
| 2700 | nxtdsp = SCRIPTA_BA(np, dispatch); |
| 2701 | break; |
| 2702 | #endif |
| 2703 | case 6: /* MSG OUT phase */ |
| 2704 | /* |
| 2705 | * If the device may want to use untagged when we want |
| 2706 | * tagged, we prepare an IDENTIFY without disc. granted, |
| 2707 | * since we will not be able to handle reselect. |
| 2708 | * Otherwise, we just don't care. |
| 2709 | */ |
| 2710 | if (dsp == SCRIPTA_BA(np, send_ident)) { |
| 2711 | if (cp->tag != NO_TAG && olen - rest <= 3) { |
| 2712 | cp->host_status = HS_BUSY; |
| 2713 | np->msgout[0] = IDENTIFY(0, cp->lun); |
| 2714 | nxtdsp = SCRIPTB_BA(np, ident_break_atn); |
| 2715 | } |
| 2716 | else |
| 2717 | nxtdsp = SCRIPTB_BA(np, ident_break); |
| 2718 | } |
| 2719 | else if (dsp == SCRIPTB_BA(np, send_wdtr) || |
| 2720 | dsp == SCRIPTB_BA(np, send_sdtr) || |
| 2721 | dsp == SCRIPTB_BA(np, send_ppr)) { |
| 2722 | nxtdsp = SCRIPTB_BA(np, nego_bad_phase); |
| 2723 | if (dsp == SCRIPTB_BA(np, send_ppr)) { |
| 2724 | struct scsi_device *dev = cp->cmd->device; |
| 2725 | dev->ppr = 0; |
| 2726 | } |
| 2727 | } |
| 2728 | break; |
| 2729 | #if 0 |
| 2730 | case 7: /* MSG IN phase */ |
| 2731 | nxtdsp = SCRIPTA_BA(np, clrack); |
| 2732 | break; |
| 2733 | #endif |
| 2734 | } |
| 2735 | |
| 2736 | if (nxtdsp) { |
| 2737 | OUTL_DSP(np, nxtdsp); |
| 2738 | return; |
| 2739 | } |
| 2740 | |
| 2741 | reset_all: |
| 2742 | sym_start_reset(np); |
| 2743 | } |
| 2744 | |
| 2745 | /* |
| 2746 | * chip interrupt handler |
| 2747 | * |
| 2748 | * In normal situations, interrupt conditions occur one at |
| 2749 | * a time. But when something bad happens on the SCSI BUS, |
| 2750 | * the chip may raise several interrupt flags before |
| 2751 | * stopping and interrupting the CPU. The additionnal |
| 2752 | * interrupt flags are stacked in some extra registers |
| 2753 | * after the SIP and/or DIP flag has been raised in the |
| 2754 | * ISTAT. After the CPU has read the interrupt condition |
| 2755 | * flag from SIST or DSTAT, the chip unstacks the other |
| 2756 | * interrupt flags and sets the corresponding bits in |
| 2757 | * SIST or DSTAT. Since the chip starts stacking once the |
| 2758 | * SIP or DIP flag is set, there is a small window of time |
| 2759 | * where the stacking does not occur. |
| 2760 | * |
| 2761 | * Typically, multiple interrupt conditions may happen in |
| 2762 | * the following situations: |
| 2763 | * |
| 2764 | * - SCSI parity error + Phase mismatch (PAR|MA) |
| 2765 | * When an parity error is detected in input phase |
| 2766 | * and the device switches to msg-in phase inside a |
| 2767 | * block MOV. |
| 2768 | * - SCSI parity error + Unexpected disconnect (PAR|UDC) |
| 2769 | * When a stupid device does not want to handle the |
| 2770 | * recovery of an SCSI parity error. |
| 2771 | * - Some combinations of STO, PAR, UDC, ... |
| 2772 | * When using non compliant SCSI stuff, when user is |
| 2773 | * doing non compliant hot tampering on the BUS, when |
| 2774 | * something really bad happens to a device, etc ... |
| 2775 | * |
| 2776 | * The heuristic suggested by SYMBIOS to handle |
| 2777 | * multiple interrupts is to try unstacking all |
| 2778 | * interrupts conditions and to handle them on some |
| 2779 | * priority based on error severity. |
| 2780 | * This will work when the unstacking has been |
| 2781 | * successful, but we cannot be 100 % sure of that, |
| 2782 | * since the CPU may have been faster to unstack than |
| 2783 | * the chip is able to stack. Hmmm ... But it seems that |
| 2784 | * such a situation is very unlikely to happen. |
| 2785 | * |
| 2786 | * If this happen, for example STO caught by the CPU |
| 2787 | * then UDC happenning before the CPU have restarted |
| 2788 | * the SCRIPTS, the driver may wrongly complete the |
| 2789 | * same command on UDC, since the SCRIPTS didn't restart |
| 2790 | * and the DSA still points to the same command. |
| 2791 | * We avoid this situation by setting the DSA to an |
| 2792 | * invalid value when the CCB is completed and before |
| 2793 | * restarting the SCRIPTS. |
| 2794 | * |
| 2795 | * Another issue is that we need some section of our |
| 2796 | * recovery procedures to be somehow uninterruptible but |
| 2797 | * the SCRIPTS processor does not provides such a |
| 2798 | * feature. For this reason, we handle recovery preferently |
| 2799 | * from the C code and check against some SCRIPTS critical |
| 2800 | * sections from the C code. |
| 2801 | * |
| 2802 | * Hopefully, the interrupt handling of the driver is now |
| 2803 | * able to resist to weird BUS error conditions, but donnot |
| 2804 | * ask me for any guarantee that it will never fail. :-) |
| 2805 | * Use at your own decision and risk. |
| 2806 | */ |
| 2807 | |
| 2808 | void sym_interrupt (struct sym_hcb *np) |
| 2809 | { |
| 2810 | u_char istat, istatc; |
| 2811 | u_char dstat; |
| 2812 | u_short sist; |
| 2813 | |
| 2814 | /* |
| 2815 | * interrupt on the fly ? |
| 2816 | * (SCRIPTS may still be running) |
| 2817 | * |
| 2818 | * A `dummy read' is needed to ensure that the |
| 2819 | * clear of the INTF flag reaches the device |
| 2820 | * and that posted writes are flushed to memory |
| 2821 | * before the scanning of the DONE queue. |
| 2822 | * Note that SCRIPTS also (dummy) read to memory |
| 2823 | * prior to deliver the INTF interrupt condition. |
| 2824 | */ |
| 2825 | istat = INB(np, nc_istat); |
| 2826 | if (istat & INTF) { |
| 2827 | OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem); |
| 2828 | istat = INB(np, nc_istat); /* DUMMY READ */ |
| 2829 | if (DEBUG_FLAGS & DEBUG_TINY) printf ("F "); |
| 2830 | sym_wakeup_done(np); |
| 2831 | } |
| 2832 | |
| 2833 | if (!(istat & (SIP|DIP))) |
| 2834 | return; |
| 2835 | |
| 2836 | #if 0 /* We should never get this one */ |
| 2837 | if (istat & CABRT) |
| 2838 | OUTB(np, nc_istat, CABRT); |
| 2839 | #endif |
| 2840 | |
| 2841 | /* |
| 2842 | * PAR and MA interrupts may occur at the same time, |
| 2843 | * and we need to know of both in order to handle |
| 2844 | * this situation properly. We try to unstack SCSI |
| 2845 | * interrupts for that reason. BTW, I dislike a LOT |
| 2846 | * such a loop inside the interrupt routine. |
| 2847 | * Even if DMA interrupt stacking is very unlikely to |
| 2848 | * happen, we also try unstacking these ones, since |
| 2849 | * this has no performance impact. |
| 2850 | */ |
| 2851 | sist = 0; |
| 2852 | dstat = 0; |
| 2853 | istatc = istat; |
| 2854 | do { |
| 2855 | if (istatc & SIP) |
| 2856 | sist |= INW(np, nc_sist); |
| 2857 | if (istatc & DIP) |
| 2858 | dstat |= INB(np, nc_dstat); |
| 2859 | istatc = INB(np, nc_istat); |
| 2860 | istat |= istatc; |
| 2861 | } while (istatc & (SIP|DIP)); |
| 2862 | |
| 2863 | if (DEBUG_FLAGS & DEBUG_TINY) |
| 2864 | printf ("<%d|%x:%x|%x:%x>", |
| 2865 | (int)INB(np, nc_scr0), |
| 2866 | dstat,sist, |
| 2867 | (unsigned)INL(np, nc_dsp), |
| 2868 | (unsigned)INL(np, nc_dbc)); |
| 2869 | /* |
| 2870 | * On paper, a memory read barrier may be needed here to |
| 2871 | * prevent out of order LOADs by the CPU from having |
| 2872 | * prefetched stale data prior to DMA having occurred. |
| 2873 | * And since we are paranoid ... :) |
| 2874 | */ |
| 2875 | MEMORY_READ_BARRIER(); |
| 2876 | |
| 2877 | /* |
| 2878 | * First, interrupts we want to service cleanly. |
| 2879 | * |
| 2880 | * Phase mismatch (MA) is the most frequent interrupt |
| 2881 | * for chip earlier than the 896 and so we have to service |
| 2882 | * it as quickly as possible. |
| 2883 | * A SCSI parity error (PAR) may be combined with a phase |
| 2884 | * mismatch condition (MA). |
| 2885 | * Programmed interrupts (SIR) are used to call the C code |
| 2886 | * from SCRIPTS. |
| 2887 | * The single step interrupt (SSI) is not used in this |
| 2888 | * driver. |
| 2889 | */ |
| 2890 | if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) && |
| 2891 | !(dstat & (MDPE|BF|ABRT|IID))) { |
| 2892 | if (sist & PAR) sym_int_par (np, sist); |
| 2893 | else if (sist & MA) sym_int_ma (np); |
| 2894 | else if (dstat & SIR) sym_int_sir (np); |
| 2895 | else if (dstat & SSI) OUTONB_STD(); |
| 2896 | else goto unknown_int; |
| 2897 | return; |
| 2898 | } |
| 2899 | |
| 2900 | /* |
| 2901 | * Now, interrupts that donnot happen in normal |
| 2902 | * situations and that we may need to recover from. |
| 2903 | * |
| 2904 | * On SCSI RESET (RST), we reset everything. |
| 2905 | * On SCSI BUS MODE CHANGE (SBMC), we complete all |
| 2906 | * active CCBs with RESET status, prepare all devices |
| 2907 | * for negotiating again and restart the SCRIPTS. |
| 2908 | * On STO and UDC, we complete the CCB with the corres- |
| 2909 | * ponding status and restart the SCRIPTS. |
| 2910 | */ |
| 2911 | if (sist & RST) { |
| 2912 | printf("%s: SCSI BUS reset detected.\n", sym_name(np)); |
| 2913 | sym_start_up (np, 1); |
| 2914 | return; |
| 2915 | } |
| 2916 | |
| 2917 | OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ |
| 2918 | OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */ |
| 2919 | |
| 2920 | if (!(sist & (GEN|HTH|SGE)) && |
| 2921 | !(dstat & (MDPE|BF|ABRT|IID))) { |
| 2922 | if (sist & SBMC) sym_int_sbmc (np); |
| 2923 | else if (sist & STO) sym_int_sto (np); |
| 2924 | else if (sist & UDC) sym_int_udc (np); |
| 2925 | else goto unknown_int; |
| 2926 | return; |
| 2927 | } |
| 2928 | |
| 2929 | /* |
| 2930 | * Now, interrupts we are not able to recover cleanly. |
| 2931 | * |
| 2932 | * Log message for hard errors. |
| 2933 | * Reset everything. |
| 2934 | */ |
| 2935 | |
| 2936 | sym_log_hard_error(np, sist, dstat); |
| 2937 | |
| 2938 | if ((sist & (GEN|HTH|SGE)) || |
| 2939 | (dstat & (MDPE|BF|ABRT|IID))) { |
| 2940 | sym_start_reset(np); |
| 2941 | return; |
| 2942 | } |
| 2943 | |
| 2944 | unknown_int: |
| 2945 | /* |
| 2946 | * We just miss the cause of the interrupt. :( |
| 2947 | * Print a message. The timeout will do the real work. |
| 2948 | */ |
| 2949 | printf( "%s: unknown interrupt(s) ignored, " |
| 2950 | "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n", |
| 2951 | sym_name(np), istat, dstat, sist); |
| 2952 | } |
| 2953 | |
| 2954 | /* |
| 2955 | * Dequeue from the START queue all CCBs that match |
| 2956 | * a given target/lun/task condition (-1 means all), |
| 2957 | * and move them from the BUSY queue to the COMP queue |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 2958 | * with DID_SOFT_ERROR status condition. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2959 | * This function is used during error handling/recovery. |
| 2960 | * It is called with SCRIPTS not running. |
| 2961 | */ |
| 2962 | static int |
| 2963 | sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task) |
| 2964 | { |
| 2965 | int j; |
| 2966 | struct sym_ccb *cp; |
| 2967 | |
| 2968 | /* |
| 2969 | * Make sure the starting index is within range. |
| 2970 | */ |
| 2971 | assert((i >= 0) && (i < 2*MAX_QUEUE)); |
| 2972 | |
| 2973 | /* |
| 2974 | * Walk until end of START queue and dequeue every job |
| 2975 | * that matches the target/lun/task condition. |
| 2976 | */ |
| 2977 | j = i; |
| 2978 | while (i != np->squeueput) { |
| 2979 | cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i])); |
| 2980 | assert(cp); |
| 2981 | #ifdef SYM_CONF_IARB_SUPPORT |
| 2982 | /* Forget hints for IARB, they may be no longer relevant */ |
| 2983 | cp->host_flags &= ~HF_HINT_IARB; |
| 2984 | #endif |
| 2985 | if ((target == -1 || cp->target == target) && |
| 2986 | (lun == -1 || cp->lun == lun) && |
| 2987 | (task == -1 || cp->tag == task)) { |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 2988 | sym_set_cam_status(cp->cmd, DID_SOFT_ERROR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2989 | sym_remque(&cp->link_ccbq); |
| 2990 | sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); |
| 2991 | } |
| 2992 | else { |
| 2993 | if (i != j) |
| 2994 | np->squeue[j] = np->squeue[i]; |
| 2995 | if ((j += 2) >= MAX_QUEUE*2) j = 0; |
| 2996 | } |
| 2997 | if ((i += 2) >= MAX_QUEUE*2) i = 0; |
| 2998 | } |
| 2999 | if (i != j) /* Copy back the idle task if needed */ |
| 3000 | np->squeue[j] = np->squeue[i]; |
| 3001 | np->squeueput = j; /* Update our current start queue pointer */ |
| 3002 | |
| 3003 | return (i - j) / 2; |
| 3004 | } |
| 3005 | |
| 3006 | /* |
| 3007 | * chip handler for bad SCSI status condition |
| 3008 | * |
| 3009 | * In case of bad SCSI status, we unqueue all the tasks |
| 3010 | * currently queued to the controller but not yet started |
| 3011 | * and then restart the SCRIPTS processor immediately. |
| 3012 | * |
| 3013 | * QUEUE FULL and BUSY conditions are handled the same way. |
| 3014 | * Basically all the not yet started tasks are requeued in |
| 3015 | * device queue and the queue is frozen until a completion. |
| 3016 | * |
| 3017 | * For CHECK CONDITION and COMMAND TERMINATED status, we use |
| 3018 | * the CCB of the failed command to prepare a REQUEST SENSE |
| 3019 | * SCSI command and queue it to the controller queue. |
| 3020 | * |
| 3021 | * SCRATCHA is assumed to have been loaded with STARTPOS |
| 3022 | * before the SCRIPTS called the C code. |
| 3023 | */ |
| 3024 | static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp) |
| 3025 | { |
| 3026 | u32 startp; |
| 3027 | u_char s_status = cp->ssss_status; |
| 3028 | u_char h_flags = cp->host_flags; |
| 3029 | int msglen; |
| 3030 | int i; |
| 3031 | |
| 3032 | /* |
| 3033 | * Compute the index of the next job to start from SCRIPTS. |
| 3034 | */ |
| 3035 | i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; |
| 3036 | |
| 3037 | /* |
| 3038 | * The last CCB queued used for IARB hint may be |
| 3039 | * no longer relevant. Forget it. |
| 3040 | */ |
| 3041 | #ifdef SYM_CONF_IARB_SUPPORT |
| 3042 | if (np->last_cp) |
| 3043 | np->last_cp = 0; |
| 3044 | #endif |
| 3045 | |
| 3046 | /* |
| 3047 | * Now deal with the SCSI status. |
| 3048 | */ |
| 3049 | switch(s_status) { |
| 3050 | case S_BUSY: |
| 3051 | case S_QUEUE_FULL: |
| 3052 | if (sym_verbose >= 2) { |
| 3053 | sym_print_addr(cp->cmd, "%s\n", |
| 3054 | s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n"); |
| 3055 | } |
| 3056 | default: /* S_INT, S_INT_COND_MET, S_CONFLICT */ |
| 3057 | sym_complete_error (np, cp); |
| 3058 | break; |
| 3059 | case S_TERMINATED: |
| 3060 | case S_CHECK_COND: |
| 3061 | /* |
| 3062 | * If we get an SCSI error when requesting sense, give up. |
| 3063 | */ |
| 3064 | if (h_flags & HF_SENSE) { |
| 3065 | sym_complete_error (np, cp); |
| 3066 | break; |
| 3067 | } |
| 3068 | |
| 3069 | /* |
| 3070 | * Dequeue all queued CCBs for that device not yet started, |
| 3071 | * and restart the SCRIPTS processor immediately. |
| 3072 | */ |
| 3073 | sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1); |
| 3074 | OUTL_DSP(np, SCRIPTA_BA(np, start)); |
| 3075 | |
| 3076 | /* |
| 3077 | * Save some info of the actual IO. |
| 3078 | * Compute the data residual. |
| 3079 | */ |
| 3080 | cp->sv_scsi_status = cp->ssss_status; |
| 3081 | cp->sv_xerr_status = cp->xerr_status; |
| 3082 | cp->sv_resid = sym_compute_residual(np, cp); |
| 3083 | |
| 3084 | /* |
| 3085 | * Prepare all needed data structures for |
| 3086 | * requesting sense data. |
| 3087 | */ |
| 3088 | |
| 3089 | cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun); |
| 3090 | msglen = 1; |
| 3091 | |
| 3092 | /* |
| 3093 | * If we are currently using anything different from |
| 3094 | * async. 8 bit data transfers with that target, |
| 3095 | * start a negotiation, since the device may want |
| 3096 | * to report us a UNIT ATTENTION condition due to |
| 3097 | * a cause we currently ignore, and we donnot want |
| 3098 | * to be stuck with WIDE and/or SYNC data transfer. |
| 3099 | * |
| 3100 | * cp->nego_status is filled by sym_prepare_nego(). |
| 3101 | */ |
| 3102 | cp->nego_status = 0; |
| 3103 | msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]); |
| 3104 | /* |
| 3105 | * Message table indirect structure. |
| 3106 | */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3107 | cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3108 | cp->phys.smsg.size = cpu_to_scr(msglen); |
| 3109 | |
| 3110 | /* |
| 3111 | * sense command |
| 3112 | */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3113 | cp->phys.cmd.addr = CCB_BA(cp, sensecmd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3114 | cp->phys.cmd.size = cpu_to_scr(6); |
| 3115 | |
| 3116 | /* |
| 3117 | * patch requested size into sense command |
| 3118 | */ |
| 3119 | cp->sensecmd[0] = REQUEST_SENSE; |
| 3120 | cp->sensecmd[1] = 0; |
| 3121 | if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7) |
| 3122 | cp->sensecmd[1] = cp->lun << 5; |
| 3123 | cp->sensecmd[4] = SYM_SNS_BBUF_LEN; |
| 3124 | cp->data_len = SYM_SNS_BBUF_LEN; |
| 3125 | |
| 3126 | /* |
| 3127 | * sense data |
| 3128 | */ |
| 3129 | memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3130 | cp->phys.sense.addr = CCB_BA(cp, sns_bbuf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3131 | cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN); |
| 3132 | |
| 3133 | /* |
| 3134 | * requeue the command. |
| 3135 | */ |
| 3136 | startp = SCRIPTB_BA(np, sdata_in); |
| 3137 | |
| 3138 | cp->phys.head.savep = cpu_to_scr(startp); |
| 3139 | cp->phys.head.lastp = cpu_to_scr(startp); |
| 3140 | cp->startp = cpu_to_scr(startp); |
| 3141 | cp->goalp = cpu_to_scr(startp + 16); |
| 3142 | |
| 3143 | cp->host_xflags = 0; |
| 3144 | cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; |
| 3145 | cp->ssss_status = S_ILLEGAL; |
| 3146 | cp->host_flags = (HF_SENSE|HF_DATA_IN); |
| 3147 | cp->xerr_status = 0; |
| 3148 | cp->extra_bytes = 0; |
| 3149 | |
| 3150 | cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select)); |
| 3151 | |
| 3152 | /* |
| 3153 | * Requeue the command. |
| 3154 | */ |
| 3155 | sym_put_start_queue(np, cp); |
| 3156 | |
| 3157 | /* |
| 3158 | * Give back to upper layer everything we have dequeued. |
| 3159 | */ |
| 3160 | sym_flush_comp_queue(np, 0); |
| 3161 | break; |
| 3162 | } |
| 3163 | } |
| 3164 | |
| 3165 | /* |
| 3166 | * After a device has accepted some management message |
| 3167 | * as BUS DEVICE RESET, ABORT TASK, etc ..., or when |
| 3168 | * a device signals a UNIT ATTENTION condition, some |
| 3169 | * tasks are thrown away by the device. We are required |
| 3170 | * to reflect that on our tasks list since the device |
| 3171 | * will never complete these tasks. |
| 3172 | * |
| 3173 | * This function move from the BUSY queue to the COMP |
| 3174 | * queue all disconnected CCBs for a given target that |
| 3175 | * match the following criteria: |
| 3176 | * - lun=-1 means any logical UNIT otherwise a given one. |
| 3177 | * - task=-1 means any task, otherwise a given one. |
| 3178 | */ |
| 3179 | int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task) |
| 3180 | { |
| 3181 | SYM_QUEHEAD qtmp, *qp; |
| 3182 | int i = 0; |
| 3183 | struct sym_ccb *cp; |
| 3184 | |
| 3185 | /* |
| 3186 | * Move the entire BUSY queue to our temporary queue. |
| 3187 | */ |
| 3188 | sym_que_init(&qtmp); |
| 3189 | sym_que_splice(&np->busy_ccbq, &qtmp); |
| 3190 | sym_que_init(&np->busy_ccbq); |
| 3191 | |
| 3192 | /* |
| 3193 | * Put all CCBs that matches our criteria into |
| 3194 | * the COMP queue and put back other ones into |
| 3195 | * the BUSY queue. |
| 3196 | */ |
| 3197 | while ((qp = sym_remque_head(&qtmp)) != 0) { |
| 3198 | struct scsi_cmnd *cmd; |
| 3199 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 3200 | cmd = cp->cmd; |
| 3201 | if (cp->host_status != HS_DISCONNECT || |
| 3202 | cp->target != target || |
| 3203 | (lun != -1 && cp->lun != lun) || |
| 3204 | (task != -1 && |
| 3205 | (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) { |
| 3206 | sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); |
| 3207 | continue; |
| 3208 | } |
| 3209 | sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); |
| 3210 | |
| 3211 | /* Preserve the software timeout condition */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3212 | if (sym_get_cam_status(cmd) != DID_TIME_OUT) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3213 | sym_set_cam_status(cmd, cam_status); |
| 3214 | ++i; |
| 3215 | #if 0 |
| 3216 | printf("XXXX TASK @%p CLEARED\n", cp); |
| 3217 | #endif |
| 3218 | } |
| 3219 | return i; |
| 3220 | } |
| 3221 | |
| 3222 | /* |
| 3223 | * chip handler for TASKS recovery |
| 3224 | * |
| 3225 | * We cannot safely abort a command, while the SCRIPTS |
| 3226 | * processor is running, since we just would be in race |
| 3227 | * with it. |
| 3228 | * |
| 3229 | * As long as we have tasks to abort, we keep the SEM |
| 3230 | * bit set in the ISTAT. When this bit is set, the |
| 3231 | * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED) |
| 3232 | * each time it enters the scheduler. |
| 3233 | * |
| 3234 | * If we have to reset a target, clear tasks of a unit, |
| 3235 | * or to perform the abort of a disconnected job, we |
| 3236 | * restart the SCRIPTS for selecting the target. Once |
| 3237 | * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED). |
| 3238 | * If it loses arbitration, the SCRIPTS will interrupt again |
| 3239 | * the next time it will enter its scheduler, and so on ... |
| 3240 | * |
| 3241 | * On SIR_TARGET_SELECTED, we scan for the more |
| 3242 | * appropriate thing to do: |
| 3243 | * |
| 3244 | * - If nothing, we just sent a M_ABORT message to the |
| 3245 | * target to get rid of the useless SCSI bus ownership. |
| 3246 | * According to the specs, no tasks shall be affected. |
| 3247 | * - If the target is to be reset, we send it a M_RESET |
| 3248 | * message. |
| 3249 | * - If a logical UNIT is to be cleared , we send the |
| 3250 | * IDENTIFY(lun) + M_ABORT. |
| 3251 | * - If an untagged task is to be aborted, we send the |
| 3252 | * IDENTIFY(lun) + M_ABORT. |
| 3253 | * - If a tagged task is to be aborted, we send the |
| 3254 | * IDENTIFY(lun) + task attributes + M_ABORT_TAG. |
| 3255 | * |
| 3256 | * Once our 'kiss of death' :) message has been accepted |
| 3257 | * by the target, the SCRIPTS interrupts again |
| 3258 | * (SIR_ABORT_SENT). On this interrupt, we complete |
| 3259 | * all the CCBs that should have been aborted by the |
| 3260 | * target according to our message. |
| 3261 | */ |
| 3262 | static void sym_sir_task_recovery(struct sym_hcb *np, int num) |
| 3263 | { |
| 3264 | SYM_QUEHEAD *qp; |
| 3265 | struct sym_ccb *cp; |
| 3266 | struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */ |
| 3267 | struct scsi_target *starget; |
| 3268 | int target=-1, lun=-1, task; |
| 3269 | int i, k; |
| 3270 | |
| 3271 | switch(num) { |
| 3272 | /* |
| 3273 | * The SCRIPTS processor stopped before starting |
| 3274 | * the next command in order to allow us to perform |
| 3275 | * some task recovery. |
| 3276 | */ |
| 3277 | case SIR_SCRIPT_STOPPED: |
| 3278 | /* |
| 3279 | * Do we have any target to reset or unit to clear ? |
| 3280 | */ |
| 3281 | for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { |
| 3282 | tp = &np->target[i]; |
| 3283 | if (tp->to_reset || |
| 3284 | (tp->lun0p && tp->lun0p->to_clear)) { |
| 3285 | target = i; |
| 3286 | break; |
| 3287 | } |
| 3288 | if (!tp->lunmp) |
| 3289 | continue; |
| 3290 | for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) { |
| 3291 | if (tp->lunmp[k] && tp->lunmp[k]->to_clear) { |
| 3292 | target = i; |
| 3293 | break; |
| 3294 | } |
| 3295 | } |
| 3296 | if (target != -1) |
| 3297 | break; |
| 3298 | } |
| 3299 | |
| 3300 | /* |
| 3301 | * If not, walk the busy queue for any |
| 3302 | * disconnected CCB to be aborted. |
| 3303 | */ |
| 3304 | if (target == -1) { |
| 3305 | FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { |
| 3306 | cp = sym_que_entry(qp,struct sym_ccb,link_ccbq); |
| 3307 | if (cp->host_status != HS_DISCONNECT) |
| 3308 | continue; |
| 3309 | if (cp->to_abort) { |
| 3310 | target = cp->target; |
| 3311 | break; |
| 3312 | } |
| 3313 | } |
| 3314 | } |
| 3315 | |
| 3316 | /* |
| 3317 | * If some target is to be selected, |
| 3318 | * prepare and start the selection. |
| 3319 | */ |
| 3320 | if (target != -1) { |
| 3321 | tp = &np->target[target]; |
| 3322 | np->abrt_sel.sel_id = target; |
| 3323 | np->abrt_sel.sel_scntl3 = tp->head.wval; |
| 3324 | np->abrt_sel.sel_sxfer = tp->head.sval; |
| 3325 | OUTL(np, nc_dsa, np->hcb_ba); |
| 3326 | OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort)); |
| 3327 | return; |
| 3328 | } |
| 3329 | |
| 3330 | /* |
| 3331 | * Now look for a CCB to abort that haven't started yet. |
| 3332 | * Btw, the SCRIPTS processor is still stopped, so |
| 3333 | * we are not in race. |
| 3334 | */ |
| 3335 | i = 0; |
| 3336 | cp = NULL; |
| 3337 | FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { |
| 3338 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 3339 | if (cp->host_status != HS_BUSY && |
| 3340 | cp->host_status != HS_NEGOTIATE) |
| 3341 | continue; |
| 3342 | if (!cp->to_abort) |
| 3343 | continue; |
| 3344 | #ifdef SYM_CONF_IARB_SUPPORT |
| 3345 | /* |
| 3346 | * If we are using IMMEDIATE ARBITRATION, we donnot |
| 3347 | * want to cancel the last queued CCB, since the |
| 3348 | * SCRIPTS may have anticipated the selection. |
| 3349 | */ |
| 3350 | if (cp == np->last_cp) { |
| 3351 | cp->to_abort = 0; |
| 3352 | continue; |
| 3353 | } |
| 3354 | #endif |
| 3355 | i = 1; /* Means we have found some */ |
| 3356 | break; |
| 3357 | } |
| 3358 | if (!i) { |
| 3359 | /* |
| 3360 | * We are done, so we donnot need |
| 3361 | * to synchronize with the SCRIPTS anylonger. |
| 3362 | * Remove the SEM flag from the ISTAT. |
| 3363 | */ |
| 3364 | np->istat_sem = 0; |
| 3365 | OUTB(np, nc_istat, SIGP); |
| 3366 | break; |
| 3367 | } |
| 3368 | /* |
| 3369 | * Compute index of next position in the start |
| 3370 | * queue the SCRIPTS intends to start and dequeue |
| 3371 | * all CCBs for that device that haven't been started. |
| 3372 | */ |
| 3373 | i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; |
| 3374 | i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1); |
| 3375 | |
| 3376 | /* |
| 3377 | * Make sure at least our IO to abort has been dequeued. |
| 3378 | */ |
| 3379 | #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3380 | assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3381 | #else |
| 3382 | sym_remque(&cp->link_ccbq); |
| 3383 | sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); |
| 3384 | #endif |
| 3385 | /* |
| 3386 | * Keep track in cam status of the reason of the abort. |
| 3387 | */ |
| 3388 | if (cp->to_abort == 2) |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3389 | sym_set_cam_status(cp->cmd, DID_TIME_OUT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3390 | else |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3391 | sym_set_cam_status(cp->cmd, DID_ABORT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3392 | |
| 3393 | /* |
| 3394 | * Complete with error everything that we have dequeued. |
| 3395 | */ |
| 3396 | sym_flush_comp_queue(np, 0); |
| 3397 | break; |
| 3398 | /* |
| 3399 | * The SCRIPTS processor has selected a target |
| 3400 | * we may have some manual recovery to perform for. |
| 3401 | */ |
| 3402 | case SIR_TARGET_SELECTED: |
| 3403 | target = INB(np, nc_sdid) & 0xf; |
| 3404 | tp = &np->target[target]; |
| 3405 | |
| 3406 | np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg)); |
| 3407 | |
| 3408 | /* |
| 3409 | * If the target is to be reset, prepare a |
| 3410 | * M_RESET message and clear the to_reset flag |
| 3411 | * since we donnot expect this operation to fail. |
| 3412 | */ |
| 3413 | if (tp->to_reset) { |
| 3414 | np->abrt_msg[0] = M_RESET; |
| 3415 | np->abrt_tbl.size = 1; |
| 3416 | tp->to_reset = 0; |
| 3417 | break; |
| 3418 | } |
| 3419 | |
| 3420 | /* |
| 3421 | * Otherwise, look for some logical unit to be cleared. |
| 3422 | */ |
| 3423 | if (tp->lun0p && tp->lun0p->to_clear) |
| 3424 | lun = 0; |
| 3425 | else if (tp->lunmp) { |
| 3426 | for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) { |
| 3427 | if (tp->lunmp[k] && tp->lunmp[k]->to_clear) { |
| 3428 | lun = k; |
| 3429 | break; |
| 3430 | } |
| 3431 | } |
| 3432 | } |
| 3433 | |
| 3434 | /* |
| 3435 | * If a logical unit is to be cleared, prepare |
| 3436 | * an IDENTIFY(lun) + ABORT MESSAGE. |
| 3437 | */ |
| 3438 | if (lun != -1) { |
| 3439 | struct sym_lcb *lp = sym_lp(tp, lun); |
| 3440 | lp->to_clear = 0; /* We don't expect to fail here */ |
| 3441 | np->abrt_msg[0] = IDENTIFY(0, lun); |
| 3442 | np->abrt_msg[1] = M_ABORT; |
| 3443 | np->abrt_tbl.size = 2; |
| 3444 | break; |
| 3445 | } |
| 3446 | |
| 3447 | /* |
| 3448 | * Otherwise, look for some disconnected job to |
| 3449 | * abort for this target. |
| 3450 | */ |
| 3451 | i = 0; |
| 3452 | cp = NULL; |
| 3453 | FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { |
| 3454 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 3455 | if (cp->host_status != HS_DISCONNECT) |
| 3456 | continue; |
| 3457 | if (cp->target != target) |
| 3458 | continue; |
| 3459 | if (!cp->to_abort) |
| 3460 | continue; |
| 3461 | i = 1; /* Means we have some */ |
| 3462 | break; |
| 3463 | } |
| 3464 | |
| 3465 | /* |
| 3466 | * If we have none, probably since the device has |
| 3467 | * completed the command before we won abitration, |
| 3468 | * send a M_ABORT message without IDENTIFY. |
| 3469 | * According to the specs, the device must just |
| 3470 | * disconnect the BUS and not abort any task. |
| 3471 | */ |
| 3472 | if (!i) { |
| 3473 | np->abrt_msg[0] = M_ABORT; |
| 3474 | np->abrt_tbl.size = 1; |
| 3475 | break; |
| 3476 | } |
| 3477 | |
| 3478 | /* |
| 3479 | * We have some task to abort. |
| 3480 | * Set the IDENTIFY(lun) |
| 3481 | */ |
| 3482 | np->abrt_msg[0] = IDENTIFY(0, cp->lun); |
| 3483 | |
| 3484 | /* |
| 3485 | * If we want to abort an untagged command, we |
| 3486 | * will send a IDENTIFY + M_ABORT. |
| 3487 | * Otherwise (tagged command), we will send |
| 3488 | * a IDENTITFY + task attributes + ABORT TAG. |
| 3489 | */ |
| 3490 | if (cp->tag == NO_TAG) { |
| 3491 | np->abrt_msg[1] = M_ABORT; |
| 3492 | np->abrt_tbl.size = 2; |
| 3493 | } else { |
| 3494 | np->abrt_msg[1] = cp->scsi_smsg[1]; |
| 3495 | np->abrt_msg[2] = cp->scsi_smsg[2]; |
| 3496 | np->abrt_msg[3] = M_ABORT_TAG; |
| 3497 | np->abrt_tbl.size = 4; |
| 3498 | } |
| 3499 | /* |
| 3500 | * Keep track of software timeout condition, since the |
| 3501 | * peripheral driver may not count retries on abort |
| 3502 | * conditions not due to timeout. |
| 3503 | */ |
| 3504 | if (cp->to_abort == 2) |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3505 | sym_set_cam_status(cp->cmd, DID_TIME_OUT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3506 | cp->to_abort = 0; /* We donnot expect to fail here */ |
| 3507 | break; |
| 3508 | |
| 3509 | /* |
| 3510 | * The target has accepted our message and switched |
| 3511 | * to BUS FREE phase as we expected. |
| 3512 | */ |
| 3513 | case SIR_ABORT_SENT: |
| 3514 | target = INB(np, nc_sdid) & 0xf; |
| 3515 | tp = &np->target[target]; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3516 | starget = tp->starget; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3517 | |
| 3518 | /* |
| 3519 | ** If we didn't abort anything, leave here. |
| 3520 | */ |
| 3521 | if (np->abrt_msg[0] == M_ABORT) |
| 3522 | break; |
| 3523 | |
| 3524 | /* |
| 3525 | * If we sent a M_RESET, then a hardware reset has |
| 3526 | * been performed by the target. |
| 3527 | * - Reset everything to async 8 bit |
| 3528 | * - Tell ourself to negotiate next time :-) |
| 3529 | * - Prepare to clear all disconnected CCBs for |
| 3530 | * this target from our task list (lun=task=-1) |
| 3531 | */ |
| 3532 | lun = -1; |
| 3533 | task = -1; |
| 3534 | if (np->abrt_msg[0] == M_RESET) { |
| 3535 | tp->head.sval = 0; |
| 3536 | tp->head.wval = np->rv_scntl3; |
| 3537 | tp->head.uval = 0; |
| 3538 | spi_period(starget) = 0; |
| 3539 | spi_offset(starget) = 0; |
| 3540 | spi_width(starget) = 0; |
| 3541 | spi_iu(starget) = 0; |
| 3542 | spi_dt(starget) = 0; |
| 3543 | spi_qas(starget) = 0; |
| 3544 | tp->tgoal.check_nego = 1; |
| 3545 | } |
| 3546 | |
| 3547 | /* |
| 3548 | * Otherwise, check for the LUN and TASK(s) |
| 3549 | * concerned by the cancelation. |
| 3550 | * If it is not ABORT_TAG then it is CLEAR_QUEUE |
| 3551 | * or an ABORT message :-) |
| 3552 | */ |
| 3553 | else { |
| 3554 | lun = np->abrt_msg[0] & 0x3f; |
| 3555 | if (np->abrt_msg[1] == M_ABORT_TAG) |
| 3556 | task = np->abrt_msg[2]; |
| 3557 | } |
| 3558 | |
| 3559 | /* |
| 3560 | * Complete all the CCBs the device should have |
| 3561 | * aborted due to our 'kiss of death' message. |
| 3562 | */ |
| 3563 | i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; |
| 3564 | sym_dequeue_from_squeue(np, i, target, lun, -1); |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3565 | sym_clear_tasks(np, DID_ABORT, target, lun, task); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3566 | sym_flush_comp_queue(np, 0); |
| 3567 | |
| 3568 | /* |
| 3569 | * If we sent a BDR, make upper layer aware of that. |
| 3570 | */ |
| 3571 | if (np->abrt_msg[0] == M_RESET) |
| 3572 | sym_xpt_async_sent_bdr(np, target); |
| 3573 | break; |
| 3574 | } |
| 3575 | |
| 3576 | /* |
| 3577 | * Print to the log the message we intend to send. |
| 3578 | */ |
| 3579 | if (num == SIR_TARGET_SELECTED) { |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3580 | dev_info(&tp->starget->dev, "control msgout:"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3581 | sym_printl_hex(np->abrt_msg, np->abrt_tbl.size); |
| 3582 | np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size); |
| 3583 | } |
| 3584 | |
| 3585 | /* |
| 3586 | * Let the SCRIPTS processor continue. |
| 3587 | */ |
| 3588 | OUTONB_STD(); |
| 3589 | } |
| 3590 | |
| 3591 | /* |
| 3592 | * Gerard's alchemy:) that deals with with the data |
| 3593 | * pointer for both MDP and the residual calculation. |
| 3594 | * |
| 3595 | * I didn't want to bloat the code by more than 200 |
| 3596 | * lines for the handling of both MDP and the residual. |
| 3597 | * This has been achieved by using a data pointer |
| 3598 | * representation consisting in an index in the data |
| 3599 | * array (dp_sg) and a negative offset (dp_ofs) that |
| 3600 | * have the following meaning: |
| 3601 | * |
| 3602 | * - dp_sg = SYM_CONF_MAX_SG |
| 3603 | * we are at the end of the data script. |
| 3604 | * - dp_sg < SYM_CONF_MAX_SG |
| 3605 | * dp_sg points to the next entry of the scatter array |
| 3606 | * we want to transfer. |
| 3607 | * - dp_ofs < 0 |
| 3608 | * dp_ofs represents the residual of bytes of the |
| 3609 | * previous entry scatter entry we will send first. |
| 3610 | * - dp_ofs = 0 |
| 3611 | * no residual to send first. |
| 3612 | * |
| 3613 | * The function sym_evaluate_dp() accepts an arbitray |
| 3614 | * offset (basically from the MDP message) and returns |
| 3615 | * the corresponding values of dp_sg and dp_ofs. |
| 3616 | */ |
| 3617 | |
| 3618 | static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs) |
| 3619 | { |
| 3620 | u32 dp_scr; |
| 3621 | int dp_ofs, dp_sg, dp_sgmin; |
| 3622 | int tmp; |
| 3623 | struct sym_pmc *pm; |
| 3624 | |
| 3625 | /* |
| 3626 | * Compute the resulted data pointer in term of a script |
| 3627 | * address within some DATA script and a signed byte offset. |
| 3628 | */ |
| 3629 | dp_scr = scr; |
| 3630 | dp_ofs = *ofs; |
| 3631 | if (dp_scr == SCRIPTA_BA(np, pm0_data)) |
| 3632 | pm = &cp->phys.pm0; |
| 3633 | else if (dp_scr == SCRIPTA_BA(np, pm1_data)) |
| 3634 | pm = &cp->phys.pm1; |
| 3635 | else |
| 3636 | pm = NULL; |
| 3637 | |
| 3638 | if (pm) { |
| 3639 | dp_scr = scr_to_cpu(pm->ret); |
| 3640 | dp_ofs -= scr_to_cpu(pm->sg.size); |
| 3641 | } |
| 3642 | |
| 3643 | /* |
| 3644 | * If we are auto-sensing, then we are done. |
| 3645 | */ |
| 3646 | if (cp->host_flags & HF_SENSE) { |
| 3647 | *ofs = dp_ofs; |
| 3648 | return 0; |
| 3649 | } |
| 3650 | |
| 3651 | /* |
| 3652 | * Deduce the index of the sg entry. |
| 3653 | * Keep track of the index of the first valid entry. |
| 3654 | * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the |
| 3655 | * end of the data. |
| 3656 | */ |
| 3657 | tmp = scr_to_cpu(sym_goalp(cp)); |
| 3658 | dp_sg = SYM_CONF_MAX_SG; |
| 3659 | if (dp_scr != tmp) |
| 3660 | dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4); |
| 3661 | dp_sgmin = SYM_CONF_MAX_SG - cp->segments; |
| 3662 | |
| 3663 | /* |
| 3664 | * Move to the sg entry the data pointer belongs to. |
| 3665 | * |
| 3666 | * If we are inside the data area, we expect result to be: |
| 3667 | * |
| 3668 | * Either, |
| 3669 | * dp_ofs = 0 and dp_sg is the index of the sg entry |
| 3670 | * the data pointer belongs to (or the end of the data) |
| 3671 | * Or, |
| 3672 | * dp_ofs < 0 and dp_sg is the index of the sg entry |
| 3673 | * the data pointer belongs to + 1. |
| 3674 | */ |
| 3675 | if (dp_ofs < 0) { |
| 3676 | int n; |
| 3677 | while (dp_sg > dp_sgmin) { |
| 3678 | --dp_sg; |
| 3679 | tmp = scr_to_cpu(cp->phys.data[dp_sg].size); |
| 3680 | n = dp_ofs + (tmp & 0xffffff); |
| 3681 | if (n > 0) { |
| 3682 | ++dp_sg; |
| 3683 | break; |
| 3684 | } |
| 3685 | dp_ofs = n; |
| 3686 | } |
| 3687 | } |
| 3688 | else if (dp_ofs > 0) { |
| 3689 | while (dp_sg < SYM_CONF_MAX_SG) { |
| 3690 | tmp = scr_to_cpu(cp->phys.data[dp_sg].size); |
| 3691 | dp_ofs -= (tmp & 0xffffff); |
| 3692 | ++dp_sg; |
| 3693 | if (dp_ofs <= 0) |
| 3694 | break; |
| 3695 | } |
| 3696 | } |
| 3697 | |
| 3698 | /* |
| 3699 | * Make sure the data pointer is inside the data area. |
| 3700 | * If not, return some error. |
| 3701 | */ |
| 3702 | if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0)) |
| 3703 | goto out_err; |
| 3704 | else if (dp_sg > SYM_CONF_MAX_SG || |
| 3705 | (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0)) |
| 3706 | goto out_err; |
| 3707 | |
| 3708 | /* |
| 3709 | * Save the extreme pointer if needed. |
| 3710 | */ |
| 3711 | if (dp_sg > cp->ext_sg || |
| 3712 | (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) { |
| 3713 | cp->ext_sg = dp_sg; |
| 3714 | cp->ext_ofs = dp_ofs; |
| 3715 | } |
| 3716 | |
| 3717 | /* |
| 3718 | * Return data. |
| 3719 | */ |
| 3720 | *ofs = dp_ofs; |
| 3721 | return dp_sg; |
| 3722 | |
| 3723 | out_err: |
| 3724 | return -1; |
| 3725 | } |
| 3726 | |
| 3727 | /* |
| 3728 | * chip handler for MODIFY DATA POINTER MESSAGE |
| 3729 | * |
| 3730 | * We also call this function on IGNORE WIDE RESIDUE |
| 3731 | * messages that do not match a SWIDE full condition. |
| 3732 | * Btw, we assume in that situation that such a message |
| 3733 | * is equivalent to a MODIFY DATA POINTER (offset=-1). |
| 3734 | */ |
| 3735 | |
| 3736 | static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs) |
| 3737 | { |
| 3738 | int dp_ofs = ofs; |
| 3739 | u32 dp_scr = sym_get_script_dp (np, cp); |
| 3740 | u32 dp_ret; |
| 3741 | u32 tmp; |
| 3742 | u_char hflags; |
| 3743 | int dp_sg; |
| 3744 | struct sym_pmc *pm; |
| 3745 | |
| 3746 | /* |
| 3747 | * Not supported for auto-sense. |
| 3748 | */ |
| 3749 | if (cp->host_flags & HF_SENSE) |
| 3750 | goto out_reject; |
| 3751 | |
| 3752 | /* |
| 3753 | * Apply our alchemy:) (see comments in sym_evaluate_dp()), |
| 3754 | * to the resulted data pointer. |
| 3755 | */ |
| 3756 | dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs); |
| 3757 | if (dp_sg < 0) |
| 3758 | goto out_reject; |
| 3759 | |
| 3760 | /* |
| 3761 | * And our alchemy:) allows to easily calculate the data |
| 3762 | * script address we want to return for the next data phase. |
| 3763 | */ |
| 3764 | dp_ret = cpu_to_scr(sym_goalp(cp)); |
| 3765 | dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4); |
| 3766 | |
| 3767 | /* |
| 3768 | * If offset / scatter entry is zero we donnot need |
| 3769 | * a context for the new current data pointer. |
| 3770 | */ |
| 3771 | if (dp_ofs == 0) { |
| 3772 | dp_scr = dp_ret; |
| 3773 | goto out_ok; |
| 3774 | } |
| 3775 | |
| 3776 | /* |
| 3777 | * Get a context for the new current data pointer. |
| 3778 | */ |
| 3779 | hflags = INB(np, HF_PRT); |
| 3780 | |
| 3781 | if (hflags & HF_DP_SAVED) |
| 3782 | hflags ^= HF_ACT_PM; |
| 3783 | |
| 3784 | if (!(hflags & HF_ACT_PM)) { |
| 3785 | pm = &cp->phys.pm0; |
| 3786 | dp_scr = SCRIPTA_BA(np, pm0_data); |
| 3787 | } |
| 3788 | else { |
| 3789 | pm = &cp->phys.pm1; |
| 3790 | dp_scr = SCRIPTA_BA(np, pm1_data); |
| 3791 | } |
| 3792 | |
| 3793 | hflags &= ~(HF_DP_SAVED); |
| 3794 | |
| 3795 | OUTB(np, HF_PRT, hflags); |
| 3796 | |
| 3797 | /* |
| 3798 | * Set up the new current data pointer. |
| 3799 | * ofs < 0 there, and for the next data phase, we |
| 3800 | * want to transfer part of the data of the sg entry |
| 3801 | * corresponding to index dp_sg-1 prior to returning |
| 3802 | * to the main data script. |
| 3803 | */ |
| 3804 | pm->ret = cpu_to_scr(dp_ret); |
| 3805 | tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr); |
| 3806 | tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs; |
| 3807 | pm->sg.addr = cpu_to_scr(tmp); |
| 3808 | pm->sg.size = cpu_to_scr(-dp_ofs); |
| 3809 | |
| 3810 | out_ok: |
| 3811 | sym_set_script_dp (np, cp, dp_scr); |
| 3812 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 3813 | return; |
| 3814 | |
| 3815 | out_reject: |
| 3816 | OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); |
| 3817 | } |
| 3818 | |
| 3819 | |
| 3820 | /* |
| 3821 | * chip calculation of the data residual. |
| 3822 | * |
| 3823 | * As I used to say, the requirement of data residual |
| 3824 | * in SCSI is broken, useless and cannot be achieved |
| 3825 | * without huge complexity. |
| 3826 | * But most OSes and even the official CAM require it. |
| 3827 | * When stupidity happens to be so widely spread inside |
| 3828 | * a community, it gets hard to convince. |
| 3829 | * |
| 3830 | * Anyway, I don't care, since I am not going to use |
| 3831 | * any software that considers this data residual as |
| 3832 | * a relevant information. :) |
| 3833 | */ |
| 3834 | |
| 3835 | int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp) |
| 3836 | { |
| 3837 | int dp_sg, dp_sgmin, resid = 0; |
| 3838 | int dp_ofs = 0; |
| 3839 | |
| 3840 | /* |
| 3841 | * Check for some data lost or just thrown away. |
| 3842 | * We are not required to be quite accurate in this |
| 3843 | * situation. Btw, if we are odd for output and the |
| 3844 | * device claims some more data, it may well happen |
| 3845 | * than our residual be zero. :-) |
| 3846 | */ |
| 3847 | if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) { |
| 3848 | if (cp->xerr_status & XE_EXTRA_DATA) |
| 3849 | resid -= cp->extra_bytes; |
| 3850 | if (cp->xerr_status & XE_SODL_UNRUN) |
| 3851 | ++resid; |
| 3852 | if (cp->xerr_status & XE_SWIDE_OVRUN) |
| 3853 | --resid; |
| 3854 | } |
| 3855 | |
| 3856 | /* |
| 3857 | * If all data has been transferred, |
| 3858 | * there is no residual. |
| 3859 | */ |
| 3860 | if (cp->phys.head.lastp == sym_goalp(cp)) |
| 3861 | return resid; |
| 3862 | |
| 3863 | /* |
| 3864 | * If no data transfer occurs, or if the data |
| 3865 | * pointer is weird, return full residual. |
| 3866 | */ |
| 3867 | if (cp->startp == cp->phys.head.lastp || |
| 3868 | sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp), |
| 3869 | &dp_ofs) < 0) { |
| 3870 | return cp->data_len; |
| 3871 | } |
| 3872 | |
| 3873 | /* |
| 3874 | * If we were auto-sensing, then we are done. |
| 3875 | */ |
| 3876 | if (cp->host_flags & HF_SENSE) { |
| 3877 | return -dp_ofs; |
| 3878 | } |
| 3879 | |
| 3880 | /* |
| 3881 | * We are now full comfortable in the computation |
| 3882 | * of the data residual (2's complement). |
| 3883 | */ |
| 3884 | dp_sgmin = SYM_CONF_MAX_SG - cp->segments; |
| 3885 | resid = -cp->ext_ofs; |
| 3886 | for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) { |
| 3887 | u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size); |
| 3888 | resid += (tmp & 0xffffff); |
| 3889 | } |
| 3890 | |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 3891 | resid -= cp->odd_byte_adjustment; |
| 3892 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3893 | /* |
| 3894 | * Hopefully, the result is not too wrong. |
| 3895 | */ |
| 3896 | return resid; |
| 3897 | } |
| 3898 | |
| 3899 | /* |
| 3900 | * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER. |
| 3901 | * |
| 3902 | * When we try to negotiate, we append the negotiation message |
| 3903 | * to the identify and (maybe) simple tag message. |
| 3904 | * The host status field is set to HS_NEGOTIATE to mark this |
| 3905 | * situation. |
| 3906 | * |
| 3907 | * If the target doesn't answer this message immediately |
| 3908 | * (as required by the standard), the SIR_NEGO_FAILED interrupt |
| 3909 | * will be raised eventually. |
| 3910 | * The handler removes the HS_NEGOTIATE status, and sets the |
| 3911 | * negotiated value to the default (async / nowide). |
| 3912 | * |
| 3913 | * If we receive a matching answer immediately, we check it |
| 3914 | * for validity, and set the values. |
| 3915 | * |
| 3916 | * If we receive a Reject message immediately, we assume the |
| 3917 | * negotiation has failed, and fall back to standard values. |
| 3918 | * |
| 3919 | * If we receive a negotiation message while not in HS_NEGOTIATE |
| 3920 | * state, it's a target initiated negotiation. We prepare a |
| 3921 | * (hopefully) valid answer, set our parameters, and send back |
| 3922 | * this answer to the target. |
| 3923 | * |
| 3924 | * If the target doesn't fetch the answer (no message out phase), |
| 3925 | * we assume the negotiation has failed, and fall back to default |
| 3926 | * settings (SIR_NEGO_PROTO interrupt). |
| 3927 | * |
| 3928 | * When we set the values, we adjust them in all ccbs belonging |
| 3929 | * to this target, in the controller's register, and in the "phys" |
| 3930 | * field of the controller's struct sym_hcb. |
| 3931 | */ |
| 3932 | |
| 3933 | /* |
| 3934 | * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message. |
| 3935 | */ |
| 3936 | static int |
| 3937 | sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp) |
| 3938 | { |
| 3939 | int target = cp->target; |
| 3940 | u_char chg, ofs, per, fak, div; |
| 3941 | |
| 3942 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 3943 | sym_print_nego_msg(np, target, "sync msgin", np->msgin); |
| 3944 | } |
| 3945 | |
| 3946 | /* |
| 3947 | * Get requested values. |
| 3948 | */ |
| 3949 | chg = 0; |
| 3950 | per = np->msgin[3]; |
| 3951 | ofs = np->msgin[4]; |
| 3952 | |
| 3953 | /* |
| 3954 | * Check values against our limits. |
| 3955 | */ |
| 3956 | if (ofs) { |
| 3957 | if (ofs > np->maxoffs) |
| 3958 | {chg = 1; ofs = np->maxoffs;} |
| 3959 | } |
| 3960 | |
| 3961 | if (ofs) { |
| 3962 | if (per < np->minsync) |
| 3963 | {chg = 1; per = np->minsync;} |
| 3964 | } |
| 3965 | |
| 3966 | /* |
| 3967 | * Get new chip synchronous parameters value. |
| 3968 | */ |
| 3969 | div = fak = 0; |
| 3970 | if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0) |
| 3971 | goto reject_it; |
| 3972 | |
| 3973 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 3974 | sym_print_addr(cp->cmd, |
| 3975 | "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n", |
| 3976 | ofs, per, div, fak, chg); |
| 3977 | } |
| 3978 | |
| 3979 | /* |
| 3980 | * If it was an answer we want to change, |
| 3981 | * then it isn't acceptable. Reject it. |
| 3982 | */ |
| 3983 | if (!req && chg) |
| 3984 | goto reject_it; |
| 3985 | |
| 3986 | /* |
| 3987 | * Apply new values. |
| 3988 | */ |
| 3989 | sym_setsync (np, target, ofs, per, div, fak); |
| 3990 | |
| 3991 | /* |
| 3992 | * It was an answer. We are done. |
| 3993 | */ |
| 3994 | if (!req) |
| 3995 | return 0; |
| 3996 | |
| 3997 | /* |
| 3998 | * It was a request. Prepare an answer message. |
| 3999 | */ |
| 4000 | np->msgout[0] = M_EXTENDED; |
| 4001 | np->msgout[1] = 3; |
| 4002 | np->msgout[2] = M_X_SYNC_REQ; |
| 4003 | np->msgout[3] = per; |
| 4004 | np->msgout[4] = ofs; |
| 4005 | |
| 4006 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4007 | sym_print_nego_msg(np, target, "sync msgout", np->msgout); |
| 4008 | } |
| 4009 | |
| 4010 | np->msgin [0] = M_NOOP; |
| 4011 | |
| 4012 | return 0; |
| 4013 | |
| 4014 | reject_it: |
| 4015 | sym_setsync (np, target, 0, 0, 0, 0); |
| 4016 | return -1; |
| 4017 | } |
| 4018 | |
| 4019 | static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) |
| 4020 | { |
| 4021 | int req = 1; |
| 4022 | int result; |
| 4023 | |
| 4024 | /* |
| 4025 | * Request or answer ? |
| 4026 | */ |
| 4027 | if (INB(np, HS_PRT) == HS_NEGOTIATE) { |
| 4028 | OUTB(np, HS_PRT, HS_BUSY); |
| 4029 | if (cp->nego_status && cp->nego_status != NS_SYNC) |
| 4030 | goto reject_it; |
| 4031 | req = 0; |
| 4032 | } |
| 4033 | |
| 4034 | /* |
| 4035 | * Check and apply new values. |
| 4036 | */ |
| 4037 | result = sym_sync_nego_check(np, req, cp); |
| 4038 | if (result) /* Not acceptable, reject it */ |
| 4039 | goto reject_it; |
| 4040 | if (req) { /* Was a request, send response. */ |
| 4041 | cp->nego_status = NS_SYNC; |
| 4042 | OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp)); |
| 4043 | } |
| 4044 | else /* Was a response, we are done. */ |
| 4045 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 4046 | return; |
| 4047 | |
| 4048 | reject_it: |
| 4049 | OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); |
| 4050 | } |
| 4051 | |
| 4052 | /* |
| 4053 | * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message. |
| 4054 | */ |
| 4055 | static int |
| 4056 | sym_ppr_nego_check(struct sym_hcb *np, int req, int target) |
| 4057 | { |
| 4058 | struct sym_tcb *tp = &np->target[target]; |
| 4059 | unsigned char fak, div; |
| 4060 | int dt, chg = 0; |
| 4061 | |
| 4062 | unsigned char per = np->msgin[3]; |
| 4063 | unsigned char ofs = np->msgin[5]; |
| 4064 | unsigned char wide = np->msgin[6]; |
| 4065 | unsigned char opts = np->msgin[7] & PPR_OPT_MASK; |
| 4066 | |
| 4067 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4068 | sym_print_nego_msg(np, target, "ppr msgin", np->msgin); |
| 4069 | } |
| 4070 | |
| 4071 | /* |
| 4072 | * Check values against our limits. |
| 4073 | */ |
| 4074 | if (wide > np->maxwide) { |
| 4075 | chg = 1; |
| 4076 | wide = np->maxwide; |
| 4077 | } |
| 4078 | if (!wide || !(np->features & FE_U3EN)) |
| 4079 | opts = 0; |
| 4080 | |
| 4081 | if (opts != (np->msgin[7] & PPR_OPT_MASK)) |
| 4082 | chg = 1; |
| 4083 | |
| 4084 | dt = opts & PPR_OPT_DT; |
| 4085 | |
| 4086 | if (ofs) { |
| 4087 | unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs; |
| 4088 | if (ofs > maxoffs) { |
| 4089 | chg = 1; |
| 4090 | ofs = maxoffs; |
| 4091 | } |
| 4092 | } |
| 4093 | |
| 4094 | if (ofs) { |
| 4095 | unsigned char minsync = dt ? np->minsync_dt : np->minsync; |
| 4096 | if (per < minsync) { |
| 4097 | chg = 1; |
| 4098 | per = minsync; |
| 4099 | } |
| 4100 | } |
| 4101 | |
| 4102 | /* |
| 4103 | * Get new chip synchronous parameters value. |
| 4104 | */ |
| 4105 | div = fak = 0; |
| 4106 | if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0) |
| 4107 | goto reject_it; |
| 4108 | |
| 4109 | /* |
| 4110 | * If it was an answer we want to change, |
| 4111 | * then it isn't acceptable. Reject it. |
| 4112 | */ |
| 4113 | if (!req && chg) |
| 4114 | goto reject_it; |
| 4115 | |
| 4116 | /* |
| 4117 | * Apply new values. |
| 4118 | */ |
| 4119 | sym_setpprot(np, target, opts, ofs, per, wide, div, fak); |
| 4120 | |
| 4121 | /* |
| 4122 | * It was an answer. We are done. |
| 4123 | */ |
| 4124 | if (!req) |
| 4125 | return 0; |
| 4126 | |
| 4127 | /* |
| 4128 | * It was a request. Prepare an answer message. |
| 4129 | */ |
| 4130 | np->msgout[0] = M_EXTENDED; |
| 4131 | np->msgout[1] = 6; |
| 4132 | np->msgout[2] = M_X_PPR_REQ; |
| 4133 | np->msgout[3] = per; |
| 4134 | np->msgout[4] = 0; |
| 4135 | np->msgout[5] = ofs; |
| 4136 | np->msgout[6] = wide; |
| 4137 | np->msgout[7] = opts; |
| 4138 | |
| 4139 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4140 | sym_print_nego_msg(np, target, "ppr msgout", np->msgout); |
| 4141 | } |
| 4142 | |
| 4143 | np->msgin [0] = M_NOOP; |
| 4144 | |
| 4145 | return 0; |
| 4146 | |
| 4147 | reject_it: |
| 4148 | sym_setpprot (np, target, 0, 0, 0, 0, 0, 0); |
| 4149 | /* |
| 4150 | * If it is a device response that should result in |
| 4151 | * ST, we may want to try a legacy negotiation later. |
| 4152 | */ |
| 4153 | if (!req && !opts) { |
| 4154 | tp->tgoal.period = per; |
| 4155 | tp->tgoal.offset = ofs; |
| 4156 | tp->tgoal.width = wide; |
| 4157 | tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0; |
| 4158 | tp->tgoal.check_nego = 1; |
| 4159 | } |
| 4160 | return -1; |
| 4161 | } |
| 4162 | |
| 4163 | static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) |
| 4164 | { |
| 4165 | int req = 1; |
| 4166 | int result; |
| 4167 | |
| 4168 | /* |
| 4169 | * Request or answer ? |
| 4170 | */ |
| 4171 | if (INB(np, HS_PRT) == HS_NEGOTIATE) { |
| 4172 | OUTB(np, HS_PRT, HS_BUSY); |
| 4173 | if (cp->nego_status && cp->nego_status != NS_PPR) |
| 4174 | goto reject_it; |
| 4175 | req = 0; |
| 4176 | } |
| 4177 | |
| 4178 | /* |
| 4179 | * Check and apply new values. |
| 4180 | */ |
| 4181 | result = sym_ppr_nego_check(np, req, cp->target); |
| 4182 | if (result) /* Not acceptable, reject it */ |
| 4183 | goto reject_it; |
| 4184 | if (req) { /* Was a request, send response. */ |
| 4185 | cp->nego_status = NS_PPR; |
| 4186 | OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp)); |
| 4187 | } |
| 4188 | else /* Was a response, we are done. */ |
| 4189 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 4190 | return; |
| 4191 | |
| 4192 | reject_it: |
| 4193 | OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); |
| 4194 | } |
| 4195 | |
| 4196 | /* |
| 4197 | * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message. |
| 4198 | */ |
| 4199 | static int |
| 4200 | sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp) |
| 4201 | { |
| 4202 | int target = cp->target; |
| 4203 | u_char chg, wide; |
| 4204 | |
| 4205 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4206 | sym_print_nego_msg(np, target, "wide msgin", np->msgin); |
| 4207 | } |
| 4208 | |
| 4209 | /* |
| 4210 | * Get requested values. |
| 4211 | */ |
| 4212 | chg = 0; |
| 4213 | wide = np->msgin[3]; |
| 4214 | |
| 4215 | /* |
| 4216 | * Check values against our limits. |
| 4217 | */ |
| 4218 | if (wide > np->maxwide) { |
| 4219 | chg = 1; |
| 4220 | wide = np->maxwide; |
| 4221 | } |
| 4222 | |
| 4223 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4224 | sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n", |
| 4225 | wide, chg); |
| 4226 | } |
| 4227 | |
| 4228 | /* |
| 4229 | * If it was an answer we want to change, |
| 4230 | * then it isn't acceptable. Reject it. |
| 4231 | */ |
| 4232 | if (!req && chg) |
| 4233 | goto reject_it; |
| 4234 | |
| 4235 | /* |
| 4236 | * Apply new values. |
| 4237 | */ |
| 4238 | sym_setwide (np, target, wide); |
| 4239 | |
| 4240 | /* |
| 4241 | * It was an answer. We are done. |
| 4242 | */ |
| 4243 | if (!req) |
| 4244 | return 0; |
| 4245 | |
| 4246 | /* |
| 4247 | * It was a request. Prepare an answer message. |
| 4248 | */ |
| 4249 | np->msgout[0] = M_EXTENDED; |
| 4250 | np->msgout[1] = 2; |
| 4251 | np->msgout[2] = M_X_WIDE_REQ; |
| 4252 | np->msgout[3] = wide; |
| 4253 | |
| 4254 | np->msgin [0] = M_NOOP; |
| 4255 | |
| 4256 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4257 | sym_print_nego_msg(np, target, "wide msgout", np->msgout); |
| 4258 | } |
| 4259 | |
| 4260 | return 0; |
| 4261 | |
| 4262 | reject_it: |
| 4263 | return -1; |
| 4264 | } |
| 4265 | |
| 4266 | static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) |
| 4267 | { |
| 4268 | int req = 1; |
| 4269 | int result; |
| 4270 | |
| 4271 | /* |
| 4272 | * Request or answer ? |
| 4273 | */ |
| 4274 | if (INB(np, HS_PRT) == HS_NEGOTIATE) { |
| 4275 | OUTB(np, HS_PRT, HS_BUSY); |
| 4276 | if (cp->nego_status && cp->nego_status != NS_WIDE) |
| 4277 | goto reject_it; |
| 4278 | req = 0; |
| 4279 | } |
| 4280 | |
| 4281 | /* |
| 4282 | * Check and apply new values. |
| 4283 | */ |
| 4284 | result = sym_wide_nego_check(np, req, cp); |
| 4285 | if (result) /* Not acceptable, reject it */ |
| 4286 | goto reject_it; |
| 4287 | if (req) { /* Was a request, send response. */ |
| 4288 | cp->nego_status = NS_WIDE; |
| 4289 | OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp)); |
| 4290 | } else { /* Was a response. */ |
| 4291 | /* |
| 4292 | * Negotiate for SYNC immediately after WIDE response. |
| 4293 | * This allows to negotiate for both WIDE and SYNC on |
| 4294 | * a single SCSI command (Suggested by Justin Gibbs). |
| 4295 | */ |
| 4296 | if (tp->tgoal.offset) { |
| 4297 | np->msgout[0] = M_EXTENDED; |
| 4298 | np->msgout[1] = 3; |
| 4299 | np->msgout[2] = M_X_SYNC_REQ; |
| 4300 | np->msgout[3] = tp->tgoal.period; |
| 4301 | np->msgout[4] = tp->tgoal.offset; |
| 4302 | |
| 4303 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
| 4304 | sym_print_nego_msg(np, cp->target, |
| 4305 | "sync msgout", np->msgout); |
| 4306 | } |
| 4307 | |
| 4308 | cp->nego_status = NS_SYNC; |
| 4309 | OUTB(np, HS_PRT, HS_NEGOTIATE); |
| 4310 | OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp)); |
| 4311 | return; |
| 4312 | } else |
| 4313 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 4314 | } |
| 4315 | |
| 4316 | return; |
| 4317 | |
| 4318 | reject_it: |
| 4319 | OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); |
| 4320 | } |
| 4321 | |
| 4322 | /* |
| 4323 | * Reset DT, SYNC or WIDE to default settings. |
| 4324 | * |
| 4325 | * Called when a negotiation does not succeed either |
| 4326 | * on rejection or on protocol error. |
| 4327 | * |
| 4328 | * A target that understands a PPR message should never |
| 4329 | * reject it, and messing with it is very unlikely. |
| 4330 | * So, if a PPR makes problems, we may just want to |
| 4331 | * try a legacy negotiation later. |
| 4332 | */ |
| 4333 | static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) |
| 4334 | { |
| 4335 | switch (cp->nego_status) { |
| 4336 | case NS_PPR: |
| 4337 | #if 0 |
| 4338 | sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0); |
| 4339 | #else |
| 4340 | if (tp->tgoal.period < np->minsync) |
| 4341 | tp->tgoal.period = np->minsync; |
| 4342 | if (tp->tgoal.offset > np->maxoffs) |
| 4343 | tp->tgoal.offset = np->maxoffs; |
| 4344 | tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0; |
| 4345 | tp->tgoal.check_nego = 1; |
| 4346 | #endif |
| 4347 | break; |
| 4348 | case NS_SYNC: |
| 4349 | sym_setsync (np, cp->target, 0, 0, 0, 0); |
| 4350 | break; |
| 4351 | case NS_WIDE: |
| 4352 | sym_setwide (np, cp->target, 0); |
| 4353 | break; |
| 4354 | } |
| 4355 | np->msgin [0] = M_NOOP; |
| 4356 | np->msgout[0] = M_NOOP; |
| 4357 | cp->nego_status = 0; |
| 4358 | } |
| 4359 | |
| 4360 | /* |
| 4361 | * chip handler for MESSAGE REJECT received in response to |
| 4362 | * PPR, WIDE or SYNCHRONOUS negotiation. |
| 4363 | */ |
| 4364 | static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) |
| 4365 | { |
| 4366 | sym_nego_default(np, tp, cp); |
| 4367 | OUTB(np, HS_PRT, HS_BUSY); |
| 4368 | } |
| 4369 | |
| 4370 | /* |
| 4371 | * chip exception handler for programmed interrupts. |
| 4372 | */ |
| 4373 | static void sym_int_sir (struct sym_hcb *np) |
| 4374 | { |
| 4375 | u_char num = INB(np, nc_dsps); |
| 4376 | u32 dsa = INL(np, nc_dsa); |
| 4377 | struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); |
| 4378 | u_char target = INB(np, nc_sdid) & 0x0f; |
| 4379 | struct sym_tcb *tp = &np->target[target]; |
| 4380 | int tmp; |
| 4381 | |
| 4382 | if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num); |
| 4383 | |
| 4384 | switch (num) { |
| 4385 | #if SYM_CONF_DMA_ADDRESSING_MODE == 2 |
| 4386 | /* |
| 4387 | * SCRIPTS tell us that we may have to update |
| 4388 | * 64 bit DMA segment registers. |
| 4389 | */ |
| 4390 | case SIR_DMAP_DIRTY: |
| 4391 | sym_update_dmap_regs(np); |
| 4392 | goto out; |
| 4393 | #endif |
| 4394 | /* |
| 4395 | * Command has been completed with error condition |
| 4396 | * or has been auto-sensed. |
| 4397 | */ |
| 4398 | case SIR_COMPLETE_ERROR: |
| 4399 | sym_complete_error(np, cp); |
| 4400 | return; |
| 4401 | /* |
| 4402 | * The C code is currently trying to recover from something. |
| 4403 | * Typically, user want to abort some command. |
| 4404 | */ |
| 4405 | case SIR_SCRIPT_STOPPED: |
| 4406 | case SIR_TARGET_SELECTED: |
| 4407 | case SIR_ABORT_SENT: |
| 4408 | sym_sir_task_recovery(np, num); |
| 4409 | return; |
| 4410 | /* |
| 4411 | * The device didn't go to MSG OUT phase after having |
| 4412 | * been selected with ATN. We donnot want to handle |
| 4413 | * that. |
| 4414 | */ |
| 4415 | case SIR_SEL_ATN_NO_MSG_OUT: |
| 4416 | printf ("%s:%d: No MSG OUT phase after selection with ATN.\n", |
| 4417 | sym_name (np), target); |
| 4418 | goto out_stuck; |
| 4419 | /* |
| 4420 | * The device didn't switch to MSG IN phase after |
| 4421 | * having reseleted the initiator. |
| 4422 | */ |
| 4423 | case SIR_RESEL_NO_MSG_IN: |
| 4424 | printf ("%s:%d: No MSG IN phase after reselection.\n", |
| 4425 | sym_name (np), target); |
| 4426 | goto out_stuck; |
| 4427 | /* |
| 4428 | * After reselection, the device sent a message that wasn't |
| 4429 | * an IDENTIFY. |
| 4430 | */ |
| 4431 | case SIR_RESEL_NO_IDENTIFY: |
| 4432 | printf ("%s:%d: No IDENTIFY after reselection.\n", |
| 4433 | sym_name (np), target); |
| 4434 | goto out_stuck; |
| 4435 | /* |
| 4436 | * The device reselected a LUN we donnot know about. |
| 4437 | */ |
| 4438 | case SIR_RESEL_BAD_LUN: |
| 4439 | np->msgout[0] = M_RESET; |
| 4440 | goto out; |
| 4441 | /* |
| 4442 | * The device reselected for an untagged nexus and we |
| 4443 | * haven't any. |
| 4444 | */ |
| 4445 | case SIR_RESEL_BAD_I_T_L: |
| 4446 | np->msgout[0] = M_ABORT; |
| 4447 | goto out; |
| 4448 | /* |
| 4449 | * The device reselected for a tagged nexus that we donnot |
| 4450 | * have. |
| 4451 | */ |
| 4452 | case SIR_RESEL_BAD_I_T_L_Q: |
| 4453 | np->msgout[0] = M_ABORT_TAG; |
| 4454 | goto out; |
| 4455 | /* |
| 4456 | * The SCRIPTS let us know that the device has grabbed |
| 4457 | * our message and will abort the job. |
| 4458 | */ |
| 4459 | case SIR_RESEL_ABORTED: |
| 4460 | np->lastmsg = np->msgout[0]; |
| 4461 | np->msgout[0] = M_NOOP; |
| 4462 | printf ("%s:%d: message %x sent on bad reselection.\n", |
| 4463 | sym_name (np), target, np->lastmsg); |
| 4464 | goto out; |
| 4465 | /* |
| 4466 | * The SCRIPTS let us know that a message has been |
| 4467 | * successfully sent to the device. |
| 4468 | */ |
| 4469 | case SIR_MSG_OUT_DONE: |
| 4470 | np->lastmsg = np->msgout[0]; |
| 4471 | np->msgout[0] = M_NOOP; |
| 4472 | /* Should we really care of that */ |
| 4473 | if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) { |
| 4474 | if (cp) { |
| 4475 | cp->xerr_status &= ~XE_PARITY_ERR; |
| 4476 | if (!cp->xerr_status) |
| 4477 | OUTOFFB(np, HF_PRT, HF_EXT_ERR); |
| 4478 | } |
| 4479 | } |
| 4480 | goto out; |
| 4481 | /* |
| 4482 | * The device didn't send a GOOD SCSI status. |
| 4483 | * We may have some work to do prior to allow |
| 4484 | * the SCRIPTS processor to continue. |
| 4485 | */ |
| 4486 | case SIR_BAD_SCSI_STATUS: |
| 4487 | if (!cp) |
| 4488 | goto out; |
| 4489 | sym_sir_bad_scsi_status(np, num, cp); |
| 4490 | return; |
| 4491 | /* |
| 4492 | * We are asked by the SCRIPTS to prepare a |
| 4493 | * REJECT message. |
| 4494 | */ |
| 4495 | case SIR_REJECT_TO_SEND: |
| 4496 | sym_print_msg(cp, "M_REJECT to send for ", np->msgin); |
| 4497 | np->msgout[0] = M_REJECT; |
| 4498 | goto out; |
| 4499 | /* |
| 4500 | * We have been ODD at the end of a DATA IN |
| 4501 | * transfer and the device didn't send a |
| 4502 | * IGNORE WIDE RESIDUE message. |
| 4503 | * It is a data overrun condition. |
| 4504 | */ |
| 4505 | case SIR_SWIDE_OVERRUN: |
| 4506 | if (cp) { |
| 4507 | OUTONB(np, HF_PRT, HF_EXT_ERR); |
| 4508 | cp->xerr_status |= XE_SWIDE_OVRUN; |
| 4509 | } |
| 4510 | goto out; |
| 4511 | /* |
| 4512 | * We have been ODD at the end of a DATA OUT |
| 4513 | * transfer. |
| 4514 | * It is a data underrun condition. |
| 4515 | */ |
| 4516 | case SIR_SODL_UNDERRUN: |
| 4517 | if (cp) { |
| 4518 | OUTONB(np, HF_PRT, HF_EXT_ERR); |
| 4519 | cp->xerr_status |= XE_SODL_UNRUN; |
| 4520 | } |
| 4521 | goto out; |
| 4522 | /* |
| 4523 | * The device wants us to tranfer more data than |
| 4524 | * expected or in the wrong direction. |
| 4525 | * The number of extra bytes is in scratcha. |
| 4526 | * It is a data overrun condition. |
| 4527 | */ |
| 4528 | case SIR_DATA_OVERRUN: |
| 4529 | if (cp) { |
| 4530 | OUTONB(np, HF_PRT, HF_EXT_ERR); |
| 4531 | cp->xerr_status |= XE_EXTRA_DATA; |
| 4532 | cp->extra_bytes += INL(np, nc_scratcha); |
| 4533 | } |
| 4534 | goto out; |
| 4535 | /* |
| 4536 | * The device switched to an illegal phase (4/5). |
| 4537 | */ |
| 4538 | case SIR_BAD_PHASE: |
| 4539 | if (cp) { |
| 4540 | OUTONB(np, HF_PRT, HF_EXT_ERR); |
| 4541 | cp->xerr_status |= XE_BAD_PHASE; |
| 4542 | } |
| 4543 | goto out; |
| 4544 | /* |
| 4545 | * We received a message. |
| 4546 | */ |
| 4547 | case SIR_MSG_RECEIVED: |
| 4548 | if (!cp) |
| 4549 | goto out_stuck; |
| 4550 | switch (np->msgin [0]) { |
| 4551 | /* |
| 4552 | * We received an extended message. |
| 4553 | * We handle MODIFY DATA POINTER, SDTR, WDTR |
| 4554 | * and reject all other extended messages. |
| 4555 | */ |
| 4556 | case M_EXTENDED: |
| 4557 | switch (np->msgin [2]) { |
| 4558 | case M_X_MODIFY_DP: |
| 4559 | if (DEBUG_FLAGS & DEBUG_POINTER) |
| 4560 | sym_print_msg(cp,"modify DP",np->msgin); |
| 4561 | tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) + |
| 4562 | (np->msgin[5]<<8) + (np->msgin[6]); |
| 4563 | sym_modify_dp(np, tp, cp, tmp); |
| 4564 | return; |
| 4565 | case M_X_SYNC_REQ: |
| 4566 | sym_sync_nego(np, tp, cp); |
| 4567 | return; |
| 4568 | case M_X_PPR_REQ: |
| 4569 | sym_ppr_nego(np, tp, cp); |
| 4570 | return; |
| 4571 | case M_X_WIDE_REQ: |
| 4572 | sym_wide_nego(np, tp, cp); |
| 4573 | return; |
| 4574 | default: |
| 4575 | goto out_reject; |
| 4576 | } |
| 4577 | break; |
| 4578 | /* |
| 4579 | * We received a 1/2 byte message not handled from SCRIPTS. |
| 4580 | * We are only expecting MESSAGE REJECT and IGNORE WIDE |
| 4581 | * RESIDUE messages that haven't been anticipated by |
| 4582 | * SCRIPTS on SWIDE full condition. Unanticipated IGNORE |
| 4583 | * WIDE RESIDUE messages are aliased as MODIFY DP (-1). |
| 4584 | */ |
| 4585 | case M_IGN_RESIDUE: |
| 4586 | if (DEBUG_FLAGS & DEBUG_POINTER) |
| 4587 | sym_print_msg(cp,"ign wide residue", np->msgin); |
| 4588 | if (cp->host_flags & HF_SENSE) |
| 4589 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 4590 | else |
| 4591 | sym_modify_dp(np, tp, cp, -1); |
| 4592 | return; |
| 4593 | case M_REJECT: |
| 4594 | if (INB(np, HS_PRT) == HS_NEGOTIATE) |
| 4595 | sym_nego_rejected(np, tp, cp); |
| 4596 | else { |
| 4597 | sym_print_addr(cp->cmd, |
| 4598 | "M_REJECT received (%x:%x).\n", |
| 4599 | scr_to_cpu(np->lastmsg), np->msgout[0]); |
| 4600 | } |
| 4601 | goto out_clrack; |
| 4602 | break; |
| 4603 | default: |
| 4604 | goto out_reject; |
| 4605 | } |
| 4606 | break; |
| 4607 | /* |
| 4608 | * We received an unknown message. |
| 4609 | * Ignore all MSG IN phases and reject it. |
| 4610 | */ |
| 4611 | case SIR_MSG_WEIRD: |
| 4612 | sym_print_msg(cp, "WEIRD message received", np->msgin); |
| 4613 | OUTL_DSP(np, SCRIPTB_BA(np, msg_weird)); |
| 4614 | return; |
| 4615 | /* |
| 4616 | * Negotiation failed. |
| 4617 | * Target does not send us the reply. |
| 4618 | * Remove the HS_NEGOTIATE status. |
| 4619 | */ |
| 4620 | case SIR_NEGO_FAILED: |
| 4621 | OUTB(np, HS_PRT, HS_BUSY); |
| 4622 | /* |
| 4623 | * Negotiation failed. |
| 4624 | * Target does not want answer message. |
| 4625 | */ |
| 4626 | case SIR_NEGO_PROTO: |
| 4627 | sym_nego_default(np, tp, cp); |
| 4628 | goto out; |
| 4629 | } |
| 4630 | |
| 4631 | out: |
| 4632 | OUTONB_STD(); |
| 4633 | return; |
| 4634 | out_reject: |
| 4635 | OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); |
| 4636 | return; |
| 4637 | out_clrack: |
| 4638 | OUTL_DSP(np, SCRIPTA_BA(np, clrack)); |
| 4639 | return; |
| 4640 | out_stuck: |
| 4641 | return; |
| 4642 | } |
| 4643 | |
| 4644 | /* |
| 4645 | * Acquire a control block |
| 4646 | */ |
| 4647 | struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order) |
| 4648 | { |
| 4649 | u_char tn = cmd->device->id; |
| 4650 | u_char ln = cmd->device->lun; |
| 4651 | struct sym_tcb *tp = &np->target[tn]; |
| 4652 | struct sym_lcb *lp = sym_lp(tp, ln); |
| 4653 | u_short tag = NO_TAG; |
| 4654 | SYM_QUEHEAD *qp; |
| 4655 | struct sym_ccb *cp = NULL; |
| 4656 | |
| 4657 | /* |
| 4658 | * Look for a free CCB |
| 4659 | */ |
| 4660 | if (sym_que_empty(&np->free_ccbq)) |
| 4661 | sym_alloc_ccb(np); |
| 4662 | qp = sym_remque_head(&np->free_ccbq); |
| 4663 | if (!qp) |
| 4664 | goto out; |
| 4665 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 4666 | |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 4667 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4668 | /* |
| 4669 | * If we have been asked for a tagged command. |
| 4670 | */ |
| 4671 | if (tag_order) { |
| 4672 | /* |
| 4673 | * Debugging purpose. |
| 4674 | */ |
| 4675 | #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4676 | assert(lp->busy_itl == 0); |
| 4677 | #endif |
| 4678 | /* |
| 4679 | * Allocate resources for tags if not yet. |
| 4680 | */ |
| 4681 | if (!lp->cb_tags) { |
| 4682 | sym_alloc_lcb_tags(np, tn, ln); |
| 4683 | if (!lp->cb_tags) |
| 4684 | goto out_free; |
| 4685 | } |
| 4686 | /* |
| 4687 | * Get a tag for this SCSI IO and set up |
| 4688 | * the CCB bus address for reselection, |
| 4689 | * and count it for this LUN. |
| 4690 | * Toggle reselect path to tagged. |
| 4691 | */ |
| 4692 | if (lp->busy_itlq < SYM_CONF_MAX_TASK) { |
| 4693 | tag = lp->cb_tags[lp->ia_tag]; |
| 4694 | if (++lp->ia_tag == SYM_CONF_MAX_TASK) |
| 4695 | lp->ia_tag = 0; |
| 4696 | ++lp->busy_itlq; |
| 4697 | #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4698 | lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba); |
| 4699 | lp->head.resel_sa = |
| 4700 | cpu_to_scr(SCRIPTA_BA(np, resel_tag)); |
| 4701 | #endif |
| 4702 | #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING |
| 4703 | cp->tags_si = lp->tags_si; |
| 4704 | ++lp->tags_sum[cp->tags_si]; |
| 4705 | ++lp->tags_since; |
| 4706 | #endif |
| 4707 | } |
| 4708 | else |
| 4709 | goto out_free; |
| 4710 | } |
| 4711 | /* |
| 4712 | * This command will not be tagged. |
| 4713 | * If we already have either a tagged or untagged |
| 4714 | * one, refuse to overlap this untagged one. |
| 4715 | */ |
| 4716 | else { |
| 4717 | /* |
| 4718 | * Debugging purpose. |
| 4719 | */ |
| 4720 | #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4721 | assert(lp->busy_itl == 0 && lp->busy_itlq == 0); |
| 4722 | #endif |
| 4723 | /* |
| 4724 | * Count this nexus for this LUN. |
| 4725 | * Set up the CCB bus address for reselection. |
| 4726 | * Toggle reselect path to untagged. |
| 4727 | */ |
| 4728 | ++lp->busy_itl; |
| 4729 | #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4730 | if (lp->busy_itl == 1) { |
| 4731 | lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba); |
| 4732 | lp->head.resel_sa = |
| 4733 | cpu_to_scr(SCRIPTA_BA(np, resel_no_tag)); |
| 4734 | } |
| 4735 | else |
| 4736 | goto out_free; |
| 4737 | #endif |
| 4738 | } |
| 4739 | } |
| 4740 | /* |
| 4741 | * Put the CCB into the busy queue. |
| 4742 | */ |
| 4743 | sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); |
| 4744 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4745 | if (lp) { |
| 4746 | sym_remque(&cp->link2_ccbq); |
| 4747 | sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq); |
| 4748 | } |
| 4749 | |
| 4750 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4751 | cp->to_abort = 0; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 4752 | cp->odd_byte_adjustment = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4753 | cp->tag = tag; |
| 4754 | cp->order = tag_order; |
| 4755 | cp->target = tn; |
| 4756 | cp->lun = ln; |
| 4757 | |
| 4758 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
| 4759 | sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag); |
| 4760 | } |
| 4761 | |
| 4762 | out: |
| 4763 | return cp; |
| 4764 | out_free: |
| 4765 | sym_insque_head(&cp->link_ccbq, &np->free_ccbq); |
| 4766 | return NULL; |
| 4767 | } |
| 4768 | |
| 4769 | /* |
| 4770 | * Release one control block |
| 4771 | */ |
| 4772 | void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp) |
| 4773 | { |
| 4774 | struct sym_tcb *tp = &np->target[cp->target]; |
| 4775 | struct sym_lcb *lp = sym_lp(tp, cp->lun); |
| 4776 | |
| 4777 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
| 4778 | sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n", |
| 4779 | cp, cp->tag); |
| 4780 | } |
| 4781 | |
| 4782 | /* |
| 4783 | * If LCB available, |
| 4784 | */ |
| 4785 | if (lp) { |
| 4786 | /* |
| 4787 | * If tagged, release the tag, set the relect path |
| 4788 | */ |
| 4789 | if (cp->tag != NO_TAG) { |
| 4790 | #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING |
| 4791 | --lp->tags_sum[cp->tags_si]; |
| 4792 | #endif |
| 4793 | /* |
| 4794 | * Free the tag value. |
| 4795 | */ |
| 4796 | lp->cb_tags[lp->if_tag] = cp->tag; |
| 4797 | if (++lp->if_tag == SYM_CONF_MAX_TASK) |
| 4798 | lp->if_tag = 0; |
| 4799 | /* |
| 4800 | * Make the reselect path invalid, |
| 4801 | * and uncount this CCB. |
| 4802 | */ |
| 4803 | lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba); |
| 4804 | --lp->busy_itlq; |
| 4805 | } else { /* Untagged */ |
| 4806 | /* |
| 4807 | * Make the reselect path invalid, |
| 4808 | * and uncount this CCB. |
| 4809 | */ |
| 4810 | lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba); |
| 4811 | --lp->busy_itl; |
| 4812 | } |
| 4813 | /* |
| 4814 | * If no JOB active, make the LUN reselect path invalid. |
| 4815 | */ |
| 4816 | if (lp->busy_itlq == 0 && lp->busy_itl == 0) |
| 4817 | lp->head.resel_sa = |
| 4818 | cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); |
| 4819 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4820 | |
| 4821 | /* |
| 4822 | * We donnot queue more than 1 ccb per target |
| 4823 | * with negotiation at any time. If this ccb was |
| 4824 | * used for negotiation, clear this info in the tcb. |
| 4825 | */ |
| 4826 | if (cp == tp->nego_cp) |
| 4827 | tp->nego_cp = NULL; |
| 4828 | |
| 4829 | #ifdef SYM_CONF_IARB_SUPPORT |
| 4830 | /* |
| 4831 | * If we just complete the last queued CCB, |
| 4832 | * clear this info that is no longer relevant. |
| 4833 | */ |
| 4834 | if (cp == np->last_cp) |
| 4835 | np->last_cp = 0; |
| 4836 | #endif |
| 4837 | |
| 4838 | /* |
| 4839 | * Make this CCB available. |
| 4840 | */ |
| 4841 | cp->cmd = NULL; |
| 4842 | cp->host_status = HS_IDLE; |
| 4843 | sym_remque(&cp->link_ccbq); |
| 4844 | sym_insque_head(&cp->link_ccbq, &np->free_ccbq); |
| 4845 | |
| 4846 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4847 | if (lp) { |
| 4848 | sym_remque(&cp->link2_ccbq); |
| 4849 | sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq); |
| 4850 | if (cp->started) { |
| 4851 | if (cp->tag != NO_TAG) |
| 4852 | --lp->started_tags; |
| 4853 | else |
| 4854 | --lp->started_no_tag; |
| 4855 | } |
| 4856 | } |
| 4857 | cp->started = 0; |
| 4858 | #endif |
| 4859 | } |
| 4860 | |
| 4861 | /* |
| 4862 | * Allocate a CCB from memory and initialize its fixed part. |
| 4863 | */ |
| 4864 | static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np) |
| 4865 | { |
| 4866 | struct sym_ccb *cp = NULL; |
| 4867 | int hcode; |
| 4868 | |
| 4869 | /* |
| 4870 | * Prevent from allocating more CCBs than we can |
| 4871 | * queue to the controller. |
| 4872 | */ |
| 4873 | if (np->actccbs >= SYM_CONF_MAX_START) |
| 4874 | return NULL; |
| 4875 | |
| 4876 | /* |
| 4877 | * Allocate memory for this CCB. |
| 4878 | */ |
| 4879 | cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB"); |
| 4880 | if (!cp) |
| 4881 | goto out_free; |
| 4882 | |
| 4883 | /* |
| 4884 | * Count it. |
| 4885 | */ |
| 4886 | np->actccbs++; |
| 4887 | |
| 4888 | /* |
| 4889 | * Compute the bus address of this ccb. |
| 4890 | */ |
| 4891 | cp->ccb_ba = vtobus(cp); |
| 4892 | |
| 4893 | /* |
| 4894 | * Insert this ccb into the hashed list. |
| 4895 | */ |
| 4896 | hcode = CCB_HASH_CODE(cp->ccb_ba); |
| 4897 | cp->link_ccbh = np->ccbh[hcode]; |
| 4898 | np->ccbh[hcode] = cp; |
| 4899 | |
| 4900 | /* |
| 4901 | * Initialyze the start and restart actions. |
| 4902 | */ |
| 4903 | cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle)); |
| 4904 | cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); |
| 4905 | |
| 4906 | /* |
| 4907 | * Initilialyze some other fields. |
| 4908 | */ |
| 4909 | cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2])); |
| 4910 | |
| 4911 | /* |
| 4912 | * Chain into free ccb queue. |
| 4913 | */ |
| 4914 | sym_insque_head(&cp->link_ccbq, &np->free_ccbq); |
| 4915 | |
| 4916 | /* |
| 4917 | * Chain into optionnal lists. |
| 4918 | */ |
| 4919 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 4920 | sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq); |
| 4921 | #endif |
| 4922 | return cp; |
| 4923 | out_free: |
| 4924 | if (cp) |
| 4925 | sym_mfree_dma(cp, sizeof(*cp), "CCB"); |
| 4926 | return NULL; |
| 4927 | } |
| 4928 | |
| 4929 | /* |
| 4930 | * Look up a CCB from a DSA value. |
| 4931 | */ |
| 4932 | static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa) |
| 4933 | { |
| 4934 | int hcode; |
| 4935 | struct sym_ccb *cp; |
| 4936 | |
| 4937 | hcode = CCB_HASH_CODE(dsa); |
| 4938 | cp = np->ccbh[hcode]; |
| 4939 | while (cp) { |
| 4940 | if (cp->ccb_ba == dsa) |
| 4941 | break; |
| 4942 | cp = cp->link_ccbh; |
| 4943 | } |
| 4944 | |
| 4945 | return cp; |
| 4946 | } |
| 4947 | |
| 4948 | /* |
| 4949 | * Target control block initialisation. |
| 4950 | * Nothing important to do at the moment. |
| 4951 | */ |
| 4952 | static void sym_init_tcb (struct sym_hcb *np, u_char tn) |
| 4953 | { |
| 4954 | #if 0 /* Hmmm... this checking looks paranoid. */ |
| 4955 | /* |
| 4956 | * Check some alignments required by the chip. |
| 4957 | */ |
| 4958 | assert (((offsetof(struct sym_reg, nc_sxfer) ^ |
| 4959 | offsetof(struct sym_tcb, head.sval)) &3) == 0); |
| 4960 | assert (((offsetof(struct sym_reg, nc_scntl3) ^ |
| 4961 | offsetof(struct sym_tcb, head.wval)) &3) == 0); |
| 4962 | #endif |
| 4963 | } |
| 4964 | |
| 4965 | /* |
| 4966 | * Lun control block allocation and initialization. |
| 4967 | */ |
| 4968 | struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln) |
| 4969 | { |
| 4970 | struct sym_tcb *tp = &np->target[tn]; |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 4971 | struct sym_lcb *lp = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4972 | |
| 4973 | /* |
| 4974 | * Initialize the target control block if not yet. |
| 4975 | */ |
| 4976 | sym_init_tcb (np, tn); |
| 4977 | |
| 4978 | /* |
| 4979 | * Allocate the LCB bus address array. |
| 4980 | * Compute the bus address of this table. |
| 4981 | */ |
| 4982 | if (ln && !tp->luntbl) { |
| 4983 | int i; |
| 4984 | |
| 4985 | tp->luntbl = sym_calloc_dma(256, "LUNTBL"); |
| 4986 | if (!tp->luntbl) |
| 4987 | goto fail; |
| 4988 | for (i = 0 ; i < 64 ; i++) |
| 4989 | tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa)); |
| 4990 | tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl)); |
| 4991 | } |
| 4992 | |
| 4993 | /* |
| 4994 | * Allocate the table of pointers for LUN(s) > 0, if needed. |
| 4995 | */ |
| 4996 | if (ln && !tp->lunmp) { |
| 4997 | tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *), |
| 4998 | GFP_KERNEL); |
| 4999 | if (!tp->lunmp) |
| 5000 | goto fail; |
| 5001 | } |
| 5002 | |
| 5003 | /* |
| 5004 | * Allocate the lcb. |
| 5005 | * Make it available to the chip. |
| 5006 | */ |
| 5007 | lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB"); |
| 5008 | if (!lp) |
| 5009 | goto fail; |
| 5010 | if (ln) { |
| 5011 | tp->lunmp[ln] = lp; |
| 5012 | tp->luntbl[ln] = cpu_to_scr(vtobus(lp)); |
| 5013 | } |
| 5014 | else { |
| 5015 | tp->lun0p = lp; |
| 5016 | tp->head.lun0_sa = cpu_to_scr(vtobus(lp)); |
| 5017 | } |
| 5018 | |
| 5019 | /* |
| 5020 | * Let the itl task point to error handling. |
| 5021 | */ |
| 5022 | lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba); |
| 5023 | |
| 5024 | /* |
| 5025 | * Set the reselect pattern to our default. :) |
| 5026 | */ |
| 5027 | lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); |
| 5028 | |
| 5029 | /* |
| 5030 | * Set user capabilities. |
| 5031 | */ |
| 5032 | lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED); |
| 5033 | |
| 5034 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5035 | /* |
| 5036 | * Initialize device queueing. |
| 5037 | */ |
| 5038 | sym_que_init(&lp->waiting_ccbq); |
| 5039 | sym_que_init(&lp->started_ccbq); |
| 5040 | lp->started_max = SYM_CONF_MAX_TASK; |
| 5041 | lp->started_limit = SYM_CONF_MAX_TASK; |
| 5042 | #endif |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 5043 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5044 | fail: |
| 5045 | return lp; |
| 5046 | } |
| 5047 | |
| 5048 | /* |
| 5049 | * Allocate LCB resources for tagged command queuing. |
| 5050 | */ |
| 5051 | static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln) |
| 5052 | { |
| 5053 | struct sym_tcb *tp = &np->target[tn]; |
| 5054 | struct sym_lcb *lp = sym_lp(tp, ln); |
| 5055 | int i; |
| 5056 | |
| 5057 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5058 | * Allocate the task table and and the tag allocation |
| 5059 | * circular buffer. We want both or none. |
| 5060 | */ |
| 5061 | lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL"); |
| 5062 | if (!lp->itlq_tbl) |
| 5063 | goto fail; |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 5064 | lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5065 | if (!lp->cb_tags) { |
| 5066 | sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL"); |
| 5067 | lp->itlq_tbl = NULL; |
| 5068 | goto fail; |
| 5069 | } |
| 5070 | |
| 5071 | /* |
| 5072 | * Initialize the task table with invalid entries. |
| 5073 | */ |
| 5074 | for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++) |
| 5075 | lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba); |
| 5076 | |
| 5077 | /* |
| 5078 | * Fill up the tag buffer with tag numbers. |
| 5079 | */ |
| 5080 | for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++) |
| 5081 | lp->cb_tags[i] = i; |
| 5082 | |
| 5083 | /* |
| 5084 | * Make the task table available to SCRIPTS, |
| 5085 | * And accept tagged commands now. |
| 5086 | */ |
| 5087 | lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl)); |
| 5088 | |
| 5089 | return; |
| 5090 | fail: |
| 5091 | return; |
| 5092 | } |
| 5093 | |
| 5094 | /* |
| 5095 | * Queue a SCSI IO to the controller. |
| 5096 | */ |
| 5097 | int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp) |
| 5098 | { |
| 5099 | struct scsi_device *sdev = cmd->device; |
| 5100 | struct sym_tcb *tp; |
| 5101 | struct sym_lcb *lp; |
| 5102 | u_char *msgptr; |
| 5103 | u_int msglen; |
| 5104 | int can_disconnect; |
| 5105 | |
| 5106 | /* |
| 5107 | * Keep track of the IO in our CCB. |
| 5108 | */ |
| 5109 | cp->cmd = cmd; |
| 5110 | |
| 5111 | /* |
| 5112 | * Retrieve the target descriptor. |
| 5113 | */ |
| 5114 | tp = &np->target[cp->target]; |
| 5115 | |
| 5116 | /* |
| 5117 | * Retrieve the lun descriptor. |
| 5118 | */ |
| 5119 | lp = sym_lp(tp, sdev->lun); |
| 5120 | |
| 5121 | can_disconnect = (cp->tag != NO_TAG) || |
| 5122 | (lp && (lp->curr_flags & SYM_DISC_ENABLED)); |
| 5123 | |
| 5124 | msgptr = cp->scsi_smsg; |
| 5125 | msglen = 0; |
| 5126 | msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun); |
| 5127 | |
| 5128 | /* |
| 5129 | * Build the tag message if present. |
| 5130 | */ |
| 5131 | if (cp->tag != NO_TAG) { |
| 5132 | u_char order = cp->order; |
| 5133 | |
| 5134 | switch(order) { |
| 5135 | case M_ORDERED_TAG: |
| 5136 | break; |
| 5137 | case M_HEAD_TAG: |
| 5138 | break; |
| 5139 | default: |
| 5140 | order = M_SIMPLE_TAG; |
| 5141 | } |
| 5142 | #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING |
| 5143 | /* |
| 5144 | * Avoid too much reordering of SCSI commands. |
| 5145 | * The algorithm tries to prevent completion of any |
| 5146 | * tagged command from being delayed against more |
| 5147 | * than 3 times the max number of queued commands. |
| 5148 | */ |
| 5149 | if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) { |
| 5150 | lp->tags_si = !(lp->tags_si); |
| 5151 | if (lp->tags_sum[lp->tags_si]) { |
| 5152 | order = M_ORDERED_TAG; |
| 5153 | if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) { |
| 5154 | sym_print_addr(cmd, |
| 5155 | "ordered tag forced.\n"); |
| 5156 | } |
| 5157 | } |
| 5158 | lp->tags_since = 0; |
| 5159 | } |
| 5160 | #endif |
| 5161 | msgptr[msglen++] = order; |
| 5162 | |
| 5163 | /* |
| 5164 | * For less than 128 tags, actual tags are numbered |
| 5165 | * 1,3,5,..2*MAXTAGS+1,since we may have to deal |
| 5166 | * with devices that have problems with #TAG 0 or too |
| 5167 | * great #TAG numbers. For more tags (up to 256), |
| 5168 | * we use directly our tag number. |
| 5169 | */ |
| 5170 | #if SYM_CONF_MAX_TASK > (512/4) |
| 5171 | msgptr[msglen++] = cp->tag; |
| 5172 | #else |
| 5173 | msgptr[msglen++] = (cp->tag << 1) + 1; |
| 5174 | #endif |
| 5175 | } |
| 5176 | |
| 5177 | /* |
| 5178 | * Build a negotiation message if needed. |
| 5179 | * (nego_status is filled by sym_prepare_nego()) |
| 5180 | */ |
| 5181 | cp->nego_status = 0; |
| 5182 | if (tp->tgoal.check_nego && !tp->nego_cp && lp) { |
| 5183 | msglen += sym_prepare_nego(np, cp, msgptr + msglen); |
| 5184 | } |
| 5185 | |
| 5186 | /* |
| 5187 | * Startqueue |
| 5188 | */ |
| 5189 | cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select)); |
| 5190 | cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa)); |
| 5191 | |
| 5192 | /* |
| 5193 | * select |
| 5194 | */ |
| 5195 | cp->phys.select.sel_id = cp->target; |
| 5196 | cp->phys.select.sel_scntl3 = tp->head.wval; |
| 5197 | cp->phys.select.sel_sxfer = tp->head.sval; |
| 5198 | cp->phys.select.sel_scntl4 = tp->head.uval; |
| 5199 | |
| 5200 | /* |
| 5201 | * message |
| 5202 | */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 5203 | cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5204 | cp->phys.smsg.size = cpu_to_scr(msglen); |
| 5205 | |
| 5206 | /* |
| 5207 | * status |
| 5208 | */ |
| 5209 | cp->host_xflags = 0; |
| 5210 | cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; |
| 5211 | cp->ssss_status = S_ILLEGAL; |
| 5212 | cp->xerr_status = 0; |
| 5213 | cp->host_flags = 0; |
| 5214 | cp->extra_bytes = 0; |
| 5215 | |
| 5216 | /* |
| 5217 | * extreme data pointer. |
| 5218 | * shall be positive, so -1 is lower than lowest.:) |
| 5219 | */ |
| 5220 | cp->ext_sg = -1; |
| 5221 | cp->ext_ofs = 0; |
| 5222 | |
| 5223 | /* |
| 5224 | * Build the CDB and DATA descriptor block |
| 5225 | * and start the IO. |
| 5226 | */ |
| 5227 | return sym_setup_data_and_start(np, cmd, cp); |
| 5228 | } |
| 5229 | |
| 5230 | /* |
| 5231 | * Reset a SCSI target (all LUNs of this target). |
| 5232 | */ |
| 5233 | int sym_reset_scsi_target(struct sym_hcb *np, int target) |
| 5234 | { |
| 5235 | struct sym_tcb *tp; |
| 5236 | |
| 5237 | if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET) |
| 5238 | return -1; |
| 5239 | |
| 5240 | tp = &np->target[target]; |
| 5241 | tp->to_reset = 1; |
| 5242 | |
| 5243 | np->istat_sem = SEM; |
| 5244 | OUTB(np, nc_istat, SIGP|SEM); |
| 5245 | |
| 5246 | return 0; |
| 5247 | } |
| 5248 | |
| 5249 | /* |
| 5250 | * Abort a SCSI IO. |
| 5251 | */ |
| 5252 | static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out) |
| 5253 | { |
| 5254 | /* |
| 5255 | * Check that the IO is active. |
| 5256 | */ |
| 5257 | if (!cp || !cp->host_status || cp->host_status == HS_WAIT) |
| 5258 | return -1; |
| 5259 | |
| 5260 | /* |
| 5261 | * If a previous abort didn't succeed in time, |
| 5262 | * perform a BUS reset. |
| 5263 | */ |
| 5264 | if (cp->to_abort) { |
| 5265 | sym_reset_scsi_bus(np, 1); |
| 5266 | return 0; |
| 5267 | } |
| 5268 | |
| 5269 | /* |
| 5270 | * Mark the CCB for abort and allow time for. |
| 5271 | */ |
| 5272 | cp->to_abort = timed_out ? 2 : 1; |
| 5273 | |
| 5274 | /* |
| 5275 | * Tell the SCRIPTS processor to stop and synchronize with us. |
| 5276 | */ |
| 5277 | np->istat_sem = SEM; |
| 5278 | OUTB(np, nc_istat, SIGP|SEM); |
| 5279 | return 0; |
| 5280 | } |
| 5281 | |
| 5282 | int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out) |
| 5283 | { |
| 5284 | struct sym_ccb *cp; |
| 5285 | SYM_QUEHEAD *qp; |
| 5286 | |
| 5287 | /* |
| 5288 | * Look up our CCB control block. |
| 5289 | */ |
| 5290 | cp = NULL; |
| 5291 | FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { |
| 5292 | struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 5293 | if (cp2->cmd == cmd) { |
| 5294 | cp = cp2; |
| 5295 | break; |
| 5296 | } |
| 5297 | } |
| 5298 | |
| 5299 | return sym_abort_ccb(np, cp, timed_out); |
| 5300 | } |
| 5301 | |
| 5302 | /* |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 5303 | * Complete execution of a SCSI command with extended |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5304 | * error, SCSI status error, or having been auto-sensed. |
| 5305 | * |
| 5306 | * The SCRIPTS processor is not running there, so we |
| 5307 | * can safely access IO registers and remove JOBs from |
| 5308 | * the START queue. |
| 5309 | * SCRATCHA is assumed to have been loaded with STARTPOS |
| 5310 | * before the SCRIPTS called the C code. |
| 5311 | */ |
| 5312 | void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp) |
| 5313 | { |
| 5314 | struct scsi_device *sdev; |
| 5315 | struct scsi_cmnd *cmd; |
| 5316 | struct sym_tcb *tp; |
| 5317 | struct sym_lcb *lp; |
| 5318 | int resid; |
| 5319 | int i; |
| 5320 | |
| 5321 | /* |
| 5322 | * Paranoid check. :) |
| 5323 | */ |
| 5324 | if (!cp || !cp->cmd) |
| 5325 | return; |
| 5326 | |
| 5327 | cmd = cp->cmd; |
| 5328 | sdev = cmd->device; |
| 5329 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) { |
| 5330 | dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp, |
| 5331 | cp->host_status, cp->ssss_status, cp->host_flags); |
| 5332 | } |
| 5333 | |
| 5334 | /* |
| 5335 | * Get target and lun pointers. |
| 5336 | */ |
| 5337 | tp = &np->target[cp->target]; |
| 5338 | lp = sym_lp(tp, sdev->lun); |
| 5339 | |
| 5340 | /* |
| 5341 | * Check for extended errors. |
| 5342 | */ |
| 5343 | if (cp->xerr_status) { |
| 5344 | if (sym_verbose) |
| 5345 | sym_print_xerr(cmd, cp->xerr_status); |
| 5346 | if (cp->host_status == HS_COMPLETE) |
| 5347 | cp->host_status = HS_COMP_ERR; |
| 5348 | } |
| 5349 | |
| 5350 | /* |
| 5351 | * Calculate the residual. |
| 5352 | */ |
| 5353 | resid = sym_compute_residual(np, cp); |
| 5354 | |
| 5355 | if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */ |
| 5356 | resid = 0; /* throw them away. :) */ |
| 5357 | cp->sv_resid = 0; |
| 5358 | } |
| 5359 | #ifdef DEBUG_2_0_X |
| 5360 | if (resid) |
| 5361 | printf("XXXX RESID= %d - 0x%x\n", resid, resid); |
| 5362 | #endif |
| 5363 | |
| 5364 | /* |
| 5365 | * Dequeue all queued CCBs for that device |
| 5366 | * not yet started by SCRIPTS. |
| 5367 | */ |
| 5368 | i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; |
| 5369 | i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1); |
| 5370 | |
| 5371 | /* |
| 5372 | * Restart the SCRIPTS processor. |
| 5373 | */ |
| 5374 | OUTL_DSP(np, SCRIPTA_BA(np, start)); |
| 5375 | |
| 5376 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5377 | if (cp->host_status == HS_COMPLETE && |
| 5378 | cp->ssss_status == S_QUEUE_FULL) { |
| 5379 | if (!lp || lp->started_tags - i < 2) |
| 5380 | goto weirdness; |
| 5381 | /* |
| 5382 | * Decrease queue depth as needed. |
| 5383 | */ |
| 5384 | lp->started_max = lp->started_tags - i - 1; |
| 5385 | lp->num_sgood = 0; |
| 5386 | |
| 5387 | if (sym_verbose >= 2) { |
| 5388 | sym_print_addr(cmd, " queue depth is now %d\n", |
| 5389 | lp->started_max); |
| 5390 | } |
| 5391 | |
| 5392 | /* |
| 5393 | * Repair the CCB. |
| 5394 | */ |
| 5395 | cp->host_status = HS_BUSY; |
| 5396 | cp->ssss_status = S_ILLEGAL; |
| 5397 | |
| 5398 | /* |
| 5399 | * Let's requeue it to device. |
| 5400 | */ |
Matthew Wilcox | 53222b9 | 2005-05-20 19:15:43 +0100 | [diff] [blame] | 5401 | sym_set_cam_status(cmd, DID_SOFT_ERROR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5402 | goto finish; |
| 5403 | } |
| 5404 | weirdness: |
| 5405 | #endif |
| 5406 | /* |
| 5407 | * Build result in CAM ccb. |
| 5408 | */ |
| 5409 | sym_set_cam_result_error(np, cp, resid); |
| 5410 | |
| 5411 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5412 | finish: |
| 5413 | #endif |
| 5414 | /* |
| 5415 | * Add this one to the COMP queue. |
| 5416 | */ |
| 5417 | sym_remque(&cp->link_ccbq); |
| 5418 | sym_insque_head(&cp->link_ccbq, &np->comp_ccbq); |
| 5419 | |
| 5420 | /* |
| 5421 | * Complete all those commands with either error |
| 5422 | * or requeue condition. |
| 5423 | */ |
| 5424 | sym_flush_comp_queue(np, 0); |
| 5425 | |
| 5426 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5427 | /* |
| 5428 | * Donnot start more than 1 command after an error. |
| 5429 | */ |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 5430 | sym_start_next_ccbs(np, lp, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5431 | #endif |
| 5432 | } |
| 5433 | |
| 5434 | /* |
| 5435 | * Complete execution of a successful SCSI command. |
| 5436 | * |
| 5437 | * Only successful commands go to the DONE queue, |
| 5438 | * since we need to have the SCRIPTS processor |
| 5439 | * stopped on any error condition. |
| 5440 | * The SCRIPTS processor is running while we are |
| 5441 | * completing successful commands. |
| 5442 | */ |
| 5443 | void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp) |
| 5444 | { |
| 5445 | struct sym_tcb *tp; |
| 5446 | struct sym_lcb *lp; |
| 5447 | struct scsi_cmnd *cmd; |
| 5448 | int resid; |
| 5449 | |
| 5450 | /* |
| 5451 | * Paranoid check. :) |
| 5452 | */ |
| 5453 | if (!cp || !cp->cmd) |
| 5454 | return; |
| 5455 | assert (cp->host_status == HS_COMPLETE); |
| 5456 | |
| 5457 | /* |
| 5458 | * Get user command. |
| 5459 | */ |
| 5460 | cmd = cp->cmd; |
| 5461 | |
| 5462 | /* |
| 5463 | * Get target and lun pointers. |
| 5464 | */ |
| 5465 | tp = &np->target[cp->target]; |
| 5466 | lp = sym_lp(tp, cp->lun); |
| 5467 | |
| 5468 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5469 | * If all data have been transferred, given than no |
| 5470 | * extended error did occur, there is no residual. |
| 5471 | */ |
| 5472 | resid = 0; |
| 5473 | if (cp->phys.head.lastp != sym_goalp(cp)) |
| 5474 | resid = sym_compute_residual(np, cp); |
| 5475 | |
| 5476 | /* |
| 5477 | * Wrong transfer residuals may be worse than just always |
| 5478 | * returning zero. User can disable this feature in |
| 5479 | * sym53c8xx.h. Residual support is enabled by default. |
| 5480 | */ |
| 5481 | if (!SYM_SETUP_RESIDUAL_SUPPORT) |
| 5482 | resid = 0; |
| 5483 | #ifdef DEBUG_2_0_X |
| 5484 | if (resid) |
| 5485 | printf("XXXX RESID= %d - 0x%x\n", resid, resid); |
| 5486 | #endif |
| 5487 | |
| 5488 | /* |
| 5489 | * Build result in CAM ccb. |
| 5490 | */ |
| 5491 | sym_set_cam_result_ok(cp, cmd, resid); |
| 5492 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5493 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5494 | /* |
| 5495 | * If max number of started ccbs had been reduced, |
| 5496 | * increase it if 200 good status received. |
| 5497 | */ |
| 5498 | if (lp && lp->started_max < lp->started_limit) { |
| 5499 | ++lp->num_sgood; |
| 5500 | if (lp->num_sgood >= 200) { |
| 5501 | lp->num_sgood = 0; |
| 5502 | ++lp->started_max; |
| 5503 | if (sym_verbose >= 2) { |
| 5504 | sym_print_addr(cmd, " queue depth is now %d\n", |
| 5505 | lp->started_max); |
| 5506 | } |
| 5507 | } |
| 5508 | } |
| 5509 | #endif |
| 5510 | |
| 5511 | /* |
| 5512 | * Free our CCB. |
| 5513 | */ |
| 5514 | sym_free_ccb (np, cp); |
| 5515 | |
| 5516 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5517 | /* |
| 5518 | * Requeue a couple of awaiting scsi commands. |
| 5519 | */ |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 5520 | if (!sym_que_empty(&lp->waiting_ccbq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5521 | sym_start_next_ccbs(np, lp, 2); |
| 5522 | #endif |
| 5523 | /* |
| 5524 | * Complete the command. |
| 5525 | */ |
| 5526 | sym_xpt_done(np, cmd); |
| 5527 | } |
| 5528 | |
| 5529 | /* |
| 5530 | * Soft-attach the controller. |
| 5531 | */ |
| 5532 | int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram) |
| 5533 | { |
| 5534 | struct sym_hcb *np = sym_get_hcb(shost); |
| 5535 | int i; |
| 5536 | |
| 5537 | /* |
| 5538 | * Get some info about the firmware. |
| 5539 | */ |
| 5540 | np->scripta_sz = fw->a_size; |
| 5541 | np->scriptb_sz = fw->b_size; |
| 5542 | np->scriptz_sz = fw->z_size; |
| 5543 | np->fw_setup = fw->setup; |
| 5544 | np->fw_patch = fw->patch; |
| 5545 | np->fw_name = fw->name; |
| 5546 | |
| 5547 | /* |
| 5548 | * Save setting of some IO registers, so we will |
| 5549 | * be able to probe specific implementations. |
| 5550 | */ |
| 5551 | sym_save_initial_setting (np); |
| 5552 | |
| 5553 | /* |
| 5554 | * Reset the chip now, since it has been reported |
| 5555 | * that SCSI clock calibration may not work properly |
| 5556 | * if the chip is currently active. |
| 5557 | */ |
| 5558 | sym_chip_reset(np); |
| 5559 | |
| 5560 | /* |
| 5561 | * Prepare controller and devices settings, according |
| 5562 | * to chip features, user set-up and driver set-up. |
| 5563 | */ |
| 5564 | sym_prepare_setting(shost, np, nvram); |
| 5565 | |
| 5566 | /* |
| 5567 | * Check the PCI clock frequency. |
| 5568 | * Must be performed after prepare_setting since it destroys |
| 5569 | * STEST1 that is used to probe for the clock doubler. |
| 5570 | */ |
| 5571 | i = sym_getpciclock(np); |
| 5572 | if (i > 37000 && !(np->features & FE_66MHZ)) |
| 5573 | printf("%s: PCI BUS clock seems too high: %u KHz.\n", |
| 5574 | sym_name(np), i); |
| 5575 | |
| 5576 | /* |
| 5577 | * Allocate the start queue. |
| 5578 | */ |
| 5579 | np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE"); |
| 5580 | if (!np->squeue) |
| 5581 | goto attach_failed; |
| 5582 | np->squeue_ba = vtobus(np->squeue); |
| 5583 | |
| 5584 | /* |
| 5585 | * Allocate the done queue. |
| 5586 | */ |
| 5587 | np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE"); |
| 5588 | if (!np->dqueue) |
| 5589 | goto attach_failed; |
| 5590 | np->dqueue_ba = vtobus(np->dqueue); |
| 5591 | |
| 5592 | /* |
| 5593 | * Allocate the target bus address array. |
| 5594 | */ |
| 5595 | np->targtbl = sym_calloc_dma(256, "TARGTBL"); |
| 5596 | if (!np->targtbl) |
| 5597 | goto attach_failed; |
| 5598 | np->targtbl_ba = vtobus(np->targtbl); |
| 5599 | |
| 5600 | /* |
| 5601 | * Allocate SCRIPTS areas. |
| 5602 | */ |
| 5603 | np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0"); |
| 5604 | np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0"); |
| 5605 | np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0"); |
| 5606 | if (!np->scripta0 || !np->scriptb0 || !np->scriptz0) |
| 5607 | goto attach_failed; |
| 5608 | |
| 5609 | /* |
| 5610 | * Allocate the array of lists of CCBs hashed by DSA. |
| 5611 | */ |
| 5612 | np->ccbh = kcalloc(sizeof(struct sym_ccb **), CCB_HASH_SIZE, GFP_KERNEL); |
| 5613 | if (!np->ccbh) |
| 5614 | goto attach_failed; |
| 5615 | |
| 5616 | /* |
| 5617 | * Initialyze the CCB free and busy queues. |
| 5618 | */ |
| 5619 | sym_que_init(&np->free_ccbq); |
| 5620 | sym_que_init(&np->busy_ccbq); |
| 5621 | sym_que_init(&np->comp_ccbq); |
| 5622 | |
| 5623 | /* |
| 5624 | * Initialization for optional handling |
| 5625 | * of device queueing. |
| 5626 | */ |
| 5627 | #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING |
| 5628 | sym_que_init(&np->dummy_ccbq); |
| 5629 | #endif |
| 5630 | /* |
| 5631 | * Allocate some CCB. We need at least ONE. |
| 5632 | */ |
| 5633 | if (!sym_alloc_ccb(np)) |
| 5634 | goto attach_failed; |
| 5635 | |
| 5636 | /* |
| 5637 | * Calculate BUS addresses where we are going |
| 5638 | * to load the SCRIPTS. |
| 5639 | */ |
| 5640 | np->scripta_ba = vtobus(np->scripta0); |
| 5641 | np->scriptb_ba = vtobus(np->scriptb0); |
| 5642 | np->scriptz_ba = vtobus(np->scriptz0); |
| 5643 | |
| 5644 | if (np->ram_ba) { |
| 5645 | np->scripta_ba = np->ram_ba; |
| 5646 | if (np->features & FE_RAM8K) { |
| 5647 | np->ram_ws = 8192; |
| 5648 | np->scriptb_ba = np->scripta_ba + 4096; |
| 5649 | #if 0 /* May get useful for 64 BIT PCI addressing */ |
| 5650 | np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32); |
| 5651 | #endif |
| 5652 | } |
| 5653 | else |
| 5654 | np->ram_ws = 4096; |
| 5655 | } |
| 5656 | |
| 5657 | /* |
| 5658 | * Copy scripts to controller instance. |
| 5659 | */ |
| 5660 | memcpy(np->scripta0, fw->a_base, np->scripta_sz); |
| 5661 | memcpy(np->scriptb0, fw->b_base, np->scriptb_sz); |
| 5662 | memcpy(np->scriptz0, fw->z_base, np->scriptz_sz); |
| 5663 | |
| 5664 | /* |
| 5665 | * Setup variable parts in scripts and compute |
| 5666 | * scripts bus addresses used from the C code. |
| 5667 | */ |
| 5668 | np->fw_setup(np, fw); |
| 5669 | |
| 5670 | /* |
| 5671 | * Bind SCRIPTS with physical addresses usable by the |
| 5672 | * SCRIPTS processor (as seen from the BUS = BUS addresses). |
| 5673 | */ |
| 5674 | sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz); |
| 5675 | sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz); |
| 5676 | sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz); |
| 5677 | |
| 5678 | #ifdef SYM_CONF_IARB_SUPPORT |
| 5679 | /* |
| 5680 | * If user wants IARB to be set when we win arbitration |
| 5681 | * and have other jobs, compute the max number of consecutive |
| 5682 | * settings of IARB hints before we leave devices a chance to |
| 5683 | * arbitrate for reselection. |
| 5684 | */ |
| 5685 | #ifdef SYM_SETUP_IARB_MAX |
| 5686 | np->iarb_max = SYM_SETUP_IARB_MAX; |
| 5687 | #else |
| 5688 | np->iarb_max = 4; |
| 5689 | #endif |
| 5690 | #endif |
| 5691 | |
| 5692 | /* |
| 5693 | * Prepare the idle and invalid task actions. |
| 5694 | */ |
| 5695 | np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle)); |
| 5696 | np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); |
| 5697 | np->idletask_ba = vtobus(&np->idletask); |
| 5698 | |
| 5699 | np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle)); |
| 5700 | np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); |
| 5701 | np->notask_ba = vtobus(&np->notask); |
| 5702 | |
| 5703 | np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle)); |
| 5704 | np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); |
| 5705 | np->bad_itl_ba = vtobus(&np->bad_itl); |
| 5706 | |
| 5707 | np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle)); |
| 5708 | np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q)); |
| 5709 | np->bad_itlq_ba = vtobus(&np->bad_itlq); |
| 5710 | |
| 5711 | /* |
| 5712 | * Allocate and prepare the lun JUMP table that is used |
| 5713 | * for a target prior the probing of devices (bad lun table). |
| 5714 | * A private table will be allocated for the target on the |
| 5715 | * first INQUIRY response received. |
| 5716 | */ |
| 5717 | np->badluntbl = sym_calloc_dma(256, "BADLUNTBL"); |
| 5718 | if (!np->badluntbl) |
| 5719 | goto attach_failed; |
| 5720 | |
| 5721 | np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); |
| 5722 | for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */ |
| 5723 | np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa)); |
| 5724 | |
| 5725 | /* |
| 5726 | * Prepare the bus address array that contains the bus |
| 5727 | * address of each target control block. |
| 5728 | * For now, assume all logical units are wrong. :) |
| 5729 | */ |
| 5730 | for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { |
| 5731 | np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i])); |
| 5732 | np->target[i].head.luntbl_sa = |
| 5733 | cpu_to_scr(vtobus(np->badluntbl)); |
| 5734 | np->target[i].head.lun0_sa = |
| 5735 | cpu_to_scr(vtobus(&np->badlun_sa)); |
| 5736 | } |
| 5737 | |
| 5738 | /* |
| 5739 | * Now check the cache handling of the pci chipset. |
| 5740 | */ |
| 5741 | if (sym_snooptest (np)) { |
| 5742 | printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np)); |
| 5743 | goto attach_failed; |
| 5744 | } |
| 5745 | |
| 5746 | /* |
| 5747 | * Sigh! we are done. |
| 5748 | */ |
| 5749 | return 0; |
| 5750 | |
| 5751 | attach_failed: |
| 5752 | return -ENXIO; |
| 5753 | } |
| 5754 | |
| 5755 | /* |
| 5756 | * Free everything that has been allocated for this device. |
| 5757 | */ |
| 5758 | void sym_hcb_free(struct sym_hcb *np) |
| 5759 | { |
| 5760 | SYM_QUEHEAD *qp; |
| 5761 | struct sym_ccb *cp; |
| 5762 | struct sym_tcb *tp; |
Matthew Wilcox | 84e203a | 2005-11-29 23:08:31 -0500 | [diff] [blame^] | 5763 | int target; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5764 | |
| 5765 | if (np->scriptz0) |
| 5766 | sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0"); |
| 5767 | if (np->scriptb0) |
| 5768 | sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0"); |
| 5769 | if (np->scripta0) |
| 5770 | sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0"); |
| 5771 | if (np->squeue) |
| 5772 | sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE"); |
| 5773 | if (np->dqueue) |
| 5774 | sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE"); |
| 5775 | |
| 5776 | if (np->actccbs) { |
| 5777 | while ((qp = sym_remque_head(&np->free_ccbq)) != 0) { |
| 5778 | cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); |
| 5779 | sym_mfree_dma(cp, sizeof(*cp), "CCB"); |
| 5780 | } |
| 5781 | } |
| 5782 | kfree(np->ccbh); |
| 5783 | |
| 5784 | if (np->badluntbl) |
| 5785 | sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL"); |
| 5786 | |
| 5787 | for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) { |
| 5788 | tp = &np->target[target]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5789 | #if SYM_CONF_MAX_LUN > 1 |
| 5790 | kfree(tp->lunmp); |
| 5791 | #endif |
| 5792 | } |
| 5793 | if (np->targtbl) |
| 5794 | sym_mfree_dma(np->targtbl, 256, "TARGTBL"); |
| 5795 | } |