blob: 3246bb46c4f2add0636bca94b1b4c726542b1178 [file] [log] [blame]
Rob Clarkc8afe682013-06-26 12:44:06 -04001/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __MSM_GEM_H__
19#define __MSM_GEM_H__
20
Rob Clark7198e6b2013-07-19 12:59:32 -040021#include <linux/reservation.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040022#include "msm_drv.h"
23
24struct msm_gem_object {
25 struct drm_gem_object base;
26
27 uint32_t flags;
28
Rob Clark7198e6b2013-07-19 12:59:32 -040029 /* And object is either:
30 * inactive - on priv->inactive_list
31 * active - on one one of the gpu's active_list.. well, at
32 * least for now we don't have (I don't think) hw sync between
33 * 2d and 3d one devices which have both, meaning we need to
34 * block on submit if a bo is already on other ring
35 *
36 */
Rob Clarkc8afe682013-06-26 12:44:06 -040037 struct list_head mm_list;
Rob Clark7198e6b2013-07-19 12:59:32 -040038 struct msm_gpu *gpu; /* non-null if active */
Rob Clarkbf6811f2013-09-01 13:25:09 -040039 uint32_t read_fence, write_fence;
Rob Clark7198e6b2013-07-19 12:59:32 -040040
41 /* Transiently in the process of submit ioctl, objects associated
42 * with the submit are on submit->bo_list.. this only lasts for
43 * the duration of the ioctl, so one bo can never be on multiple
44 * submit lists.
45 */
46 struct list_head submit_entry;
47
Rob Clarkc8afe682013-06-26 12:44:06 -040048 struct page **pages;
49 struct sg_table *sgt;
50 void *vaddr;
51
52 struct {
53 // XXX
54 uint32_t iova;
55 } domain[NUM_DOMAINS];
Rob Clark7198e6b2013-07-19 12:59:32 -040056
57 /* normally (resv == &_resv) except for imported bo's */
58 struct reservation_object *resv;
59 struct reservation_object _resv;
Rob Clark871d8122013-11-16 12:56:06 -050060
61 /* For physically contiguous buffers. Used when we don't have
62 * an IOMMU.
63 */
64 struct drm_mm_node *vram_node;
Rob Clarkc8afe682013-06-26 12:44:06 -040065};
66#define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
67
Rob Clark7198e6b2013-07-19 12:59:32 -040068static inline bool is_active(struct msm_gem_object *msm_obj)
69{
70 return msm_obj->gpu != NULL;
71}
72
73#define MAX_CMDS 4
74
75/* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
76 * associated with the cmdstream submission for synchronization (and
77 * make it easier to unwind when things go wrong, etc). This only
78 * lasts for the duration of the submit-ioctl.
79 */
80struct msm_gem_submit {
81 struct drm_device *dev;
82 struct msm_gpu *gpu;
83 struct list_head bo_list;
84 struct ww_acquire_ctx ticket;
85 uint32_t fence;
86 bool valid;
87 unsigned int nr_cmds;
88 unsigned int nr_bos;
89 struct {
90 uint32_t type;
91 uint32_t size; /* in dwords */
92 uint32_t iova;
93 } cmd[MAX_CMDS];
94 struct {
95 uint32_t flags;
96 struct msm_gem_object *obj;
97 uint32_t iova;
98 } bos[0];
99};
100
Rob Clarkc8afe682013-06-26 12:44:06 -0400101#endif /* __MSM_GEM_H__ */