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gerrit-public.fairphone.software / kernel / msm-4.19 / 88ad58baf0d652a095b3255430ab7c10bea1b642 / . / arch / arm / boot / dts / spear300.dtsi
blob: f4e92e599729097f195dc6dd368c6628f3196b9c [file] [log] [blame]
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]1/*
2 * DTS file for SPEAr300 SoC
3 *
Viresh Kumarda899472015-07-17 16:23:50 -0700[diff] [blame]4 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear3xx.dtsi"
15
16/ {
17 ahb {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "simple-bus";
21 ranges = <0x60000000 0x60000000 0x50000000
22 0xd0000000 0xd0000000 0x30000000>;
23
Viresh Kumare0373602012-03-29 08:30:19 +0530[diff] [blame]24 pinmux@99000000 {
25 compatible = "st,spear300-pinmux";
26 reg = <0x99000000 0x1000>;
27 };
28
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]29 clcd@60000000 {
Vipul Kumar Samarf631b9842012-07-05 11:51:47 +0800[diff] [blame]30 compatible = "arm,pl110", "arm,primecell";
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]31 reg = <0x60000000 0x1000>;
32 interrupts = <30>;
33 status = "disabled";
34 };
35
36 fsmc: flash@94000000 {
37 compatible = "st,spear600-fsmc-nand";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x94000000 0x1000 /* FSMC Register */
Jean-Christophe PLAGNIOL-VILLARD6d7b42a2012-10-04 15:14:16 +0200[diff] [blame]41 0x80000000 0x0010 /* NAND Base DATA */
42 0x80020000 0x0010 /* NAND Base ADDR */
43 0x80010000 0x0010>; /* NAND Base CMD */
44 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]45 status = "disabled";
46 };
47
48 sdhci@70000000 {
49 compatible = "st,sdhci-spear";
50 reg = <0x70000000 0x100>;
51 interrupts = <1>;
52 status = "disabled";
53 };
54
Shiraz Hashim86edd7b2012-08-03 16:00:18 +0530[diff] [blame]55 shirq: interrupt-controller@0x50000000 {
56 compatible = "st,spear300-shirq";
57 reg = <0x50000000 0x1000>;
58 interrupts = <28>;
59 #interrupt-cells = <1>;
60 interrupt-controller;
61 };
62
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]63 apb {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "simple-bus";
67 ranges = <0xa0000000 0xa0000000 0x10000000
68 0xd0000000 0xd0000000 0x30000000>;
69
70 gpio1: gpio@a9000000 {
71 #gpio-cells = <2>;
72 compatible = "arm,pl061", "arm,primecell";
73 gpio-controller;
74 reg = <0xa9000000 0x1000>;
Shiraz Hashim86edd7b2012-08-03 16:00:18 +0530[diff] [blame]75 interrupts = <8>;
76 interrupt-parent = <&shirq>;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]77 status = "disabled";
78 };
79
80 kbd@a0000000 {
81 compatible = "st,spear300-kbd";
82 reg = <0xa0000000 0x1000>;
Shiraz Hashim86edd7b2012-08-03 16:00:18 +0530[diff] [blame]83 interrupts = <7>;
84 interrupt-parent = <&shirq>;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]85 status = "disabled";
86 };
87 };
88 };
89};