blob: 0977f2a247579d39e8deae17eed52969a44ce68b [file] [log] [blame]
Joseph Lodab403e2012-08-16 17:31:48 +08001/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
Prashant Gaikwad89572c72013-01-11 13:16:21 +053017#ifndef __LINUX_CLK_TEGRA_H_
18#define __LINUX_CLK_TEGRA_H_
Joseph Lodab403e2012-08-16 17:31:48 +080019
20/*
21 * Tegra CPU clock and reset control ops
22 *
23 * wait_for_reset:
24 * keep waiting until the CPU in reset state
25 * put_in_reset:
26 * put the CPU in reset state
27 * out_of_reset:
28 * release the CPU from reset state
29 * enable_clock:
30 * CPU clock un-gate
31 * disable_clock:
32 * CPU clock gate
Joseph Loa6e293e2012-10-31 17:41:19 +080033 * rail_off_ready:
34 * CPU is ready for rail off
35 * suspend:
36 * save the clock settings when CPU go into low-power state
37 * resume:
38 * restore the clock settings when CPU exit low-power state
Joseph Lodab403e2012-08-16 17:31:48 +080039 */
40struct tegra_cpu_car_ops {
41 void (*wait_for_reset)(u32 cpu);
42 void (*put_in_reset)(u32 cpu);
43 void (*out_of_reset)(u32 cpu);
44 void (*enable_clock)(u32 cpu);
45 void (*disable_clock)(u32 cpu);
Joseph Loa6e293e2012-10-31 17:41:19 +080046#ifdef CONFIG_PM_SLEEP
47 bool (*rail_off_ready)(void);
48 void (*suspend)(void);
49 void (*resume)(void);
50#endif
Joseph Lodab403e2012-08-16 17:31:48 +080051};
52
53extern struct tegra_cpu_car_ops *tegra_cpu_car_ops;
54
55static inline void tegra_wait_cpu_in_reset(u32 cpu)
56{
57 if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset))
58 return;
59
60 tegra_cpu_car_ops->wait_for_reset(cpu);
61}
62
63static inline void tegra_put_cpu_in_reset(u32 cpu)
64{
65 if (WARN_ON(!tegra_cpu_car_ops->put_in_reset))
66 return;
67
68 tegra_cpu_car_ops->put_in_reset(cpu);
69}
70
71static inline void tegra_cpu_out_of_reset(u32 cpu)
72{
73 if (WARN_ON(!tegra_cpu_car_ops->out_of_reset))
74 return;
75
76 tegra_cpu_car_ops->out_of_reset(cpu);
77}
78
79static inline void tegra_enable_cpu_clock(u32 cpu)
80{
81 if (WARN_ON(!tegra_cpu_car_ops->enable_clock))
82 return;
83
84 tegra_cpu_car_ops->enable_clock(cpu);
85}
86
87static inline void tegra_disable_cpu_clock(u32 cpu)
88{
89 if (WARN_ON(!tegra_cpu_car_ops->disable_clock))
90 return;
91
92 tegra_cpu_car_ops->disable_clock(cpu);
93}
94
Joseph Loa6e293e2012-10-31 17:41:19 +080095#ifdef CONFIG_PM_SLEEP
96static inline bool tegra_cpu_rail_off_ready(void)
97{
98 if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready))
99 return false;
100
101 return tegra_cpu_car_ops->rail_off_ready();
102}
103
104static inline void tegra_cpu_clock_suspend(void)
105{
106 if (WARN_ON(!tegra_cpu_car_ops->suspend))
107 return;
108
109 tegra_cpu_car_ops->suspend();
110}
111
112static inline void tegra_cpu_clock_resume(void)
113{
114 if (WARN_ON(!tegra_cpu_car_ops->resume))
115 return;
116
117 tegra_cpu_car_ops->resume();
118}
119#endif
120
Joseph Lodab403e2012-08-16 17:31:48 +0800121void tegra20_cpu_car_ops_init(void);
122void tegra30_cpu_car_ops_init(void);
123
Prashant Gaikwad89572c72013-01-11 13:16:21 +0530124#endif /* __LINUX_CLK_TEGRA_H_ */