Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / 89d63fe179520b11f54de1f26755b7444c79e73a / . / arch / mips / pci / pci-tx4927.c
blob: 27e86a09dd4167a8d511963e90742ad2b9ec39d0 [file] [log] [blame]
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +0900[diff] [blame^]1/*
2 * linux/arch/mips/pci/pci-tx4927.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * Copyright 2001, 2003-2005 MontaVista Software Inc.
8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
9 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <linux/kernel.h>
18#include <asm/txx9/generic.h>
19#include <asm/txx9/tx4927.h>
20
21int __init tx4927_report_pciclk(void)
22{
23 int pciclk = 0;
24
25 printk(KERN_INFO "PCIC --%s PCICLK:",
26 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
27 " PCI66" : "");
28 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
29 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
30 switch ((unsigned long)ccfg &
31 TX4927_CCFG_PCIDIVMODE_MASK) {
32 case TX4927_CCFG_PCIDIVMODE_2_5:
33 pciclk = txx9_cpu_clock * 2 / 5; break;
34 case TX4927_CCFG_PCIDIVMODE_3:
35 pciclk = txx9_cpu_clock / 3; break;
36 case TX4927_CCFG_PCIDIVMODE_5:
37 pciclk = txx9_cpu_clock / 5; break;
38 case TX4927_CCFG_PCIDIVMODE_6:
39 pciclk = txx9_cpu_clock / 6; break;
40 }
41 printk("Internal(%u.%uMHz)",
42 (pciclk + 50000) / 1000000,
43 ((pciclk + 50000) / 100000) % 10);
44 } else {
45 printk("External");
46 pciclk = -1;
47 }
48 printk("\n");
49 return pciclk;
50}
51
52int __init tx4927_pciclk66_setup(void)
53{
54 int pciclk;
55
56 /* Assert M66EN */
57 tx4927_ccfg_set(TX4927_CCFG_PCI66);
58 /* Double PCICLK (if possible) */
59 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
60 unsigned int pcidivmode = 0;
61 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
62 pcidivmode = (unsigned long)ccfg &
63 TX4927_CCFG_PCIDIVMODE_MASK;
64 switch (pcidivmode) {
65 case TX4927_CCFG_PCIDIVMODE_5:
66 case TX4927_CCFG_PCIDIVMODE_2_5:
67 pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
68 pciclk = txx9_cpu_clock * 2 / 5;
69 break;
70 case TX4927_CCFG_PCIDIVMODE_6:
71 case TX4927_CCFG_PCIDIVMODE_3:
72 default:
73 pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
74 pciclk = txx9_cpu_clock / 3;
75 }
76 tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
77 pcidivmode);
78 printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
79 (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
80 } else
81 pciclk = -1;
82 return pciclk;
83}